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hayeswangac718b62013-05-02 16:01:25 +00001/*
hayeswangc7de7de2014-01-15 10:42:16 +08002 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
hayeswangac718b62013-05-02 16:01:25 +00003 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
7 *
8 */
9
hayeswangac718b62013-05-02 16:01:25 +000010#include <linux/signal.h>
11#include <linux/slab.h>
12#include <linux/module.h>
hayeswangac718b62013-05-02 16:01:25 +000013#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/mii.h>
16#include <linux/ethtool.h>
17#include <linux/usb.h>
18#include <linux/crc32.h>
19#include <linux/if_vlan.h>
20#include <linux/uaccess.h>
hayeswangebc2ec42013-08-14 20:54:38 +080021#include <linux/list.h>
hayeswang5bd23882013-08-14 20:54:39 +080022#include <linux/ip.h>
23#include <linux/ipv6.h>
hayeswang6128d1b2014-03-07 11:04:40 +080024#include <net/ip6_checksum.h>
hayeswang4c4a6b12014-09-25 20:54:00 +080025#include <uapi/linux/mdio.h>
26#include <linux/mdio.h>
hayeswangd9a28c52014-12-04 10:43:11 +080027#include <linux/usb/cdc.h>
hayeswangac718b62013-05-02 16:01:25 +000028
hayeswangd0942472015-09-07 11:57:43 +080029/* Information for net-next */
30#define NETNEXT_VERSION "08"
31
32/* Information for net */
hayeswang2dd49e02015-09-07 11:57:44 +080033#define NET_VERSION "2"
hayeswangd0942472015-09-07 11:57:43 +080034
35#define DRIVER_VERSION "v1." NETNEXT_VERSION "." NET_VERSION
hayeswangac718b62013-05-02 16:01:25 +000036#define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
hayeswang44d942a2014-01-15 10:42:14 +080037#define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
hayeswangac718b62013-05-02 16:01:25 +000038#define MODULENAME "r8152"
39
40#define R8152_PHY_ID 32
41
42#define PLA_IDR 0xc000
43#define PLA_RCR 0xc010
44#define PLA_RMS 0xc016
45#define PLA_RXFIFO_CTRL0 0xc0a0
46#define PLA_RXFIFO_CTRL1 0xc0a4
47#define PLA_RXFIFO_CTRL2 0xc0a8
hayeswang65bab842015-02-12 16:20:46 +080048#define PLA_DMY_REG0 0xc0b0
hayeswangac718b62013-05-02 16:01:25 +000049#define PLA_FMC 0xc0b4
50#define PLA_CFG_WOL 0xc0b6
hayeswang43779f82014-01-02 11:25:10 +080051#define PLA_TEREDO_CFG 0xc0bc
hayeswangac718b62013-05-02 16:01:25 +000052#define PLA_MAR 0xcd00
hayeswang43779f82014-01-02 11:25:10 +080053#define PLA_BACKUP 0xd000
hayeswangac718b62013-05-02 16:01:25 +000054#define PAL_BDC_CR 0xd1a0
hayeswang43779f82014-01-02 11:25:10 +080055#define PLA_TEREDO_TIMER 0xd2cc
56#define PLA_REALWOW_TIMER 0xd2e8
hayeswangac718b62013-05-02 16:01:25 +000057#define PLA_LEDSEL 0xdd90
58#define PLA_LED_FEATURE 0xdd92
59#define PLA_PHYAR 0xde00
hayeswang43779f82014-01-02 11:25:10 +080060#define PLA_BOOT_CTRL 0xe004
hayeswangac718b62013-05-02 16:01:25 +000061#define PLA_GPHY_INTR_IMR 0xe022
62#define PLA_EEE_CR 0xe040
63#define PLA_EEEP_CR 0xe080
64#define PLA_MAC_PWR_CTRL 0xe0c0
hayeswang43779f82014-01-02 11:25:10 +080065#define PLA_MAC_PWR_CTRL2 0xe0ca
66#define PLA_MAC_PWR_CTRL3 0xe0cc
67#define PLA_MAC_PWR_CTRL4 0xe0ce
68#define PLA_WDT6_CTRL 0xe428
hayeswangac718b62013-05-02 16:01:25 +000069#define PLA_TCR0 0xe610
70#define PLA_TCR1 0xe612
hayeswang69b4b7a2014-07-10 10:58:54 +080071#define PLA_MTPS 0xe615
hayeswangac718b62013-05-02 16:01:25 +000072#define PLA_TXFIFO_CTRL 0xe618
hayeswang4f1d4d52014-03-11 16:24:19 +080073#define PLA_RSTTALLY 0xe800
hayeswangac718b62013-05-02 16:01:25 +000074#define PLA_CR 0xe813
75#define PLA_CRWECR 0xe81c
hayeswang21ff2e82014-02-18 21:49:06 +080076#define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
77#define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
hayeswangac718b62013-05-02 16:01:25 +000078#define PLA_CONFIG5 0xe822
79#define PLA_PHY_PWR 0xe84c
80#define PLA_OOB_CTRL 0xe84f
81#define PLA_CPCR 0xe854
82#define PLA_MISC_0 0xe858
83#define PLA_MISC_1 0xe85a
84#define PLA_OCP_GPHY_BASE 0xe86c
hayeswang4f1d4d52014-03-11 16:24:19 +080085#define PLA_TALLYCNT 0xe890
hayeswangac718b62013-05-02 16:01:25 +000086#define PLA_SFF_STS_7 0xe8de
87#define PLA_PHYSTATUS 0xe908
88#define PLA_BP_BA 0xfc26
89#define PLA_BP_0 0xfc28
90#define PLA_BP_1 0xfc2a
91#define PLA_BP_2 0xfc2c
92#define PLA_BP_3 0xfc2e
93#define PLA_BP_4 0xfc30
94#define PLA_BP_5 0xfc32
95#define PLA_BP_6 0xfc34
96#define PLA_BP_7 0xfc36
hayeswang43779f82014-01-02 11:25:10 +080097#define PLA_BP_EN 0xfc38
hayeswangac718b62013-05-02 16:01:25 +000098
hayeswang65bab842015-02-12 16:20:46 +080099#define USB_USB2PHY 0xb41e
100#define USB_SSPHYLINK2 0xb428
hayeswang43779f82014-01-02 11:25:10 +0800101#define USB_U2P3_CTRL 0xb460
hayeswang65bab842015-02-12 16:20:46 +0800102#define USB_CSR_DUMMY1 0xb464
103#define USB_CSR_DUMMY2 0xb466
hayeswangac718b62013-05-02 16:01:25 +0000104#define USB_DEV_STAT 0xb808
hayeswang65bab842015-02-12 16:20:46 +0800105#define USB_CONNECT_TIMER 0xcbf8
106#define USB_BURST_SIZE 0xcfc0
hayeswangac718b62013-05-02 16:01:25 +0000107#define USB_USB_CTRL 0xd406
108#define USB_PHY_CTRL 0xd408
109#define USB_TX_AGG 0xd40a
110#define USB_RX_BUF_TH 0xd40c
111#define USB_USB_TIMER 0xd428
hayeswang464ec102015-02-12 14:33:46 +0800112#define USB_RX_EARLY_TIMEOUT 0xd42c
113#define USB_RX_EARLY_SIZE 0xd42e
hayeswangac718b62013-05-02 16:01:25 +0000114#define USB_PM_CTRL_STATUS 0xd432
115#define USB_TX_DMA 0xd434
hayeswang43779f82014-01-02 11:25:10 +0800116#define USB_TOLERANCE 0xd490
117#define USB_LPM_CTRL 0xd41a
hayeswangac718b62013-05-02 16:01:25 +0000118#define USB_UPS_CTRL 0xd800
hayeswang43779f82014-01-02 11:25:10 +0800119#define USB_MISC_0 0xd81a
120#define USB_POWER_CUT 0xd80a
121#define USB_AFE_CTRL2 0xd824
122#define USB_WDT11_CTRL 0xe43c
hayeswangac718b62013-05-02 16:01:25 +0000123#define USB_BP_BA 0xfc26
124#define USB_BP_0 0xfc28
125#define USB_BP_1 0xfc2a
126#define USB_BP_2 0xfc2c
127#define USB_BP_3 0xfc2e
128#define USB_BP_4 0xfc30
129#define USB_BP_5 0xfc32
130#define USB_BP_6 0xfc34
131#define USB_BP_7 0xfc36
hayeswang43779f82014-01-02 11:25:10 +0800132#define USB_BP_EN 0xfc38
hayeswangac718b62013-05-02 16:01:25 +0000133
134/* OCP Registers */
135#define OCP_ALDPS_CONFIG 0x2010
136#define OCP_EEE_CONFIG1 0x2080
137#define OCP_EEE_CONFIG2 0x2092
138#define OCP_EEE_CONFIG3 0x2094
hayeswangac244d32014-01-02 11:22:40 +0800139#define OCP_BASE_MII 0xa400
hayeswangac718b62013-05-02 16:01:25 +0000140#define OCP_EEE_AR 0xa41a
141#define OCP_EEE_DATA 0xa41c
hayeswang43779f82014-01-02 11:25:10 +0800142#define OCP_PHY_STATUS 0xa420
143#define OCP_POWER_CFG 0xa430
144#define OCP_EEE_CFG 0xa432
145#define OCP_SRAM_ADDR 0xa436
146#define OCP_SRAM_DATA 0xa438
147#define OCP_DOWN_SPEED 0xa442
hayeswangdf35d282014-09-25 20:54:02 +0800148#define OCP_EEE_ABLE 0xa5c4
hayeswang4c4a6b12014-09-25 20:54:00 +0800149#define OCP_EEE_ADV 0xa5d0
hayeswangdf35d282014-09-25 20:54:02 +0800150#define OCP_EEE_LPABLE 0xa5d2
hayeswang2dd49e02015-09-07 11:57:44 +0800151#define OCP_PHY_STATE 0xa708 /* nway state for 8153 */
hayeswang43779f82014-01-02 11:25:10 +0800152#define OCP_ADC_CFG 0xbc06
153
154/* SRAM Register */
155#define SRAM_LPF_CFG 0x8012
156#define SRAM_10M_AMP1 0x8080
157#define SRAM_10M_AMP2 0x8082
158#define SRAM_IMPEDANCE 0x8084
hayeswangac718b62013-05-02 16:01:25 +0000159
160/* PLA_RCR */
161#define RCR_AAP 0x00000001
162#define RCR_APM 0x00000002
163#define RCR_AM 0x00000004
164#define RCR_AB 0x00000008
165#define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
166
167/* PLA_RXFIFO_CTRL0 */
168#define RXFIFO_THR1_NORMAL 0x00080002
169#define RXFIFO_THR1_OOB 0x01800003
170
171/* PLA_RXFIFO_CTRL1 */
172#define RXFIFO_THR2_FULL 0x00000060
173#define RXFIFO_THR2_HIGH 0x00000038
174#define RXFIFO_THR2_OOB 0x0000004a
hayeswang43779f82014-01-02 11:25:10 +0800175#define RXFIFO_THR2_NORMAL 0x00a0
hayeswangac718b62013-05-02 16:01:25 +0000176
177/* PLA_RXFIFO_CTRL2 */
178#define RXFIFO_THR3_FULL 0x00000078
179#define RXFIFO_THR3_HIGH 0x00000048
180#define RXFIFO_THR3_OOB 0x0000005a
hayeswang43779f82014-01-02 11:25:10 +0800181#define RXFIFO_THR3_NORMAL 0x0110
hayeswangac718b62013-05-02 16:01:25 +0000182
183/* PLA_TXFIFO_CTRL */
184#define TXFIFO_THR_NORMAL 0x00400008
hayeswang43779f82014-01-02 11:25:10 +0800185#define TXFIFO_THR_NORMAL2 0x01000008
hayeswangac718b62013-05-02 16:01:25 +0000186
hayeswang65bab842015-02-12 16:20:46 +0800187/* PLA_DMY_REG0 */
188#define ECM_ALDPS 0x0002
189
hayeswangac718b62013-05-02 16:01:25 +0000190/* PLA_FMC */
191#define FMC_FCR_MCU_EN 0x0001
192
193/* PLA_EEEP_CR */
194#define EEEP_CR_EEEP_TX 0x0002
195
hayeswang43779f82014-01-02 11:25:10 +0800196/* PLA_WDT6_CTRL */
197#define WDT6_SET_MODE 0x0010
198
hayeswangac718b62013-05-02 16:01:25 +0000199/* PLA_TCR0 */
200#define TCR0_TX_EMPTY 0x0800
201#define TCR0_AUTO_FIFO 0x0080
202
203/* PLA_TCR1 */
204#define VERSION_MASK 0x7cf0
205
hayeswang69b4b7a2014-07-10 10:58:54 +0800206/* PLA_MTPS */
207#define MTPS_JUMBO (12 * 1024 / 64)
208#define MTPS_DEFAULT (6 * 1024 / 64)
209
hayeswang4f1d4d52014-03-11 16:24:19 +0800210/* PLA_RSTTALLY */
211#define TALLY_RESET 0x0001
212
hayeswangac718b62013-05-02 16:01:25 +0000213/* PLA_CR */
214#define CR_RST 0x10
215#define CR_RE 0x08
216#define CR_TE 0x04
217
218/* PLA_CRWECR */
219#define CRWECR_NORAML 0x00
220#define CRWECR_CONFIG 0xc0
221
222/* PLA_OOB_CTRL */
223#define NOW_IS_OOB 0x80
224#define TXFIFO_EMPTY 0x20
225#define RXFIFO_EMPTY 0x10
226#define LINK_LIST_READY 0x02
227#define DIS_MCU_CLROOB 0x01
228#define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
229
230/* PLA_MISC_1 */
231#define RXDY_GATED_EN 0x0008
232
233/* PLA_SFF_STS_7 */
234#define RE_INIT_LL 0x8000
235#define MCU_BORW_EN 0x4000
236
237/* PLA_CPCR */
238#define CPCR_RX_VLAN 0x0040
239
240/* PLA_CFG_WOL */
241#define MAGIC_EN 0x0001
242
hayeswang43779f82014-01-02 11:25:10 +0800243/* PLA_TEREDO_CFG */
244#define TEREDO_SEL 0x8000
245#define TEREDO_WAKE_MASK 0x7f00
246#define TEREDO_RS_EVENT_MASK 0x00fe
247#define OOB_TEREDO_EN 0x0001
248
hayeswangac718b62013-05-02 16:01:25 +0000249/* PAL_BDC_CR */
250#define ALDPS_PROXY_MODE 0x0001
251
hayeswang21ff2e82014-02-18 21:49:06 +0800252/* PLA_CONFIG34 */
253#define LINK_ON_WAKE_EN 0x0010
254#define LINK_OFF_WAKE_EN 0x0008
255
hayeswangac718b62013-05-02 16:01:25 +0000256/* PLA_CONFIG5 */
hayeswang21ff2e82014-02-18 21:49:06 +0800257#define BWF_EN 0x0040
258#define MWF_EN 0x0020
259#define UWF_EN 0x0010
hayeswangac718b62013-05-02 16:01:25 +0000260#define LAN_WAKE_EN 0x0002
261
262/* PLA_LED_FEATURE */
263#define LED_MODE_MASK 0x0700
264
265/* PLA_PHY_PWR */
266#define TX_10M_IDLE_EN 0x0080
267#define PFM_PWM_SWITCH 0x0040
268
269/* PLA_MAC_PWR_CTRL */
270#define D3_CLK_GATED_EN 0x00004000
271#define MCU_CLK_RATIO 0x07010f07
272#define MCU_CLK_RATIO_MASK 0x0f0f0f0f
hayeswang43779f82014-01-02 11:25:10 +0800273#define ALDPS_SPDWN_RATIO 0x0f87
274
275/* PLA_MAC_PWR_CTRL2 */
276#define EEE_SPDWN_RATIO 0x8007
277
278/* PLA_MAC_PWR_CTRL3 */
279#define PKT_AVAIL_SPDWN_EN 0x0100
280#define SUSPEND_SPDWN_EN 0x0004
281#define U1U2_SPDWN_EN 0x0002
282#define L1_SPDWN_EN 0x0001
283
284/* PLA_MAC_PWR_CTRL4 */
285#define PWRSAVE_SPDWN_EN 0x1000
286#define RXDV_SPDWN_EN 0x0800
287#define TX10MIDLE_EN 0x0100
288#define TP100_SPDWN_EN 0x0020
289#define TP500_SPDWN_EN 0x0010
290#define TP1000_SPDWN_EN 0x0008
291#define EEE_SPDWN_EN 0x0001
hayeswangac718b62013-05-02 16:01:25 +0000292
293/* PLA_GPHY_INTR_IMR */
294#define GPHY_STS_MSK 0x0001
295#define SPEED_DOWN_MSK 0x0002
296#define SPDWN_RXDV_MSK 0x0004
297#define SPDWN_LINKCHG_MSK 0x0008
298
299/* PLA_PHYAR */
300#define PHYAR_FLAG 0x80000000
301
302/* PLA_EEE_CR */
303#define EEE_RX_EN 0x0001
304#define EEE_TX_EN 0x0002
305
hayeswang43779f82014-01-02 11:25:10 +0800306/* PLA_BOOT_CTRL */
307#define AUTOLOAD_DONE 0x0002
308
hayeswang65bab842015-02-12 16:20:46 +0800309/* USB_USB2PHY */
310#define USB2PHY_SUSPEND 0x0001
311#define USB2PHY_L1 0x0002
312
313/* USB_SSPHYLINK2 */
314#define pwd_dn_scale_mask 0x3ffe
315#define pwd_dn_scale(x) ((x) << 1)
316
317/* USB_CSR_DUMMY1 */
318#define DYNAMIC_BURST 0x0001
319
320/* USB_CSR_DUMMY2 */
321#define EP4_FULL_FC 0x0001
322
hayeswangac718b62013-05-02 16:01:25 +0000323/* USB_DEV_STAT */
324#define STAT_SPEED_MASK 0x0006
325#define STAT_SPEED_HIGH 0x0000
hayeswanga3cc4652014-07-24 16:37:43 +0800326#define STAT_SPEED_FULL 0x0002
hayeswangac718b62013-05-02 16:01:25 +0000327
328/* USB_TX_AGG */
329#define TX_AGG_MAX_THRESHOLD 0x03
330
331/* USB_RX_BUF_TH */
hayeswang43779f82014-01-02 11:25:10 +0800332#define RX_THR_SUPPER 0x0c350180
hayeswang8e1f51b2014-01-02 11:22:41 +0800333#define RX_THR_HIGH 0x7a120180
hayeswang43779f82014-01-02 11:25:10 +0800334#define RX_THR_SLOW 0xffff0180
hayeswangac718b62013-05-02 16:01:25 +0000335
336/* USB_TX_DMA */
337#define TEST_MODE_DISABLE 0x00000001
338#define TX_SIZE_ADJUST1 0x00000100
339
340/* USB_UPS_CTRL */
341#define POWER_CUT 0x0100
342
343/* USB_PM_CTRL_STATUS */
hayeswang8e1f51b2014-01-02 11:22:41 +0800344#define RESUME_INDICATE 0x0001
hayeswangac718b62013-05-02 16:01:25 +0000345
346/* USB_USB_CTRL */
347#define RX_AGG_DISABLE 0x0010
hayeswange90fba82015-07-31 11:23:39 +0800348#define RX_ZERO_EN 0x0080
hayeswangac718b62013-05-02 16:01:25 +0000349
hayeswang43779f82014-01-02 11:25:10 +0800350/* USB_U2P3_CTRL */
351#define U2P3_ENABLE 0x0001
352
353/* USB_POWER_CUT */
354#define PWR_EN 0x0001
355#define PHASE2_EN 0x0008
356
357/* USB_MISC_0 */
358#define PCUT_STATUS 0x0001
359
hayeswang464ec102015-02-12 14:33:46 +0800360/* USB_RX_EARLY_TIMEOUT */
361#define COALESCE_SUPER 85000U
362#define COALESCE_HIGH 250000U
363#define COALESCE_SLOW 524280U
hayeswang43779f82014-01-02 11:25:10 +0800364
365/* USB_WDT11_CTRL */
366#define TIMER11_EN 0x0001
367
368/* USB_LPM_CTRL */
hayeswang65bab842015-02-12 16:20:46 +0800369/* bit 4 ~ 5: fifo empty boundary */
370#define FIFO_EMPTY_1FB 0x30 /* 0x1fb * 64 = 32448 bytes */
371/* bit 2 ~ 3: LMP timer */
hayeswang43779f82014-01-02 11:25:10 +0800372#define LPM_TIMER_MASK 0x0c
373#define LPM_TIMER_500MS 0x04 /* 500 ms */
374#define LPM_TIMER_500US 0x0c /* 500 us */
hayeswang65bab842015-02-12 16:20:46 +0800375#define ROK_EXIT_LPM 0x02
hayeswang43779f82014-01-02 11:25:10 +0800376
377/* USB_AFE_CTRL2 */
378#define SEN_VAL_MASK 0xf800
379#define SEN_VAL_NORMAL 0xa000
380#define SEL_RXIDLE 0x0100
381
hayeswangac718b62013-05-02 16:01:25 +0000382/* OCP_ALDPS_CONFIG */
383#define ENPWRSAVE 0x8000
384#define ENPDNPS 0x0200
385#define LINKENA 0x0100
386#define DIS_SDSAVE 0x0010
387
hayeswang43779f82014-01-02 11:25:10 +0800388/* OCP_PHY_STATUS */
389#define PHY_STAT_MASK 0x0007
390#define PHY_STAT_LAN_ON 3
391#define PHY_STAT_PWRDN 5
392
393/* OCP_POWER_CFG */
394#define EEE_CLKDIV_EN 0x8000
395#define EN_ALDPS 0x0004
396#define EN_10M_PLLOFF 0x0001
397
hayeswangac718b62013-05-02 16:01:25 +0000398/* OCP_EEE_CONFIG1 */
399#define RG_TXLPI_MSK_HFDUP 0x8000
400#define RG_MATCLR_EN 0x4000
401#define EEE_10_CAP 0x2000
402#define EEE_NWAY_EN 0x1000
403#define TX_QUIET_EN 0x0200
404#define RX_QUIET_EN 0x0100
hayeswangd24f6132014-09-25 20:54:01 +0800405#define sd_rise_time_mask 0x0070
hayeswang4c4a6b12014-09-25 20:54:00 +0800406#define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
hayeswangac718b62013-05-02 16:01:25 +0000407#define RG_RXLPI_MSK_HFDUP 0x0008
408#define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
409
410/* OCP_EEE_CONFIG2 */
411#define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
412#define RG_DACQUIET_EN 0x0400
413#define RG_LDVQUIET_EN 0x0200
414#define RG_CKRSEL 0x0020
415#define RG_EEEPRG_EN 0x0010
416
417/* OCP_EEE_CONFIG3 */
hayeswangd24f6132014-09-25 20:54:01 +0800418#define fast_snr_mask 0xff80
hayeswang4c4a6b12014-09-25 20:54:00 +0800419#define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
hayeswangac718b62013-05-02 16:01:25 +0000420#define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
421#define MSK_PH 0x0006 /* bit 0 ~ 3 */
422
423/* OCP_EEE_AR */
424/* bit[15:14] function */
425#define FUN_ADDR 0x0000
426#define FUN_DATA 0x4000
427/* bit[4:0] device addr */
hayeswangac718b62013-05-02 16:01:25 +0000428
hayeswang43779f82014-01-02 11:25:10 +0800429/* OCP_EEE_CFG */
430#define CTAP_SHORT_EN 0x0040
431#define EEE10_EN 0x0010
432
433/* OCP_DOWN_SPEED */
434#define EN_10M_BGOFF 0x0080
435
hayeswang2dd49e02015-09-07 11:57:44 +0800436/* OCP_PHY_STATE */
437#define TXDIS_STATE 0x01
438#define ABD_STATE 0x02
439
hayeswang43779f82014-01-02 11:25:10 +0800440/* OCP_ADC_CFG */
441#define CKADSEL_L 0x0100
442#define ADC_EN 0x0080
443#define EN_EMI_L 0x0040
444
445/* SRAM_LPF_CFG */
446#define LPF_AUTO_TUNE 0x8000
447
448/* SRAM_10M_AMP1 */
449#define GDAC_IB_UPALL 0x0008
450
451/* SRAM_10M_AMP2 */
452#define AMP_DN 0x0200
453
454/* SRAM_IMPEDANCE */
455#define RX_DRIVING_MASK 0x6000
456
hayeswangac718b62013-05-02 16:01:25 +0000457enum rtl_register_content {
hayeswang43779f82014-01-02 11:25:10 +0800458 _1000bps = 0x10,
hayeswangac718b62013-05-02 16:01:25 +0000459 _100bps = 0x08,
460 _10bps = 0x04,
461 LINK_STATUS = 0x02,
462 FULL_DUP = 0x01,
463};
464
hayeswang1764bcd2014-08-28 10:24:18 +0800465#define RTL8152_MAX_TX 4
hayeswangebc2ec42013-08-14 20:54:38 +0800466#define RTL8152_MAX_RX 10
hayeswang40a82912013-08-14 20:54:40 +0800467#define INTBUFSIZE 2
hayeswang8e1f51b2014-01-02 11:22:41 +0800468#define CRC_SIZE 4
469#define TX_ALIGN 4
470#define RX_ALIGN 8
hayeswang40a82912013-08-14 20:54:40 +0800471
472#define INTR_LINK 0x0004
hayeswangebc2ec42013-08-14 20:54:38 +0800473
hayeswangac718b62013-05-02 16:01:25 +0000474#define RTL8152_REQT_READ 0xc0
475#define RTL8152_REQT_WRITE 0x40
476#define RTL8152_REQ_GET_REGS 0x05
477#define RTL8152_REQ_SET_REGS 0x05
478
479#define BYTE_EN_DWORD 0xff
480#define BYTE_EN_WORD 0x33
481#define BYTE_EN_BYTE 0x11
482#define BYTE_EN_SIX_BYTES 0x3f
483#define BYTE_EN_START_MASK 0x0f
484#define BYTE_EN_END_MASK 0xf0
485
hayeswang69b4b7a2014-07-10 10:58:54 +0800486#define RTL8153_MAX_PACKET 9216 /* 9K */
487#define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
hayeswangac718b62013-05-02 16:01:25 +0000488#define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
hayeswang69b4b7a2014-07-10 10:58:54 +0800489#define RTL8153_RMS RTL8153_MAX_PACKET
hayeswangb8125402014-07-03 11:55:48 +0800490#define RTL8152_TX_TIMEOUT (5 * HZ)
hayeswangd823ab62015-01-12 12:06:23 +0800491#define RTL8152_NAPI_WEIGHT 64
hayeswangac718b62013-05-02 16:01:25 +0000492
493/* rtl8152 flags */
494enum rtl8152_flags {
495 RTL8152_UNPLUG = 0,
hayeswangac718b62013-05-02 16:01:25 +0000496 RTL8152_SET_RX_MODE,
hayeswang40a82912013-08-14 20:54:40 +0800497 WORK_ENABLE,
498 RTL8152_LINK_CHG,
hayeswang9a4be1b2014-02-18 21:49:07 +0800499 SELECTIVE_SUSPEND,
hayeswangaa66a5f2014-02-18 21:49:04 +0800500 PHY_RESET,
hayeswangd823ab62015-01-12 12:06:23 +0800501 SCHEDULE_NAPI,
hayeswangac718b62013-05-02 16:01:25 +0000502};
503
504/* Define these values to match your device */
505#define VENDOR_ID_REALTEK 0x0bda
hayeswang43779f82014-01-02 11:25:10 +0800506#define VENDOR_ID_SAMSUNG 0x04e8
Christian Hesse347eec32015-03-31 14:10:07 +0200507#define VENDOR_ID_LENOVO 0x17ef
Zheng Liud065c3c2015-07-07 13:54:12 -0700508#define VENDOR_ID_NVIDIA 0x0955
hayeswangac718b62013-05-02 16:01:25 +0000509
510#define MCU_TYPE_PLA 0x0100
511#define MCU_TYPE_USB 0x0000
512
hayeswang4f1d4d52014-03-11 16:24:19 +0800513struct tally_counter {
514 __le64 tx_packets;
515 __le64 rx_packets;
516 __le64 tx_errors;
517 __le32 rx_errors;
518 __le16 rx_missed;
519 __le16 align_errors;
520 __le32 tx_one_collision;
521 __le32 tx_multi_collision;
522 __le64 rx_unicast;
523 __le64 rx_broadcast;
524 __le32 rx_multicast;
525 __le16 tx_aborted;
hayeswangf37119c2014-10-28 14:05:51 +0800526 __le16 tx_underrun;
hayeswang4f1d4d52014-03-11 16:24:19 +0800527};
528
hayeswangac718b62013-05-02 16:01:25 +0000529struct rx_desc {
hayeswang500b6d72013-11-20 17:30:57 +0800530 __le32 opts1;
hayeswangac718b62013-05-02 16:01:25 +0000531#define RX_LEN_MASK 0x7fff
hayeswang565cab02014-03-07 11:04:38 +0800532
hayeswang500b6d72013-11-20 17:30:57 +0800533 __le32 opts2;
hayeswangf5aaaa62015-02-06 11:30:51 +0800534#define RD_UDP_CS BIT(23)
535#define RD_TCP_CS BIT(22)
536#define RD_IPV6_CS BIT(20)
537#define RD_IPV4_CS BIT(19)
hayeswang565cab02014-03-07 11:04:38 +0800538
hayeswang500b6d72013-11-20 17:30:57 +0800539 __le32 opts3;
hayeswangf5aaaa62015-02-06 11:30:51 +0800540#define IPF BIT(23) /* IP checksum fail */
541#define UDPF BIT(22) /* UDP checksum fail */
542#define TCPF BIT(21) /* TCP checksum fail */
543#define RX_VLAN_TAG BIT(16)
hayeswang565cab02014-03-07 11:04:38 +0800544
hayeswang500b6d72013-11-20 17:30:57 +0800545 __le32 opts4;
546 __le32 opts5;
547 __le32 opts6;
hayeswangac718b62013-05-02 16:01:25 +0000548};
549
550struct tx_desc {
hayeswang500b6d72013-11-20 17:30:57 +0800551 __le32 opts1;
hayeswangf5aaaa62015-02-06 11:30:51 +0800552#define TX_FS BIT(31) /* First segment of a packet */
553#define TX_LS BIT(30) /* Final segment of a packet */
554#define GTSENDV4 BIT(28)
555#define GTSENDV6 BIT(27)
hayeswang60c89072014-03-07 11:04:39 +0800556#define GTTCPHO_SHIFT 18
hayeswang6128d1b2014-03-07 11:04:40 +0800557#define GTTCPHO_MAX 0x7fU
hayeswang60c89072014-03-07 11:04:39 +0800558#define TX_LEN_MAX 0x3ffffU
hayeswang5bd23882013-08-14 20:54:39 +0800559
hayeswang500b6d72013-11-20 17:30:57 +0800560 __le32 opts2;
hayeswangf5aaaa62015-02-06 11:30:51 +0800561#define UDP_CS BIT(31) /* Calculate UDP/IP checksum */
562#define TCP_CS BIT(30) /* Calculate TCP/IP checksum */
563#define IPV4_CS BIT(29) /* Calculate IPv4 checksum */
564#define IPV6_CS BIT(28) /* Calculate IPv6 checksum */
hayeswang60c89072014-03-07 11:04:39 +0800565#define MSS_SHIFT 17
566#define MSS_MAX 0x7ffU
567#define TCPHO_SHIFT 17
hayeswang6128d1b2014-03-07 11:04:40 +0800568#define TCPHO_MAX 0x7ffU
hayeswangf5aaaa62015-02-06 11:30:51 +0800569#define TX_VLAN_TAG BIT(16)
hayeswangac718b62013-05-02 16:01:25 +0000570};
571
hayeswangdff4e8a2013-08-16 16:09:33 +0800572struct r8152;
573
hayeswangebc2ec42013-08-14 20:54:38 +0800574struct rx_agg {
575 struct list_head list;
576 struct urb *urb;
hayeswangdff4e8a2013-08-16 16:09:33 +0800577 struct r8152 *context;
hayeswangebc2ec42013-08-14 20:54:38 +0800578 void *buffer;
579 void *head;
580};
581
582struct tx_agg {
583 struct list_head list;
584 struct urb *urb;
hayeswangdff4e8a2013-08-16 16:09:33 +0800585 struct r8152 *context;
hayeswangebc2ec42013-08-14 20:54:38 +0800586 void *buffer;
587 void *head;
588 u32 skb_num;
589 u32 skb_len;
590};
591
hayeswangac718b62013-05-02 16:01:25 +0000592struct r8152 {
593 unsigned long flags;
594 struct usb_device *udev;
hayeswangd823ab62015-01-12 12:06:23 +0800595 struct napi_struct napi;
hayeswang40a82912013-08-14 20:54:40 +0800596 struct usb_interface *intf;
hayeswangac718b62013-05-02 16:01:25 +0000597 struct net_device *netdev;
hayeswang40a82912013-08-14 20:54:40 +0800598 struct urb *intr_urb;
hayeswangebc2ec42013-08-14 20:54:38 +0800599 struct tx_agg tx_info[RTL8152_MAX_TX];
600 struct rx_agg rx_info[RTL8152_MAX_RX];
601 struct list_head rx_done, tx_free;
hayeswangd823ab62015-01-12 12:06:23 +0800602 struct sk_buff_head tx_queue, rx_queue;
hayeswangebc2ec42013-08-14 20:54:38 +0800603 spinlock_t rx_lock, tx_lock;
hayeswangac718b62013-05-02 16:01:25 +0000604 struct delayed_work schedule;
605 struct mii_if_info mii;
hayeswangb5403272014-10-09 18:00:26 +0800606 struct mutex control; /* use for hw setting */
hayeswangc81229c2014-01-02 11:22:42 +0800607
608 struct rtl_ops {
609 void (*init)(struct r8152 *);
610 int (*enable)(struct r8152 *);
611 void (*disable)(struct r8152 *);
hayeswang7e9da482014-02-18 21:49:05 +0800612 void (*up)(struct r8152 *);
hayeswangc81229c2014-01-02 11:22:42 +0800613 void (*down)(struct r8152 *);
614 void (*unload)(struct r8152 *);
hayeswangdf35d282014-09-25 20:54:02 +0800615 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
616 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
hayeswang2dd49e02015-09-07 11:57:44 +0800617 bool (*in_nway)(struct r8152 *);
hayeswangc81229c2014-01-02 11:22:42 +0800618 } rtl_ops;
619
hayeswang40a82912013-08-14 20:54:40 +0800620 int intr_interval;
hayeswang21ff2e82014-02-18 21:49:06 +0800621 u32 saved_wolopts;
hayeswangac718b62013-05-02 16:01:25 +0000622 u32 msg_enable;
hayeswangdd1b1192013-11-20 17:30:56 +0800623 u32 tx_qlen;
hayeswang464ec102015-02-12 14:33:46 +0800624 u32 coalesce;
hayeswangac718b62013-05-02 16:01:25 +0000625 u16 ocp_base;
hayeswang40a82912013-08-14 20:54:40 +0800626 u8 *intr_buff;
hayeswangac718b62013-05-02 16:01:25 +0000627 u8 version;
hayeswangac718b62013-05-02 16:01:25 +0000628};
629
630enum rtl_version {
631 RTL_VER_UNKNOWN = 0,
632 RTL_VER_01,
hayeswang43779f82014-01-02 11:25:10 +0800633 RTL_VER_02,
634 RTL_VER_03,
635 RTL_VER_04,
636 RTL_VER_05,
hayeswangfb02eb42015-07-22 15:27:41 +0800637 RTL_VER_06,
hayeswang43779f82014-01-02 11:25:10 +0800638 RTL_VER_MAX
hayeswangac718b62013-05-02 16:01:25 +0000639};
640
hayeswang60c89072014-03-07 11:04:39 +0800641enum tx_csum_stat {
642 TX_CSUM_SUCCESS = 0,
643 TX_CSUM_TSO,
644 TX_CSUM_NONE
645};
646
hayeswangac718b62013-05-02 16:01:25 +0000647/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
648 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
649 */
650static const int multicast_filter_limit = 32;
hayeswang52aec122014-09-02 10:27:52 +0800651static unsigned int agg_buf_sz = 16384;
hayeswangac718b62013-05-02 16:01:25 +0000652
hayeswang52aec122014-09-02 10:27:52 +0800653#define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
hayeswang60c89072014-03-07 11:04:39 +0800654 VLAN_ETH_HLEN - VLAN_HLEN)
655
hayeswangac718b62013-05-02 16:01:25 +0000656static
657int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
658{
hayeswang31787f52013-07-31 17:21:25 +0800659 int ret;
660 void *tmp;
661
662 tmp = kmalloc(size, GFP_KERNEL);
663 if (!tmp)
664 return -ENOMEM;
665
666 ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
hayeswangb209af92014-08-25 15:53:00 +0800667 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
668 value, index, tmp, size, 500);
hayeswang31787f52013-07-31 17:21:25 +0800669
670 memcpy(data, tmp, size);
671 kfree(tmp);
672
673 return ret;
hayeswangac718b62013-05-02 16:01:25 +0000674}
675
676static
677int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
678{
hayeswang31787f52013-07-31 17:21:25 +0800679 int ret;
680 void *tmp;
681
Benoit Tainec4438f02014-05-26 17:21:23 +0200682 tmp = kmemdup(data, size, GFP_KERNEL);
hayeswang31787f52013-07-31 17:21:25 +0800683 if (!tmp)
684 return -ENOMEM;
685
hayeswang31787f52013-07-31 17:21:25 +0800686 ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
hayeswangb209af92014-08-25 15:53:00 +0800687 RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
688 value, index, tmp, size, 500);
hayeswang31787f52013-07-31 17:21:25 +0800689
690 kfree(tmp);
hayeswangdb8515e2014-03-06 15:07:16 +0800691
hayeswang31787f52013-07-31 17:21:25 +0800692 return ret;
hayeswangac718b62013-05-02 16:01:25 +0000693}
694
695static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
hayeswangb209af92014-08-25 15:53:00 +0800696 void *data, u16 type)
hayeswangac718b62013-05-02 16:01:25 +0000697{
hayeswang45f4a192014-01-06 17:08:41 +0800698 u16 limit = 64;
699 int ret = 0;
hayeswangac718b62013-05-02 16:01:25 +0000700
701 if (test_bit(RTL8152_UNPLUG, &tp->flags))
702 return -ENODEV;
703
704 /* both size and indix must be 4 bytes align */
705 if ((size & 3) || !size || (index & 3) || !data)
706 return -EPERM;
707
708 if ((u32)index + (u32)size > 0xffff)
709 return -EPERM;
710
711 while (size) {
712 if (size > limit) {
713 ret = get_registers(tp, index, type, limit, data);
714 if (ret < 0)
715 break;
716
717 index += limit;
718 data += limit;
719 size -= limit;
720 } else {
721 ret = get_registers(tp, index, type, size, data);
722 if (ret < 0)
723 break;
724
725 index += size;
726 data += size;
727 size = 0;
728 break;
729 }
730 }
731
hayeswang67610492014-10-30 11:46:40 +0800732 if (ret == -ENODEV)
733 set_bit(RTL8152_UNPLUG, &tp->flags);
734
hayeswangac718b62013-05-02 16:01:25 +0000735 return ret;
736}
737
738static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
hayeswangb209af92014-08-25 15:53:00 +0800739 u16 size, void *data, u16 type)
hayeswangac718b62013-05-02 16:01:25 +0000740{
hayeswang45f4a192014-01-06 17:08:41 +0800741 int ret;
742 u16 byteen_start, byteen_end, byen;
743 u16 limit = 512;
hayeswangac718b62013-05-02 16:01:25 +0000744
745 if (test_bit(RTL8152_UNPLUG, &tp->flags))
746 return -ENODEV;
747
748 /* both size and indix must be 4 bytes align */
749 if ((size & 3) || !size || (index & 3) || !data)
750 return -EPERM;
751
752 if ((u32)index + (u32)size > 0xffff)
753 return -EPERM;
754
755 byteen_start = byteen & BYTE_EN_START_MASK;
756 byteen_end = byteen & BYTE_EN_END_MASK;
757
758 byen = byteen_start | (byteen_start << 4);
759 ret = set_registers(tp, index, type | byen, 4, data);
760 if (ret < 0)
761 goto error1;
762
763 index += 4;
764 data += 4;
765 size -= 4;
766
767 if (size) {
768 size -= 4;
769
770 while (size) {
771 if (size > limit) {
772 ret = set_registers(tp, index,
hayeswangb209af92014-08-25 15:53:00 +0800773 type | BYTE_EN_DWORD,
774 limit, data);
hayeswangac718b62013-05-02 16:01:25 +0000775 if (ret < 0)
776 goto error1;
777
778 index += limit;
779 data += limit;
780 size -= limit;
781 } else {
782 ret = set_registers(tp, index,
hayeswangb209af92014-08-25 15:53:00 +0800783 type | BYTE_EN_DWORD,
784 size, data);
hayeswangac718b62013-05-02 16:01:25 +0000785 if (ret < 0)
786 goto error1;
787
788 index += size;
789 data += size;
790 size = 0;
791 break;
792 }
793 }
794
795 byen = byteen_end | (byteen_end >> 4);
796 ret = set_registers(tp, index, type | byen, 4, data);
797 if (ret < 0)
798 goto error1;
799 }
800
801error1:
hayeswang67610492014-10-30 11:46:40 +0800802 if (ret == -ENODEV)
803 set_bit(RTL8152_UNPLUG, &tp->flags);
804
hayeswangac718b62013-05-02 16:01:25 +0000805 return ret;
806}
807
808static inline
809int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
810{
811 return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
812}
813
814static inline
815int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
816{
817 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
818}
819
820static inline
821int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
822{
823 return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
824}
825
826static inline
827int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
828{
829 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
830}
831
832static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
833{
hayeswangc8826de2013-07-31 17:21:26 +0800834 __le32 data;
hayeswangac718b62013-05-02 16:01:25 +0000835
hayeswangc8826de2013-07-31 17:21:26 +0800836 generic_ocp_read(tp, index, sizeof(data), &data, type);
hayeswangac718b62013-05-02 16:01:25 +0000837
838 return __le32_to_cpu(data);
839}
840
841static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
842{
hayeswangc8826de2013-07-31 17:21:26 +0800843 __le32 tmp = __cpu_to_le32(data);
844
845 generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
hayeswangac718b62013-05-02 16:01:25 +0000846}
847
848static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
849{
850 u32 data;
hayeswangc8826de2013-07-31 17:21:26 +0800851 __le32 tmp;
hayeswangac718b62013-05-02 16:01:25 +0000852 u8 shift = index & 2;
853
854 index &= ~3;
855
hayeswangc8826de2013-07-31 17:21:26 +0800856 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
hayeswangac718b62013-05-02 16:01:25 +0000857
hayeswangc8826de2013-07-31 17:21:26 +0800858 data = __le32_to_cpu(tmp);
hayeswangac718b62013-05-02 16:01:25 +0000859 data >>= (shift * 8);
860 data &= 0xffff;
861
862 return (u16)data;
863}
864
865static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
866{
hayeswangc8826de2013-07-31 17:21:26 +0800867 u32 mask = 0xffff;
868 __le32 tmp;
hayeswangac718b62013-05-02 16:01:25 +0000869 u16 byen = BYTE_EN_WORD;
870 u8 shift = index & 2;
871
872 data &= mask;
873
874 if (index & 2) {
875 byen <<= shift;
876 mask <<= (shift * 8);
877 data <<= (shift * 8);
878 index &= ~3;
879 }
880
hayeswangc8826de2013-07-31 17:21:26 +0800881 tmp = __cpu_to_le32(data);
hayeswangac718b62013-05-02 16:01:25 +0000882
hayeswangc8826de2013-07-31 17:21:26 +0800883 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
hayeswangac718b62013-05-02 16:01:25 +0000884}
885
886static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
887{
888 u32 data;
hayeswangc8826de2013-07-31 17:21:26 +0800889 __le32 tmp;
hayeswangac718b62013-05-02 16:01:25 +0000890 u8 shift = index & 3;
891
892 index &= ~3;
893
hayeswangc8826de2013-07-31 17:21:26 +0800894 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
hayeswangac718b62013-05-02 16:01:25 +0000895
hayeswangc8826de2013-07-31 17:21:26 +0800896 data = __le32_to_cpu(tmp);
hayeswangac718b62013-05-02 16:01:25 +0000897 data >>= (shift * 8);
898 data &= 0xff;
899
900 return (u8)data;
901}
902
903static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
904{
hayeswangc8826de2013-07-31 17:21:26 +0800905 u32 mask = 0xff;
906 __le32 tmp;
hayeswangac718b62013-05-02 16:01:25 +0000907 u16 byen = BYTE_EN_BYTE;
908 u8 shift = index & 3;
909
910 data &= mask;
911
912 if (index & 3) {
913 byen <<= shift;
914 mask <<= (shift * 8);
915 data <<= (shift * 8);
916 index &= ~3;
917 }
918
hayeswangc8826de2013-07-31 17:21:26 +0800919 tmp = __cpu_to_le32(data);
hayeswangac718b62013-05-02 16:01:25 +0000920
hayeswangc8826de2013-07-31 17:21:26 +0800921 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
hayeswangac718b62013-05-02 16:01:25 +0000922}
923
hayeswangac244d32014-01-02 11:22:40 +0800924static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
925{
926 u16 ocp_base, ocp_index;
927
928 ocp_base = addr & 0xf000;
929 if (ocp_base != tp->ocp_base) {
930 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
931 tp->ocp_base = ocp_base;
932 }
933
934 ocp_index = (addr & 0x0fff) | 0xb000;
935 return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
936}
937
hayeswange3fe0b12014-01-02 11:22:39 +0800938static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
939{
940 u16 ocp_base, ocp_index;
941
942 ocp_base = addr & 0xf000;
943 if (ocp_base != tp->ocp_base) {
944 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
945 tp->ocp_base = ocp_base;
946 }
947
948 ocp_index = (addr & 0x0fff) | 0xb000;
949 ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
950}
951
hayeswangac244d32014-01-02 11:22:40 +0800952static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
hayeswangac718b62013-05-02 16:01:25 +0000953{
hayeswangac244d32014-01-02 11:22:40 +0800954 ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
hayeswangac718b62013-05-02 16:01:25 +0000955}
956
hayeswangac244d32014-01-02 11:22:40 +0800957static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
hayeswangac718b62013-05-02 16:01:25 +0000958{
hayeswangac244d32014-01-02 11:22:40 +0800959 return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
hayeswangac718b62013-05-02 16:01:25 +0000960}
961
hayeswang43779f82014-01-02 11:25:10 +0800962static void sram_write(struct r8152 *tp, u16 addr, u16 data)
963{
964 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
965 ocp_reg_write(tp, OCP_SRAM_DATA, data);
966}
967
hayeswangac718b62013-05-02 16:01:25 +0000968static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
969{
970 struct r8152 *tp = netdev_priv(netdev);
hayeswang9a4be1b2014-02-18 21:49:07 +0800971 int ret;
hayeswangac718b62013-05-02 16:01:25 +0000972
hayeswang68714382014-04-11 17:54:31 +0800973 if (test_bit(RTL8152_UNPLUG, &tp->flags))
974 return -ENODEV;
975
hayeswangac718b62013-05-02 16:01:25 +0000976 if (phy_id != R8152_PHY_ID)
977 return -EINVAL;
978
hayeswang9a4be1b2014-02-18 21:49:07 +0800979 ret = r8152_mdio_read(tp, reg);
980
hayeswang9a4be1b2014-02-18 21:49:07 +0800981 return ret;
hayeswangac718b62013-05-02 16:01:25 +0000982}
983
984static
985void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
986{
987 struct r8152 *tp = netdev_priv(netdev);
988
hayeswang68714382014-04-11 17:54:31 +0800989 if (test_bit(RTL8152_UNPLUG, &tp->flags))
990 return;
991
hayeswangac718b62013-05-02 16:01:25 +0000992 if (phy_id != R8152_PHY_ID)
993 return;
994
995 r8152_mdio_write(tp, reg, val);
996}
997
hayeswangb209af92014-08-25 15:53:00 +0800998static int
999r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
hayeswangebc2ec42013-08-14 20:54:38 +08001000
hayeswang8ba789a2014-09-04 16:15:41 +08001001static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
1002{
1003 struct r8152 *tp = netdev_priv(netdev);
1004 struct sockaddr *addr = p;
hayeswangea6a7112014-10-02 17:03:12 +08001005 int ret = -EADDRNOTAVAIL;
hayeswang8ba789a2014-09-04 16:15:41 +08001006
1007 if (!is_valid_ether_addr(addr->sa_data))
hayeswangea6a7112014-10-02 17:03:12 +08001008 goto out1;
1009
1010 ret = usb_autopm_get_interface(tp->intf);
1011 if (ret < 0)
1012 goto out1;
hayeswang8ba789a2014-09-04 16:15:41 +08001013
hayeswangb5403272014-10-09 18:00:26 +08001014 mutex_lock(&tp->control);
1015
hayeswang8ba789a2014-09-04 16:15:41 +08001016 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1017
1018 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1019 pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1020 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1021
hayeswangb5403272014-10-09 18:00:26 +08001022 mutex_unlock(&tp->control);
1023
hayeswangea6a7112014-10-02 17:03:12 +08001024 usb_autopm_put_interface(tp->intf);
1025out1:
1026 return ret;
hayeswang8ba789a2014-09-04 16:15:41 +08001027}
1028
hayeswang179bb6d2014-09-04 16:15:42 +08001029static int set_ethernet_addr(struct r8152 *tp)
hayeswangac718b62013-05-02 16:01:25 +00001030{
1031 struct net_device *dev = tp->netdev;
hayeswang179bb6d2014-09-04 16:15:42 +08001032 struct sockaddr sa;
hayeswang8a91c822014-02-18 21:49:01 +08001033 int ret;
hayeswangac718b62013-05-02 16:01:25 +00001034
hayeswang8a91c822014-02-18 21:49:01 +08001035 if (tp->version == RTL_VER_01)
hayeswang179bb6d2014-09-04 16:15:42 +08001036 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
hayeswang8a91c822014-02-18 21:49:01 +08001037 else
hayeswang179bb6d2014-09-04 16:15:42 +08001038 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
hayeswang8a91c822014-02-18 21:49:01 +08001039
1040 if (ret < 0) {
hayeswang179bb6d2014-09-04 16:15:42 +08001041 netif_err(tp, probe, dev, "Get ether addr fail\n");
1042 } else if (!is_valid_ether_addr(sa.sa_data)) {
1043 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1044 sa.sa_data);
1045 eth_hw_addr_random(dev);
1046 ether_addr_copy(sa.sa_data, dev->dev_addr);
1047 ret = rtl8152_set_mac_address(dev, &sa);
1048 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1049 sa.sa_data);
hayeswang8a91c822014-02-18 21:49:01 +08001050 } else {
hayeswang179bb6d2014-09-04 16:15:42 +08001051 if (tp->version == RTL_VER_01)
1052 ether_addr_copy(dev->dev_addr, sa.sa_data);
1053 else
1054 ret = rtl8152_set_mac_address(dev, &sa);
hayeswangac718b62013-05-02 16:01:25 +00001055 }
hayeswang179bb6d2014-09-04 16:15:42 +08001056
1057 return ret;
hayeswangac718b62013-05-02 16:01:25 +00001058}
1059
hayeswangac718b62013-05-02 16:01:25 +00001060static void read_bulk_callback(struct urb *urb)
1061{
hayeswangac718b62013-05-02 16:01:25 +00001062 struct net_device *netdev;
hayeswangac718b62013-05-02 16:01:25 +00001063 int status = urb->status;
hayeswangebc2ec42013-08-14 20:54:38 +08001064 struct rx_agg *agg;
1065 struct r8152 *tp;
hayeswangac718b62013-05-02 16:01:25 +00001066
hayeswangebc2ec42013-08-14 20:54:38 +08001067 agg = urb->context;
1068 if (!agg)
1069 return;
1070
1071 tp = agg->context;
hayeswangac718b62013-05-02 16:01:25 +00001072 if (!tp)
1073 return;
hayeswangebc2ec42013-08-14 20:54:38 +08001074
hayeswangac718b62013-05-02 16:01:25 +00001075 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1076 return;
hayeswangebc2ec42013-08-14 20:54:38 +08001077
1078 if (!test_bit(WORK_ENABLE, &tp->flags))
hayeswangac718b62013-05-02 16:01:25 +00001079 return;
1080
hayeswangebc2ec42013-08-14 20:54:38 +08001081 netdev = tp->netdev;
hayeswang7559fb2f2013-08-16 16:09:38 +08001082
1083 /* When link down, the driver would cancel all bulks. */
1084 /* This avoid the re-submitting bulk */
hayeswangebc2ec42013-08-14 20:54:38 +08001085 if (!netif_carrier_ok(netdev))
1086 return;
1087
hayeswang9a4be1b2014-02-18 21:49:07 +08001088 usb_mark_last_busy(tp->udev);
1089
hayeswangac718b62013-05-02 16:01:25 +00001090 switch (status) {
1091 case 0:
hayeswangebc2ec42013-08-14 20:54:38 +08001092 if (urb->actual_length < ETH_ZLEN)
1093 break;
1094
hayeswang2685d412014-03-07 11:04:34 +08001095 spin_lock(&tp->rx_lock);
hayeswangebc2ec42013-08-14 20:54:38 +08001096 list_add_tail(&agg->list, &tp->rx_done);
hayeswang2685d412014-03-07 11:04:34 +08001097 spin_unlock(&tp->rx_lock);
hayeswangd823ab62015-01-12 12:06:23 +08001098 napi_schedule(&tp->napi);
hayeswangebc2ec42013-08-14 20:54:38 +08001099 return;
hayeswangac718b62013-05-02 16:01:25 +00001100 case -ESHUTDOWN:
1101 set_bit(RTL8152_UNPLUG, &tp->flags);
1102 netif_device_detach(tp->netdev);
hayeswangebc2ec42013-08-14 20:54:38 +08001103 return;
hayeswangac718b62013-05-02 16:01:25 +00001104 case -ENOENT:
1105 return; /* the urb is in unlink state */
1106 case -ETIME:
Hayes Wang4a8deae2014-01-07 11:18:22 +08001107 if (net_ratelimit())
1108 netdev_warn(netdev, "maybe reset is needed?\n");
hayeswangebc2ec42013-08-14 20:54:38 +08001109 break;
hayeswangac718b62013-05-02 16:01:25 +00001110 default:
Hayes Wang4a8deae2014-01-07 11:18:22 +08001111 if (net_ratelimit())
1112 netdev_warn(netdev, "Rx status %d\n", status);
hayeswangebc2ec42013-08-14 20:54:38 +08001113 break;
hayeswangac718b62013-05-02 16:01:25 +00001114 }
1115
hayeswanga0fccd42014-11-20 10:29:05 +08001116 r8152_submit_rx(tp, agg, GFP_ATOMIC);
hayeswangac718b62013-05-02 16:01:25 +00001117}
1118
1119static void write_bulk_callback(struct urb *urb)
1120{
hayeswangebc2ec42013-08-14 20:54:38 +08001121 struct net_device_stats *stats;
hayeswangd104eaf2014-03-06 15:07:17 +08001122 struct net_device *netdev;
hayeswangebc2ec42013-08-14 20:54:38 +08001123 struct tx_agg *agg;
hayeswangac718b62013-05-02 16:01:25 +00001124 struct r8152 *tp;
1125 int status = urb->status;
1126
hayeswangebc2ec42013-08-14 20:54:38 +08001127 agg = urb->context;
1128 if (!agg)
1129 return;
1130
1131 tp = agg->context;
hayeswangac718b62013-05-02 16:01:25 +00001132 if (!tp)
1133 return;
hayeswangebc2ec42013-08-14 20:54:38 +08001134
hayeswangd104eaf2014-03-06 15:07:17 +08001135 netdev = tp->netdev;
hayeswang05e0f1a2014-03-06 15:07:18 +08001136 stats = &netdev->stats;
hayeswangebc2ec42013-08-14 20:54:38 +08001137 if (status) {
Hayes Wang4a8deae2014-01-07 11:18:22 +08001138 if (net_ratelimit())
hayeswangd104eaf2014-03-06 15:07:17 +08001139 netdev_warn(netdev, "Tx status %d\n", status);
hayeswangebc2ec42013-08-14 20:54:38 +08001140 stats->tx_errors += agg->skb_num;
1141 } else {
1142 stats->tx_packets += agg->skb_num;
1143 stats->tx_bytes += agg->skb_len;
1144 }
1145
hayeswang2685d412014-03-07 11:04:34 +08001146 spin_lock(&tp->tx_lock);
hayeswangebc2ec42013-08-14 20:54:38 +08001147 list_add_tail(&agg->list, &tp->tx_free);
hayeswang2685d412014-03-07 11:04:34 +08001148 spin_unlock(&tp->tx_lock);
hayeswangebc2ec42013-08-14 20:54:38 +08001149
hayeswang9a4be1b2014-02-18 21:49:07 +08001150 usb_autopm_put_interface_async(tp->intf);
1151
hayeswangd104eaf2014-03-06 15:07:17 +08001152 if (!netif_carrier_ok(netdev))
hayeswangac718b62013-05-02 16:01:25 +00001153 return;
hayeswangebc2ec42013-08-14 20:54:38 +08001154
1155 if (!test_bit(WORK_ENABLE, &tp->flags))
1156 return;
1157
1158 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1159 return;
1160
1161 if (!skb_queue_empty(&tp->tx_queue))
hayeswangd823ab62015-01-12 12:06:23 +08001162 napi_schedule(&tp->napi);
hayeswangebc2ec42013-08-14 20:54:38 +08001163}
1164
hayeswang40a82912013-08-14 20:54:40 +08001165static void intr_callback(struct urb *urb)
1166{
1167 struct r8152 *tp;
hayeswang500b6d72013-11-20 17:30:57 +08001168 __le16 *d;
hayeswang40a82912013-08-14 20:54:40 +08001169 int status = urb->status;
1170 int res;
1171
1172 tp = urb->context;
1173 if (!tp)
1174 return;
1175
1176 if (!test_bit(WORK_ENABLE, &tp->flags))
1177 return;
1178
1179 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1180 return;
1181
1182 switch (status) {
1183 case 0: /* success */
1184 break;
1185 case -ECONNRESET: /* unlink */
1186 case -ESHUTDOWN:
1187 netif_device_detach(tp->netdev);
1188 case -ENOENT:
hayeswangd59c8762014-10-31 13:35:57 +08001189 case -EPROTO:
1190 netif_info(tp, intr, tp->netdev,
1191 "Stop submitting intr, status %d\n", status);
hayeswang40a82912013-08-14 20:54:40 +08001192 return;
1193 case -EOVERFLOW:
1194 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1195 goto resubmit;
1196 /* -EPIPE: should clear the halt */
1197 default:
1198 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1199 goto resubmit;
1200 }
1201
1202 d = urb->transfer_buffer;
1203 if (INTR_LINK & __le16_to_cpu(d[0])) {
hayeswang51d979f2015-02-06 11:30:47 +08001204 if (!netif_carrier_ok(tp->netdev)) {
hayeswang40a82912013-08-14 20:54:40 +08001205 set_bit(RTL8152_LINK_CHG, &tp->flags);
1206 schedule_delayed_work(&tp->schedule, 0);
1207 }
1208 } else {
hayeswang51d979f2015-02-06 11:30:47 +08001209 if (netif_carrier_ok(tp->netdev)) {
hayeswang40a82912013-08-14 20:54:40 +08001210 set_bit(RTL8152_LINK_CHG, &tp->flags);
1211 schedule_delayed_work(&tp->schedule, 0);
1212 }
1213 }
1214
1215resubmit:
1216 res = usb_submit_urb(urb, GFP_ATOMIC);
hayeswang67610492014-10-30 11:46:40 +08001217 if (res == -ENODEV) {
1218 set_bit(RTL8152_UNPLUG, &tp->flags);
hayeswang40a82912013-08-14 20:54:40 +08001219 netif_device_detach(tp->netdev);
hayeswang67610492014-10-30 11:46:40 +08001220 } else if (res) {
hayeswang40a82912013-08-14 20:54:40 +08001221 netif_err(tp, intr, tp->netdev,
Hayes Wang4a8deae2014-01-07 11:18:22 +08001222 "can't resubmit intr, status %d\n", res);
hayeswang67610492014-10-30 11:46:40 +08001223 }
hayeswang40a82912013-08-14 20:54:40 +08001224}
1225
hayeswangebc2ec42013-08-14 20:54:38 +08001226static inline void *rx_agg_align(void *data)
1227{
hayeswang8e1f51b2014-01-02 11:22:41 +08001228 return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
hayeswangebc2ec42013-08-14 20:54:38 +08001229}
1230
1231static inline void *tx_agg_align(void *data)
1232{
hayeswang8e1f51b2014-01-02 11:22:41 +08001233 return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
hayeswangebc2ec42013-08-14 20:54:38 +08001234}
1235
1236static void free_all_mem(struct r8152 *tp)
1237{
1238 int i;
1239
1240 for (i = 0; i < RTL8152_MAX_RX; i++) {
hayeswang9629e3c2014-01-15 10:42:15 +08001241 usb_free_urb(tp->rx_info[i].urb);
1242 tp->rx_info[i].urb = NULL;
hayeswangebc2ec42013-08-14 20:54:38 +08001243
hayeswang9629e3c2014-01-15 10:42:15 +08001244 kfree(tp->rx_info[i].buffer);
1245 tp->rx_info[i].buffer = NULL;
1246 tp->rx_info[i].head = NULL;
hayeswangebc2ec42013-08-14 20:54:38 +08001247 }
1248
1249 for (i = 0; i < RTL8152_MAX_TX; i++) {
hayeswang9629e3c2014-01-15 10:42:15 +08001250 usb_free_urb(tp->tx_info[i].urb);
1251 tp->tx_info[i].urb = NULL;
hayeswangebc2ec42013-08-14 20:54:38 +08001252
hayeswang9629e3c2014-01-15 10:42:15 +08001253 kfree(tp->tx_info[i].buffer);
1254 tp->tx_info[i].buffer = NULL;
1255 tp->tx_info[i].head = NULL;
hayeswangebc2ec42013-08-14 20:54:38 +08001256 }
hayeswang40a82912013-08-14 20:54:40 +08001257
hayeswang9629e3c2014-01-15 10:42:15 +08001258 usb_free_urb(tp->intr_urb);
1259 tp->intr_urb = NULL;
hayeswang40a82912013-08-14 20:54:40 +08001260
hayeswang9629e3c2014-01-15 10:42:15 +08001261 kfree(tp->intr_buff);
1262 tp->intr_buff = NULL;
hayeswangebc2ec42013-08-14 20:54:38 +08001263}
1264
1265static int alloc_all_mem(struct r8152 *tp)
1266{
1267 struct net_device *netdev = tp->netdev;
hayeswang40a82912013-08-14 20:54:40 +08001268 struct usb_interface *intf = tp->intf;
1269 struct usb_host_interface *alt = intf->cur_altsetting;
1270 struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
hayeswangebc2ec42013-08-14 20:54:38 +08001271 struct urb *urb;
1272 int node, i;
1273 u8 *buf;
1274
1275 node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1276
1277 spin_lock_init(&tp->rx_lock);
1278 spin_lock_init(&tp->tx_lock);
hayeswangebc2ec42013-08-14 20:54:38 +08001279 INIT_LIST_HEAD(&tp->tx_free);
1280 skb_queue_head_init(&tp->tx_queue);
hayeswangd823ab62015-01-12 12:06:23 +08001281 skb_queue_head_init(&tp->rx_queue);
hayeswangebc2ec42013-08-14 20:54:38 +08001282
1283 for (i = 0; i < RTL8152_MAX_RX; i++) {
hayeswang52aec122014-09-02 10:27:52 +08001284 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
hayeswangebc2ec42013-08-14 20:54:38 +08001285 if (!buf)
1286 goto err1;
1287
1288 if (buf != rx_agg_align(buf)) {
1289 kfree(buf);
hayeswang52aec122014-09-02 10:27:52 +08001290 buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
hayeswang8e1f51b2014-01-02 11:22:41 +08001291 node);
hayeswangebc2ec42013-08-14 20:54:38 +08001292 if (!buf)
1293 goto err1;
1294 }
1295
1296 urb = usb_alloc_urb(0, GFP_KERNEL);
1297 if (!urb) {
1298 kfree(buf);
1299 goto err1;
1300 }
1301
1302 INIT_LIST_HEAD(&tp->rx_info[i].list);
1303 tp->rx_info[i].context = tp;
1304 tp->rx_info[i].urb = urb;
1305 tp->rx_info[i].buffer = buf;
1306 tp->rx_info[i].head = rx_agg_align(buf);
1307 }
1308
1309 for (i = 0; i < RTL8152_MAX_TX; i++) {
hayeswang52aec122014-09-02 10:27:52 +08001310 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
hayeswangebc2ec42013-08-14 20:54:38 +08001311 if (!buf)
1312 goto err1;
1313
1314 if (buf != tx_agg_align(buf)) {
1315 kfree(buf);
hayeswang52aec122014-09-02 10:27:52 +08001316 buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
hayeswang8e1f51b2014-01-02 11:22:41 +08001317 node);
hayeswangebc2ec42013-08-14 20:54:38 +08001318 if (!buf)
1319 goto err1;
1320 }
1321
1322 urb = usb_alloc_urb(0, GFP_KERNEL);
1323 if (!urb) {
1324 kfree(buf);
1325 goto err1;
1326 }
1327
1328 INIT_LIST_HEAD(&tp->tx_info[i].list);
1329 tp->tx_info[i].context = tp;
1330 tp->tx_info[i].urb = urb;
1331 tp->tx_info[i].buffer = buf;
1332 tp->tx_info[i].head = tx_agg_align(buf);
1333
1334 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1335 }
1336
hayeswang40a82912013-08-14 20:54:40 +08001337 tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1338 if (!tp->intr_urb)
1339 goto err1;
1340
1341 tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1342 if (!tp->intr_buff)
1343 goto err1;
1344
1345 tp->intr_interval = (int)ep_intr->desc.bInterval;
1346 usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
hayeswangb209af92014-08-25 15:53:00 +08001347 tp->intr_buff, INTBUFSIZE, intr_callback,
1348 tp, tp->intr_interval);
hayeswang40a82912013-08-14 20:54:40 +08001349
hayeswangebc2ec42013-08-14 20:54:38 +08001350 return 0;
1351
1352err1:
1353 free_all_mem(tp);
1354 return -ENOMEM;
1355}
1356
hayeswang0de98f62013-08-16 16:09:35 +08001357static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1358{
1359 struct tx_agg *agg = NULL;
1360 unsigned long flags;
1361
hayeswang21949ab2014-03-07 11:04:35 +08001362 if (list_empty(&tp->tx_free))
1363 return NULL;
1364
hayeswang0de98f62013-08-16 16:09:35 +08001365 spin_lock_irqsave(&tp->tx_lock, flags);
1366 if (!list_empty(&tp->tx_free)) {
1367 struct list_head *cursor;
1368
1369 cursor = tp->tx_free.next;
1370 list_del_init(cursor);
1371 agg = list_entry(cursor, struct tx_agg, list);
1372 }
1373 spin_unlock_irqrestore(&tp->tx_lock, flags);
1374
1375 return agg;
1376}
1377
hayeswangb209af92014-08-25 15:53:00 +08001378/* r8152_csum_workaround()
hayeswang6128d1b2014-03-07 11:04:40 +08001379 * The hw limites the value the transport offset. When the offset is out of the
1380 * range, calculate the checksum by sw.
1381 */
1382static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1383 struct sk_buff_head *list)
1384{
1385 if (skb_shinfo(skb)->gso_size) {
1386 netdev_features_t features = tp->netdev->features;
1387 struct sk_buff_head seg_list;
1388 struct sk_buff *segs, *nskb;
1389
hayeswanga91d45f2014-07-11 16:48:27 +08001390 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
hayeswang6128d1b2014-03-07 11:04:40 +08001391 segs = skb_gso_segment(skb, features);
1392 if (IS_ERR(segs) || !segs)
1393 goto drop;
1394
1395 __skb_queue_head_init(&seg_list);
1396
1397 do {
1398 nskb = segs;
1399 segs = segs->next;
1400 nskb->next = NULL;
1401 __skb_queue_tail(&seg_list, nskb);
1402 } while (segs);
1403
1404 skb_queue_splice(&seg_list, list);
1405 dev_kfree_skb(skb);
1406 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1407 if (skb_checksum_help(skb) < 0)
1408 goto drop;
1409
1410 __skb_queue_head(list, skb);
1411 } else {
1412 struct net_device_stats *stats;
1413
1414drop:
1415 stats = &tp->netdev->stats;
1416 stats->tx_dropped++;
1417 dev_kfree_skb(skb);
1418 }
1419}
1420
hayeswangb209af92014-08-25 15:53:00 +08001421/* msdn_giant_send_check()
hayeswang6128d1b2014-03-07 11:04:40 +08001422 * According to the document of microsoft, the TCP Pseudo Header excludes the
1423 * packet length for IPv6 TCP large packets.
1424 */
1425static int msdn_giant_send_check(struct sk_buff *skb)
1426{
1427 const struct ipv6hdr *ipv6h;
1428 struct tcphdr *th;
hayeswangfcb308d2014-03-11 10:20:32 +08001429 int ret;
1430
1431 ret = skb_cow_head(skb, 0);
1432 if (ret)
1433 return ret;
hayeswang6128d1b2014-03-07 11:04:40 +08001434
1435 ipv6h = ipv6_hdr(skb);
1436 th = tcp_hdr(skb);
1437
1438 th->check = 0;
1439 th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1440
hayeswangfcb308d2014-03-11 10:20:32 +08001441 return ret;
hayeswang6128d1b2014-03-07 11:04:40 +08001442}
1443
hayeswangc5554292014-09-12 10:43:11 +08001444static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1445{
Jiri Pirkodf8a39d2015-01-13 17:13:44 +01001446 if (skb_vlan_tag_present(skb)) {
hayeswangc5554292014-09-12 10:43:11 +08001447 u32 opts2;
1448
Jiri Pirkodf8a39d2015-01-13 17:13:44 +01001449 opts2 = TX_VLAN_TAG | swab16(skb_vlan_tag_get(skb));
hayeswangc5554292014-09-12 10:43:11 +08001450 desc->opts2 |= cpu_to_le32(opts2);
1451 }
1452}
1453
1454static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1455{
1456 u32 opts2 = le32_to_cpu(desc->opts2);
1457
1458 if (opts2 & RX_VLAN_TAG)
1459 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1460 swab16(opts2 & 0xffff));
1461}
1462
hayeswang60c89072014-03-07 11:04:39 +08001463static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1464 struct sk_buff *skb, u32 len, u32 transport_offset)
1465{
1466 u32 mss = skb_shinfo(skb)->gso_size;
1467 u32 opts1, opts2 = 0;
1468 int ret = TX_CSUM_SUCCESS;
1469
1470 WARN_ON_ONCE(len > TX_LEN_MAX);
1471
1472 opts1 = len | TX_FS | TX_LS;
1473
1474 if (mss) {
hayeswang6128d1b2014-03-07 11:04:40 +08001475 if (transport_offset > GTTCPHO_MAX) {
1476 netif_warn(tp, tx_err, tp->netdev,
1477 "Invalid transport offset 0x%x for TSO\n",
1478 transport_offset);
1479 ret = TX_CSUM_TSO;
1480 goto unavailable;
1481 }
1482
hayeswang6e74d172015-02-06 11:30:50 +08001483 switch (vlan_get_protocol(skb)) {
hayeswang60c89072014-03-07 11:04:39 +08001484 case htons(ETH_P_IP):
1485 opts1 |= GTSENDV4;
1486 break;
1487
hayeswang6128d1b2014-03-07 11:04:40 +08001488 case htons(ETH_P_IPV6):
hayeswangfcb308d2014-03-11 10:20:32 +08001489 if (msdn_giant_send_check(skb)) {
1490 ret = TX_CSUM_TSO;
1491 goto unavailable;
1492 }
hayeswang6128d1b2014-03-07 11:04:40 +08001493 opts1 |= GTSENDV6;
hayeswang6128d1b2014-03-07 11:04:40 +08001494 break;
1495
hayeswang60c89072014-03-07 11:04:39 +08001496 default:
1497 WARN_ON_ONCE(1);
1498 break;
1499 }
1500
1501 opts1 |= transport_offset << GTTCPHO_SHIFT;
1502 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1503 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
hayeswang5bd23882013-08-14 20:54:39 +08001504 u8 ip_protocol;
hayeswang5bd23882013-08-14 20:54:39 +08001505
hayeswang6128d1b2014-03-07 11:04:40 +08001506 if (transport_offset > TCPHO_MAX) {
1507 netif_warn(tp, tx_err, tp->netdev,
1508 "Invalid transport offset 0x%x\n",
1509 transport_offset);
1510 ret = TX_CSUM_NONE;
1511 goto unavailable;
1512 }
1513
hayeswang6e74d172015-02-06 11:30:50 +08001514 switch (vlan_get_protocol(skb)) {
hayeswang5bd23882013-08-14 20:54:39 +08001515 case htons(ETH_P_IP):
1516 opts2 |= IPV4_CS;
1517 ip_protocol = ip_hdr(skb)->protocol;
1518 break;
1519
1520 case htons(ETH_P_IPV6):
1521 opts2 |= IPV6_CS;
1522 ip_protocol = ipv6_hdr(skb)->nexthdr;
1523 break;
1524
1525 default:
1526 ip_protocol = IPPROTO_RAW;
1527 break;
1528 }
1529
hayeswang60c89072014-03-07 11:04:39 +08001530 if (ip_protocol == IPPROTO_TCP)
hayeswang5bd23882013-08-14 20:54:39 +08001531 opts2 |= TCP_CS;
hayeswang60c89072014-03-07 11:04:39 +08001532 else if (ip_protocol == IPPROTO_UDP)
hayeswang5bd23882013-08-14 20:54:39 +08001533 opts2 |= UDP_CS;
hayeswang60c89072014-03-07 11:04:39 +08001534 else
hayeswang5bd23882013-08-14 20:54:39 +08001535 WARN_ON_ONCE(1);
hayeswang5bd23882013-08-14 20:54:39 +08001536
hayeswang60c89072014-03-07 11:04:39 +08001537 opts2 |= transport_offset << TCPHO_SHIFT;
hayeswang5bd23882013-08-14 20:54:39 +08001538 }
hayeswang60c89072014-03-07 11:04:39 +08001539
1540 desc->opts2 = cpu_to_le32(opts2);
1541 desc->opts1 = cpu_to_le32(opts1);
1542
hayeswang6128d1b2014-03-07 11:04:40 +08001543unavailable:
hayeswang60c89072014-03-07 11:04:39 +08001544 return ret;
hayeswang5bd23882013-08-14 20:54:39 +08001545}
1546
hayeswangb1379d92013-08-16 16:09:37 +08001547static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1548{
hayeswangd84130a2014-02-18 21:49:02 +08001549 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
hayeswang9a4be1b2014-02-18 21:49:07 +08001550 int remain, ret;
hayeswangb1379d92013-08-16 16:09:37 +08001551 u8 *tx_data;
1552
hayeswangd84130a2014-02-18 21:49:02 +08001553 __skb_queue_head_init(&skb_head);
hayeswang0c3121f2014-03-07 11:04:36 +08001554 spin_lock(&tx_queue->lock);
hayeswangd84130a2014-02-18 21:49:02 +08001555 skb_queue_splice_init(tx_queue, &skb_head);
hayeswang0c3121f2014-03-07 11:04:36 +08001556 spin_unlock(&tx_queue->lock);
hayeswangd84130a2014-02-18 21:49:02 +08001557
hayeswangb1379d92013-08-16 16:09:37 +08001558 tx_data = agg->head;
hayeswangb209af92014-08-25 15:53:00 +08001559 agg->skb_num = 0;
1560 agg->skb_len = 0;
hayeswang52aec122014-09-02 10:27:52 +08001561 remain = agg_buf_sz;
hayeswangb1379d92013-08-16 16:09:37 +08001562
hayeswang7937f9e2013-11-20 17:30:54 +08001563 while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
hayeswangb1379d92013-08-16 16:09:37 +08001564 struct tx_desc *tx_desc;
1565 struct sk_buff *skb;
1566 unsigned int len;
hayeswang60c89072014-03-07 11:04:39 +08001567 u32 offset;
hayeswangb1379d92013-08-16 16:09:37 +08001568
hayeswangd84130a2014-02-18 21:49:02 +08001569 skb = __skb_dequeue(&skb_head);
hayeswangb1379d92013-08-16 16:09:37 +08001570 if (!skb)
1571 break;
1572
hayeswang60c89072014-03-07 11:04:39 +08001573 len = skb->len + sizeof(*tx_desc);
1574
1575 if (len > remain) {
hayeswangd84130a2014-02-18 21:49:02 +08001576 __skb_queue_head(&skb_head, skb);
hayeswangb1379d92013-08-16 16:09:37 +08001577 break;
1578 }
1579
hayeswang7937f9e2013-11-20 17:30:54 +08001580 tx_data = tx_agg_align(tx_data);
hayeswangb1379d92013-08-16 16:09:37 +08001581 tx_desc = (struct tx_desc *)tx_data;
hayeswang60c89072014-03-07 11:04:39 +08001582
1583 offset = (u32)skb_transport_offset(skb);
1584
hayeswang6128d1b2014-03-07 11:04:40 +08001585 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1586 r8152_csum_workaround(tp, skb, &skb_head);
1587 continue;
1588 }
hayeswang60c89072014-03-07 11:04:39 +08001589
hayeswangc5554292014-09-12 10:43:11 +08001590 rtl_tx_vlan_tag(tx_desc, skb);
1591
hayeswangb1379d92013-08-16 16:09:37 +08001592 tx_data += sizeof(*tx_desc);
1593
hayeswang60c89072014-03-07 11:04:39 +08001594 len = skb->len;
1595 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1596 struct net_device_stats *stats = &tp->netdev->stats;
1597
1598 stats->tx_dropped++;
1599 dev_kfree_skb_any(skb);
1600 tx_data -= sizeof(*tx_desc);
1601 continue;
1602 }
hayeswangb1379d92013-08-16 16:09:37 +08001603
hayeswang7937f9e2013-11-20 17:30:54 +08001604 tx_data += len;
hayeswang60c89072014-03-07 11:04:39 +08001605 agg->skb_len += len;
1606 agg->skb_num++;
1607
1608 dev_kfree_skb_any(skb);
1609
hayeswang52aec122014-09-02 10:27:52 +08001610 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
hayeswangb1379d92013-08-16 16:09:37 +08001611 }
1612
hayeswangd84130a2014-02-18 21:49:02 +08001613 if (!skb_queue_empty(&skb_head)) {
hayeswang0c3121f2014-03-07 11:04:36 +08001614 spin_lock(&tx_queue->lock);
hayeswangd84130a2014-02-18 21:49:02 +08001615 skb_queue_splice(&skb_head, tx_queue);
hayeswang0c3121f2014-03-07 11:04:36 +08001616 spin_unlock(&tx_queue->lock);
hayeswangd84130a2014-02-18 21:49:02 +08001617 }
1618
hayeswang0c3121f2014-03-07 11:04:36 +08001619 netif_tx_lock(tp->netdev);
hayeswangdd1b1192013-11-20 17:30:56 +08001620
1621 if (netif_queue_stopped(tp->netdev) &&
1622 skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1623 netif_wake_queue(tp->netdev);
1624
hayeswang0c3121f2014-03-07 11:04:36 +08001625 netif_tx_unlock(tp->netdev);
hayeswang9a4be1b2014-02-18 21:49:07 +08001626
hayeswang0c3121f2014-03-07 11:04:36 +08001627 ret = usb_autopm_get_interface_async(tp->intf);
hayeswang9a4be1b2014-02-18 21:49:07 +08001628 if (ret < 0)
1629 goto out_tx_fill;
hayeswangdd1b1192013-11-20 17:30:56 +08001630
hayeswangb1379d92013-08-16 16:09:37 +08001631 usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1632 agg->head, (int)(tx_data - (u8 *)agg->head),
1633 (usb_complete_t)write_bulk_callback, agg);
1634
hayeswang0c3121f2014-03-07 11:04:36 +08001635 ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
hayeswang9a4be1b2014-02-18 21:49:07 +08001636 if (ret < 0)
hayeswang0c3121f2014-03-07 11:04:36 +08001637 usb_autopm_put_interface_async(tp->intf);
hayeswang9a4be1b2014-02-18 21:49:07 +08001638
1639out_tx_fill:
1640 return ret;
hayeswangb1379d92013-08-16 16:09:37 +08001641}
1642
hayeswang565cab02014-03-07 11:04:38 +08001643static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1644{
1645 u8 checksum = CHECKSUM_NONE;
1646 u32 opts2, opts3;
1647
1648 if (tp->version == RTL_VER_01)
1649 goto return_result;
1650
1651 opts2 = le32_to_cpu(rx_desc->opts2);
1652 opts3 = le32_to_cpu(rx_desc->opts3);
1653
1654 if (opts2 & RD_IPV4_CS) {
1655 if (opts3 & IPF)
1656 checksum = CHECKSUM_NONE;
1657 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1658 checksum = CHECKSUM_NONE;
1659 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1660 checksum = CHECKSUM_NONE;
1661 else
1662 checksum = CHECKSUM_UNNECESSARY;
hayeswang6128d1b2014-03-07 11:04:40 +08001663 } else if (RD_IPV6_CS) {
1664 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1665 checksum = CHECKSUM_UNNECESSARY;
1666 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1667 checksum = CHECKSUM_UNNECESSARY;
hayeswang565cab02014-03-07 11:04:38 +08001668 }
1669
1670return_result:
1671 return checksum;
1672}
1673
hayeswangd823ab62015-01-12 12:06:23 +08001674static int rx_bottom(struct r8152 *tp, int budget)
hayeswangebc2ec42013-08-14 20:54:38 +08001675{
hayeswanga5a4f462013-08-16 16:09:34 +08001676 unsigned long flags;
hayeswangd84130a2014-02-18 21:49:02 +08001677 struct list_head *cursor, *next, rx_queue;
hayeswange1a2ca92015-02-06 11:30:45 +08001678 int ret = 0, work_done = 0;
hayeswangd823ab62015-01-12 12:06:23 +08001679
1680 if (!skb_queue_empty(&tp->rx_queue)) {
1681 while (work_done < budget) {
1682 struct sk_buff *skb = __skb_dequeue(&tp->rx_queue);
1683 struct net_device *netdev = tp->netdev;
1684 struct net_device_stats *stats = &netdev->stats;
1685 unsigned int pkt_len;
1686
1687 if (!skb)
1688 break;
1689
1690 pkt_len = skb->len;
1691 napi_gro_receive(&tp->napi, skb);
1692 work_done++;
1693 stats->rx_packets++;
1694 stats->rx_bytes += pkt_len;
1695 }
1696 }
hayeswangebc2ec42013-08-14 20:54:38 +08001697
hayeswangd84130a2014-02-18 21:49:02 +08001698 if (list_empty(&tp->rx_done))
hayeswangd823ab62015-01-12 12:06:23 +08001699 goto out1;
hayeswangd84130a2014-02-18 21:49:02 +08001700
1701 INIT_LIST_HEAD(&rx_queue);
hayeswanga5a4f462013-08-16 16:09:34 +08001702 spin_lock_irqsave(&tp->rx_lock, flags);
hayeswangd84130a2014-02-18 21:49:02 +08001703 list_splice_init(&tp->rx_done, &rx_queue);
1704 spin_unlock_irqrestore(&tp->rx_lock, flags);
1705
1706 list_for_each_safe(cursor, next, &rx_queue) {
hayeswang43a44782013-08-16 16:09:36 +08001707 struct rx_desc *rx_desc;
1708 struct rx_agg *agg;
hayeswang43a44782013-08-16 16:09:36 +08001709 int len_used = 0;
1710 struct urb *urb;
1711 u8 *rx_data;
hayeswang43a44782013-08-16 16:09:36 +08001712
hayeswangebc2ec42013-08-14 20:54:38 +08001713 list_del_init(cursor);
hayeswangebc2ec42013-08-14 20:54:38 +08001714
1715 agg = list_entry(cursor, struct rx_agg, list);
1716 urb = agg->urb;
hayeswang0de98f62013-08-16 16:09:35 +08001717 if (urb->actual_length < ETH_ZLEN)
1718 goto submit;
hayeswangebc2ec42013-08-14 20:54:38 +08001719
hayeswangebc2ec42013-08-14 20:54:38 +08001720 rx_desc = agg->head;
1721 rx_data = agg->head;
hayeswang7937f9e2013-11-20 17:30:54 +08001722 len_used += sizeof(struct rx_desc);
hayeswangebc2ec42013-08-14 20:54:38 +08001723
hayeswang7937f9e2013-11-20 17:30:54 +08001724 while (urb->actual_length > len_used) {
hayeswang43a44782013-08-16 16:09:36 +08001725 struct net_device *netdev = tp->netdev;
hayeswang05e0f1a2014-03-06 15:07:18 +08001726 struct net_device_stats *stats = &netdev->stats;
hayeswang7937f9e2013-11-20 17:30:54 +08001727 unsigned int pkt_len;
hayeswang43a44782013-08-16 16:09:36 +08001728 struct sk_buff *skb;
1729
hayeswang7937f9e2013-11-20 17:30:54 +08001730 pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
hayeswangebc2ec42013-08-14 20:54:38 +08001731 if (pkt_len < ETH_ZLEN)
1732 break;
1733
hayeswang7937f9e2013-11-20 17:30:54 +08001734 len_used += pkt_len;
1735 if (urb->actual_length < len_used)
1736 break;
1737
hayeswang8e1f51b2014-01-02 11:22:41 +08001738 pkt_len -= CRC_SIZE;
hayeswangebc2ec42013-08-14 20:54:38 +08001739 rx_data += sizeof(struct rx_desc);
1740
1741 skb = netdev_alloc_skb_ip_align(netdev, pkt_len);
1742 if (!skb) {
1743 stats->rx_dropped++;
hayeswang5e2f7482014-03-07 11:04:37 +08001744 goto find_next_rx;
hayeswangebc2ec42013-08-14 20:54:38 +08001745 }
hayeswang565cab02014-03-07 11:04:38 +08001746
1747 skb->ip_summed = r8152_rx_csum(tp, rx_desc);
hayeswangebc2ec42013-08-14 20:54:38 +08001748 memcpy(skb->data, rx_data, pkt_len);
1749 skb_put(skb, pkt_len);
1750 skb->protocol = eth_type_trans(skb, netdev);
hayeswangc5554292014-09-12 10:43:11 +08001751 rtl_rx_vlan_tag(rx_desc, skb);
hayeswangd823ab62015-01-12 12:06:23 +08001752 if (work_done < budget) {
1753 napi_gro_receive(&tp->napi, skb);
1754 work_done++;
1755 stats->rx_packets++;
1756 stats->rx_bytes += pkt_len;
1757 } else {
1758 __skb_queue_tail(&tp->rx_queue, skb);
1759 }
hayeswangebc2ec42013-08-14 20:54:38 +08001760
hayeswang5e2f7482014-03-07 11:04:37 +08001761find_next_rx:
hayeswang8e1f51b2014-01-02 11:22:41 +08001762 rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
hayeswangebc2ec42013-08-14 20:54:38 +08001763 rx_desc = (struct rx_desc *)rx_data;
hayeswangebc2ec42013-08-14 20:54:38 +08001764 len_used = (int)(rx_data - (u8 *)agg->head);
hayeswang7937f9e2013-11-20 17:30:54 +08001765 len_used += sizeof(struct rx_desc);
hayeswangebc2ec42013-08-14 20:54:38 +08001766 }
1767
hayeswang0de98f62013-08-16 16:09:35 +08001768submit:
hayeswange1a2ca92015-02-06 11:30:45 +08001769 if (!ret) {
1770 ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1771 } else {
1772 urb->actual_length = 0;
1773 list_add_tail(&agg->list, next);
1774 }
1775 }
1776
1777 if (!list_empty(&rx_queue)) {
1778 spin_lock_irqsave(&tp->rx_lock, flags);
1779 list_splice_tail(&rx_queue, &tp->rx_done);
1780 spin_unlock_irqrestore(&tp->rx_lock, flags);
hayeswangebc2ec42013-08-14 20:54:38 +08001781 }
hayeswangd823ab62015-01-12 12:06:23 +08001782
1783out1:
1784 return work_done;
hayeswangebc2ec42013-08-14 20:54:38 +08001785}
1786
1787static void tx_bottom(struct r8152 *tp)
1788{
hayeswangebc2ec42013-08-14 20:54:38 +08001789 int res;
1790
hayeswangb1379d92013-08-16 16:09:37 +08001791 do {
1792 struct tx_agg *agg;
hayeswangebc2ec42013-08-14 20:54:38 +08001793
hayeswangb1379d92013-08-16 16:09:37 +08001794 if (skb_queue_empty(&tp->tx_queue))
hayeswangebc2ec42013-08-14 20:54:38 +08001795 break;
1796
hayeswangb1379d92013-08-16 16:09:37 +08001797 agg = r8152_get_tx_agg(tp);
1798 if (!agg)
hayeswangebc2ec42013-08-14 20:54:38 +08001799 break;
hayeswangb1379d92013-08-16 16:09:37 +08001800
1801 res = r8152_tx_agg_fill(tp, agg);
1802 if (res) {
hayeswang05e0f1a2014-03-06 15:07:18 +08001803 struct net_device *netdev = tp->netdev;
hayeswangb1379d92013-08-16 16:09:37 +08001804
1805 if (res == -ENODEV) {
hayeswang67610492014-10-30 11:46:40 +08001806 set_bit(RTL8152_UNPLUG, &tp->flags);
hayeswangb1379d92013-08-16 16:09:37 +08001807 netif_device_detach(netdev);
1808 } else {
hayeswang05e0f1a2014-03-06 15:07:18 +08001809 struct net_device_stats *stats = &netdev->stats;
1810 unsigned long flags;
1811
hayeswangb1379d92013-08-16 16:09:37 +08001812 netif_warn(tp, tx_err, netdev,
1813 "failed tx_urb %d\n", res);
1814 stats->tx_dropped += agg->skb_num;
hayeswangdb8515e2014-03-06 15:07:16 +08001815
hayeswangb1379d92013-08-16 16:09:37 +08001816 spin_lock_irqsave(&tp->tx_lock, flags);
1817 list_add_tail(&agg->list, &tp->tx_free);
1818 spin_unlock_irqrestore(&tp->tx_lock, flags);
1819 }
hayeswangebc2ec42013-08-14 20:54:38 +08001820 }
hayeswangb1379d92013-08-16 16:09:37 +08001821 } while (res == 0);
hayeswangebc2ec42013-08-14 20:54:38 +08001822}
1823
hayeswangd823ab62015-01-12 12:06:23 +08001824static void bottom_half(struct r8152 *tp)
hayeswangebc2ec42013-08-14 20:54:38 +08001825{
hayeswangebc2ec42013-08-14 20:54:38 +08001826 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1827 return;
1828
1829 if (!test_bit(WORK_ENABLE, &tp->flags))
1830 return;
1831
hayeswang7559fb2f2013-08-16 16:09:38 +08001832 /* When link down, the driver would cancel all bulks. */
1833 /* This avoid the re-submitting bulk */
hayeswangebc2ec42013-08-14 20:54:38 +08001834 if (!netif_carrier_ok(tp->netdev))
1835 return;
1836
hayeswangd823ab62015-01-12 12:06:23 +08001837 clear_bit(SCHEDULE_NAPI, &tp->flags);
hayeswang9451a112014-11-12 10:05:04 +08001838
hayeswang0c3121f2014-03-07 11:04:36 +08001839 tx_bottom(tp);
hayeswangebc2ec42013-08-14 20:54:38 +08001840}
1841
hayeswangd823ab62015-01-12 12:06:23 +08001842static int r8152_poll(struct napi_struct *napi, int budget)
1843{
1844 struct r8152 *tp = container_of(napi, struct r8152, napi);
1845 int work_done;
1846
1847 work_done = rx_bottom(tp, budget);
1848 bottom_half(tp);
1849
1850 if (work_done < budget) {
1851 napi_complete(napi);
1852 if (!list_empty(&tp->rx_done))
1853 napi_schedule(napi);
1854 }
1855
1856 return work_done;
1857}
1858
hayeswangebc2ec42013-08-14 20:54:38 +08001859static
1860int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1861{
hayeswanga0fccd42014-11-20 10:29:05 +08001862 int ret;
1863
hayeswangef827a52015-01-09 10:26:36 +08001864 /* The rx would be stopped, so skip submitting */
1865 if (test_bit(RTL8152_UNPLUG, &tp->flags) ||
1866 !test_bit(WORK_ENABLE, &tp->flags) || !netif_carrier_ok(tp->netdev))
1867 return 0;
1868
hayeswangebc2ec42013-08-14 20:54:38 +08001869 usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
hayeswang52aec122014-09-02 10:27:52 +08001870 agg->head, agg_buf_sz,
hayeswangb209af92014-08-25 15:53:00 +08001871 (usb_complete_t)read_bulk_callback, agg);
hayeswangebc2ec42013-08-14 20:54:38 +08001872
hayeswanga0fccd42014-11-20 10:29:05 +08001873 ret = usb_submit_urb(agg->urb, mem_flags);
1874 if (ret == -ENODEV) {
1875 set_bit(RTL8152_UNPLUG, &tp->flags);
1876 netif_device_detach(tp->netdev);
1877 } else if (ret) {
1878 struct urb *urb = agg->urb;
1879 unsigned long flags;
1880
1881 urb->actual_length = 0;
1882 spin_lock_irqsave(&tp->rx_lock, flags);
1883 list_add_tail(&agg->list, &tp->rx_done);
1884 spin_unlock_irqrestore(&tp->rx_lock, flags);
hayeswangd823ab62015-01-12 12:06:23 +08001885
1886 netif_err(tp, rx_err, tp->netdev,
1887 "Couldn't submit rx[%p], ret = %d\n", agg, ret);
1888
1889 napi_schedule(&tp->napi);
hayeswanga0fccd42014-11-20 10:29:05 +08001890 }
1891
1892 return ret;
hayeswangac718b62013-05-02 16:01:25 +00001893}
1894
hayeswang00a5e362014-02-18 21:48:59 +08001895static void rtl_drop_queued_tx(struct r8152 *tp)
1896{
1897 struct net_device_stats *stats = &tp->netdev->stats;
hayeswangd84130a2014-02-18 21:49:02 +08001898 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
hayeswang00a5e362014-02-18 21:48:59 +08001899 struct sk_buff *skb;
1900
hayeswangd84130a2014-02-18 21:49:02 +08001901 if (skb_queue_empty(tx_queue))
1902 return;
1903
1904 __skb_queue_head_init(&skb_head);
hayeswang2685d412014-03-07 11:04:34 +08001905 spin_lock_bh(&tx_queue->lock);
hayeswangd84130a2014-02-18 21:49:02 +08001906 skb_queue_splice_init(tx_queue, &skb_head);
hayeswang2685d412014-03-07 11:04:34 +08001907 spin_unlock_bh(&tx_queue->lock);
hayeswangd84130a2014-02-18 21:49:02 +08001908
1909 while ((skb = __skb_dequeue(&skb_head))) {
hayeswang00a5e362014-02-18 21:48:59 +08001910 dev_kfree_skb(skb);
1911 stats->tx_dropped++;
1912 }
1913}
1914
hayeswangac718b62013-05-02 16:01:25 +00001915static void rtl8152_tx_timeout(struct net_device *netdev)
1916{
1917 struct r8152 *tp = netdev_priv(netdev);
hayeswangebc2ec42013-08-14 20:54:38 +08001918
Hayes Wang4a8deae2014-01-07 11:18:22 +08001919 netif_warn(tp, tx_err, netdev, "Tx timeout\n");
hayeswang37608f32015-07-29 20:39:09 +08001920
1921 usb_queue_reset_device(tp->intf);
hayeswangac718b62013-05-02 16:01:25 +00001922}
1923
1924static void rtl8152_set_rx_mode(struct net_device *netdev)
1925{
1926 struct r8152 *tp = netdev_priv(netdev);
1927
hayeswang51d979f2015-02-06 11:30:47 +08001928 if (netif_carrier_ok(netdev)) {
hayeswangac718b62013-05-02 16:01:25 +00001929 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
hayeswang40a82912013-08-14 20:54:40 +08001930 schedule_delayed_work(&tp->schedule, 0);
1931 }
hayeswangac718b62013-05-02 16:01:25 +00001932}
1933
1934static void _rtl8152_set_rx_mode(struct net_device *netdev)
1935{
1936 struct r8152 *tp = netdev_priv(netdev);
hayeswang31787f52013-07-31 17:21:25 +08001937 u32 mc_filter[2]; /* Multicast hash filter */
1938 __le32 tmp[2];
hayeswangac718b62013-05-02 16:01:25 +00001939 u32 ocp_data;
1940
hayeswangac718b62013-05-02 16:01:25 +00001941 clear_bit(RTL8152_SET_RX_MODE, &tp->flags);
1942 netif_stop_queue(netdev);
1943 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1944 ocp_data &= ~RCR_ACPT_ALL;
1945 ocp_data |= RCR_AB | RCR_APM;
1946
1947 if (netdev->flags & IFF_PROMISC) {
1948 /* Unconditionally log net taps. */
1949 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
1950 ocp_data |= RCR_AM | RCR_AAP;
hayeswangb209af92014-08-25 15:53:00 +08001951 mc_filter[1] = 0xffffffff;
1952 mc_filter[0] = 0xffffffff;
hayeswangac718b62013-05-02 16:01:25 +00001953 } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
1954 (netdev->flags & IFF_ALLMULTI)) {
1955 /* Too many to filter perfectly -- accept all multicasts. */
1956 ocp_data |= RCR_AM;
hayeswangb209af92014-08-25 15:53:00 +08001957 mc_filter[1] = 0xffffffff;
1958 mc_filter[0] = 0xffffffff;
hayeswangac718b62013-05-02 16:01:25 +00001959 } else {
1960 struct netdev_hw_addr *ha;
1961
hayeswangb209af92014-08-25 15:53:00 +08001962 mc_filter[1] = 0;
1963 mc_filter[0] = 0;
hayeswangac718b62013-05-02 16:01:25 +00001964 netdev_for_each_mc_addr(ha, netdev) {
1965 int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
hayeswangb209af92014-08-25 15:53:00 +08001966
hayeswangac718b62013-05-02 16:01:25 +00001967 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1968 ocp_data |= RCR_AM;
1969 }
1970 }
1971
hayeswang31787f52013-07-31 17:21:25 +08001972 tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
1973 tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
hayeswangac718b62013-05-02 16:01:25 +00001974
hayeswang31787f52013-07-31 17:21:25 +08001975 pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
hayeswangac718b62013-05-02 16:01:25 +00001976 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1977 netif_wake_queue(netdev);
hayeswangac718b62013-05-02 16:01:25 +00001978}
1979
hayeswanga5e31252015-01-06 17:41:58 +08001980static netdev_features_t
1981rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
1982 netdev_features_t features)
1983{
1984 u32 mss = skb_shinfo(skb)->gso_size;
1985 int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
1986 int offset = skb_transport_offset(skb);
1987
1988 if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
1989 features &= ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
1990 else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
1991 features &= ~NETIF_F_GSO_MASK;
1992
1993 return features;
1994}
1995
hayeswangac718b62013-05-02 16:01:25 +00001996static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
hayeswangb209af92014-08-25 15:53:00 +08001997 struct net_device *netdev)
hayeswangac718b62013-05-02 16:01:25 +00001998{
1999 struct r8152 *tp = netdev_priv(netdev);
hayeswangac718b62013-05-02 16:01:25 +00002000
hayeswangac718b62013-05-02 16:01:25 +00002001 skb_tx_timestamp(skb);
hayeswangebc2ec42013-08-14 20:54:38 +08002002
hayeswang61598782013-11-20 17:30:55 +08002003 skb_queue_tail(&tp->tx_queue, skb);
hayeswangebc2ec42013-08-14 20:54:38 +08002004
hayeswang0c3121f2014-03-07 11:04:36 +08002005 if (!list_empty(&tp->tx_free)) {
2006 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
hayeswangd823ab62015-01-12 12:06:23 +08002007 set_bit(SCHEDULE_NAPI, &tp->flags);
hayeswang0c3121f2014-03-07 11:04:36 +08002008 schedule_delayed_work(&tp->schedule, 0);
2009 } else {
2010 usb_mark_last_busy(tp->udev);
hayeswangd823ab62015-01-12 12:06:23 +08002011 napi_schedule(&tp->napi);
hayeswang0c3121f2014-03-07 11:04:36 +08002012 }
hayeswangb209af92014-08-25 15:53:00 +08002013 } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
hayeswangdd1b1192013-11-20 17:30:56 +08002014 netif_stop_queue(netdev);
hayeswangb209af92014-08-25 15:53:00 +08002015 }
hayeswangdd1b1192013-11-20 17:30:56 +08002016
hayeswangac718b62013-05-02 16:01:25 +00002017 return NETDEV_TX_OK;
2018}
2019
2020static void r8152b_reset_packet_filter(struct r8152 *tp)
2021{
2022 u32 ocp_data;
2023
2024 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
2025 ocp_data &= ~FMC_FCR_MCU_EN;
2026 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2027 ocp_data |= FMC_FCR_MCU_EN;
2028 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2029}
2030
2031static void rtl8152_nic_reset(struct r8152 *tp)
2032{
2033 int i;
2034
2035 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
2036
2037 for (i = 0; i < 1000; i++) {
2038 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
2039 break;
hayeswangb209af92014-08-25 15:53:00 +08002040 usleep_range(100, 400);
hayeswangac718b62013-05-02 16:01:25 +00002041 }
2042}
2043
hayeswangdd1b1192013-11-20 17:30:56 +08002044static void set_tx_qlen(struct r8152 *tp)
2045{
2046 struct net_device *netdev = tp->netdev;
2047
hayeswang52aec122014-09-02 10:27:52 +08002048 tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
2049 sizeof(struct tx_desc));
hayeswangdd1b1192013-11-20 17:30:56 +08002050}
2051
hayeswangac718b62013-05-02 16:01:25 +00002052static inline u8 rtl8152_get_speed(struct r8152 *tp)
2053{
2054 return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
2055}
2056
hayeswang507605a2014-01-02 11:22:43 +08002057static void rtl_set_eee_plus(struct r8152 *tp)
hayeswangac718b62013-05-02 16:01:25 +00002058{
hayeswangebc2ec42013-08-14 20:54:38 +08002059 u32 ocp_data;
hayeswangac718b62013-05-02 16:01:25 +00002060 u8 speed;
2061
2062 speed = rtl8152_get_speed(tp);
hayeswangebc2ec42013-08-14 20:54:38 +08002063 if (speed & _10bps) {
hayeswangac718b62013-05-02 16:01:25 +00002064 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
hayeswangebc2ec42013-08-14 20:54:38 +08002065 ocp_data |= EEEP_CR_EEEP_TX;
hayeswangac718b62013-05-02 16:01:25 +00002066 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2067 } else {
2068 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
hayeswangebc2ec42013-08-14 20:54:38 +08002069 ocp_data &= ~EEEP_CR_EEEP_TX;
hayeswangac718b62013-05-02 16:01:25 +00002070 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2071 }
hayeswang507605a2014-01-02 11:22:43 +08002072}
2073
hayeswang00a5e362014-02-18 21:48:59 +08002074static void rxdy_gated_en(struct r8152 *tp, bool enable)
2075{
2076 u32 ocp_data;
2077
2078 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
2079 if (enable)
2080 ocp_data |= RXDY_GATED_EN;
2081 else
2082 ocp_data &= ~RXDY_GATED_EN;
2083 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2084}
2085
hayeswang445f7f42014-09-23 16:31:47 +08002086static int rtl_start_rx(struct r8152 *tp)
2087{
2088 int i, ret = 0;
2089
2090 INIT_LIST_HEAD(&tp->rx_done);
2091 for (i = 0; i < RTL8152_MAX_RX; i++) {
2092 INIT_LIST_HEAD(&tp->rx_info[i].list);
2093 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2094 if (ret)
2095 break;
2096 }
2097
hayeswang7bcf4f62014-11-20 10:29:06 +08002098 if (ret && ++i < RTL8152_MAX_RX) {
2099 struct list_head rx_queue;
2100 unsigned long flags;
2101
2102 INIT_LIST_HEAD(&rx_queue);
2103
2104 do {
2105 struct rx_agg *agg = &tp->rx_info[i++];
2106 struct urb *urb = agg->urb;
2107
2108 urb->actual_length = 0;
2109 list_add_tail(&agg->list, &rx_queue);
2110 } while (i < RTL8152_MAX_RX);
2111
2112 spin_lock_irqsave(&tp->rx_lock, flags);
2113 list_splice_tail(&rx_queue, &tp->rx_done);
2114 spin_unlock_irqrestore(&tp->rx_lock, flags);
2115 }
2116
hayeswang445f7f42014-09-23 16:31:47 +08002117 return ret;
2118}
2119
2120static int rtl_stop_rx(struct r8152 *tp)
2121{
2122 int i;
2123
2124 for (i = 0; i < RTL8152_MAX_RX; i++)
2125 usb_kill_urb(tp->rx_info[i].urb);
2126
hayeswangd823ab62015-01-12 12:06:23 +08002127 while (!skb_queue_empty(&tp->rx_queue))
2128 dev_kfree_skb(__skb_dequeue(&tp->rx_queue));
2129
hayeswang445f7f42014-09-23 16:31:47 +08002130 return 0;
2131}
2132
hayeswang507605a2014-01-02 11:22:43 +08002133static int rtl_enable(struct r8152 *tp)
2134{
2135 u32 ocp_data;
hayeswangac718b62013-05-02 16:01:25 +00002136
2137 r8152b_reset_packet_filter(tp);
2138
2139 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2140 ocp_data |= CR_RE | CR_TE;
2141 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2142
hayeswang00a5e362014-02-18 21:48:59 +08002143 rxdy_gated_en(tp, false);
hayeswangac718b62013-05-02 16:01:25 +00002144
hayeswangaa2e0922015-01-09 10:26:35 +08002145 return 0;
hayeswangac718b62013-05-02 16:01:25 +00002146}
2147
hayeswang507605a2014-01-02 11:22:43 +08002148static int rtl8152_enable(struct r8152 *tp)
2149{
hayeswang68714382014-04-11 17:54:31 +08002150 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2151 return -ENODEV;
2152
hayeswang507605a2014-01-02 11:22:43 +08002153 set_tx_qlen(tp);
2154 rtl_set_eee_plus(tp);
2155
2156 return rtl_enable(tp);
2157}
2158
hayeswang464ec102015-02-12 14:33:46 +08002159static void r8153_set_rx_early_timeout(struct r8152 *tp)
hayeswang43779f82014-01-02 11:25:10 +08002160{
hayeswang464ec102015-02-12 14:33:46 +08002161 u32 ocp_data = tp->coalesce / 8;
hayeswang43779f82014-01-02 11:25:10 +08002162
hayeswang464ec102015-02-12 14:33:46 +08002163 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
2164}
2165
2166static void r8153_set_rx_early_size(struct r8152 *tp)
2167{
2168 u32 mtu = tp->netdev->mtu;
2169 u32 ocp_data = (agg_buf_sz - mtu - VLAN_ETH_HLEN - VLAN_HLEN) / 4;
2170
2171 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
hayeswang43779f82014-01-02 11:25:10 +08002172}
2173
2174static int rtl8153_enable(struct r8152 *tp)
2175{
hayeswang68714382014-04-11 17:54:31 +08002176 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2177 return -ENODEV;
2178
hayeswangb2143962015-07-24 13:54:23 +08002179 usb_disable_lpm(tp->udev);
hayeswang43779f82014-01-02 11:25:10 +08002180 set_tx_qlen(tp);
2181 rtl_set_eee_plus(tp);
hayeswang464ec102015-02-12 14:33:46 +08002182 r8153_set_rx_early_timeout(tp);
2183 r8153_set_rx_early_size(tp);
hayeswang43779f82014-01-02 11:25:10 +08002184
2185 return rtl_enable(tp);
2186}
2187
hayeswangd70b1132014-09-19 15:17:18 +08002188static void rtl_disable(struct r8152 *tp)
hayeswangac718b62013-05-02 16:01:25 +00002189{
hayeswangebc2ec42013-08-14 20:54:38 +08002190 u32 ocp_data;
2191 int i;
hayeswangac718b62013-05-02 16:01:25 +00002192
hayeswang68714382014-04-11 17:54:31 +08002193 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2194 rtl_drop_queued_tx(tp);
2195 return;
2196 }
2197
hayeswangac718b62013-05-02 16:01:25 +00002198 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2199 ocp_data &= ~RCR_ACPT_ALL;
2200 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2201
hayeswang00a5e362014-02-18 21:48:59 +08002202 rtl_drop_queued_tx(tp);
hayeswangebc2ec42013-08-14 20:54:38 +08002203
2204 for (i = 0; i < RTL8152_MAX_TX; i++)
2205 usb_kill_urb(tp->tx_info[i].urb);
hayeswangac718b62013-05-02 16:01:25 +00002206
hayeswang00a5e362014-02-18 21:48:59 +08002207 rxdy_gated_en(tp, true);
hayeswangac718b62013-05-02 16:01:25 +00002208
2209 for (i = 0; i < 1000; i++) {
2210 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2211 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2212 break;
hayeswang8ddfa072014-09-09 11:40:28 +08002213 usleep_range(1000, 2000);
hayeswangac718b62013-05-02 16:01:25 +00002214 }
2215
2216 for (i = 0; i < 1000; i++) {
2217 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2218 break;
hayeswang8ddfa072014-09-09 11:40:28 +08002219 usleep_range(1000, 2000);
hayeswangac718b62013-05-02 16:01:25 +00002220 }
2221
hayeswang445f7f42014-09-23 16:31:47 +08002222 rtl_stop_rx(tp);
hayeswangac718b62013-05-02 16:01:25 +00002223
2224 rtl8152_nic_reset(tp);
2225}
2226
hayeswang00a5e362014-02-18 21:48:59 +08002227static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2228{
2229 u32 ocp_data;
2230
2231 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2232 if (enable)
2233 ocp_data |= POWER_CUT;
2234 else
2235 ocp_data &= ~POWER_CUT;
2236 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2237
2238 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2239 ocp_data &= ~RESUME_INDICATE;
2240 ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
hayeswang00a5e362014-02-18 21:48:59 +08002241}
2242
hayeswangc5554292014-09-12 10:43:11 +08002243static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2244{
2245 u32 ocp_data;
2246
2247 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2248 if (enable)
2249 ocp_data |= CPCR_RX_VLAN;
2250 else
2251 ocp_data &= ~CPCR_RX_VLAN;
2252 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2253}
2254
2255static int rtl8152_set_features(struct net_device *dev,
2256 netdev_features_t features)
2257{
2258 netdev_features_t changed = features ^ dev->features;
2259 struct r8152 *tp = netdev_priv(dev);
hayeswang405f8a02014-10-09 18:00:24 +08002260 int ret;
2261
2262 ret = usb_autopm_get_interface(tp->intf);
2263 if (ret < 0)
2264 goto out;
hayeswangc5554292014-09-12 10:43:11 +08002265
hayeswangb5403272014-10-09 18:00:26 +08002266 mutex_lock(&tp->control);
2267
hayeswangc5554292014-09-12 10:43:11 +08002268 if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2269 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2270 rtl_rx_vlan_en(tp, true);
2271 else
2272 rtl_rx_vlan_en(tp, false);
2273 }
2274
hayeswangb5403272014-10-09 18:00:26 +08002275 mutex_unlock(&tp->control);
2276
hayeswang405f8a02014-10-09 18:00:24 +08002277 usb_autopm_put_interface(tp->intf);
2278
2279out:
2280 return ret;
hayeswangc5554292014-09-12 10:43:11 +08002281}
2282
hayeswang21ff2e82014-02-18 21:49:06 +08002283#define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2284
2285static u32 __rtl_get_wol(struct r8152 *tp)
2286{
2287 u32 ocp_data;
2288 u32 wolopts = 0;
2289
2290 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2291 if (!(ocp_data & LAN_WAKE_EN))
2292 return 0;
2293
2294 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2295 if (ocp_data & LINK_ON_WAKE_EN)
2296 wolopts |= WAKE_PHY;
2297
2298 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2299 if (ocp_data & UWF_EN)
2300 wolopts |= WAKE_UCAST;
2301 if (ocp_data & BWF_EN)
2302 wolopts |= WAKE_BCAST;
2303 if (ocp_data & MWF_EN)
2304 wolopts |= WAKE_MCAST;
2305
2306 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2307 if (ocp_data & MAGIC_EN)
2308 wolopts |= WAKE_MAGIC;
2309
2310 return wolopts;
2311}
2312
2313static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2314{
2315 u32 ocp_data;
2316
2317 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2318
2319 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2320 ocp_data &= ~LINK_ON_WAKE_EN;
2321 if (wolopts & WAKE_PHY)
2322 ocp_data |= LINK_ON_WAKE_EN;
2323 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2324
2325 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2326 ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN | LAN_WAKE_EN);
2327 if (wolopts & WAKE_UCAST)
2328 ocp_data |= UWF_EN;
2329 if (wolopts & WAKE_BCAST)
2330 ocp_data |= BWF_EN;
2331 if (wolopts & WAKE_MCAST)
2332 ocp_data |= MWF_EN;
2333 if (wolopts & WAKE_ANY)
2334 ocp_data |= LAN_WAKE_EN;
2335 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2336
2337 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2338
2339 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2340 ocp_data &= ~MAGIC_EN;
2341 if (wolopts & WAKE_MAGIC)
2342 ocp_data |= MAGIC_EN;
2343 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2344
2345 if (wolopts & WAKE_ANY)
2346 device_set_wakeup_enable(&tp->udev->dev, true);
2347 else
2348 device_set_wakeup_enable(&tp->udev->dev, false);
2349}
2350
hayeswangb2143962015-07-24 13:54:23 +08002351static void r8153_u1u2en(struct r8152 *tp, bool enable)
2352{
2353 u8 u1u2[8];
2354
2355 if (enable)
2356 memset(u1u2, 0xff, sizeof(u1u2));
2357 else
2358 memset(u1u2, 0x00, sizeof(u1u2));
2359
2360 usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2361}
2362
2363static void r8153_u2p3en(struct r8152 *tp, bool enable)
2364{
2365 u32 ocp_data;
2366
2367 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2368 if (enable && tp->version != RTL_VER_03 && tp->version != RTL_VER_04)
2369 ocp_data |= U2P3_ENABLE;
2370 else
2371 ocp_data &= ~U2P3_ENABLE;
2372 ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2373}
2374
2375static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2376{
2377 u32 ocp_data;
2378
2379 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2380 if (enable)
2381 ocp_data |= PWR_EN | PHASE2_EN;
2382 else
2383 ocp_data &= ~(PWR_EN | PHASE2_EN);
2384 ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2385
2386 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2387 ocp_data &= ~PCUT_STATUS;
2388 ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2389}
2390
hayeswang7daed8d2015-07-24 13:54:24 +08002391static bool rtl_can_wakeup(struct r8152 *tp)
2392{
2393 struct usb_device *udev = tp->udev;
2394
2395 return (udev->actconfig->desc.bmAttributes & USB_CONFIG_ATT_WAKEUP);
2396}
2397
hayeswang9a4be1b2014-02-18 21:49:07 +08002398static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2399{
2400 if (enable) {
2401 u32 ocp_data;
2402
hayeswangb2143962015-07-24 13:54:23 +08002403 r8153_u1u2en(tp, false);
2404 r8153_u2p3en(tp, false);
2405
hayeswang9a4be1b2014-02-18 21:49:07 +08002406 __rtl_set_wol(tp, WAKE_ANY);
2407
2408 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2409
2410 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2411 ocp_data |= LINK_OFF_WAKE_EN;
2412 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2413
2414 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2415 } else {
2416 __rtl_set_wol(tp, tp->saved_wolopts);
hayeswangb2143962015-07-24 13:54:23 +08002417 r8153_u2p3en(tp, true);
2418 r8153_u1u2en(tp, true);
hayeswang9a4be1b2014-02-18 21:49:07 +08002419 }
2420}
2421
hayeswangaa66a5f2014-02-18 21:49:04 +08002422static void rtl_phy_reset(struct r8152 *tp)
2423{
2424 u16 data;
2425 int i;
2426
2427 clear_bit(PHY_RESET, &tp->flags);
2428
2429 data = r8152_mdio_read(tp, MII_BMCR);
2430
2431 /* don't reset again before the previous one complete */
2432 if (data & BMCR_RESET)
2433 return;
2434
2435 data |= BMCR_RESET;
2436 r8152_mdio_write(tp, MII_BMCR, data);
2437
2438 for (i = 0; i < 50; i++) {
2439 msleep(20);
2440 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2441 break;
2442 }
2443}
2444
hayeswang43499682014-02-18 21:48:58 +08002445static void r8153_teredo_off(struct r8152 *tp)
2446{
2447 u32 ocp_data;
2448
2449 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2450 ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2451 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2452
2453 ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2454 ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2455 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2456}
2457
2458static void r8152b_disable_aldps(struct r8152 *tp)
2459{
2460 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA | DIS_SDSAVE);
2461 msleep(20);
2462}
2463
2464static inline void r8152b_enable_aldps(struct r8152 *tp)
2465{
2466 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2467 LINKENA | DIS_SDSAVE);
2468}
2469
hayeswangd70b1132014-09-19 15:17:18 +08002470static void rtl8152_disable(struct r8152 *tp)
2471{
2472 r8152b_disable_aldps(tp);
2473 rtl_disable(tp);
2474 r8152b_enable_aldps(tp);
2475}
2476
hayeswang43499682014-02-18 21:48:58 +08002477static void r8152b_hw_phy_cfg(struct r8152 *tp)
2478{
hayeswangf0cbe0a2014-02-18 21:49:03 +08002479 u16 data;
2480
2481 data = r8152_mdio_read(tp, MII_BMCR);
2482 if (data & BMCR_PDOWN) {
2483 data &= ~BMCR_PDOWN;
2484 r8152_mdio_write(tp, MII_BMCR, data);
2485 }
2486
hayeswangaa66a5f2014-02-18 21:49:04 +08002487 set_bit(PHY_RESET, &tp->flags);
hayeswang43499682014-02-18 21:48:58 +08002488}
2489
hayeswangac718b62013-05-02 16:01:25 +00002490static void r8152b_exit_oob(struct r8152 *tp)
2491{
hayeswangdb8515e2014-03-06 15:07:16 +08002492 u32 ocp_data;
2493 int i;
hayeswangac718b62013-05-02 16:01:25 +00002494
2495 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2496 ocp_data &= ~RCR_ACPT_ALL;
2497 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2498
hayeswang00a5e362014-02-18 21:48:59 +08002499 rxdy_gated_en(tp, true);
hayeswangda9bd112014-02-18 21:49:08 +08002500 r8153_teredo_off(tp);
hayeswang7e9da482014-02-18 21:49:05 +08002501 r8152b_hw_phy_cfg(tp);
hayeswangac718b62013-05-02 16:01:25 +00002502
2503 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2504 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2505
2506 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2507 ocp_data &= ~NOW_IS_OOB;
2508 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2509
2510 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2511 ocp_data &= ~MCU_BORW_EN;
2512 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2513
2514 for (i = 0; i < 1000; i++) {
2515 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2516 if (ocp_data & LINK_LIST_READY)
2517 break;
hayeswang8ddfa072014-09-09 11:40:28 +08002518 usleep_range(1000, 2000);
hayeswangac718b62013-05-02 16:01:25 +00002519 }
2520
2521 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2522 ocp_data |= RE_INIT_LL;
2523 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2524
2525 for (i = 0; i < 1000; i++) {
2526 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2527 if (ocp_data & LINK_LIST_READY)
2528 break;
hayeswang8ddfa072014-09-09 11:40:28 +08002529 usleep_range(1000, 2000);
hayeswangac718b62013-05-02 16:01:25 +00002530 }
2531
2532 rtl8152_nic_reset(tp);
2533
2534 /* rx share fifo credit full threshold */
2535 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2536
hayeswanga3cc4652014-07-24 16:37:43 +08002537 if (tp->udev->speed == USB_SPEED_FULL ||
2538 tp->udev->speed == USB_SPEED_LOW) {
hayeswangac718b62013-05-02 16:01:25 +00002539 /* rx share fifo credit near full threshold */
2540 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2541 RXFIFO_THR2_FULL);
2542 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2543 RXFIFO_THR3_FULL);
2544 } else {
2545 /* rx share fifo credit near full threshold */
2546 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2547 RXFIFO_THR2_HIGH);
2548 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2549 RXFIFO_THR3_HIGH);
2550 }
2551
2552 /* TX share fifo free credit full threshold */
2553 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2554
2555 ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
hayeswang8e1f51b2014-01-02 11:22:41 +08002556 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
hayeswangac718b62013-05-02 16:01:25 +00002557 ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2558 TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2559
hayeswangc5554292014-09-12 10:43:11 +08002560 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
hayeswangac718b62013-05-02 16:01:25 +00002561
2562 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2563
2564 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2565 ocp_data |= TCR0_AUTO_FIFO;
2566 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2567}
2568
2569static void r8152b_enter_oob(struct r8152 *tp)
2570{
hayeswang45f4a192014-01-06 17:08:41 +08002571 u32 ocp_data;
2572 int i;
hayeswangac718b62013-05-02 16:01:25 +00002573
2574 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2575 ocp_data &= ~NOW_IS_OOB;
2576 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2577
2578 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2579 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2580 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2581
hayeswangd70b1132014-09-19 15:17:18 +08002582 rtl_disable(tp);
hayeswangac718b62013-05-02 16:01:25 +00002583
2584 for (i = 0; i < 1000; i++) {
2585 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2586 if (ocp_data & LINK_LIST_READY)
2587 break;
hayeswang8ddfa072014-09-09 11:40:28 +08002588 usleep_range(1000, 2000);
hayeswangac718b62013-05-02 16:01:25 +00002589 }
2590
2591 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2592 ocp_data |= RE_INIT_LL;
2593 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2594
2595 for (i = 0; i < 1000; i++) {
2596 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2597 if (ocp_data & LINK_LIST_READY)
2598 break;
hayeswang8ddfa072014-09-09 11:40:28 +08002599 usleep_range(1000, 2000);
hayeswangac718b62013-05-02 16:01:25 +00002600 }
2601
2602 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2603
hayeswangc5554292014-09-12 10:43:11 +08002604 rtl_rx_vlan_en(tp, true);
hayeswangac718b62013-05-02 16:01:25 +00002605
2606 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2607 ocp_data |= ALDPS_PROXY_MODE;
2608 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2609
2610 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2611 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2612 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2613
hayeswang00a5e362014-02-18 21:48:59 +08002614 rxdy_gated_en(tp, false);
hayeswangac718b62013-05-02 16:01:25 +00002615
2616 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2617 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2618 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2619}
2620
hayeswang43779f82014-01-02 11:25:10 +08002621static void r8153_hw_phy_cfg(struct r8152 *tp)
2622{
2623 u32 ocp_data;
2624 u16 data;
2625
hayeswangfb02eb42015-07-22 15:27:41 +08002626 if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 ||
2627 tp->version == RTL_VER_05)
2628 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
2629
hayeswangf0cbe0a2014-02-18 21:49:03 +08002630 data = r8152_mdio_read(tp, MII_BMCR);
2631 if (data & BMCR_PDOWN) {
2632 data &= ~BMCR_PDOWN;
2633 r8152_mdio_write(tp, MII_BMCR, data);
2634 }
hayeswang43779f82014-01-02 11:25:10 +08002635
2636 if (tp->version == RTL_VER_03) {
2637 data = ocp_reg_read(tp, OCP_EEE_CFG);
2638 data &= ~CTAP_SHORT_EN;
2639 ocp_reg_write(tp, OCP_EEE_CFG, data);
2640 }
2641
2642 data = ocp_reg_read(tp, OCP_POWER_CFG);
2643 data |= EEE_CLKDIV_EN;
2644 ocp_reg_write(tp, OCP_POWER_CFG, data);
2645
2646 data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2647 data |= EN_10M_BGOFF;
2648 ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2649 data = ocp_reg_read(tp, OCP_POWER_CFG);
2650 data |= EN_10M_PLLOFF;
2651 ocp_reg_write(tp, OCP_POWER_CFG, data);
hayeswangb4d99de2015-01-19 17:02:46 +08002652 sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
hayeswang43779f82014-01-02 11:25:10 +08002653
2654 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2655 ocp_data |= PFM_PWM_SWITCH;
2656 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2657
hayeswangb4d99de2015-01-19 17:02:46 +08002658 /* Enable LPF corner auto tune */
2659 sram_write(tp, SRAM_LPF_CFG, 0xf70f);
hayeswang43779f82014-01-02 11:25:10 +08002660
hayeswangb4d99de2015-01-19 17:02:46 +08002661 /* Adjust 10M Amplitude */
2662 sram_write(tp, SRAM_10M_AMP1, 0x00af);
2663 sram_write(tp, SRAM_10M_AMP2, 0x0208);
hayeswangaa66a5f2014-02-18 21:49:04 +08002664
2665 set_bit(PHY_RESET, &tp->flags);
hayeswang43779f82014-01-02 11:25:10 +08002666}
2667
hayeswang43779f82014-01-02 11:25:10 +08002668static void r8153_first_init(struct r8152 *tp)
2669{
2670 u32 ocp_data;
2671 int i;
2672
hayeswang00a5e362014-02-18 21:48:59 +08002673 rxdy_gated_en(tp, true);
hayeswang43779f82014-01-02 11:25:10 +08002674 r8153_teredo_off(tp);
2675
2676 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2677 ocp_data &= ~RCR_ACPT_ALL;
2678 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2679
2680 r8153_hw_phy_cfg(tp);
2681
2682 rtl8152_nic_reset(tp);
2683
2684 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2685 ocp_data &= ~NOW_IS_OOB;
2686 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2687
2688 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2689 ocp_data &= ~MCU_BORW_EN;
2690 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2691
2692 for (i = 0; i < 1000; i++) {
2693 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2694 if (ocp_data & LINK_LIST_READY)
2695 break;
hayeswang8ddfa072014-09-09 11:40:28 +08002696 usleep_range(1000, 2000);
hayeswang43779f82014-01-02 11:25:10 +08002697 }
2698
2699 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2700 ocp_data |= RE_INIT_LL;
2701 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2702
2703 for (i = 0; i < 1000; i++) {
2704 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2705 if (ocp_data & LINK_LIST_READY)
2706 break;
hayeswang8ddfa072014-09-09 11:40:28 +08002707 usleep_range(1000, 2000);
hayeswang43779f82014-01-02 11:25:10 +08002708 }
2709
hayeswangc5554292014-09-12 10:43:11 +08002710 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
hayeswang43779f82014-01-02 11:25:10 +08002711
hayeswang69b4b7a2014-07-10 10:58:54 +08002712 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2713 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
hayeswang43779f82014-01-02 11:25:10 +08002714
2715 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2716 ocp_data |= TCR0_AUTO_FIFO;
2717 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2718
2719 rtl8152_nic_reset(tp);
2720
2721 /* rx share fifo credit full threshold */
2722 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2723 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2724 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2725 /* TX share fifo free credit full threshold */
2726 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2727
hayeswang9629e3c2014-01-15 10:42:15 +08002728 /* rx aggregation */
hayeswang43779f82014-01-02 11:25:10 +08002729 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
hayeswange90fba82015-07-31 11:23:39 +08002730 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
hayeswang43779f82014-01-02 11:25:10 +08002731 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2732}
2733
2734static void r8153_enter_oob(struct r8152 *tp)
2735{
2736 u32 ocp_data;
2737 int i;
2738
2739 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2740 ocp_data &= ~NOW_IS_OOB;
2741 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2742
hayeswangd70b1132014-09-19 15:17:18 +08002743 rtl_disable(tp);
hayeswang43779f82014-01-02 11:25:10 +08002744
2745 for (i = 0; i < 1000; i++) {
2746 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2747 if (ocp_data & LINK_LIST_READY)
2748 break;
hayeswang8ddfa072014-09-09 11:40:28 +08002749 usleep_range(1000, 2000);
hayeswang43779f82014-01-02 11:25:10 +08002750 }
2751
2752 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2753 ocp_data |= RE_INIT_LL;
2754 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2755
2756 for (i = 0; i < 1000; i++) {
2757 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2758 if (ocp_data & LINK_LIST_READY)
2759 break;
hayeswang8ddfa072014-09-09 11:40:28 +08002760 usleep_range(1000, 2000);
hayeswang43779f82014-01-02 11:25:10 +08002761 }
2762
hayeswang69b4b7a2014-07-10 10:58:54 +08002763 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
hayeswang43779f82014-01-02 11:25:10 +08002764
hayeswang43779f82014-01-02 11:25:10 +08002765 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2766 ocp_data &= ~TEREDO_WAKE_MASK;
2767 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2768
hayeswangc5554292014-09-12 10:43:11 +08002769 rtl_rx_vlan_en(tp, true);
hayeswang43779f82014-01-02 11:25:10 +08002770
2771 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2772 ocp_data |= ALDPS_PROXY_MODE;
2773 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2774
2775 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2776 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2777 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2778
hayeswang00a5e362014-02-18 21:48:59 +08002779 rxdy_gated_en(tp, false);
hayeswang43779f82014-01-02 11:25:10 +08002780
2781 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2782 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2783 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2784}
2785
2786static void r8153_disable_aldps(struct r8152 *tp)
2787{
2788 u16 data;
2789
2790 data = ocp_reg_read(tp, OCP_POWER_CFG);
2791 data &= ~EN_ALDPS;
2792 ocp_reg_write(tp, OCP_POWER_CFG, data);
2793 msleep(20);
2794}
2795
2796static void r8153_enable_aldps(struct r8152 *tp)
2797{
2798 u16 data;
2799
2800 data = ocp_reg_read(tp, OCP_POWER_CFG);
2801 data |= EN_ALDPS;
2802 ocp_reg_write(tp, OCP_POWER_CFG, data);
2803}
2804
hayeswangd70b1132014-09-19 15:17:18 +08002805static void rtl8153_disable(struct r8152 *tp)
2806{
2807 r8153_disable_aldps(tp);
2808 rtl_disable(tp);
2809 r8153_enable_aldps(tp);
hayeswangb2143962015-07-24 13:54:23 +08002810 usb_enable_lpm(tp->udev);
hayeswangd70b1132014-09-19 15:17:18 +08002811}
2812
hayeswangac718b62013-05-02 16:01:25 +00002813static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2814{
hayeswang43779f82014-01-02 11:25:10 +08002815 u16 bmcr, anar, gbcr;
hayeswangac718b62013-05-02 16:01:25 +00002816 int ret = 0;
2817
2818 cancel_delayed_work_sync(&tp->schedule);
2819 anar = r8152_mdio_read(tp, MII_ADVERTISE);
2820 anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2821 ADVERTISE_100HALF | ADVERTISE_100FULL);
hayeswang43779f82014-01-02 11:25:10 +08002822 if (tp->mii.supports_gmii) {
2823 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
2824 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
2825 } else {
2826 gbcr = 0;
2827 }
hayeswangac718b62013-05-02 16:01:25 +00002828
2829 if (autoneg == AUTONEG_DISABLE) {
2830 if (speed == SPEED_10) {
2831 bmcr = 0;
2832 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2833 } else if (speed == SPEED_100) {
2834 bmcr = BMCR_SPEED100;
2835 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
hayeswang43779f82014-01-02 11:25:10 +08002836 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2837 bmcr = BMCR_SPEED1000;
2838 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
hayeswangac718b62013-05-02 16:01:25 +00002839 } else {
2840 ret = -EINVAL;
2841 goto out;
2842 }
2843
2844 if (duplex == DUPLEX_FULL)
2845 bmcr |= BMCR_FULLDPLX;
2846 } else {
2847 if (speed == SPEED_10) {
2848 if (duplex == DUPLEX_FULL)
2849 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2850 else
2851 anar |= ADVERTISE_10HALF;
2852 } else if (speed == SPEED_100) {
2853 if (duplex == DUPLEX_FULL) {
2854 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2855 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2856 } else {
2857 anar |= ADVERTISE_10HALF;
2858 anar |= ADVERTISE_100HALF;
2859 }
hayeswang43779f82014-01-02 11:25:10 +08002860 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2861 if (duplex == DUPLEX_FULL) {
2862 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2863 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2864 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2865 } else {
2866 anar |= ADVERTISE_10HALF;
2867 anar |= ADVERTISE_100HALF;
2868 gbcr |= ADVERTISE_1000HALF;
2869 }
hayeswangac718b62013-05-02 16:01:25 +00002870 } else {
2871 ret = -EINVAL;
2872 goto out;
2873 }
2874
2875 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
2876 }
2877
hayeswangaa66a5f2014-02-18 21:49:04 +08002878 if (test_bit(PHY_RESET, &tp->flags))
2879 bmcr |= BMCR_RESET;
2880
hayeswang43779f82014-01-02 11:25:10 +08002881 if (tp->mii.supports_gmii)
2882 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
2883
hayeswangac718b62013-05-02 16:01:25 +00002884 r8152_mdio_write(tp, MII_ADVERTISE, anar);
2885 r8152_mdio_write(tp, MII_BMCR, bmcr);
2886
hayeswangaa66a5f2014-02-18 21:49:04 +08002887 if (test_bit(PHY_RESET, &tp->flags)) {
2888 int i;
2889
2890 clear_bit(PHY_RESET, &tp->flags);
2891 for (i = 0; i < 50; i++) {
2892 msleep(20);
2893 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2894 break;
2895 }
2896 }
2897
hayeswangac718b62013-05-02 16:01:25 +00002898out:
hayeswangac718b62013-05-02 16:01:25 +00002899
2900 return ret;
2901}
2902
hayeswangd70b1132014-09-19 15:17:18 +08002903static void rtl8152_up(struct r8152 *tp)
2904{
2905 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2906 return;
2907
2908 r8152b_disable_aldps(tp);
2909 r8152b_exit_oob(tp);
2910 r8152b_enable_aldps(tp);
2911}
2912
hayeswangac718b62013-05-02 16:01:25 +00002913static void rtl8152_down(struct r8152 *tp)
2914{
hayeswang68714382014-04-11 17:54:31 +08002915 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2916 rtl_drop_queued_tx(tp);
2917 return;
2918 }
2919
hayeswang00a5e362014-02-18 21:48:59 +08002920 r8152_power_cut_en(tp, false);
hayeswangac718b62013-05-02 16:01:25 +00002921 r8152b_disable_aldps(tp);
2922 r8152b_enter_oob(tp);
2923 r8152b_enable_aldps(tp);
2924}
2925
hayeswangd70b1132014-09-19 15:17:18 +08002926static void rtl8153_up(struct r8152 *tp)
2927{
2928 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2929 return;
2930
hayeswangb2143962015-07-24 13:54:23 +08002931 r8153_u1u2en(tp, false);
hayeswangd70b1132014-09-19 15:17:18 +08002932 r8153_disable_aldps(tp);
2933 r8153_first_init(tp);
2934 r8153_enable_aldps(tp);
hayeswangb2143962015-07-24 13:54:23 +08002935 r8153_u2p3en(tp, true);
2936 r8153_u1u2en(tp, true);
2937 usb_enable_lpm(tp->udev);
hayeswangd70b1132014-09-19 15:17:18 +08002938}
2939
hayeswang43779f82014-01-02 11:25:10 +08002940static void rtl8153_down(struct r8152 *tp)
2941{
hayeswang68714382014-04-11 17:54:31 +08002942 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2943 rtl_drop_queued_tx(tp);
2944 return;
2945 }
2946
hayeswangb9702722014-02-18 21:49:00 +08002947 r8153_u1u2en(tp, false);
hayeswangb2143962015-07-24 13:54:23 +08002948 r8153_u2p3en(tp, false);
hayeswangb9702722014-02-18 21:49:00 +08002949 r8153_power_cut_en(tp, false);
hayeswang43779f82014-01-02 11:25:10 +08002950 r8153_disable_aldps(tp);
2951 r8153_enter_oob(tp);
2952 r8153_enable_aldps(tp);
2953}
2954
hayeswang2dd49e02015-09-07 11:57:44 +08002955static bool rtl8152_in_nway(struct r8152 *tp)
2956{
2957 u16 nway_state;
2958
2959 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, 0x2000);
2960 tp->ocp_base = 0x2000;
2961 ocp_write_byte(tp, MCU_TYPE_PLA, 0xb014, 0x4c); /* phy state */
2962 nway_state = ocp_read_word(tp, MCU_TYPE_PLA, 0xb01a);
2963
2964 /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
2965 if (nway_state & 0xc000)
2966 return false;
2967 else
2968 return true;
2969}
2970
2971static bool rtl8153_in_nway(struct r8152 *tp)
2972{
2973 u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff;
2974
2975 if (phy_state == TXDIS_STATE || phy_state == ABD_STATE)
2976 return false;
2977 else
2978 return true;
2979}
2980
hayeswangac718b62013-05-02 16:01:25 +00002981static void set_carrier(struct r8152 *tp)
2982{
2983 struct net_device *netdev = tp->netdev;
2984 u8 speed;
2985
hayeswang40a82912013-08-14 20:54:40 +08002986 clear_bit(RTL8152_LINK_CHG, &tp->flags);
hayeswangac718b62013-05-02 16:01:25 +00002987 speed = rtl8152_get_speed(tp);
2988
2989 if (speed & LINK_STATUS) {
hayeswang51d979f2015-02-06 11:30:47 +08002990 if (!netif_carrier_ok(netdev)) {
hayeswangc81229c2014-01-02 11:22:42 +08002991 tp->rtl_ops.enable(tp);
hayeswangac718b62013-05-02 16:01:25 +00002992 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
hayeswang41cec842015-07-24 13:54:25 +08002993 napi_disable(&tp->napi);
hayeswangac718b62013-05-02 16:01:25 +00002994 netif_carrier_on(netdev);
hayeswangaa2e0922015-01-09 10:26:35 +08002995 rtl_start_rx(tp);
hayeswang41cec842015-07-24 13:54:25 +08002996 napi_enable(&tp->napi);
hayeswangac718b62013-05-02 16:01:25 +00002997 }
2998 } else {
hayeswang51d979f2015-02-06 11:30:47 +08002999 if (netif_carrier_ok(netdev)) {
hayeswangac718b62013-05-02 16:01:25 +00003000 netif_carrier_off(netdev);
hayeswangd823ab62015-01-12 12:06:23 +08003001 napi_disable(&tp->napi);
hayeswangc81229c2014-01-02 11:22:42 +08003002 tp->rtl_ops.disable(tp);
hayeswangd823ab62015-01-12 12:06:23 +08003003 napi_enable(&tp->napi);
hayeswangac718b62013-05-02 16:01:25 +00003004 }
3005 }
hayeswangac718b62013-05-02 16:01:25 +00003006}
3007
3008static void rtl_work_func_t(struct work_struct *work)
3009{
3010 struct r8152 *tp = container_of(work, struct r8152, schedule.work);
3011
hayeswanga1f83fe2014-11-12 10:05:05 +08003012 /* If the device is unplugged or !netif_running(), the workqueue
3013 * doesn't need to wake the device, and could return directly.
3014 */
3015 if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
3016 return;
3017
hayeswang9a4be1b2014-02-18 21:49:07 +08003018 if (usb_autopm_get_interface(tp->intf) < 0)
3019 return;
3020
hayeswangac718b62013-05-02 16:01:25 +00003021 if (!test_bit(WORK_ENABLE, &tp->flags))
3022 goto out1;
3023
hayeswangb5403272014-10-09 18:00:26 +08003024 if (!mutex_trylock(&tp->control)) {
3025 schedule_delayed_work(&tp->schedule, 0);
3026 goto out1;
3027 }
3028
hayeswang40a82912013-08-14 20:54:40 +08003029 if (test_bit(RTL8152_LINK_CHG, &tp->flags))
3030 set_carrier(tp);
hayeswangac718b62013-05-02 16:01:25 +00003031
3032 if (test_bit(RTL8152_SET_RX_MODE, &tp->flags))
3033 _rtl8152_set_rx_mode(tp->netdev);
3034
hayeswangd823ab62015-01-12 12:06:23 +08003035 /* don't schedule napi before linking */
3036 if (test_bit(SCHEDULE_NAPI, &tp->flags) &&
hayeswang51d979f2015-02-06 11:30:47 +08003037 netif_carrier_ok(tp->netdev)) {
hayeswangd823ab62015-01-12 12:06:23 +08003038 clear_bit(SCHEDULE_NAPI, &tp->flags);
3039 napi_schedule(&tp->napi);
hayeswang0c3121f2014-03-07 11:04:36 +08003040 }
hayeswangaa66a5f2014-02-18 21:49:04 +08003041
3042 if (test_bit(PHY_RESET, &tp->flags))
3043 rtl_phy_reset(tp);
3044
hayeswangb5403272014-10-09 18:00:26 +08003045 mutex_unlock(&tp->control);
3046
hayeswangac718b62013-05-02 16:01:25 +00003047out1:
hayeswang9a4be1b2014-02-18 21:49:07 +08003048 usb_autopm_put_interface(tp->intf);
hayeswangac718b62013-05-02 16:01:25 +00003049}
3050
3051static int rtl8152_open(struct net_device *netdev)
3052{
3053 struct r8152 *tp = netdev_priv(netdev);
3054 int res = 0;
3055
hayeswang7e9da482014-02-18 21:49:05 +08003056 res = alloc_all_mem(tp);
3057 if (res)
3058 goto out;
3059
hayeswang51d979f2015-02-06 11:30:47 +08003060 netif_carrier_off(netdev);
hayeswangf4c74762014-10-29 11:12:16 +08003061
hayeswang9a4be1b2014-02-18 21:49:07 +08003062 res = usb_autopm_get_interface(tp->intf);
3063 if (res < 0) {
3064 free_all_mem(tp);
3065 goto out;
3066 }
3067
hayeswangb5403272014-10-09 18:00:26 +08003068 mutex_lock(&tp->control);
3069
hayeswang7e9da482014-02-18 21:49:05 +08003070 tp->rtl_ops.up(tp);
3071
hayeswang43779f82014-01-02 11:25:10 +08003072 rtl8152_set_speed(tp, AUTONEG_ENABLE,
3073 tp->mii.supports_gmii ? SPEED_1000 : SPEED_100,
3074 DUPLEX_FULL);
hayeswang40a82912013-08-14 20:54:40 +08003075 netif_carrier_off(netdev);
hayeswangac718b62013-05-02 16:01:25 +00003076 netif_start_queue(netdev);
3077 set_bit(WORK_ENABLE, &tp->flags);
hayeswangdb8515e2014-03-06 15:07:16 +08003078
hayeswang3d55f442014-02-06 11:55:48 +08003079 res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3080 if (res) {
3081 if (res == -ENODEV)
3082 netif_device_detach(tp->netdev);
3083 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
3084 res);
hayeswang7e9da482014-02-18 21:49:05 +08003085 free_all_mem(tp);
hayeswang93ffbea2014-11-05 10:17:02 +08003086 } else {
hayeswangd823ab62015-01-12 12:06:23 +08003087 napi_enable(&tp->napi);
hayeswang3d55f442014-02-06 11:55:48 +08003088 }
3089
hayeswangb5403272014-10-09 18:00:26 +08003090 mutex_unlock(&tp->control);
3091
hayeswang9a4be1b2014-02-18 21:49:07 +08003092 usb_autopm_put_interface(tp->intf);
hayeswangac718b62013-05-02 16:01:25 +00003093
hayeswang7e9da482014-02-18 21:49:05 +08003094out:
hayeswangac718b62013-05-02 16:01:25 +00003095 return res;
3096}
3097
3098static int rtl8152_close(struct net_device *netdev)
3099{
3100 struct r8152 *tp = netdev_priv(netdev);
3101 int res = 0;
3102
hayeswangd823ab62015-01-12 12:06:23 +08003103 napi_disable(&tp->napi);
hayeswangac718b62013-05-02 16:01:25 +00003104 clear_bit(WORK_ENABLE, &tp->flags);
hayeswang3d55f442014-02-06 11:55:48 +08003105 usb_kill_urb(tp->intr_urb);
hayeswangac718b62013-05-02 16:01:25 +00003106 cancel_delayed_work_sync(&tp->schedule);
3107 netif_stop_queue(netdev);
hayeswang9a4be1b2014-02-18 21:49:07 +08003108
3109 res = usb_autopm_get_interface(tp->intf);
hayeswang53543db2015-02-06 11:30:48 +08003110 if (res < 0 || test_bit(RTL8152_UNPLUG, &tp->flags)) {
hayeswang9a4be1b2014-02-18 21:49:07 +08003111 rtl_drop_queued_tx(tp);
hayeswangd823ab62015-01-12 12:06:23 +08003112 rtl_stop_rx(tp);
hayeswang9a4be1b2014-02-18 21:49:07 +08003113 } else {
hayeswangb5403272014-10-09 18:00:26 +08003114 mutex_lock(&tp->control);
3115
hayeswang9a4be1b2014-02-18 21:49:07 +08003116 tp->rtl_ops.down(tp);
hayeswangb5403272014-10-09 18:00:26 +08003117
3118 mutex_unlock(&tp->control);
3119
hayeswang9a4be1b2014-02-18 21:49:07 +08003120 usb_autopm_put_interface(tp->intf);
3121 }
hayeswangac718b62013-05-02 16:01:25 +00003122
hayeswang7e9da482014-02-18 21:49:05 +08003123 free_all_mem(tp);
3124
hayeswangac718b62013-05-02 16:01:25 +00003125 return res;
3126}
3127
hayeswangd24f6132014-09-25 20:54:01 +08003128static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
hayeswangac718b62013-05-02 16:01:25 +00003129{
hayeswangd24f6132014-09-25 20:54:01 +08003130 ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
3131 ocp_reg_write(tp, OCP_EEE_DATA, reg);
3132 ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
3133}
3134
3135static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
3136{
3137 u16 data;
3138
3139 r8152_mmd_indirect(tp, dev, reg);
3140 data = ocp_reg_read(tp, OCP_EEE_DATA);
3141 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3142
3143 return data;
3144}
3145
3146static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
3147{
3148 r8152_mmd_indirect(tp, dev, reg);
3149 ocp_reg_write(tp, OCP_EEE_DATA, data);
3150 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3151}
3152
3153static void r8152_eee_en(struct r8152 *tp, bool enable)
3154{
3155 u16 config1, config2, config3;
hayeswang45f4a192014-01-06 17:08:41 +08003156 u32 ocp_data;
hayeswangac718b62013-05-02 16:01:25 +00003157
3158 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
hayeswangd24f6132014-09-25 20:54:01 +08003159 config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
3160 config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
3161 config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
3162
3163 if (enable) {
3164 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3165 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
3166 config1 |= sd_rise_time(1);
3167 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
3168 config3 |= fast_snr(42);
3169 } else {
3170 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3171 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
3172 RX_QUIET_EN);
3173 config1 |= sd_rise_time(7);
3174 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
3175 config3 |= fast_snr(511);
3176 }
3177
hayeswangac718b62013-05-02 16:01:25 +00003178 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
hayeswangd24f6132014-09-25 20:54:01 +08003179 ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
3180 ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
3181 ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
3182}
3183
3184static void r8152b_enable_eee(struct r8152 *tp)
3185{
3186 r8152_eee_en(tp, true);
3187 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
3188}
3189
3190static void r8153_eee_en(struct r8152 *tp, bool enable)
3191{
3192 u32 ocp_data;
3193 u16 config;
3194
3195 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3196 config = ocp_reg_read(tp, OCP_EEE_CFG);
3197
3198 if (enable) {
3199 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3200 config |= EEE10_EN;
3201 } else {
3202 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3203 config &= ~EEE10_EN;
3204 }
3205
3206 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3207 ocp_reg_write(tp, OCP_EEE_CFG, config);
hayeswangac718b62013-05-02 16:01:25 +00003208}
3209
hayeswang43779f82014-01-02 11:25:10 +08003210static void r8153_enable_eee(struct r8152 *tp)
3211{
hayeswangd24f6132014-09-25 20:54:01 +08003212 r8153_eee_en(tp, true);
3213 ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
hayeswang43779f82014-01-02 11:25:10 +08003214}
3215
hayeswangac718b62013-05-02 16:01:25 +00003216static void r8152b_enable_fc(struct r8152 *tp)
3217{
3218 u16 anar;
3219
3220 anar = r8152_mdio_read(tp, MII_ADVERTISE);
3221 anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
3222 r8152_mdio_write(tp, MII_ADVERTISE, anar);
3223}
3224
hayeswang4f1d4d52014-03-11 16:24:19 +08003225static void rtl_tally_reset(struct r8152 *tp)
3226{
3227 u32 ocp_data;
3228
3229 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3230 ocp_data |= TALLY_RESET;
3231 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3232}
3233
hayeswangac718b62013-05-02 16:01:25 +00003234static void r8152b_init(struct r8152 *tp)
3235{
hayeswangebc2ec42013-08-14 20:54:38 +08003236 u32 ocp_data;
hayeswangac718b62013-05-02 16:01:25 +00003237
hayeswang68714382014-04-11 17:54:31 +08003238 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3239 return;
3240
hayeswangd70b1132014-09-19 15:17:18 +08003241 r8152b_disable_aldps(tp);
3242
hayeswangac718b62013-05-02 16:01:25 +00003243 if (tp->version == RTL_VER_01) {
3244 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3245 ocp_data &= ~LED_MODE_MASK;
3246 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3247 }
3248
hayeswang00a5e362014-02-18 21:48:59 +08003249 r8152_power_cut_en(tp, false);
hayeswangac718b62013-05-02 16:01:25 +00003250
hayeswangac718b62013-05-02 16:01:25 +00003251 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3252 ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3253 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3254 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3255 ocp_data &= ~MCU_CLK_RATIO_MASK;
3256 ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3257 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3258 ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3259 SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3260 ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3261
3262 r8152b_enable_eee(tp);
3263 r8152b_enable_aldps(tp);
3264 r8152b_enable_fc(tp);
hayeswang4f1d4d52014-03-11 16:24:19 +08003265 rtl_tally_reset(tp);
hayeswangac718b62013-05-02 16:01:25 +00003266
hayeswangebc2ec42013-08-14 20:54:38 +08003267 /* enable rx aggregation */
hayeswangac718b62013-05-02 16:01:25 +00003268 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
hayeswange90fba82015-07-31 11:23:39 +08003269 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
hayeswangac718b62013-05-02 16:01:25 +00003270 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3271}
3272
hayeswang43779f82014-01-02 11:25:10 +08003273static void r8153_init(struct r8152 *tp)
3274{
3275 u32 ocp_data;
3276 int i;
3277
hayeswang68714382014-04-11 17:54:31 +08003278 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3279 return;
3280
hayeswangd70b1132014-09-19 15:17:18 +08003281 r8153_disable_aldps(tp);
hayeswangb9702722014-02-18 21:49:00 +08003282 r8153_u1u2en(tp, false);
hayeswang43779f82014-01-02 11:25:10 +08003283
3284 for (i = 0; i < 500; i++) {
3285 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3286 AUTOLOAD_DONE)
3287 break;
3288 msleep(20);
3289 }
3290
3291 for (i = 0; i < 500; i++) {
3292 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3293 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3294 break;
3295 msleep(20);
3296 }
3297
hayeswangb2143962015-07-24 13:54:23 +08003298 usb_disable_lpm(tp->udev);
hayeswangb9702722014-02-18 21:49:00 +08003299 r8153_u2p3en(tp, false);
hayeswang43779f82014-01-02 11:25:10 +08003300
hayeswang65bab842015-02-12 16:20:46 +08003301 if (tp->version == RTL_VER_04) {
3302 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
3303 ocp_data &= ~pwd_dn_scale_mask;
3304 ocp_data |= pwd_dn_scale(96);
3305 ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
3306
3307 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
3308 ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
3309 ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
3310 } else if (tp->version == RTL_VER_05) {
3311 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
3312 ocp_data &= ~ECM_ALDPS;
3313 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
3314
3315 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3316 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3317 ocp_data &= ~DYNAMIC_BURST;
3318 else
3319 ocp_data |= DYNAMIC_BURST;
3320 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
hayeswangfb02eb42015-07-22 15:27:41 +08003321 } else if (tp->version == RTL_VER_06) {
3322 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3323 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3324 ocp_data &= ~DYNAMIC_BURST;
3325 else
3326 ocp_data |= DYNAMIC_BURST;
3327 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
hayeswang65bab842015-02-12 16:20:46 +08003328 }
3329
3330 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
3331 ocp_data |= EP4_FULL_FC;
3332 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
3333
hayeswang43779f82014-01-02 11:25:10 +08003334 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3335 ocp_data &= ~TIMER11_EN;
3336 ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3337
hayeswang43779f82014-01-02 11:25:10 +08003338 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3339 ocp_data &= ~LED_MODE_MASK;
3340 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3341
hayeswang65bab842015-02-12 16:20:46 +08003342 ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
hayeswang34203e22015-02-06 11:30:46 +08003343 if (tp->version == RTL_VER_04 && tp->udev->speed != USB_SPEED_SUPER)
hayeswang43779f82014-01-02 11:25:10 +08003344 ocp_data |= LPM_TIMER_500MS;
hayeswang34203e22015-02-06 11:30:46 +08003345 else
3346 ocp_data |= LPM_TIMER_500US;
hayeswang43779f82014-01-02 11:25:10 +08003347 ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3348
3349 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3350 ocp_data &= ~SEN_VAL_MASK;
3351 ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3352 ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3353
hayeswang65bab842015-02-12 16:20:46 +08003354 ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
3355
hayeswangb9702722014-02-18 21:49:00 +08003356 r8153_power_cut_en(tp, false);
3357 r8153_u1u2en(tp, true);
hayeswang43779f82014-01-02 11:25:10 +08003358
hayeswang43779f82014-01-02 11:25:10 +08003359 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ALDPS_SPDWN_RATIO);
3360 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, EEE_SPDWN_RATIO);
3361 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3,
3362 PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN |
3363 U1U2_SPDWN_EN | L1_SPDWN_EN);
3364 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4,
3365 PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN |
3366 TP100_SPDWN_EN | TP500_SPDWN_EN | TP1000_SPDWN_EN |
3367 EEE_SPDWN_EN);
3368
3369 r8153_enable_eee(tp);
3370 r8153_enable_aldps(tp);
3371 r8152b_enable_fc(tp);
hayeswang4f1d4d52014-03-11 16:24:19 +08003372 rtl_tally_reset(tp);
hayeswangb2143962015-07-24 13:54:23 +08003373 r8153_u2p3en(tp, true);
hayeswang43779f82014-01-02 11:25:10 +08003374}
3375
hayeswange5011392015-07-29 20:39:08 +08003376static int rtl8152_pre_reset(struct usb_interface *intf)
3377{
3378 struct r8152 *tp = usb_get_intfdata(intf);
3379 struct net_device *netdev;
3380
3381 if (!tp)
3382 return 0;
3383
3384 netdev = tp->netdev;
3385 if (!netif_running(netdev))
3386 return 0;
3387
3388 napi_disable(&tp->napi);
3389 clear_bit(WORK_ENABLE, &tp->flags);
3390 usb_kill_urb(tp->intr_urb);
3391 cancel_delayed_work_sync(&tp->schedule);
3392 if (netif_carrier_ok(netdev)) {
3393 netif_stop_queue(netdev);
3394 mutex_lock(&tp->control);
3395 tp->rtl_ops.disable(tp);
3396 mutex_unlock(&tp->control);
3397 }
3398
3399 return 0;
3400}
3401
3402static int rtl8152_post_reset(struct usb_interface *intf)
3403{
3404 struct r8152 *tp = usb_get_intfdata(intf);
3405 struct net_device *netdev;
3406
3407 if (!tp)
3408 return 0;
3409
3410 netdev = tp->netdev;
3411 if (!netif_running(netdev))
3412 return 0;
3413
3414 set_bit(WORK_ENABLE, &tp->flags);
3415 if (netif_carrier_ok(netdev)) {
3416 mutex_lock(&tp->control);
3417 tp->rtl_ops.enable(tp);
3418 rtl8152_set_rx_mode(netdev);
3419 mutex_unlock(&tp->control);
3420 netif_wake_queue(netdev);
3421 }
3422
3423 napi_enable(&tp->napi);
3424
3425 return 0;
hayeswangac718b62013-05-02 16:01:25 +00003426}
3427
hayeswang2dd49e02015-09-07 11:57:44 +08003428static bool delay_autosuspend(struct r8152 *tp)
3429{
3430 bool sw_linking = !!netif_carrier_ok(tp->netdev);
3431 bool hw_linking = !!(rtl8152_get_speed(tp) & LINK_STATUS);
3432
3433 /* This means a linking change occurs and the driver doesn't detect it,
3434 * yet. If the driver has disabled tx/rx and hw is linking on, the
3435 * device wouldn't wake up by receiving any packet.
3436 */
3437 if (work_busy(&tp->schedule.work) || sw_linking != hw_linking)
3438 return true;
3439
3440 /* If the linking down is occurred by nway, the device may miss the
3441 * linking change event. And it wouldn't wake when linking on.
3442 */
3443 if (!sw_linking && tp->rtl_ops.in_nway(tp))
3444 return true;
3445 else
3446 return false;
3447}
3448
hayeswangac718b62013-05-02 16:01:25 +00003449static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3450{
3451 struct r8152 *tp = usb_get_intfdata(intf);
hayeswang6cc69f22014-10-17 16:55:08 +08003452 struct net_device *netdev = tp->netdev;
3453 int ret = 0;
hayeswangac718b62013-05-02 16:01:25 +00003454
hayeswangb5403272014-10-09 18:00:26 +08003455 mutex_lock(&tp->control);
3456
hayeswang6cc69f22014-10-17 16:55:08 +08003457 if (PMSG_IS_AUTO(message)) {
hayeswang2dd49e02015-09-07 11:57:44 +08003458 if (netif_running(netdev) && delay_autosuspend(tp)) {
hayeswang6cc69f22014-10-17 16:55:08 +08003459 ret = -EBUSY;
3460 goto out1;
3461 }
hayeswangac718b62013-05-02 16:01:25 +00003462
hayeswang6cc69f22014-10-17 16:55:08 +08003463 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3464 } else {
3465 netif_device_detach(netdev);
3466 }
3467
hayeswange3bd1a82014-10-29 11:12:17 +08003468 if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
hayeswangac718b62013-05-02 16:01:25 +00003469 clear_bit(WORK_ENABLE, &tp->flags);
hayeswang40a82912013-08-14 20:54:40 +08003470 usb_kill_urb(tp->intr_urb);
hayeswangd823ab62015-01-12 12:06:23 +08003471 napi_disable(&tp->napi);
hayeswang9a4be1b2014-02-18 21:49:07 +08003472 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
hayeswang445f7f42014-09-23 16:31:47 +08003473 rtl_stop_rx(tp);
hayeswang9a4be1b2014-02-18 21:49:07 +08003474 rtl_runtime_suspend_enable(tp, true);
3475 } else {
hayeswang6cc69f22014-10-17 16:55:08 +08003476 cancel_delayed_work_sync(&tp->schedule);
hayeswang9a4be1b2014-02-18 21:49:07 +08003477 tp->rtl_ops.down(tp);
hayeswang9a4be1b2014-02-18 21:49:07 +08003478 }
hayeswangd823ab62015-01-12 12:06:23 +08003479 napi_enable(&tp->napi);
hayeswangac718b62013-05-02 16:01:25 +00003480 }
hayeswang6cc69f22014-10-17 16:55:08 +08003481out1:
hayeswangb5403272014-10-09 18:00:26 +08003482 mutex_unlock(&tp->control);
3483
hayeswang6cc69f22014-10-17 16:55:08 +08003484 return ret;
hayeswangac718b62013-05-02 16:01:25 +00003485}
3486
3487static int rtl8152_resume(struct usb_interface *intf)
3488{
3489 struct r8152 *tp = usb_get_intfdata(intf);
3490
hayeswangb5403272014-10-09 18:00:26 +08003491 mutex_lock(&tp->control);
3492
hayeswang9a4be1b2014-02-18 21:49:07 +08003493 if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3494 tp->rtl_ops.init(tp);
3495 netif_device_attach(tp->netdev);
3496 }
3497
Peter Wu90186af2015-12-08 12:17:42 +01003498 if (netif_running(tp->netdev) && tp->netdev->flags & IFF_UP) {
hayeswang9a4be1b2014-02-18 21:49:07 +08003499 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3500 rtl_runtime_suspend_enable(tp, false);
3501 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
hayeswang41cec842015-07-24 13:54:25 +08003502 napi_disable(&tp->napi);
hayeswang445f7f42014-09-23 16:31:47 +08003503 set_bit(WORK_ENABLE, &tp->flags);
hayeswang51d979f2015-02-06 11:30:47 +08003504 if (netif_carrier_ok(tp->netdev))
hayeswang445f7f42014-09-23 16:31:47 +08003505 rtl_start_rx(tp);
hayeswang41cec842015-07-24 13:54:25 +08003506 napi_enable(&tp->napi);
hayeswang9a4be1b2014-02-18 21:49:07 +08003507 } else {
3508 tp->rtl_ops.up(tp);
3509 rtl8152_set_speed(tp, AUTONEG_ENABLE,
hayeswangb209af92014-08-25 15:53:00 +08003510 tp->mii.supports_gmii ?
3511 SPEED_1000 : SPEED_100,
3512 DUPLEX_FULL);
hayeswang445f7f42014-09-23 16:31:47 +08003513 netif_carrier_off(tp->netdev);
3514 set_bit(WORK_ENABLE, &tp->flags);
hayeswang9a4be1b2014-02-18 21:49:07 +08003515 }
hayeswang40a82912013-08-14 20:54:40 +08003516 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
hayeswang923e1ee2014-10-29 11:12:15 +08003517 } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
Peter Wu90186af2015-12-08 12:17:42 +01003518 if (tp->netdev->flags & IFF_UP)
3519 rtl_runtime_suspend_enable(tp, false);
hayeswang923e1ee2014-10-29 11:12:15 +08003520 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
hayeswangac718b62013-05-02 16:01:25 +00003521 }
3522
hayeswangb5403272014-10-09 18:00:26 +08003523 mutex_unlock(&tp->control);
3524
hayeswangac718b62013-05-02 16:01:25 +00003525 return 0;
3526}
3527
hayeswang7ec25412016-01-04 14:38:46 +08003528static int rtl8152_reset_resume(struct usb_interface *intf)
3529{
3530 struct r8152 *tp = usb_get_intfdata(intf);
3531
3532 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3533 return rtl8152_resume(intf);
3534}
3535
hayeswang21ff2e82014-02-18 21:49:06 +08003536static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3537{
3538 struct r8152 *tp = netdev_priv(dev);
3539
hayeswang9a4be1b2014-02-18 21:49:07 +08003540 if (usb_autopm_get_interface(tp->intf) < 0)
3541 return;
3542
hayeswang7daed8d2015-07-24 13:54:24 +08003543 if (!rtl_can_wakeup(tp)) {
3544 wol->supported = 0;
3545 wol->wolopts = 0;
3546 } else {
3547 mutex_lock(&tp->control);
3548 wol->supported = WAKE_ANY;
3549 wol->wolopts = __rtl_get_wol(tp);
3550 mutex_unlock(&tp->control);
3551 }
hayeswangb5403272014-10-09 18:00:26 +08003552
hayeswang9a4be1b2014-02-18 21:49:07 +08003553 usb_autopm_put_interface(tp->intf);
hayeswang21ff2e82014-02-18 21:49:06 +08003554}
3555
3556static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3557{
3558 struct r8152 *tp = netdev_priv(dev);
hayeswang9a4be1b2014-02-18 21:49:07 +08003559 int ret;
3560
hayeswang7daed8d2015-07-24 13:54:24 +08003561 if (!rtl_can_wakeup(tp))
3562 return -EOPNOTSUPP;
3563
hayeswang9a4be1b2014-02-18 21:49:07 +08003564 ret = usb_autopm_get_interface(tp->intf);
3565 if (ret < 0)
3566 goto out_set_wol;
hayeswang21ff2e82014-02-18 21:49:06 +08003567
hayeswangb5403272014-10-09 18:00:26 +08003568 mutex_lock(&tp->control);
3569
hayeswang21ff2e82014-02-18 21:49:06 +08003570 __rtl_set_wol(tp, wol->wolopts);
3571 tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3572
hayeswangb5403272014-10-09 18:00:26 +08003573 mutex_unlock(&tp->control);
3574
hayeswang9a4be1b2014-02-18 21:49:07 +08003575 usb_autopm_put_interface(tp->intf);
3576
3577out_set_wol:
3578 return ret;
hayeswang21ff2e82014-02-18 21:49:06 +08003579}
3580
hayeswanga5ec27c2014-02-18 21:49:11 +08003581static u32 rtl8152_get_msglevel(struct net_device *dev)
3582{
3583 struct r8152 *tp = netdev_priv(dev);
3584
3585 return tp->msg_enable;
3586}
3587
3588static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3589{
3590 struct r8152 *tp = netdev_priv(dev);
3591
3592 tp->msg_enable = value;
3593}
3594
hayeswangac718b62013-05-02 16:01:25 +00003595static void rtl8152_get_drvinfo(struct net_device *netdev,
3596 struct ethtool_drvinfo *info)
3597{
3598 struct r8152 *tp = netdev_priv(netdev);
3599
hayeswangb0b46c72014-08-26 10:08:23 +08003600 strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3601 strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
hayeswangac718b62013-05-02 16:01:25 +00003602 usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3603}
3604
3605static
3606int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3607{
3608 struct r8152 *tp = netdev_priv(netdev);
hayeswang8d4a4d72014-10-09 18:00:25 +08003609 int ret;
hayeswangac718b62013-05-02 16:01:25 +00003610
3611 if (!tp->mii.mdio_read)
3612 return -EOPNOTSUPP;
3613
hayeswang8d4a4d72014-10-09 18:00:25 +08003614 ret = usb_autopm_get_interface(tp->intf);
3615 if (ret < 0)
3616 goto out;
3617
hayeswangb5403272014-10-09 18:00:26 +08003618 mutex_lock(&tp->control);
3619
hayeswang8d4a4d72014-10-09 18:00:25 +08003620 ret = mii_ethtool_gset(&tp->mii, cmd);
3621
hayeswangb5403272014-10-09 18:00:26 +08003622 mutex_unlock(&tp->control);
3623
hayeswang8d4a4d72014-10-09 18:00:25 +08003624 usb_autopm_put_interface(tp->intf);
3625
3626out:
3627 return ret;
hayeswangac718b62013-05-02 16:01:25 +00003628}
3629
3630static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3631{
3632 struct r8152 *tp = netdev_priv(dev);
hayeswang9a4be1b2014-02-18 21:49:07 +08003633 int ret;
hayeswangac718b62013-05-02 16:01:25 +00003634
hayeswang9a4be1b2014-02-18 21:49:07 +08003635 ret = usb_autopm_get_interface(tp->intf);
3636 if (ret < 0)
3637 goto out;
3638
hayeswangb5403272014-10-09 18:00:26 +08003639 mutex_lock(&tp->control);
3640
hayeswang9a4be1b2014-02-18 21:49:07 +08003641 ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3642
hayeswangb5403272014-10-09 18:00:26 +08003643 mutex_unlock(&tp->control);
3644
hayeswang9a4be1b2014-02-18 21:49:07 +08003645 usb_autopm_put_interface(tp->intf);
3646
3647out:
3648 return ret;
hayeswangac718b62013-05-02 16:01:25 +00003649}
3650
hayeswang4f1d4d52014-03-11 16:24:19 +08003651static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3652 "tx_packets",
3653 "rx_packets",
3654 "tx_errors",
3655 "rx_errors",
3656 "rx_missed",
3657 "align_errors",
3658 "tx_single_collisions",
3659 "tx_multi_collisions",
3660 "rx_unicast",
3661 "rx_broadcast",
3662 "rx_multicast",
3663 "tx_aborted",
3664 "tx_underrun",
3665};
3666
3667static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3668{
3669 switch (sset) {
3670 case ETH_SS_STATS:
3671 return ARRAY_SIZE(rtl8152_gstrings);
3672 default:
3673 return -EOPNOTSUPP;
3674 }
3675}
3676
3677static void rtl8152_get_ethtool_stats(struct net_device *dev,
3678 struct ethtool_stats *stats, u64 *data)
3679{
3680 struct r8152 *tp = netdev_priv(dev);
3681 struct tally_counter tally;
3682
hayeswang0b030242014-07-08 14:49:28 +08003683 if (usb_autopm_get_interface(tp->intf) < 0)
3684 return;
3685
hayeswang4f1d4d52014-03-11 16:24:19 +08003686 generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3687
hayeswang0b030242014-07-08 14:49:28 +08003688 usb_autopm_put_interface(tp->intf);
3689
hayeswang4f1d4d52014-03-11 16:24:19 +08003690 data[0] = le64_to_cpu(tally.tx_packets);
3691 data[1] = le64_to_cpu(tally.rx_packets);
3692 data[2] = le64_to_cpu(tally.tx_errors);
3693 data[3] = le32_to_cpu(tally.rx_errors);
3694 data[4] = le16_to_cpu(tally.rx_missed);
3695 data[5] = le16_to_cpu(tally.align_errors);
3696 data[6] = le32_to_cpu(tally.tx_one_collision);
3697 data[7] = le32_to_cpu(tally.tx_multi_collision);
3698 data[8] = le64_to_cpu(tally.rx_unicast);
3699 data[9] = le64_to_cpu(tally.rx_broadcast);
3700 data[10] = le32_to_cpu(tally.rx_multicast);
3701 data[11] = le16_to_cpu(tally.tx_aborted);
hayeswangf37119c2014-10-28 14:05:51 +08003702 data[12] = le16_to_cpu(tally.tx_underrun);
hayeswang4f1d4d52014-03-11 16:24:19 +08003703}
3704
3705static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3706{
3707 switch (stringset) {
3708 case ETH_SS_STATS:
3709 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3710 break;
3711 }
3712}
3713
hayeswangdf35d282014-09-25 20:54:02 +08003714static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3715{
3716 u32 ocp_data, lp, adv, supported = 0;
3717 u16 val;
3718
3719 val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3720 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3721
3722 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3723 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3724
3725 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3726 lp = mmd_eee_adv_to_ethtool_adv_t(val);
3727
3728 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3729 ocp_data &= EEE_RX_EN | EEE_TX_EN;
3730
3731 eee->eee_enabled = !!ocp_data;
3732 eee->eee_active = !!(supported & adv & lp);
3733 eee->supported = supported;
3734 eee->advertised = adv;
3735 eee->lp_advertised = lp;
3736
3737 return 0;
3738}
3739
3740static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3741{
3742 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3743
3744 r8152_eee_en(tp, eee->eee_enabled);
3745
3746 if (!eee->eee_enabled)
3747 val = 0;
3748
3749 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3750
3751 return 0;
3752}
3753
3754static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3755{
3756 u32 ocp_data, lp, adv, supported = 0;
3757 u16 val;
3758
3759 val = ocp_reg_read(tp, OCP_EEE_ABLE);
3760 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3761
3762 val = ocp_reg_read(tp, OCP_EEE_ADV);
3763 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3764
3765 val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3766 lp = mmd_eee_adv_to_ethtool_adv_t(val);
3767
3768 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3769 ocp_data &= EEE_RX_EN | EEE_TX_EN;
3770
3771 eee->eee_enabled = !!ocp_data;
3772 eee->eee_active = !!(supported & adv & lp);
3773 eee->supported = supported;
3774 eee->advertised = adv;
3775 eee->lp_advertised = lp;
3776
3777 return 0;
3778}
3779
3780static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3781{
3782 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3783
3784 r8153_eee_en(tp, eee->eee_enabled);
3785
3786 if (!eee->eee_enabled)
3787 val = 0;
3788
3789 ocp_reg_write(tp, OCP_EEE_ADV, val);
3790
3791 return 0;
3792}
3793
3794static int
3795rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
3796{
3797 struct r8152 *tp = netdev_priv(net);
3798 int ret;
3799
3800 ret = usb_autopm_get_interface(tp->intf);
3801 if (ret < 0)
3802 goto out;
3803
hayeswangb5403272014-10-09 18:00:26 +08003804 mutex_lock(&tp->control);
3805
hayeswangdf35d282014-09-25 20:54:02 +08003806 ret = tp->rtl_ops.eee_get(tp, edata);
3807
hayeswangb5403272014-10-09 18:00:26 +08003808 mutex_unlock(&tp->control);
3809
hayeswangdf35d282014-09-25 20:54:02 +08003810 usb_autopm_put_interface(tp->intf);
3811
3812out:
3813 return ret;
3814}
3815
3816static int
3817rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
3818{
3819 struct r8152 *tp = netdev_priv(net);
3820 int ret;
3821
3822 ret = usb_autopm_get_interface(tp->intf);
3823 if (ret < 0)
3824 goto out;
3825
hayeswangb5403272014-10-09 18:00:26 +08003826 mutex_lock(&tp->control);
3827
hayeswangdf35d282014-09-25 20:54:02 +08003828 ret = tp->rtl_ops.eee_set(tp, edata);
hayeswang9d31a7b2014-10-06 10:36:04 +08003829 if (!ret)
3830 ret = mii_nway_restart(&tp->mii);
hayeswangdf35d282014-09-25 20:54:02 +08003831
hayeswangb5403272014-10-09 18:00:26 +08003832 mutex_unlock(&tp->control);
3833
hayeswangdf35d282014-09-25 20:54:02 +08003834 usb_autopm_put_interface(tp->intf);
3835
3836out:
3837 return ret;
3838}
3839
hayeswang8884f502014-10-28 14:05:52 +08003840static int rtl8152_nway_reset(struct net_device *dev)
3841{
3842 struct r8152 *tp = netdev_priv(dev);
3843 int ret;
3844
3845 ret = usb_autopm_get_interface(tp->intf);
3846 if (ret < 0)
3847 goto out;
3848
3849 mutex_lock(&tp->control);
3850
3851 ret = mii_nway_restart(&tp->mii);
3852
3853 mutex_unlock(&tp->control);
3854
3855 usb_autopm_put_interface(tp->intf);
3856
3857out:
3858 return ret;
3859}
3860
hayeswangefb3dd82015-02-12 14:33:48 +08003861static int rtl8152_get_coalesce(struct net_device *netdev,
3862 struct ethtool_coalesce *coalesce)
3863{
3864 struct r8152 *tp = netdev_priv(netdev);
3865
3866 switch (tp->version) {
3867 case RTL_VER_01:
3868 case RTL_VER_02:
3869 return -EOPNOTSUPP;
3870 default:
3871 break;
3872 }
3873
3874 coalesce->rx_coalesce_usecs = tp->coalesce;
3875
3876 return 0;
3877}
3878
3879static int rtl8152_set_coalesce(struct net_device *netdev,
3880 struct ethtool_coalesce *coalesce)
3881{
3882 struct r8152 *tp = netdev_priv(netdev);
3883 int ret;
3884
3885 switch (tp->version) {
3886 case RTL_VER_01:
3887 case RTL_VER_02:
3888 return -EOPNOTSUPP;
3889 default:
3890 break;
3891 }
3892
3893 if (coalesce->rx_coalesce_usecs > COALESCE_SLOW)
3894 return -EINVAL;
3895
3896 ret = usb_autopm_get_interface(tp->intf);
3897 if (ret < 0)
3898 return ret;
3899
3900 mutex_lock(&tp->control);
3901
3902 if (tp->coalesce != coalesce->rx_coalesce_usecs) {
3903 tp->coalesce = coalesce->rx_coalesce_usecs;
3904
3905 if (netif_running(tp->netdev) && netif_carrier_ok(netdev))
3906 r8153_set_rx_early_timeout(tp);
3907 }
3908
3909 mutex_unlock(&tp->control);
3910
3911 usb_autopm_put_interface(tp->intf);
3912
3913 return ret;
3914}
3915
hayeswangac718b62013-05-02 16:01:25 +00003916static struct ethtool_ops ops = {
3917 .get_drvinfo = rtl8152_get_drvinfo,
3918 .get_settings = rtl8152_get_settings,
3919 .set_settings = rtl8152_set_settings,
3920 .get_link = ethtool_op_get_link,
hayeswang8884f502014-10-28 14:05:52 +08003921 .nway_reset = rtl8152_nway_reset,
hayeswanga5ec27c2014-02-18 21:49:11 +08003922 .get_msglevel = rtl8152_get_msglevel,
3923 .set_msglevel = rtl8152_set_msglevel,
hayeswang21ff2e82014-02-18 21:49:06 +08003924 .get_wol = rtl8152_get_wol,
3925 .set_wol = rtl8152_set_wol,
hayeswang4f1d4d52014-03-11 16:24:19 +08003926 .get_strings = rtl8152_get_strings,
3927 .get_sset_count = rtl8152_get_sset_count,
3928 .get_ethtool_stats = rtl8152_get_ethtool_stats,
hayeswangefb3dd82015-02-12 14:33:48 +08003929 .get_coalesce = rtl8152_get_coalesce,
3930 .set_coalesce = rtl8152_set_coalesce,
hayeswangdf35d282014-09-25 20:54:02 +08003931 .get_eee = rtl_ethtool_get_eee,
3932 .set_eee = rtl_ethtool_set_eee,
hayeswangac718b62013-05-02 16:01:25 +00003933};
3934
3935static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
3936{
3937 struct r8152 *tp = netdev_priv(netdev);
3938 struct mii_ioctl_data *data = if_mii(rq);
hayeswang9a4be1b2014-02-18 21:49:07 +08003939 int res;
3940
hayeswang68714382014-04-11 17:54:31 +08003941 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3942 return -ENODEV;
3943
hayeswang9a4be1b2014-02-18 21:49:07 +08003944 res = usb_autopm_get_interface(tp->intf);
3945 if (res < 0)
3946 goto out;
hayeswangac718b62013-05-02 16:01:25 +00003947
3948 switch (cmd) {
3949 case SIOCGMIIPHY:
3950 data->phy_id = R8152_PHY_ID; /* Internal PHY */
3951 break;
3952
3953 case SIOCGMIIREG:
hayeswangb5403272014-10-09 18:00:26 +08003954 mutex_lock(&tp->control);
hayeswangac718b62013-05-02 16:01:25 +00003955 data->val_out = r8152_mdio_read(tp, data->reg_num);
hayeswangb5403272014-10-09 18:00:26 +08003956 mutex_unlock(&tp->control);
hayeswangac718b62013-05-02 16:01:25 +00003957 break;
3958
3959 case SIOCSMIIREG:
3960 if (!capable(CAP_NET_ADMIN)) {
3961 res = -EPERM;
3962 break;
3963 }
hayeswangb5403272014-10-09 18:00:26 +08003964 mutex_lock(&tp->control);
hayeswangac718b62013-05-02 16:01:25 +00003965 r8152_mdio_write(tp, data->reg_num, data->val_in);
hayeswangb5403272014-10-09 18:00:26 +08003966 mutex_unlock(&tp->control);
hayeswangac718b62013-05-02 16:01:25 +00003967 break;
3968
3969 default:
3970 res = -EOPNOTSUPP;
3971 }
3972
hayeswang9a4be1b2014-02-18 21:49:07 +08003973 usb_autopm_put_interface(tp->intf);
3974
3975out:
hayeswangac718b62013-05-02 16:01:25 +00003976 return res;
3977}
3978
hayeswang69b4b7a2014-07-10 10:58:54 +08003979static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
3980{
3981 struct r8152 *tp = netdev_priv(dev);
hayeswang396e2e22015-02-12 14:33:47 +08003982 int ret;
hayeswang69b4b7a2014-07-10 10:58:54 +08003983
3984 switch (tp->version) {
3985 case RTL_VER_01:
3986 case RTL_VER_02:
3987 return eth_change_mtu(dev, new_mtu);
3988 default:
3989 break;
3990 }
3991
3992 if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
3993 return -EINVAL;
3994
hayeswang396e2e22015-02-12 14:33:47 +08003995 ret = usb_autopm_get_interface(tp->intf);
3996 if (ret < 0)
3997 return ret;
3998
3999 mutex_lock(&tp->control);
4000
hayeswang69b4b7a2014-07-10 10:58:54 +08004001 dev->mtu = new_mtu;
4002
hayeswang396e2e22015-02-12 14:33:47 +08004003 if (netif_running(dev) && netif_carrier_ok(dev))
4004 r8153_set_rx_early_size(tp);
4005
4006 mutex_unlock(&tp->control);
4007
4008 usb_autopm_put_interface(tp->intf);
4009
4010 return ret;
hayeswang69b4b7a2014-07-10 10:58:54 +08004011}
4012
hayeswangac718b62013-05-02 16:01:25 +00004013static const struct net_device_ops rtl8152_netdev_ops = {
4014 .ndo_open = rtl8152_open,
4015 .ndo_stop = rtl8152_close,
4016 .ndo_do_ioctl = rtl8152_ioctl,
4017 .ndo_start_xmit = rtl8152_start_xmit,
4018 .ndo_tx_timeout = rtl8152_tx_timeout,
hayeswangc5554292014-09-12 10:43:11 +08004019 .ndo_set_features = rtl8152_set_features,
hayeswangac718b62013-05-02 16:01:25 +00004020 .ndo_set_rx_mode = rtl8152_set_rx_mode,
4021 .ndo_set_mac_address = rtl8152_set_mac_address,
hayeswang69b4b7a2014-07-10 10:58:54 +08004022 .ndo_change_mtu = rtl8152_change_mtu,
hayeswangac718b62013-05-02 16:01:25 +00004023 .ndo_validate_addr = eth_validate_addr,
hayeswanga5e31252015-01-06 17:41:58 +08004024 .ndo_features_check = rtl8152_features_check,
hayeswangac718b62013-05-02 16:01:25 +00004025};
4026
4027static void r8152b_get_version(struct r8152 *tp)
4028{
4029 u32 ocp_data;
4030 u16 version;
4031
4032 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
4033 version = (u16)(ocp_data & VERSION_MASK);
4034
4035 switch (version) {
4036 case 0x4c00:
4037 tp->version = RTL_VER_01;
4038 break;
4039 case 0x4c10:
4040 tp->version = RTL_VER_02;
4041 break;
hayeswang43779f82014-01-02 11:25:10 +08004042 case 0x5c00:
4043 tp->version = RTL_VER_03;
4044 tp->mii.supports_gmii = 1;
4045 break;
4046 case 0x5c10:
4047 tp->version = RTL_VER_04;
4048 tp->mii.supports_gmii = 1;
4049 break;
4050 case 0x5c20:
4051 tp->version = RTL_VER_05;
4052 tp->mii.supports_gmii = 1;
4053 break;
hayeswangfb02eb42015-07-22 15:27:41 +08004054 case 0x5c30:
4055 tp->version = RTL_VER_06;
4056 tp->mii.supports_gmii = 1;
4057 break;
hayeswangac718b62013-05-02 16:01:25 +00004058 default:
4059 netif_info(tp, probe, tp->netdev,
4060 "Unknown version 0x%04x\n", version);
4061 break;
4062 }
4063}
4064
hayeswange3fe0b12014-01-02 11:22:39 +08004065static void rtl8152_unload(struct r8152 *tp)
4066{
hayeswang68714382014-04-11 17:54:31 +08004067 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4068 return;
4069
hayeswang00a5e362014-02-18 21:48:59 +08004070 if (tp->version != RTL_VER_01)
4071 r8152_power_cut_en(tp, true);
hayeswange3fe0b12014-01-02 11:22:39 +08004072}
4073
hayeswang43779f82014-01-02 11:25:10 +08004074static void rtl8153_unload(struct r8152 *tp)
4075{
hayeswang68714382014-04-11 17:54:31 +08004076 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4077 return;
4078
hayeswang49be1722014-10-01 13:25:11 +08004079 r8153_power_cut_en(tp, false);
hayeswang43779f82014-01-02 11:25:10 +08004080}
4081
hayeswang55b65472014-11-06 12:47:39 +08004082static int rtl_ops_init(struct r8152 *tp)
hayeswangc81229c2014-01-02 11:22:42 +08004083{
4084 struct rtl_ops *ops = &tp->rtl_ops;
hayeswang55b65472014-11-06 12:47:39 +08004085 int ret = 0;
hayeswangc81229c2014-01-02 11:22:42 +08004086
hayeswang55b65472014-11-06 12:47:39 +08004087 switch (tp->version) {
4088 case RTL_VER_01:
4089 case RTL_VER_02:
4090 ops->init = r8152b_init;
4091 ops->enable = rtl8152_enable;
4092 ops->disable = rtl8152_disable;
4093 ops->up = rtl8152_up;
4094 ops->down = rtl8152_down;
4095 ops->unload = rtl8152_unload;
4096 ops->eee_get = r8152_get_eee;
4097 ops->eee_set = r8152_set_eee;
hayeswang2dd49e02015-09-07 11:57:44 +08004098 ops->in_nway = rtl8152_in_nway;
hayeswang43779f82014-01-02 11:25:10 +08004099 break;
4100
hayeswang55b65472014-11-06 12:47:39 +08004101 case RTL_VER_03:
4102 case RTL_VER_04:
4103 case RTL_VER_05:
hayeswangfb02eb42015-07-22 15:27:41 +08004104 case RTL_VER_06:
hayeswang55b65472014-11-06 12:47:39 +08004105 ops->init = r8153_init;
4106 ops->enable = rtl8153_enable;
4107 ops->disable = rtl8153_disable;
4108 ops->up = rtl8153_up;
4109 ops->down = rtl8153_down;
4110 ops->unload = rtl8153_unload;
4111 ops->eee_get = r8153_get_eee;
4112 ops->eee_set = r8153_set_eee;
hayeswang2dd49e02015-09-07 11:57:44 +08004113 ops->in_nway = rtl8153_in_nway;
hayeswangc81229c2014-01-02 11:22:42 +08004114 break;
4115
4116 default:
hayeswang55b65472014-11-06 12:47:39 +08004117 ret = -ENODEV;
4118 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
hayeswangc81229c2014-01-02 11:22:42 +08004119 break;
4120 }
4121
4122 return ret;
4123}
4124
hayeswangac718b62013-05-02 16:01:25 +00004125static int rtl8152_probe(struct usb_interface *intf,
4126 const struct usb_device_id *id)
4127{
4128 struct usb_device *udev = interface_to_usbdev(intf);
4129 struct r8152 *tp;
4130 struct net_device *netdev;
hayeswangebc2ec42013-08-14 20:54:38 +08004131 int ret;
hayeswangac718b62013-05-02 16:01:25 +00004132
hayeswang10c32712014-03-04 20:47:48 +08004133 if (udev->actconfig->desc.bConfigurationValue != 1) {
4134 usb_driver_set_configuration(udev, 1);
4135 return -ENODEV;
4136 }
4137
4138 usb_reset_device(udev);
hayeswangac718b62013-05-02 16:01:25 +00004139 netdev = alloc_etherdev(sizeof(struct r8152));
4140 if (!netdev) {
Hayes Wang4a8deae2014-01-07 11:18:22 +08004141 dev_err(&intf->dev, "Out of memory\n");
hayeswangac718b62013-05-02 16:01:25 +00004142 return -ENOMEM;
4143 }
4144
hayeswangebc2ec42013-08-14 20:54:38 +08004145 SET_NETDEV_DEV(netdev, &intf->dev);
hayeswangac718b62013-05-02 16:01:25 +00004146 tp = netdev_priv(netdev);
4147 tp->msg_enable = 0x7FFF;
4148
hayeswange3ad4122014-01-06 17:08:42 +08004149 tp->udev = udev;
4150 tp->netdev = netdev;
4151 tp->intf = intf;
4152
hayeswang82cf94c2014-11-06 12:47:38 +08004153 r8152b_get_version(tp);
hayeswang55b65472014-11-06 12:47:39 +08004154 ret = rtl_ops_init(tp);
hayeswang31ca1de2014-01-06 17:08:43 +08004155 if (ret)
4156 goto out;
hayeswangc81229c2014-01-02 11:22:42 +08004157
hayeswangb5403272014-10-09 18:00:26 +08004158 mutex_init(&tp->control);
hayeswangac718b62013-05-02 16:01:25 +00004159 INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
4160
hayeswangac718b62013-05-02 16:01:25 +00004161 netdev->netdev_ops = &rtl8152_netdev_ops;
4162 netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
hayeswang5bd23882013-08-14 20:54:39 +08004163
hayeswang60c89072014-03-07 11:04:39 +08004164 netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
hayeswang6128d1b2014-03-07 11:04:40 +08004165 NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
hayeswangc5554292014-09-12 10:43:11 +08004166 NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
4167 NETIF_F_HW_VLAN_CTAG_TX;
hayeswang60c89072014-03-07 11:04:39 +08004168 netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
hayeswang6128d1b2014-03-07 11:04:40 +08004169 NETIF_F_TSO | NETIF_F_FRAGLIST |
hayeswangc5554292014-09-12 10:43:11 +08004170 NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
hayeswangccc39fa2015-02-06 11:30:49 +08004171 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
hayeswangc5554292014-09-12 10:43:11 +08004172 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
4173 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
4174 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
hayeswangdb8515e2014-03-06 15:07:16 +08004175
Wilfried Klaebe7ad24ea2014-05-11 00:12:32 +00004176 netdev->ethtool_ops = &ops;
hayeswang60c89072014-03-07 11:04:39 +08004177 netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
hayeswangac718b62013-05-02 16:01:25 +00004178
4179 tp->mii.dev = netdev;
4180 tp->mii.mdio_read = read_mii_word;
4181 tp->mii.mdio_write = write_mii_word;
4182 tp->mii.phy_id_mask = 0x3f;
4183 tp->mii.reg_num_mask = 0x1f;
4184 tp->mii.phy_id = R8152_PHY_ID;
hayeswangac718b62013-05-02 16:01:25 +00004185
hayeswang464ec102015-02-12 14:33:46 +08004186 switch (udev->speed) {
4187 case USB_SPEED_SUPER:
4188 tp->coalesce = COALESCE_SUPER;
4189 break;
4190 case USB_SPEED_HIGH:
4191 tp->coalesce = COALESCE_HIGH;
4192 break;
4193 default:
4194 tp->coalesce = COALESCE_SLOW;
4195 break;
4196 }
4197
hayeswang9a4be1b2014-02-18 21:49:07 +08004198 intf->needs_remote_wakeup = 1;
4199
hayeswangc81229c2014-01-02 11:22:42 +08004200 tp->rtl_ops.init(tp);
hayeswangac718b62013-05-02 16:01:25 +00004201 set_ethernet_addr(tp);
4202
hayeswangac718b62013-05-02 16:01:25 +00004203 usb_set_intfdata(intf, tp);
hayeswangd823ab62015-01-12 12:06:23 +08004204 netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT);
hayeswangac718b62013-05-02 16:01:25 +00004205
hayeswangebc2ec42013-08-14 20:54:38 +08004206 ret = register_netdev(netdev);
4207 if (ret != 0) {
Hayes Wang4a8deae2014-01-07 11:18:22 +08004208 netif_err(tp, probe, netdev, "couldn't register the device\n");
hayeswangebc2ec42013-08-14 20:54:38 +08004209 goto out1;
hayeswangac718b62013-05-02 16:01:25 +00004210 }
4211
hayeswang7daed8d2015-07-24 13:54:24 +08004212 if (!rtl_can_wakeup(tp))
4213 __rtl_set_wol(tp, 0);
4214
hayeswang21ff2e82014-02-18 21:49:06 +08004215 tp->saved_wolopts = __rtl_get_wol(tp);
4216 if (tp->saved_wolopts)
4217 device_set_wakeup_enable(&udev->dev, true);
4218 else
4219 device_set_wakeup_enable(&udev->dev, false);
4220
Hayes Wang4a8deae2014-01-07 11:18:22 +08004221 netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
hayeswangac718b62013-05-02 16:01:25 +00004222
4223 return 0;
4224
hayeswangac718b62013-05-02 16:01:25 +00004225out1:
hayeswangd823ab62015-01-12 12:06:23 +08004226 netif_napi_del(&tp->napi);
hayeswangebc2ec42013-08-14 20:54:38 +08004227 usb_set_intfdata(intf, NULL);
hayeswangac718b62013-05-02 16:01:25 +00004228out:
4229 free_netdev(netdev);
hayeswangebc2ec42013-08-14 20:54:38 +08004230 return ret;
hayeswangac718b62013-05-02 16:01:25 +00004231}
4232
hayeswangac718b62013-05-02 16:01:25 +00004233static void rtl8152_disconnect(struct usb_interface *intf)
4234{
4235 struct r8152 *tp = usb_get_intfdata(intf);
4236
4237 usb_set_intfdata(intf, NULL);
4238 if (tp) {
hayeswangf561de32014-09-30 16:48:01 +08004239 struct usb_device *udev = tp->udev;
4240
4241 if (udev->state == USB_STATE_NOTATTACHED)
4242 set_bit(RTL8152_UNPLUG, &tp->flags);
4243
hayeswangd823ab62015-01-12 12:06:23 +08004244 netif_napi_del(&tp->napi);
hayeswangac718b62013-05-02 16:01:25 +00004245 unregister_netdev(tp->netdev);
hayeswangc81229c2014-01-02 11:22:42 +08004246 tp->rtl_ops.unload(tp);
hayeswangac718b62013-05-02 16:01:25 +00004247 free_netdev(tp->netdev);
4248 }
4249}
4250
hayeswangd9a28c52014-12-04 10:43:11 +08004251#define REALTEK_USB_DEVICE(vend, prod) \
4252 .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4253 USB_DEVICE_ID_MATCH_INT_CLASS, \
4254 .idVendor = (vend), \
4255 .idProduct = (prod), \
4256 .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4257}, \
4258{ \
4259 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4260 USB_DEVICE_ID_MATCH_DEVICE, \
4261 .idVendor = (vend), \
4262 .idProduct = (prod), \
4263 .bInterfaceClass = USB_CLASS_COMM, \
4264 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4265 .bInterfaceProtocol = USB_CDC_PROTO_NONE
4266
hayeswangac718b62013-05-02 16:01:25 +00004267/* table of devices that work with this driver */
4268static struct usb_device_id rtl8152_table[] = {
hayeswangd9a28c52014-12-04 10:43:11 +08004269 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
4270 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
4271 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
Christian Hesse347eec32015-03-31 14:10:07 +02004272 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x7205)},
Vasily Titskiy1006da12015-05-06 10:31:21 -04004273 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x304f)},
Zheng Liud065c3c2015-07-07 13:54:12 -07004274 {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA, 0x09ff)},
hayeswangac718b62013-05-02 16:01:25 +00004275 {}
4276};
4277
4278MODULE_DEVICE_TABLE(usb, rtl8152_table);
4279
4280static struct usb_driver rtl8152_driver = {
4281 .name = MODULENAME,
hayeswangebc2ec42013-08-14 20:54:38 +08004282 .id_table = rtl8152_table,
hayeswangac718b62013-05-02 16:01:25 +00004283 .probe = rtl8152_probe,
4284 .disconnect = rtl8152_disconnect,
hayeswangac718b62013-05-02 16:01:25 +00004285 .suspend = rtl8152_suspend,
hayeswangebc2ec42013-08-14 20:54:38 +08004286 .resume = rtl8152_resume,
hayeswang7ec25412016-01-04 14:38:46 +08004287 .reset_resume = rtl8152_reset_resume,
hayeswange5011392015-07-29 20:39:08 +08004288 .pre_reset = rtl8152_pre_reset,
4289 .post_reset = rtl8152_post_reset,
hayeswang9a4be1b2014-02-18 21:49:07 +08004290 .supports_autosuspend = 1,
hayeswanga6347822014-02-18 21:49:10 +08004291 .disable_hub_initiated_lpm = 1,
hayeswangac718b62013-05-02 16:01:25 +00004292};
4293
Sachin Kamatb4236daa2013-05-16 17:48:08 +00004294module_usb_driver(rtl8152_driver);
hayeswangac718b62013-05-02 16:01:25 +00004295
4296MODULE_AUTHOR(DRIVER_AUTHOR);
4297MODULE_DESCRIPTION(DRIVER_DESC);
4298MODULE_LICENSE("GPL");