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hayeswangac718b62013-05-02 16:01:25 +00001/*
hayeswangc7de7de2014-01-15 10:42:16 +08002 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
hayeswangac718b62013-05-02 16:01:25 +00003 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
7 *
8 */
9
hayeswangac718b62013-05-02 16:01:25 +000010#include <linux/signal.h>
11#include <linux/slab.h>
12#include <linux/module.h>
hayeswangac718b62013-05-02 16:01:25 +000013#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/mii.h>
16#include <linux/ethtool.h>
17#include <linux/usb.h>
18#include <linux/crc32.h>
19#include <linux/if_vlan.h>
20#include <linux/uaccess.h>
hayeswangebc2ec42013-08-14 20:54:38 +080021#include <linux/list.h>
hayeswang5bd23882013-08-14 20:54:39 +080022#include <linux/ip.h>
23#include <linux/ipv6.h>
hayeswang6128d1b2014-03-07 11:04:40 +080024#include <net/ip6_checksum.h>
hayeswang4c4a6b12014-09-25 20:54:00 +080025#include <uapi/linux/mdio.h>
26#include <linux/mdio.h>
hayeswangac718b62013-05-02 16:01:25 +000027
28/* Version Information */
hayeswangb5403272014-10-09 18:00:26 +080029#define DRIVER_VERSION "v1.07.0 (2014/10/09)"
hayeswangac718b62013-05-02 16:01:25 +000030#define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
hayeswang44d942a2014-01-15 10:42:14 +080031#define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
hayeswangac718b62013-05-02 16:01:25 +000032#define MODULENAME "r8152"
33
34#define R8152_PHY_ID 32
35
36#define PLA_IDR 0xc000
37#define PLA_RCR 0xc010
38#define PLA_RMS 0xc016
39#define PLA_RXFIFO_CTRL0 0xc0a0
40#define PLA_RXFIFO_CTRL1 0xc0a4
41#define PLA_RXFIFO_CTRL2 0xc0a8
42#define PLA_FMC 0xc0b4
43#define PLA_CFG_WOL 0xc0b6
hayeswang43779f82014-01-02 11:25:10 +080044#define PLA_TEREDO_CFG 0xc0bc
hayeswangac718b62013-05-02 16:01:25 +000045#define PLA_MAR 0xcd00
hayeswang43779f82014-01-02 11:25:10 +080046#define PLA_BACKUP 0xd000
hayeswangac718b62013-05-02 16:01:25 +000047#define PAL_BDC_CR 0xd1a0
hayeswang43779f82014-01-02 11:25:10 +080048#define PLA_TEREDO_TIMER 0xd2cc
49#define PLA_REALWOW_TIMER 0xd2e8
hayeswangac718b62013-05-02 16:01:25 +000050#define PLA_LEDSEL 0xdd90
51#define PLA_LED_FEATURE 0xdd92
52#define PLA_PHYAR 0xde00
hayeswang43779f82014-01-02 11:25:10 +080053#define PLA_BOOT_CTRL 0xe004
hayeswangac718b62013-05-02 16:01:25 +000054#define PLA_GPHY_INTR_IMR 0xe022
55#define PLA_EEE_CR 0xe040
56#define PLA_EEEP_CR 0xe080
57#define PLA_MAC_PWR_CTRL 0xe0c0
hayeswang43779f82014-01-02 11:25:10 +080058#define PLA_MAC_PWR_CTRL2 0xe0ca
59#define PLA_MAC_PWR_CTRL3 0xe0cc
60#define PLA_MAC_PWR_CTRL4 0xe0ce
61#define PLA_WDT6_CTRL 0xe428
hayeswangac718b62013-05-02 16:01:25 +000062#define PLA_TCR0 0xe610
63#define PLA_TCR1 0xe612
hayeswang69b4b7a2014-07-10 10:58:54 +080064#define PLA_MTPS 0xe615
hayeswangac718b62013-05-02 16:01:25 +000065#define PLA_TXFIFO_CTRL 0xe618
hayeswang4f1d4d52014-03-11 16:24:19 +080066#define PLA_RSTTALLY 0xe800
hayeswangac718b62013-05-02 16:01:25 +000067#define PLA_CR 0xe813
68#define PLA_CRWECR 0xe81c
hayeswang21ff2e82014-02-18 21:49:06 +080069#define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
70#define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
hayeswangac718b62013-05-02 16:01:25 +000071#define PLA_CONFIG5 0xe822
72#define PLA_PHY_PWR 0xe84c
73#define PLA_OOB_CTRL 0xe84f
74#define PLA_CPCR 0xe854
75#define PLA_MISC_0 0xe858
76#define PLA_MISC_1 0xe85a
77#define PLA_OCP_GPHY_BASE 0xe86c
hayeswang4f1d4d52014-03-11 16:24:19 +080078#define PLA_TALLYCNT 0xe890
hayeswangac718b62013-05-02 16:01:25 +000079#define PLA_SFF_STS_7 0xe8de
80#define PLA_PHYSTATUS 0xe908
81#define PLA_BP_BA 0xfc26
82#define PLA_BP_0 0xfc28
83#define PLA_BP_1 0xfc2a
84#define PLA_BP_2 0xfc2c
85#define PLA_BP_3 0xfc2e
86#define PLA_BP_4 0xfc30
87#define PLA_BP_5 0xfc32
88#define PLA_BP_6 0xfc34
89#define PLA_BP_7 0xfc36
hayeswang43779f82014-01-02 11:25:10 +080090#define PLA_BP_EN 0xfc38
hayeswangac718b62013-05-02 16:01:25 +000091
hayeswang43779f82014-01-02 11:25:10 +080092#define USB_U2P3_CTRL 0xb460
hayeswangac718b62013-05-02 16:01:25 +000093#define USB_DEV_STAT 0xb808
94#define USB_USB_CTRL 0xd406
95#define USB_PHY_CTRL 0xd408
96#define USB_TX_AGG 0xd40a
97#define USB_RX_BUF_TH 0xd40c
98#define USB_USB_TIMER 0xd428
hayeswang43779f82014-01-02 11:25:10 +080099#define USB_RX_EARLY_AGG 0xd42c
hayeswangac718b62013-05-02 16:01:25 +0000100#define USB_PM_CTRL_STATUS 0xd432
101#define USB_TX_DMA 0xd434
hayeswang43779f82014-01-02 11:25:10 +0800102#define USB_TOLERANCE 0xd490
103#define USB_LPM_CTRL 0xd41a
hayeswangac718b62013-05-02 16:01:25 +0000104#define USB_UPS_CTRL 0xd800
hayeswang43779f82014-01-02 11:25:10 +0800105#define USB_MISC_0 0xd81a
106#define USB_POWER_CUT 0xd80a
107#define USB_AFE_CTRL2 0xd824
108#define USB_WDT11_CTRL 0xe43c
hayeswangac718b62013-05-02 16:01:25 +0000109#define USB_BP_BA 0xfc26
110#define USB_BP_0 0xfc28
111#define USB_BP_1 0xfc2a
112#define USB_BP_2 0xfc2c
113#define USB_BP_3 0xfc2e
114#define USB_BP_4 0xfc30
115#define USB_BP_5 0xfc32
116#define USB_BP_6 0xfc34
117#define USB_BP_7 0xfc36
hayeswang43779f82014-01-02 11:25:10 +0800118#define USB_BP_EN 0xfc38
hayeswangac718b62013-05-02 16:01:25 +0000119
120/* OCP Registers */
121#define OCP_ALDPS_CONFIG 0x2010
122#define OCP_EEE_CONFIG1 0x2080
123#define OCP_EEE_CONFIG2 0x2092
124#define OCP_EEE_CONFIG3 0x2094
hayeswangac244d32014-01-02 11:22:40 +0800125#define OCP_BASE_MII 0xa400
hayeswangac718b62013-05-02 16:01:25 +0000126#define OCP_EEE_AR 0xa41a
127#define OCP_EEE_DATA 0xa41c
hayeswang43779f82014-01-02 11:25:10 +0800128#define OCP_PHY_STATUS 0xa420
129#define OCP_POWER_CFG 0xa430
130#define OCP_EEE_CFG 0xa432
131#define OCP_SRAM_ADDR 0xa436
132#define OCP_SRAM_DATA 0xa438
133#define OCP_DOWN_SPEED 0xa442
hayeswangdf35d282014-09-25 20:54:02 +0800134#define OCP_EEE_ABLE 0xa5c4
hayeswang4c4a6b12014-09-25 20:54:00 +0800135#define OCP_EEE_ADV 0xa5d0
hayeswangdf35d282014-09-25 20:54:02 +0800136#define OCP_EEE_LPABLE 0xa5d2
hayeswang43779f82014-01-02 11:25:10 +0800137#define OCP_ADC_CFG 0xbc06
138
139/* SRAM Register */
140#define SRAM_LPF_CFG 0x8012
141#define SRAM_10M_AMP1 0x8080
142#define SRAM_10M_AMP2 0x8082
143#define SRAM_IMPEDANCE 0x8084
hayeswangac718b62013-05-02 16:01:25 +0000144
145/* PLA_RCR */
146#define RCR_AAP 0x00000001
147#define RCR_APM 0x00000002
148#define RCR_AM 0x00000004
149#define RCR_AB 0x00000008
150#define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
151
152/* PLA_RXFIFO_CTRL0 */
153#define RXFIFO_THR1_NORMAL 0x00080002
154#define RXFIFO_THR1_OOB 0x01800003
155
156/* PLA_RXFIFO_CTRL1 */
157#define RXFIFO_THR2_FULL 0x00000060
158#define RXFIFO_THR2_HIGH 0x00000038
159#define RXFIFO_THR2_OOB 0x0000004a
hayeswang43779f82014-01-02 11:25:10 +0800160#define RXFIFO_THR2_NORMAL 0x00a0
hayeswangac718b62013-05-02 16:01:25 +0000161
162/* PLA_RXFIFO_CTRL2 */
163#define RXFIFO_THR3_FULL 0x00000078
164#define RXFIFO_THR3_HIGH 0x00000048
165#define RXFIFO_THR3_OOB 0x0000005a
hayeswang43779f82014-01-02 11:25:10 +0800166#define RXFIFO_THR3_NORMAL 0x0110
hayeswangac718b62013-05-02 16:01:25 +0000167
168/* PLA_TXFIFO_CTRL */
169#define TXFIFO_THR_NORMAL 0x00400008
hayeswang43779f82014-01-02 11:25:10 +0800170#define TXFIFO_THR_NORMAL2 0x01000008
hayeswangac718b62013-05-02 16:01:25 +0000171
172/* PLA_FMC */
173#define FMC_FCR_MCU_EN 0x0001
174
175/* PLA_EEEP_CR */
176#define EEEP_CR_EEEP_TX 0x0002
177
hayeswang43779f82014-01-02 11:25:10 +0800178/* PLA_WDT6_CTRL */
179#define WDT6_SET_MODE 0x0010
180
hayeswangac718b62013-05-02 16:01:25 +0000181/* PLA_TCR0 */
182#define TCR0_TX_EMPTY 0x0800
183#define TCR0_AUTO_FIFO 0x0080
184
185/* PLA_TCR1 */
186#define VERSION_MASK 0x7cf0
187
hayeswang69b4b7a2014-07-10 10:58:54 +0800188/* PLA_MTPS */
189#define MTPS_JUMBO (12 * 1024 / 64)
190#define MTPS_DEFAULT (6 * 1024 / 64)
191
hayeswang4f1d4d52014-03-11 16:24:19 +0800192/* PLA_RSTTALLY */
193#define TALLY_RESET 0x0001
194
hayeswangac718b62013-05-02 16:01:25 +0000195/* PLA_CR */
196#define CR_RST 0x10
197#define CR_RE 0x08
198#define CR_TE 0x04
199
200/* PLA_CRWECR */
201#define CRWECR_NORAML 0x00
202#define CRWECR_CONFIG 0xc0
203
204/* PLA_OOB_CTRL */
205#define NOW_IS_OOB 0x80
206#define TXFIFO_EMPTY 0x20
207#define RXFIFO_EMPTY 0x10
208#define LINK_LIST_READY 0x02
209#define DIS_MCU_CLROOB 0x01
210#define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
211
212/* PLA_MISC_1 */
213#define RXDY_GATED_EN 0x0008
214
215/* PLA_SFF_STS_7 */
216#define RE_INIT_LL 0x8000
217#define MCU_BORW_EN 0x4000
218
219/* PLA_CPCR */
220#define CPCR_RX_VLAN 0x0040
221
222/* PLA_CFG_WOL */
223#define MAGIC_EN 0x0001
224
hayeswang43779f82014-01-02 11:25:10 +0800225/* PLA_TEREDO_CFG */
226#define TEREDO_SEL 0x8000
227#define TEREDO_WAKE_MASK 0x7f00
228#define TEREDO_RS_EVENT_MASK 0x00fe
229#define OOB_TEREDO_EN 0x0001
230
hayeswangac718b62013-05-02 16:01:25 +0000231/* PAL_BDC_CR */
232#define ALDPS_PROXY_MODE 0x0001
233
hayeswang21ff2e82014-02-18 21:49:06 +0800234/* PLA_CONFIG34 */
235#define LINK_ON_WAKE_EN 0x0010
236#define LINK_OFF_WAKE_EN 0x0008
237
hayeswangac718b62013-05-02 16:01:25 +0000238/* PLA_CONFIG5 */
hayeswang21ff2e82014-02-18 21:49:06 +0800239#define BWF_EN 0x0040
240#define MWF_EN 0x0020
241#define UWF_EN 0x0010
hayeswangac718b62013-05-02 16:01:25 +0000242#define LAN_WAKE_EN 0x0002
243
244/* PLA_LED_FEATURE */
245#define LED_MODE_MASK 0x0700
246
247/* PLA_PHY_PWR */
248#define TX_10M_IDLE_EN 0x0080
249#define PFM_PWM_SWITCH 0x0040
250
251/* PLA_MAC_PWR_CTRL */
252#define D3_CLK_GATED_EN 0x00004000
253#define MCU_CLK_RATIO 0x07010f07
254#define MCU_CLK_RATIO_MASK 0x0f0f0f0f
hayeswang43779f82014-01-02 11:25:10 +0800255#define ALDPS_SPDWN_RATIO 0x0f87
256
257/* PLA_MAC_PWR_CTRL2 */
258#define EEE_SPDWN_RATIO 0x8007
259
260/* PLA_MAC_PWR_CTRL3 */
261#define PKT_AVAIL_SPDWN_EN 0x0100
262#define SUSPEND_SPDWN_EN 0x0004
263#define U1U2_SPDWN_EN 0x0002
264#define L1_SPDWN_EN 0x0001
265
266/* PLA_MAC_PWR_CTRL4 */
267#define PWRSAVE_SPDWN_EN 0x1000
268#define RXDV_SPDWN_EN 0x0800
269#define TX10MIDLE_EN 0x0100
270#define TP100_SPDWN_EN 0x0020
271#define TP500_SPDWN_EN 0x0010
272#define TP1000_SPDWN_EN 0x0008
273#define EEE_SPDWN_EN 0x0001
hayeswangac718b62013-05-02 16:01:25 +0000274
275/* PLA_GPHY_INTR_IMR */
276#define GPHY_STS_MSK 0x0001
277#define SPEED_DOWN_MSK 0x0002
278#define SPDWN_RXDV_MSK 0x0004
279#define SPDWN_LINKCHG_MSK 0x0008
280
281/* PLA_PHYAR */
282#define PHYAR_FLAG 0x80000000
283
284/* PLA_EEE_CR */
285#define EEE_RX_EN 0x0001
286#define EEE_TX_EN 0x0002
287
hayeswang43779f82014-01-02 11:25:10 +0800288/* PLA_BOOT_CTRL */
289#define AUTOLOAD_DONE 0x0002
290
hayeswangac718b62013-05-02 16:01:25 +0000291/* USB_DEV_STAT */
292#define STAT_SPEED_MASK 0x0006
293#define STAT_SPEED_HIGH 0x0000
hayeswanga3cc4652014-07-24 16:37:43 +0800294#define STAT_SPEED_FULL 0x0002
hayeswangac718b62013-05-02 16:01:25 +0000295
296/* USB_TX_AGG */
297#define TX_AGG_MAX_THRESHOLD 0x03
298
299/* USB_RX_BUF_TH */
hayeswang43779f82014-01-02 11:25:10 +0800300#define RX_THR_SUPPER 0x0c350180
hayeswang8e1f51b2014-01-02 11:22:41 +0800301#define RX_THR_HIGH 0x7a120180
hayeswang43779f82014-01-02 11:25:10 +0800302#define RX_THR_SLOW 0xffff0180
hayeswangac718b62013-05-02 16:01:25 +0000303
304/* USB_TX_DMA */
305#define TEST_MODE_DISABLE 0x00000001
306#define TX_SIZE_ADJUST1 0x00000100
307
308/* USB_UPS_CTRL */
309#define POWER_CUT 0x0100
310
311/* USB_PM_CTRL_STATUS */
hayeswang8e1f51b2014-01-02 11:22:41 +0800312#define RESUME_INDICATE 0x0001
hayeswangac718b62013-05-02 16:01:25 +0000313
314/* USB_USB_CTRL */
315#define RX_AGG_DISABLE 0x0010
316
hayeswang43779f82014-01-02 11:25:10 +0800317/* USB_U2P3_CTRL */
318#define U2P3_ENABLE 0x0001
319
320/* USB_POWER_CUT */
321#define PWR_EN 0x0001
322#define PHASE2_EN 0x0008
323
324/* USB_MISC_0 */
325#define PCUT_STATUS 0x0001
326
327/* USB_RX_EARLY_AGG */
328#define EARLY_AGG_SUPPER 0x0e832981
329#define EARLY_AGG_HIGH 0x0e837a12
330#define EARLY_AGG_SLOW 0x0e83ffff
331
332/* USB_WDT11_CTRL */
333#define TIMER11_EN 0x0001
334
335/* USB_LPM_CTRL */
336#define LPM_TIMER_MASK 0x0c
337#define LPM_TIMER_500MS 0x04 /* 500 ms */
338#define LPM_TIMER_500US 0x0c /* 500 us */
339
340/* USB_AFE_CTRL2 */
341#define SEN_VAL_MASK 0xf800
342#define SEN_VAL_NORMAL 0xa000
343#define SEL_RXIDLE 0x0100
344
hayeswangac718b62013-05-02 16:01:25 +0000345/* OCP_ALDPS_CONFIG */
346#define ENPWRSAVE 0x8000
347#define ENPDNPS 0x0200
348#define LINKENA 0x0100
349#define DIS_SDSAVE 0x0010
350
hayeswang43779f82014-01-02 11:25:10 +0800351/* OCP_PHY_STATUS */
352#define PHY_STAT_MASK 0x0007
353#define PHY_STAT_LAN_ON 3
354#define PHY_STAT_PWRDN 5
355
356/* OCP_POWER_CFG */
357#define EEE_CLKDIV_EN 0x8000
358#define EN_ALDPS 0x0004
359#define EN_10M_PLLOFF 0x0001
360
hayeswangac718b62013-05-02 16:01:25 +0000361/* OCP_EEE_CONFIG1 */
362#define RG_TXLPI_MSK_HFDUP 0x8000
363#define RG_MATCLR_EN 0x4000
364#define EEE_10_CAP 0x2000
365#define EEE_NWAY_EN 0x1000
366#define TX_QUIET_EN 0x0200
367#define RX_QUIET_EN 0x0100
hayeswangd24f6132014-09-25 20:54:01 +0800368#define sd_rise_time_mask 0x0070
hayeswang4c4a6b12014-09-25 20:54:00 +0800369#define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
hayeswangac718b62013-05-02 16:01:25 +0000370#define RG_RXLPI_MSK_HFDUP 0x0008
371#define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
372
373/* OCP_EEE_CONFIG2 */
374#define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
375#define RG_DACQUIET_EN 0x0400
376#define RG_LDVQUIET_EN 0x0200
377#define RG_CKRSEL 0x0020
378#define RG_EEEPRG_EN 0x0010
379
380/* OCP_EEE_CONFIG3 */
hayeswangd24f6132014-09-25 20:54:01 +0800381#define fast_snr_mask 0xff80
hayeswang4c4a6b12014-09-25 20:54:00 +0800382#define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
hayeswangac718b62013-05-02 16:01:25 +0000383#define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
384#define MSK_PH 0x0006 /* bit 0 ~ 3 */
385
386/* OCP_EEE_AR */
387/* bit[15:14] function */
388#define FUN_ADDR 0x0000
389#define FUN_DATA 0x4000
390/* bit[4:0] device addr */
hayeswangac718b62013-05-02 16:01:25 +0000391
hayeswang43779f82014-01-02 11:25:10 +0800392/* OCP_EEE_CFG */
393#define CTAP_SHORT_EN 0x0040
394#define EEE10_EN 0x0010
395
396/* OCP_DOWN_SPEED */
397#define EN_10M_BGOFF 0x0080
398
hayeswang43779f82014-01-02 11:25:10 +0800399/* OCP_ADC_CFG */
400#define CKADSEL_L 0x0100
401#define ADC_EN 0x0080
402#define EN_EMI_L 0x0040
403
404/* SRAM_LPF_CFG */
405#define LPF_AUTO_TUNE 0x8000
406
407/* SRAM_10M_AMP1 */
408#define GDAC_IB_UPALL 0x0008
409
410/* SRAM_10M_AMP2 */
411#define AMP_DN 0x0200
412
413/* SRAM_IMPEDANCE */
414#define RX_DRIVING_MASK 0x6000
415
hayeswangac718b62013-05-02 16:01:25 +0000416enum rtl_register_content {
hayeswang43779f82014-01-02 11:25:10 +0800417 _1000bps = 0x10,
hayeswangac718b62013-05-02 16:01:25 +0000418 _100bps = 0x08,
419 _10bps = 0x04,
420 LINK_STATUS = 0x02,
421 FULL_DUP = 0x01,
422};
423
hayeswang1764bcd2014-08-28 10:24:18 +0800424#define RTL8152_MAX_TX 4
hayeswangebc2ec42013-08-14 20:54:38 +0800425#define RTL8152_MAX_RX 10
hayeswang40a82912013-08-14 20:54:40 +0800426#define INTBUFSIZE 2
hayeswang8e1f51b2014-01-02 11:22:41 +0800427#define CRC_SIZE 4
428#define TX_ALIGN 4
429#define RX_ALIGN 8
hayeswang40a82912013-08-14 20:54:40 +0800430
431#define INTR_LINK 0x0004
hayeswangebc2ec42013-08-14 20:54:38 +0800432
hayeswangac718b62013-05-02 16:01:25 +0000433#define RTL8152_REQT_READ 0xc0
434#define RTL8152_REQT_WRITE 0x40
435#define RTL8152_REQ_GET_REGS 0x05
436#define RTL8152_REQ_SET_REGS 0x05
437
438#define BYTE_EN_DWORD 0xff
439#define BYTE_EN_WORD 0x33
440#define BYTE_EN_BYTE 0x11
441#define BYTE_EN_SIX_BYTES 0x3f
442#define BYTE_EN_START_MASK 0x0f
443#define BYTE_EN_END_MASK 0xf0
444
hayeswang69b4b7a2014-07-10 10:58:54 +0800445#define RTL8153_MAX_PACKET 9216 /* 9K */
446#define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
hayeswangac718b62013-05-02 16:01:25 +0000447#define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
hayeswang69b4b7a2014-07-10 10:58:54 +0800448#define RTL8153_RMS RTL8153_MAX_PACKET
hayeswangb8125402014-07-03 11:55:48 +0800449#define RTL8152_TX_TIMEOUT (5 * HZ)
hayeswangac718b62013-05-02 16:01:25 +0000450
451/* rtl8152 flags */
452enum rtl8152_flags {
453 RTL8152_UNPLUG = 0,
hayeswangac718b62013-05-02 16:01:25 +0000454 RTL8152_SET_RX_MODE,
hayeswang40a82912013-08-14 20:54:40 +0800455 WORK_ENABLE,
456 RTL8152_LINK_CHG,
hayeswang9a4be1b2014-02-18 21:49:07 +0800457 SELECTIVE_SUSPEND,
hayeswangaa66a5f2014-02-18 21:49:04 +0800458 PHY_RESET,
hayeswang0c3121f2014-03-07 11:04:36 +0800459 SCHEDULE_TASKLET,
hayeswangac718b62013-05-02 16:01:25 +0000460};
461
462/* Define these values to match your device */
463#define VENDOR_ID_REALTEK 0x0bda
464#define PRODUCT_ID_RTL8152 0x8152
hayeswang43779f82014-01-02 11:25:10 +0800465#define PRODUCT_ID_RTL8153 0x8153
466
467#define VENDOR_ID_SAMSUNG 0x04e8
468#define PRODUCT_ID_SAMSUNG 0xa101
hayeswangac718b62013-05-02 16:01:25 +0000469
470#define MCU_TYPE_PLA 0x0100
471#define MCU_TYPE_USB 0x0000
472
hayeswangc7de7de2014-01-15 10:42:16 +0800473#define REALTEK_USB_DEVICE(vend, prod) \
474 USB_DEVICE_INTERFACE_CLASS(vend, prod, USB_CLASS_VENDOR_SPEC)
475
hayeswang4f1d4d52014-03-11 16:24:19 +0800476struct tally_counter {
477 __le64 tx_packets;
478 __le64 rx_packets;
479 __le64 tx_errors;
480 __le32 rx_errors;
481 __le16 rx_missed;
482 __le16 align_errors;
483 __le32 tx_one_collision;
484 __le32 tx_multi_collision;
485 __le64 rx_unicast;
486 __le64 rx_broadcast;
487 __le32 rx_multicast;
488 __le16 tx_aborted;
hayeswangf37119c2014-10-28 14:05:51 +0800489 __le16 tx_underrun;
hayeswang4f1d4d52014-03-11 16:24:19 +0800490};
491
hayeswangac718b62013-05-02 16:01:25 +0000492struct rx_desc {
hayeswang500b6d72013-11-20 17:30:57 +0800493 __le32 opts1;
hayeswangac718b62013-05-02 16:01:25 +0000494#define RX_LEN_MASK 0x7fff
hayeswang565cab02014-03-07 11:04:38 +0800495
hayeswang500b6d72013-11-20 17:30:57 +0800496 __le32 opts2;
hayeswang565cab02014-03-07 11:04:38 +0800497#define RD_UDP_CS (1 << 23)
498#define RD_TCP_CS (1 << 22)
hayeswang6128d1b2014-03-07 11:04:40 +0800499#define RD_IPV6_CS (1 << 20)
hayeswang565cab02014-03-07 11:04:38 +0800500#define RD_IPV4_CS (1 << 19)
501
hayeswang500b6d72013-11-20 17:30:57 +0800502 __le32 opts3;
hayeswang565cab02014-03-07 11:04:38 +0800503#define IPF (1 << 23) /* IP checksum fail */
504#define UDPF (1 << 22) /* UDP checksum fail */
505#define TCPF (1 << 21) /* TCP checksum fail */
hayeswangc5554292014-09-12 10:43:11 +0800506#define RX_VLAN_TAG (1 << 16)
hayeswang565cab02014-03-07 11:04:38 +0800507
hayeswang500b6d72013-11-20 17:30:57 +0800508 __le32 opts4;
509 __le32 opts5;
510 __le32 opts6;
hayeswangac718b62013-05-02 16:01:25 +0000511};
512
513struct tx_desc {
hayeswang500b6d72013-11-20 17:30:57 +0800514 __le32 opts1;
hayeswangac718b62013-05-02 16:01:25 +0000515#define TX_FS (1 << 31) /* First segment of a packet */
516#define TX_LS (1 << 30) /* Final segment of a packet */
hayeswang60c89072014-03-07 11:04:39 +0800517#define GTSENDV4 (1 << 28)
hayeswang6128d1b2014-03-07 11:04:40 +0800518#define GTSENDV6 (1 << 27)
hayeswang60c89072014-03-07 11:04:39 +0800519#define GTTCPHO_SHIFT 18
hayeswang6128d1b2014-03-07 11:04:40 +0800520#define GTTCPHO_MAX 0x7fU
hayeswang60c89072014-03-07 11:04:39 +0800521#define TX_LEN_MAX 0x3ffffU
hayeswang5bd23882013-08-14 20:54:39 +0800522
hayeswang500b6d72013-11-20 17:30:57 +0800523 __le32 opts2;
hayeswang5bd23882013-08-14 20:54:39 +0800524#define UDP_CS (1 << 31) /* Calculate UDP/IP checksum */
525#define TCP_CS (1 << 30) /* Calculate TCP/IP checksum */
526#define IPV4_CS (1 << 29) /* Calculate IPv4 checksum */
527#define IPV6_CS (1 << 28) /* Calculate IPv6 checksum */
hayeswang60c89072014-03-07 11:04:39 +0800528#define MSS_SHIFT 17
529#define MSS_MAX 0x7ffU
530#define TCPHO_SHIFT 17
hayeswang6128d1b2014-03-07 11:04:40 +0800531#define TCPHO_MAX 0x7ffU
hayeswangc5554292014-09-12 10:43:11 +0800532#define TX_VLAN_TAG (1 << 16)
hayeswangac718b62013-05-02 16:01:25 +0000533};
534
hayeswangdff4e8a2013-08-16 16:09:33 +0800535struct r8152;
536
hayeswangebc2ec42013-08-14 20:54:38 +0800537struct rx_agg {
538 struct list_head list;
539 struct urb *urb;
hayeswangdff4e8a2013-08-16 16:09:33 +0800540 struct r8152 *context;
hayeswangebc2ec42013-08-14 20:54:38 +0800541 void *buffer;
542 void *head;
543};
544
545struct tx_agg {
546 struct list_head list;
547 struct urb *urb;
hayeswangdff4e8a2013-08-16 16:09:33 +0800548 struct r8152 *context;
hayeswangebc2ec42013-08-14 20:54:38 +0800549 void *buffer;
550 void *head;
551 u32 skb_num;
552 u32 skb_len;
553};
554
hayeswangac718b62013-05-02 16:01:25 +0000555struct r8152 {
556 unsigned long flags;
557 struct usb_device *udev;
558 struct tasklet_struct tl;
hayeswang40a82912013-08-14 20:54:40 +0800559 struct usb_interface *intf;
hayeswangac718b62013-05-02 16:01:25 +0000560 struct net_device *netdev;
hayeswang40a82912013-08-14 20:54:40 +0800561 struct urb *intr_urb;
hayeswangebc2ec42013-08-14 20:54:38 +0800562 struct tx_agg tx_info[RTL8152_MAX_TX];
563 struct rx_agg rx_info[RTL8152_MAX_RX];
564 struct list_head rx_done, tx_free;
565 struct sk_buff_head tx_queue;
566 spinlock_t rx_lock, tx_lock;
hayeswangac718b62013-05-02 16:01:25 +0000567 struct delayed_work schedule;
568 struct mii_if_info mii;
hayeswangb5403272014-10-09 18:00:26 +0800569 struct mutex control; /* use for hw setting */
hayeswangc81229c2014-01-02 11:22:42 +0800570
571 struct rtl_ops {
572 void (*init)(struct r8152 *);
573 int (*enable)(struct r8152 *);
574 void (*disable)(struct r8152 *);
hayeswang7e9da482014-02-18 21:49:05 +0800575 void (*up)(struct r8152 *);
hayeswangc81229c2014-01-02 11:22:42 +0800576 void (*down)(struct r8152 *);
577 void (*unload)(struct r8152 *);
hayeswangdf35d282014-09-25 20:54:02 +0800578 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
579 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
hayeswangc81229c2014-01-02 11:22:42 +0800580 } rtl_ops;
581
hayeswang40a82912013-08-14 20:54:40 +0800582 int intr_interval;
hayeswang21ff2e82014-02-18 21:49:06 +0800583 u32 saved_wolopts;
hayeswangac718b62013-05-02 16:01:25 +0000584 u32 msg_enable;
hayeswangdd1b1192013-11-20 17:30:56 +0800585 u32 tx_qlen;
hayeswangac718b62013-05-02 16:01:25 +0000586 u16 ocp_base;
hayeswang40a82912013-08-14 20:54:40 +0800587 u8 *intr_buff;
hayeswangac718b62013-05-02 16:01:25 +0000588 u8 version;
589 u8 speed;
590};
591
592enum rtl_version {
593 RTL_VER_UNKNOWN = 0,
594 RTL_VER_01,
hayeswang43779f82014-01-02 11:25:10 +0800595 RTL_VER_02,
596 RTL_VER_03,
597 RTL_VER_04,
598 RTL_VER_05,
599 RTL_VER_MAX
hayeswangac718b62013-05-02 16:01:25 +0000600};
601
hayeswang60c89072014-03-07 11:04:39 +0800602enum tx_csum_stat {
603 TX_CSUM_SUCCESS = 0,
604 TX_CSUM_TSO,
605 TX_CSUM_NONE
606};
607
hayeswangac718b62013-05-02 16:01:25 +0000608/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
609 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
610 */
611static const int multicast_filter_limit = 32;
hayeswang52aec122014-09-02 10:27:52 +0800612static unsigned int agg_buf_sz = 16384;
hayeswangac718b62013-05-02 16:01:25 +0000613
hayeswang52aec122014-09-02 10:27:52 +0800614#define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
hayeswang60c89072014-03-07 11:04:39 +0800615 VLAN_ETH_HLEN - VLAN_HLEN)
616
hayeswangac718b62013-05-02 16:01:25 +0000617static
618int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
619{
hayeswang31787f52013-07-31 17:21:25 +0800620 int ret;
621 void *tmp;
622
623 tmp = kmalloc(size, GFP_KERNEL);
624 if (!tmp)
625 return -ENOMEM;
626
627 ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
hayeswangb209af92014-08-25 15:53:00 +0800628 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
629 value, index, tmp, size, 500);
hayeswang31787f52013-07-31 17:21:25 +0800630
631 memcpy(data, tmp, size);
632 kfree(tmp);
633
634 return ret;
hayeswangac718b62013-05-02 16:01:25 +0000635}
636
637static
638int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
639{
hayeswang31787f52013-07-31 17:21:25 +0800640 int ret;
641 void *tmp;
642
Benoit Tainec4438f02014-05-26 17:21:23 +0200643 tmp = kmemdup(data, size, GFP_KERNEL);
hayeswang31787f52013-07-31 17:21:25 +0800644 if (!tmp)
645 return -ENOMEM;
646
hayeswang31787f52013-07-31 17:21:25 +0800647 ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
hayeswangb209af92014-08-25 15:53:00 +0800648 RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
649 value, index, tmp, size, 500);
hayeswang31787f52013-07-31 17:21:25 +0800650
651 kfree(tmp);
hayeswangdb8515e2014-03-06 15:07:16 +0800652
hayeswang31787f52013-07-31 17:21:25 +0800653 return ret;
hayeswangac718b62013-05-02 16:01:25 +0000654}
655
656static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
hayeswangb209af92014-08-25 15:53:00 +0800657 void *data, u16 type)
hayeswangac718b62013-05-02 16:01:25 +0000658{
hayeswang45f4a192014-01-06 17:08:41 +0800659 u16 limit = 64;
660 int ret = 0;
hayeswangac718b62013-05-02 16:01:25 +0000661
662 if (test_bit(RTL8152_UNPLUG, &tp->flags))
663 return -ENODEV;
664
665 /* both size and indix must be 4 bytes align */
666 if ((size & 3) || !size || (index & 3) || !data)
667 return -EPERM;
668
669 if ((u32)index + (u32)size > 0xffff)
670 return -EPERM;
671
672 while (size) {
673 if (size > limit) {
674 ret = get_registers(tp, index, type, limit, data);
675 if (ret < 0)
676 break;
677
678 index += limit;
679 data += limit;
680 size -= limit;
681 } else {
682 ret = get_registers(tp, index, type, size, data);
683 if (ret < 0)
684 break;
685
686 index += size;
687 data += size;
688 size = 0;
689 break;
690 }
691 }
692
hayeswang67610492014-10-30 11:46:40 +0800693 if (ret == -ENODEV)
694 set_bit(RTL8152_UNPLUG, &tp->flags);
695
hayeswangac718b62013-05-02 16:01:25 +0000696 return ret;
697}
698
699static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
hayeswangb209af92014-08-25 15:53:00 +0800700 u16 size, void *data, u16 type)
hayeswangac718b62013-05-02 16:01:25 +0000701{
hayeswang45f4a192014-01-06 17:08:41 +0800702 int ret;
703 u16 byteen_start, byteen_end, byen;
704 u16 limit = 512;
hayeswangac718b62013-05-02 16:01:25 +0000705
706 if (test_bit(RTL8152_UNPLUG, &tp->flags))
707 return -ENODEV;
708
709 /* both size and indix must be 4 bytes align */
710 if ((size & 3) || !size || (index & 3) || !data)
711 return -EPERM;
712
713 if ((u32)index + (u32)size > 0xffff)
714 return -EPERM;
715
716 byteen_start = byteen & BYTE_EN_START_MASK;
717 byteen_end = byteen & BYTE_EN_END_MASK;
718
719 byen = byteen_start | (byteen_start << 4);
720 ret = set_registers(tp, index, type | byen, 4, data);
721 if (ret < 0)
722 goto error1;
723
724 index += 4;
725 data += 4;
726 size -= 4;
727
728 if (size) {
729 size -= 4;
730
731 while (size) {
732 if (size > limit) {
733 ret = set_registers(tp, index,
hayeswangb209af92014-08-25 15:53:00 +0800734 type | BYTE_EN_DWORD,
735 limit, data);
hayeswangac718b62013-05-02 16:01:25 +0000736 if (ret < 0)
737 goto error1;
738
739 index += limit;
740 data += limit;
741 size -= limit;
742 } else {
743 ret = set_registers(tp, index,
hayeswangb209af92014-08-25 15:53:00 +0800744 type | BYTE_EN_DWORD,
745 size, data);
hayeswangac718b62013-05-02 16:01:25 +0000746 if (ret < 0)
747 goto error1;
748
749 index += size;
750 data += size;
751 size = 0;
752 break;
753 }
754 }
755
756 byen = byteen_end | (byteen_end >> 4);
757 ret = set_registers(tp, index, type | byen, 4, data);
758 if (ret < 0)
759 goto error1;
760 }
761
762error1:
hayeswang67610492014-10-30 11:46:40 +0800763 if (ret == -ENODEV)
764 set_bit(RTL8152_UNPLUG, &tp->flags);
765
hayeswangac718b62013-05-02 16:01:25 +0000766 return ret;
767}
768
769static inline
770int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
771{
772 return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
773}
774
775static inline
776int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
777{
778 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
779}
780
781static inline
782int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
783{
784 return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
785}
786
787static inline
788int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
789{
790 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
791}
792
793static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
794{
hayeswangc8826de2013-07-31 17:21:26 +0800795 __le32 data;
hayeswangac718b62013-05-02 16:01:25 +0000796
hayeswangc8826de2013-07-31 17:21:26 +0800797 generic_ocp_read(tp, index, sizeof(data), &data, type);
hayeswangac718b62013-05-02 16:01:25 +0000798
799 return __le32_to_cpu(data);
800}
801
802static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
803{
hayeswangc8826de2013-07-31 17:21:26 +0800804 __le32 tmp = __cpu_to_le32(data);
805
806 generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
hayeswangac718b62013-05-02 16:01:25 +0000807}
808
809static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
810{
811 u32 data;
hayeswangc8826de2013-07-31 17:21:26 +0800812 __le32 tmp;
hayeswangac718b62013-05-02 16:01:25 +0000813 u8 shift = index & 2;
814
815 index &= ~3;
816
hayeswangc8826de2013-07-31 17:21:26 +0800817 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
hayeswangac718b62013-05-02 16:01:25 +0000818
hayeswangc8826de2013-07-31 17:21:26 +0800819 data = __le32_to_cpu(tmp);
hayeswangac718b62013-05-02 16:01:25 +0000820 data >>= (shift * 8);
821 data &= 0xffff;
822
823 return (u16)data;
824}
825
826static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
827{
hayeswangc8826de2013-07-31 17:21:26 +0800828 u32 mask = 0xffff;
829 __le32 tmp;
hayeswangac718b62013-05-02 16:01:25 +0000830 u16 byen = BYTE_EN_WORD;
831 u8 shift = index & 2;
832
833 data &= mask;
834
835 if (index & 2) {
836 byen <<= shift;
837 mask <<= (shift * 8);
838 data <<= (shift * 8);
839 index &= ~3;
840 }
841
hayeswangc8826de2013-07-31 17:21:26 +0800842 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
hayeswangac718b62013-05-02 16:01:25 +0000843
hayeswangc8826de2013-07-31 17:21:26 +0800844 data |= __le32_to_cpu(tmp) & ~mask;
845 tmp = __cpu_to_le32(data);
hayeswangac718b62013-05-02 16:01:25 +0000846
hayeswangc8826de2013-07-31 17:21:26 +0800847 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
hayeswangac718b62013-05-02 16:01:25 +0000848}
849
850static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
851{
852 u32 data;
hayeswangc8826de2013-07-31 17:21:26 +0800853 __le32 tmp;
hayeswangac718b62013-05-02 16:01:25 +0000854 u8 shift = index & 3;
855
856 index &= ~3;
857
hayeswangc8826de2013-07-31 17:21:26 +0800858 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
hayeswangac718b62013-05-02 16:01:25 +0000859
hayeswangc8826de2013-07-31 17:21:26 +0800860 data = __le32_to_cpu(tmp);
hayeswangac718b62013-05-02 16:01:25 +0000861 data >>= (shift * 8);
862 data &= 0xff;
863
864 return (u8)data;
865}
866
867static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
868{
hayeswangc8826de2013-07-31 17:21:26 +0800869 u32 mask = 0xff;
870 __le32 tmp;
hayeswangac718b62013-05-02 16:01:25 +0000871 u16 byen = BYTE_EN_BYTE;
872 u8 shift = index & 3;
873
874 data &= mask;
875
876 if (index & 3) {
877 byen <<= shift;
878 mask <<= (shift * 8);
879 data <<= (shift * 8);
880 index &= ~3;
881 }
882
hayeswangc8826de2013-07-31 17:21:26 +0800883 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
hayeswangac718b62013-05-02 16:01:25 +0000884
hayeswangc8826de2013-07-31 17:21:26 +0800885 data |= __le32_to_cpu(tmp) & ~mask;
886 tmp = __cpu_to_le32(data);
hayeswangac718b62013-05-02 16:01:25 +0000887
hayeswangc8826de2013-07-31 17:21:26 +0800888 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
hayeswangac718b62013-05-02 16:01:25 +0000889}
890
hayeswangac244d32014-01-02 11:22:40 +0800891static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
892{
893 u16 ocp_base, ocp_index;
894
895 ocp_base = addr & 0xf000;
896 if (ocp_base != tp->ocp_base) {
897 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
898 tp->ocp_base = ocp_base;
899 }
900
901 ocp_index = (addr & 0x0fff) | 0xb000;
902 return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
903}
904
hayeswange3fe0b12014-01-02 11:22:39 +0800905static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
906{
907 u16 ocp_base, ocp_index;
908
909 ocp_base = addr & 0xf000;
910 if (ocp_base != tp->ocp_base) {
911 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
912 tp->ocp_base = ocp_base;
913 }
914
915 ocp_index = (addr & 0x0fff) | 0xb000;
916 ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
917}
918
hayeswangac244d32014-01-02 11:22:40 +0800919static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
hayeswangac718b62013-05-02 16:01:25 +0000920{
hayeswangac244d32014-01-02 11:22:40 +0800921 ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
hayeswangac718b62013-05-02 16:01:25 +0000922}
923
hayeswangac244d32014-01-02 11:22:40 +0800924static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
hayeswangac718b62013-05-02 16:01:25 +0000925{
hayeswangac244d32014-01-02 11:22:40 +0800926 return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
hayeswangac718b62013-05-02 16:01:25 +0000927}
928
hayeswang43779f82014-01-02 11:25:10 +0800929static void sram_write(struct r8152 *tp, u16 addr, u16 data)
930{
931 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
932 ocp_reg_write(tp, OCP_SRAM_DATA, data);
933}
934
935static u16 sram_read(struct r8152 *tp, u16 addr)
936{
937 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
938 return ocp_reg_read(tp, OCP_SRAM_DATA);
939}
940
hayeswangac718b62013-05-02 16:01:25 +0000941static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
942{
943 struct r8152 *tp = netdev_priv(netdev);
hayeswang9a4be1b2014-02-18 21:49:07 +0800944 int ret;
hayeswangac718b62013-05-02 16:01:25 +0000945
hayeswang68714382014-04-11 17:54:31 +0800946 if (test_bit(RTL8152_UNPLUG, &tp->flags))
947 return -ENODEV;
948
hayeswangac718b62013-05-02 16:01:25 +0000949 if (phy_id != R8152_PHY_ID)
950 return -EINVAL;
951
hayeswang9a4be1b2014-02-18 21:49:07 +0800952 ret = r8152_mdio_read(tp, reg);
953
hayeswang9a4be1b2014-02-18 21:49:07 +0800954 return ret;
hayeswangac718b62013-05-02 16:01:25 +0000955}
956
957static
958void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
959{
960 struct r8152 *tp = netdev_priv(netdev);
961
hayeswang68714382014-04-11 17:54:31 +0800962 if (test_bit(RTL8152_UNPLUG, &tp->flags))
963 return;
964
hayeswangac718b62013-05-02 16:01:25 +0000965 if (phy_id != R8152_PHY_ID)
966 return;
967
968 r8152_mdio_write(tp, reg, val);
969}
970
hayeswangb209af92014-08-25 15:53:00 +0800971static int
972r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
hayeswangebc2ec42013-08-14 20:54:38 +0800973
hayeswang8ba789a2014-09-04 16:15:41 +0800974static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
975{
976 struct r8152 *tp = netdev_priv(netdev);
977 struct sockaddr *addr = p;
hayeswangea6a7112014-10-02 17:03:12 +0800978 int ret = -EADDRNOTAVAIL;
hayeswang8ba789a2014-09-04 16:15:41 +0800979
980 if (!is_valid_ether_addr(addr->sa_data))
hayeswangea6a7112014-10-02 17:03:12 +0800981 goto out1;
982
983 ret = usb_autopm_get_interface(tp->intf);
984 if (ret < 0)
985 goto out1;
hayeswang8ba789a2014-09-04 16:15:41 +0800986
hayeswangb5403272014-10-09 18:00:26 +0800987 mutex_lock(&tp->control);
988
hayeswang8ba789a2014-09-04 16:15:41 +0800989 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
990
991 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
992 pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
993 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
994
hayeswangb5403272014-10-09 18:00:26 +0800995 mutex_unlock(&tp->control);
996
hayeswangea6a7112014-10-02 17:03:12 +0800997 usb_autopm_put_interface(tp->intf);
998out1:
999 return ret;
hayeswang8ba789a2014-09-04 16:15:41 +08001000}
1001
hayeswang179bb6d2014-09-04 16:15:42 +08001002static int set_ethernet_addr(struct r8152 *tp)
hayeswangac718b62013-05-02 16:01:25 +00001003{
1004 struct net_device *dev = tp->netdev;
hayeswang179bb6d2014-09-04 16:15:42 +08001005 struct sockaddr sa;
hayeswang8a91c822014-02-18 21:49:01 +08001006 int ret;
hayeswangac718b62013-05-02 16:01:25 +00001007
hayeswang8a91c822014-02-18 21:49:01 +08001008 if (tp->version == RTL_VER_01)
hayeswang179bb6d2014-09-04 16:15:42 +08001009 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
hayeswang8a91c822014-02-18 21:49:01 +08001010 else
hayeswang179bb6d2014-09-04 16:15:42 +08001011 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
hayeswang8a91c822014-02-18 21:49:01 +08001012
1013 if (ret < 0) {
hayeswang179bb6d2014-09-04 16:15:42 +08001014 netif_err(tp, probe, dev, "Get ether addr fail\n");
1015 } else if (!is_valid_ether_addr(sa.sa_data)) {
1016 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1017 sa.sa_data);
1018 eth_hw_addr_random(dev);
1019 ether_addr_copy(sa.sa_data, dev->dev_addr);
1020 ret = rtl8152_set_mac_address(dev, &sa);
1021 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1022 sa.sa_data);
hayeswang8a91c822014-02-18 21:49:01 +08001023 } else {
hayeswang179bb6d2014-09-04 16:15:42 +08001024 if (tp->version == RTL_VER_01)
1025 ether_addr_copy(dev->dev_addr, sa.sa_data);
1026 else
1027 ret = rtl8152_set_mac_address(dev, &sa);
hayeswangac718b62013-05-02 16:01:25 +00001028 }
hayeswang179bb6d2014-09-04 16:15:42 +08001029
1030 return ret;
hayeswangac718b62013-05-02 16:01:25 +00001031}
1032
hayeswangac718b62013-05-02 16:01:25 +00001033static void read_bulk_callback(struct urb *urb)
1034{
hayeswangac718b62013-05-02 16:01:25 +00001035 struct net_device *netdev;
hayeswangac718b62013-05-02 16:01:25 +00001036 int status = urb->status;
hayeswangebc2ec42013-08-14 20:54:38 +08001037 struct rx_agg *agg;
1038 struct r8152 *tp;
hayeswangac718b62013-05-02 16:01:25 +00001039 int result;
hayeswangac718b62013-05-02 16:01:25 +00001040
hayeswangebc2ec42013-08-14 20:54:38 +08001041 agg = urb->context;
1042 if (!agg)
1043 return;
1044
1045 tp = agg->context;
hayeswangac718b62013-05-02 16:01:25 +00001046 if (!tp)
1047 return;
hayeswangebc2ec42013-08-14 20:54:38 +08001048
hayeswangac718b62013-05-02 16:01:25 +00001049 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1050 return;
hayeswangebc2ec42013-08-14 20:54:38 +08001051
1052 if (!test_bit(WORK_ENABLE, &tp->flags))
hayeswangac718b62013-05-02 16:01:25 +00001053 return;
1054
hayeswangebc2ec42013-08-14 20:54:38 +08001055 netdev = tp->netdev;
hayeswang7559fb2f2013-08-16 16:09:38 +08001056
1057 /* When link down, the driver would cancel all bulks. */
1058 /* This avoid the re-submitting bulk */
hayeswangebc2ec42013-08-14 20:54:38 +08001059 if (!netif_carrier_ok(netdev))
1060 return;
1061
hayeswang9a4be1b2014-02-18 21:49:07 +08001062 usb_mark_last_busy(tp->udev);
1063
hayeswangac718b62013-05-02 16:01:25 +00001064 switch (status) {
1065 case 0:
hayeswangebc2ec42013-08-14 20:54:38 +08001066 if (urb->actual_length < ETH_ZLEN)
1067 break;
1068
hayeswang2685d412014-03-07 11:04:34 +08001069 spin_lock(&tp->rx_lock);
hayeswangebc2ec42013-08-14 20:54:38 +08001070 list_add_tail(&agg->list, &tp->rx_done);
hayeswang2685d412014-03-07 11:04:34 +08001071 spin_unlock(&tp->rx_lock);
hayeswangebc2ec42013-08-14 20:54:38 +08001072 tasklet_schedule(&tp->tl);
1073 return;
hayeswangac718b62013-05-02 16:01:25 +00001074 case -ESHUTDOWN:
1075 set_bit(RTL8152_UNPLUG, &tp->flags);
1076 netif_device_detach(tp->netdev);
hayeswangebc2ec42013-08-14 20:54:38 +08001077 return;
hayeswangac718b62013-05-02 16:01:25 +00001078 case -ENOENT:
1079 return; /* the urb is in unlink state */
1080 case -ETIME:
Hayes Wang4a8deae2014-01-07 11:18:22 +08001081 if (net_ratelimit())
1082 netdev_warn(netdev, "maybe reset is needed?\n");
hayeswangebc2ec42013-08-14 20:54:38 +08001083 break;
hayeswangac718b62013-05-02 16:01:25 +00001084 default:
Hayes Wang4a8deae2014-01-07 11:18:22 +08001085 if (net_ratelimit())
1086 netdev_warn(netdev, "Rx status %d\n", status);
hayeswangebc2ec42013-08-14 20:54:38 +08001087 break;
hayeswangac718b62013-05-02 16:01:25 +00001088 }
1089
hayeswangebc2ec42013-08-14 20:54:38 +08001090 result = r8152_submit_rx(tp, agg, GFP_ATOMIC);
hayeswangac718b62013-05-02 16:01:25 +00001091 if (result == -ENODEV) {
hayeswang67610492014-10-30 11:46:40 +08001092 set_bit(RTL8152_UNPLUG, &tp->flags);
hayeswangac718b62013-05-02 16:01:25 +00001093 netif_device_detach(tp->netdev);
1094 } else if (result) {
hayeswang2685d412014-03-07 11:04:34 +08001095 spin_lock(&tp->rx_lock);
hayeswangebc2ec42013-08-14 20:54:38 +08001096 list_add_tail(&agg->list, &tp->rx_done);
hayeswang2685d412014-03-07 11:04:34 +08001097 spin_unlock(&tp->rx_lock);
hayeswangebc2ec42013-08-14 20:54:38 +08001098 tasklet_schedule(&tp->tl);
hayeswangac718b62013-05-02 16:01:25 +00001099 }
hayeswangac718b62013-05-02 16:01:25 +00001100}
1101
1102static void write_bulk_callback(struct urb *urb)
1103{
hayeswangebc2ec42013-08-14 20:54:38 +08001104 struct net_device_stats *stats;
hayeswangd104eaf2014-03-06 15:07:17 +08001105 struct net_device *netdev;
hayeswangebc2ec42013-08-14 20:54:38 +08001106 struct tx_agg *agg;
hayeswangac718b62013-05-02 16:01:25 +00001107 struct r8152 *tp;
1108 int status = urb->status;
1109
hayeswangebc2ec42013-08-14 20:54:38 +08001110 agg = urb->context;
1111 if (!agg)
1112 return;
1113
1114 tp = agg->context;
hayeswangac718b62013-05-02 16:01:25 +00001115 if (!tp)
1116 return;
hayeswangebc2ec42013-08-14 20:54:38 +08001117
hayeswangd104eaf2014-03-06 15:07:17 +08001118 netdev = tp->netdev;
hayeswang05e0f1a2014-03-06 15:07:18 +08001119 stats = &netdev->stats;
hayeswangebc2ec42013-08-14 20:54:38 +08001120 if (status) {
Hayes Wang4a8deae2014-01-07 11:18:22 +08001121 if (net_ratelimit())
hayeswangd104eaf2014-03-06 15:07:17 +08001122 netdev_warn(netdev, "Tx status %d\n", status);
hayeswangebc2ec42013-08-14 20:54:38 +08001123 stats->tx_errors += agg->skb_num;
1124 } else {
1125 stats->tx_packets += agg->skb_num;
1126 stats->tx_bytes += agg->skb_len;
1127 }
1128
hayeswang2685d412014-03-07 11:04:34 +08001129 spin_lock(&tp->tx_lock);
hayeswangebc2ec42013-08-14 20:54:38 +08001130 list_add_tail(&agg->list, &tp->tx_free);
hayeswang2685d412014-03-07 11:04:34 +08001131 spin_unlock(&tp->tx_lock);
hayeswangebc2ec42013-08-14 20:54:38 +08001132
hayeswang9a4be1b2014-02-18 21:49:07 +08001133 usb_autopm_put_interface_async(tp->intf);
1134
hayeswangd104eaf2014-03-06 15:07:17 +08001135 if (!netif_carrier_ok(netdev))
hayeswangac718b62013-05-02 16:01:25 +00001136 return;
hayeswangebc2ec42013-08-14 20:54:38 +08001137
1138 if (!test_bit(WORK_ENABLE, &tp->flags))
1139 return;
1140
1141 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1142 return;
1143
1144 if (!skb_queue_empty(&tp->tx_queue))
hayeswang0c3121f2014-03-07 11:04:36 +08001145 tasklet_schedule(&tp->tl);
hayeswangebc2ec42013-08-14 20:54:38 +08001146}
1147
hayeswang40a82912013-08-14 20:54:40 +08001148static void intr_callback(struct urb *urb)
1149{
1150 struct r8152 *tp;
hayeswang500b6d72013-11-20 17:30:57 +08001151 __le16 *d;
hayeswang40a82912013-08-14 20:54:40 +08001152 int status = urb->status;
1153 int res;
1154
1155 tp = urb->context;
1156 if (!tp)
1157 return;
1158
1159 if (!test_bit(WORK_ENABLE, &tp->flags))
1160 return;
1161
1162 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1163 return;
1164
1165 switch (status) {
1166 case 0: /* success */
1167 break;
1168 case -ECONNRESET: /* unlink */
1169 case -ESHUTDOWN:
1170 netif_device_detach(tp->netdev);
1171 case -ENOENT:
1172 return;
1173 case -EOVERFLOW:
1174 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1175 goto resubmit;
1176 /* -EPIPE: should clear the halt */
1177 default:
1178 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1179 goto resubmit;
1180 }
1181
1182 d = urb->transfer_buffer;
1183 if (INTR_LINK & __le16_to_cpu(d[0])) {
1184 if (!(tp->speed & LINK_STATUS)) {
1185 set_bit(RTL8152_LINK_CHG, &tp->flags);
1186 schedule_delayed_work(&tp->schedule, 0);
1187 }
1188 } else {
1189 if (tp->speed & LINK_STATUS) {
1190 set_bit(RTL8152_LINK_CHG, &tp->flags);
1191 schedule_delayed_work(&tp->schedule, 0);
1192 }
1193 }
1194
1195resubmit:
1196 res = usb_submit_urb(urb, GFP_ATOMIC);
hayeswang67610492014-10-30 11:46:40 +08001197 if (res == -ENODEV) {
1198 set_bit(RTL8152_UNPLUG, &tp->flags);
hayeswang40a82912013-08-14 20:54:40 +08001199 netif_device_detach(tp->netdev);
hayeswang67610492014-10-30 11:46:40 +08001200 } else if (res) {
hayeswang40a82912013-08-14 20:54:40 +08001201 netif_err(tp, intr, tp->netdev,
Hayes Wang4a8deae2014-01-07 11:18:22 +08001202 "can't resubmit intr, status %d\n", res);
hayeswang67610492014-10-30 11:46:40 +08001203 }
hayeswang40a82912013-08-14 20:54:40 +08001204}
1205
hayeswangebc2ec42013-08-14 20:54:38 +08001206static inline void *rx_agg_align(void *data)
1207{
hayeswang8e1f51b2014-01-02 11:22:41 +08001208 return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
hayeswangebc2ec42013-08-14 20:54:38 +08001209}
1210
1211static inline void *tx_agg_align(void *data)
1212{
hayeswang8e1f51b2014-01-02 11:22:41 +08001213 return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
hayeswangebc2ec42013-08-14 20:54:38 +08001214}
1215
1216static void free_all_mem(struct r8152 *tp)
1217{
1218 int i;
1219
1220 for (i = 0; i < RTL8152_MAX_RX; i++) {
hayeswang9629e3c2014-01-15 10:42:15 +08001221 usb_free_urb(tp->rx_info[i].urb);
1222 tp->rx_info[i].urb = NULL;
hayeswangebc2ec42013-08-14 20:54:38 +08001223
hayeswang9629e3c2014-01-15 10:42:15 +08001224 kfree(tp->rx_info[i].buffer);
1225 tp->rx_info[i].buffer = NULL;
1226 tp->rx_info[i].head = NULL;
hayeswangebc2ec42013-08-14 20:54:38 +08001227 }
1228
1229 for (i = 0; i < RTL8152_MAX_TX; i++) {
hayeswang9629e3c2014-01-15 10:42:15 +08001230 usb_free_urb(tp->tx_info[i].urb);
1231 tp->tx_info[i].urb = NULL;
hayeswangebc2ec42013-08-14 20:54:38 +08001232
hayeswang9629e3c2014-01-15 10:42:15 +08001233 kfree(tp->tx_info[i].buffer);
1234 tp->tx_info[i].buffer = NULL;
1235 tp->tx_info[i].head = NULL;
hayeswangebc2ec42013-08-14 20:54:38 +08001236 }
hayeswang40a82912013-08-14 20:54:40 +08001237
hayeswang9629e3c2014-01-15 10:42:15 +08001238 usb_free_urb(tp->intr_urb);
1239 tp->intr_urb = NULL;
hayeswang40a82912013-08-14 20:54:40 +08001240
hayeswang9629e3c2014-01-15 10:42:15 +08001241 kfree(tp->intr_buff);
1242 tp->intr_buff = NULL;
hayeswangebc2ec42013-08-14 20:54:38 +08001243}
1244
1245static int alloc_all_mem(struct r8152 *tp)
1246{
1247 struct net_device *netdev = tp->netdev;
hayeswang40a82912013-08-14 20:54:40 +08001248 struct usb_interface *intf = tp->intf;
1249 struct usb_host_interface *alt = intf->cur_altsetting;
1250 struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
hayeswangebc2ec42013-08-14 20:54:38 +08001251 struct urb *urb;
1252 int node, i;
1253 u8 *buf;
1254
1255 node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1256
1257 spin_lock_init(&tp->rx_lock);
1258 spin_lock_init(&tp->tx_lock);
1259 INIT_LIST_HEAD(&tp->rx_done);
1260 INIT_LIST_HEAD(&tp->tx_free);
1261 skb_queue_head_init(&tp->tx_queue);
1262
1263 for (i = 0; i < RTL8152_MAX_RX; i++) {
hayeswang52aec122014-09-02 10:27:52 +08001264 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
hayeswangebc2ec42013-08-14 20:54:38 +08001265 if (!buf)
1266 goto err1;
1267
1268 if (buf != rx_agg_align(buf)) {
1269 kfree(buf);
hayeswang52aec122014-09-02 10:27:52 +08001270 buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
hayeswang8e1f51b2014-01-02 11:22:41 +08001271 node);
hayeswangebc2ec42013-08-14 20:54:38 +08001272 if (!buf)
1273 goto err1;
1274 }
1275
1276 urb = usb_alloc_urb(0, GFP_KERNEL);
1277 if (!urb) {
1278 kfree(buf);
1279 goto err1;
1280 }
1281
1282 INIT_LIST_HEAD(&tp->rx_info[i].list);
1283 tp->rx_info[i].context = tp;
1284 tp->rx_info[i].urb = urb;
1285 tp->rx_info[i].buffer = buf;
1286 tp->rx_info[i].head = rx_agg_align(buf);
1287 }
1288
1289 for (i = 0; i < RTL8152_MAX_TX; i++) {
hayeswang52aec122014-09-02 10:27:52 +08001290 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
hayeswangebc2ec42013-08-14 20:54:38 +08001291 if (!buf)
1292 goto err1;
1293
1294 if (buf != tx_agg_align(buf)) {
1295 kfree(buf);
hayeswang52aec122014-09-02 10:27:52 +08001296 buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
hayeswang8e1f51b2014-01-02 11:22:41 +08001297 node);
hayeswangebc2ec42013-08-14 20:54:38 +08001298 if (!buf)
1299 goto err1;
1300 }
1301
1302 urb = usb_alloc_urb(0, GFP_KERNEL);
1303 if (!urb) {
1304 kfree(buf);
1305 goto err1;
1306 }
1307
1308 INIT_LIST_HEAD(&tp->tx_info[i].list);
1309 tp->tx_info[i].context = tp;
1310 tp->tx_info[i].urb = urb;
1311 tp->tx_info[i].buffer = buf;
1312 tp->tx_info[i].head = tx_agg_align(buf);
1313
1314 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1315 }
1316
hayeswang40a82912013-08-14 20:54:40 +08001317 tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1318 if (!tp->intr_urb)
1319 goto err1;
1320
1321 tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1322 if (!tp->intr_buff)
1323 goto err1;
1324
1325 tp->intr_interval = (int)ep_intr->desc.bInterval;
1326 usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
hayeswangb209af92014-08-25 15:53:00 +08001327 tp->intr_buff, INTBUFSIZE, intr_callback,
1328 tp, tp->intr_interval);
hayeswang40a82912013-08-14 20:54:40 +08001329
hayeswangebc2ec42013-08-14 20:54:38 +08001330 return 0;
1331
1332err1:
1333 free_all_mem(tp);
1334 return -ENOMEM;
1335}
1336
hayeswang0de98f62013-08-16 16:09:35 +08001337static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1338{
1339 struct tx_agg *agg = NULL;
1340 unsigned long flags;
1341
hayeswang21949ab2014-03-07 11:04:35 +08001342 if (list_empty(&tp->tx_free))
1343 return NULL;
1344
hayeswang0de98f62013-08-16 16:09:35 +08001345 spin_lock_irqsave(&tp->tx_lock, flags);
1346 if (!list_empty(&tp->tx_free)) {
1347 struct list_head *cursor;
1348
1349 cursor = tp->tx_free.next;
1350 list_del_init(cursor);
1351 agg = list_entry(cursor, struct tx_agg, list);
1352 }
1353 spin_unlock_irqrestore(&tp->tx_lock, flags);
1354
1355 return agg;
1356}
1357
hayeswang60c89072014-03-07 11:04:39 +08001358static inline __be16 get_protocol(struct sk_buff *skb)
hayeswang5bd23882013-08-14 20:54:39 +08001359{
hayeswang60c89072014-03-07 11:04:39 +08001360 __be16 protocol;
hayeswang5bd23882013-08-14 20:54:39 +08001361
hayeswang60c89072014-03-07 11:04:39 +08001362 if (skb->protocol == htons(ETH_P_8021Q))
1363 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
1364 else
1365 protocol = skb->protocol;
hayeswang5bd23882013-08-14 20:54:39 +08001366
hayeswang60c89072014-03-07 11:04:39 +08001367 return protocol;
1368}
1369
hayeswangb209af92014-08-25 15:53:00 +08001370/* r8152_csum_workaround()
hayeswang6128d1b2014-03-07 11:04:40 +08001371 * The hw limites the value the transport offset. When the offset is out of the
1372 * range, calculate the checksum by sw.
1373 */
1374static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1375 struct sk_buff_head *list)
1376{
1377 if (skb_shinfo(skb)->gso_size) {
1378 netdev_features_t features = tp->netdev->features;
1379 struct sk_buff_head seg_list;
1380 struct sk_buff *segs, *nskb;
1381
hayeswanga91d45f2014-07-11 16:48:27 +08001382 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
hayeswang6128d1b2014-03-07 11:04:40 +08001383 segs = skb_gso_segment(skb, features);
1384 if (IS_ERR(segs) || !segs)
1385 goto drop;
1386
1387 __skb_queue_head_init(&seg_list);
1388
1389 do {
1390 nskb = segs;
1391 segs = segs->next;
1392 nskb->next = NULL;
1393 __skb_queue_tail(&seg_list, nskb);
1394 } while (segs);
1395
1396 skb_queue_splice(&seg_list, list);
1397 dev_kfree_skb(skb);
1398 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1399 if (skb_checksum_help(skb) < 0)
1400 goto drop;
1401
1402 __skb_queue_head(list, skb);
1403 } else {
1404 struct net_device_stats *stats;
1405
1406drop:
1407 stats = &tp->netdev->stats;
1408 stats->tx_dropped++;
1409 dev_kfree_skb(skb);
1410 }
1411}
1412
hayeswangb209af92014-08-25 15:53:00 +08001413/* msdn_giant_send_check()
hayeswang6128d1b2014-03-07 11:04:40 +08001414 * According to the document of microsoft, the TCP Pseudo Header excludes the
1415 * packet length for IPv6 TCP large packets.
1416 */
1417static int msdn_giant_send_check(struct sk_buff *skb)
1418{
1419 const struct ipv6hdr *ipv6h;
1420 struct tcphdr *th;
hayeswangfcb308d2014-03-11 10:20:32 +08001421 int ret;
1422
1423 ret = skb_cow_head(skb, 0);
1424 if (ret)
1425 return ret;
hayeswang6128d1b2014-03-07 11:04:40 +08001426
1427 ipv6h = ipv6_hdr(skb);
1428 th = tcp_hdr(skb);
1429
1430 th->check = 0;
1431 th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1432
hayeswangfcb308d2014-03-11 10:20:32 +08001433 return ret;
hayeswang6128d1b2014-03-07 11:04:40 +08001434}
1435
hayeswangc5554292014-09-12 10:43:11 +08001436static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1437{
1438 if (vlan_tx_tag_present(skb)) {
1439 u32 opts2;
1440
1441 opts2 = TX_VLAN_TAG | swab16(vlan_tx_tag_get(skb));
1442 desc->opts2 |= cpu_to_le32(opts2);
1443 }
1444}
1445
1446static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1447{
1448 u32 opts2 = le32_to_cpu(desc->opts2);
1449
1450 if (opts2 & RX_VLAN_TAG)
1451 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1452 swab16(opts2 & 0xffff));
1453}
1454
hayeswang60c89072014-03-07 11:04:39 +08001455static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1456 struct sk_buff *skb, u32 len, u32 transport_offset)
1457{
1458 u32 mss = skb_shinfo(skb)->gso_size;
1459 u32 opts1, opts2 = 0;
1460 int ret = TX_CSUM_SUCCESS;
1461
1462 WARN_ON_ONCE(len > TX_LEN_MAX);
1463
1464 opts1 = len | TX_FS | TX_LS;
1465
1466 if (mss) {
hayeswang6128d1b2014-03-07 11:04:40 +08001467 if (transport_offset > GTTCPHO_MAX) {
1468 netif_warn(tp, tx_err, tp->netdev,
1469 "Invalid transport offset 0x%x for TSO\n",
1470 transport_offset);
1471 ret = TX_CSUM_TSO;
1472 goto unavailable;
1473 }
1474
hayeswang60c89072014-03-07 11:04:39 +08001475 switch (get_protocol(skb)) {
1476 case htons(ETH_P_IP):
1477 opts1 |= GTSENDV4;
1478 break;
1479
hayeswang6128d1b2014-03-07 11:04:40 +08001480 case htons(ETH_P_IPV6):
hayeswangfcb308d2014-03-11 10:20:32 +08001481 if (msdn_giant_send_check(skb)) {
1482 ret = TX_CSUM_TSO;
1483 goto unavailable;
1484 }
hayeswang6128d1b2014-03-07 11:04:40 +08001485 opts1 |= GTSENDV6;
hayeswang6128d1b2014-03-07 11:04:40 +08001486 break;
1487
hayeswang60c89072014-03-07 11:04:39 +08001488 default:
1489 WARN_ON_ONCE(1);
1490 break;
1491 }
1492
1493 opts1 |= transport_offset << GTTCPHO_SHIFT;
1494 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1495 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
hayeswang5bd23882013-08-14 20:54:39 +08001496 u8 ip_protocol;
hayeswang5bd23882013-08-14 20:54:39 +08001497
hayeswang6128d1b2014-03-07 11:04:40 +08001498 if (transport_offset > TCPHO_MAX) {
1499 netif_warn(tp, tx_err, tp->netdev,
1500 "Invalid transport offset 0x%x\n",
1501 transport_offset);
1502 ret = TX_CSUM_NONE;
1503 goto unavailable;
1504 }
1505
hayeswang60c89072014-03-07 11:04:39 +08001506 switch (get_protocol(skb)) {
hayeswang5bd23882013-08-14 20:54:39 +08001507 case htons(ETH_P_IP):
1508 opts2 |= IPV4_CS;
1509 ip_protocol = ip_hdr(skb)->protocol;
1510 break;
1511
1512 case htons(ETH_P_IPV6):
1513 opts2 |= IPV6_CS;
1514 ip_protocol = ipv6_hdr(skb)->nexthdr;
1515 break;
1516
1517 default:
1518 ip_protocol = IPPROTO_RAW;
1519 break;
1520 }
1521
hayeswang60c89072014-03-07 11:04:39 +08001522 if (ip_protocol == IPPROTO_TCP)
hayeswang5bd23882013-08-14 20:54:39 +08001523 opts2 |= TCP_CS;
hayeswang60c89072014-03-07 11:04:39 +08001524 else if (ip_protocol == IPPROTO_UDP)
hayeswang5bd23882013-08-14 20:54:39 +08001525 opts2 |= UDP_CS;
hayeswang60c89072014-03-07 11:04:39 +08001526 else
hayeswang5bd23882013-08-14 20:54:39 +08001527 WARN_ON_ONCE(1);
hayeswang5bd23882013-08-14 20:54:39 +08001528
hayeswang60c89072014-03-07 11:04:39 +08001529 opts2 |= transport_offset << TCPHO_SHIFT;
hayeswang5bd23882013-08-14 20:54:39 +08001530 }
hayeswang60c89072014-03-07 11:04:39 +08001531
1532 desc->opts2 = cpu_to_le32(opts2);
1533 desc->opts1 = cpu_to_le32(opts1);
1534
hayeswang6128d1b2014-03-07 11:04:40 +08001535unavailable:
hayeswang60c89072014-03-07 11:04:39 +08001536 return ret;
hayeswang5bd23882013-08-14 20:54:39 +08001537}
1538
hayeswangb1379d92013-08-16 16:09:37 +08001539static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1540{
hayeswangd84130a2014-02-18 21:49:02 +08001541 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
hayeswang9a4be1b2014-02-18 21:49:07 +08001542 int remain, ret;
hayeswangb1379d92013-08-16 16:09:37 +08001543 u8 *tx_data;
1544
hayeswangd84130a2014-02-18 21:49:02 +08001545 __skb_queue_head_init(&skb_head);
hayeswang0c3121f2014-03-07 11:04:36 +08001546 spin_lock(&tx_queue->lock);
hayeswangd84130a2014-02-18 21:49:02 +08001547 skb_queue_splice_init(tx_queue, &skb_head);
hayeswang0c3121f2014-03-07 11:04:36 +08001548 spin_unlock(&tx_queue->lock);
hayeswangd84130a2014-02-18 21:49:02 +08001549
hayeswangb1379d92013-08-16 16:09:37 +08001550 tx_data = agg->head;
hayeswangb209af92014-08-25 15:53:00 +08001551 agg->skb_num = 0;
1552 agg->skb_len = 0;
hayeswang52aec122014-09-02 10:27:52 +08001553 remain = agg_buf_sz;
hayeswangb1379d92013-08-16 16:09:37 +08001554
hayeswang7937f9e2013-11-20 17:30:54 +08001555 while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
hayeswangb1379d92013-08-16 16:09:37 +08001556 struct tx_desc *tx_desc;
1557 struct sk_buff *skb;
1558 unsigned int len;
hayeswang60c89072014-03-07 11:04:39 +08001559 u32 offset;
hayeswangb1379d92013-08-16 16:09:37 +08001560
hayeswangd84130a2014-02-18 21:49:02 +08001561 skb = __skb_dequeue(&skb_head);
hayeswangb1379d92013-08-16 16:09:37 +08001562 if (!skb)
1563 break;
1564
hayeswang60c89072014-03-07 11:04:39 +08001565 len = skb->len + sizeof(*tx_desc);
1566
1567 if (len > remain) {
hayeswangd84130a2014-02-18 21:49:02 +08001568 __skb_queue_head(&skb_head, skb);
hayeswangb1379d92013-08-16 16:09:37 +08001569 break;
1570 }
1571
hayeswang7937f9e2013-11-20 17:30:54 +08001572 tx_data = tx_agg_align(tx_data);
hayeswangb1379d92013-08-16 16:09:37 +08001573 tx_desc = (struct tx_desc *)tx_data;
hayeswang60c89072014-03-07 11:04:39 +08001574
1575 offset = (u32)skb_transport_offset(skb);
1576
hayeswang6128d1b2014-03-07 11:04:40 +08001577 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1578 r8152_csum_workaround(tp, skb, &skb_head);
1579 continue;
1580 }
hayeswang60c89072014-03-07 11:04:39 +08001581
hayeswangc5554292014-09-12 10:43:11 +08001582 rtl_tx_vlan_tag(tx_desc, skb);
1583
hayeswangb1379d92013-08-16 16:09:37 +08001584 tx_data += sizeof(*tx_desc);
1585
hayeswang60c89072014-03-07 11:04:39 +08001586 len = skb->len;
1587 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1588 struct net_device_stats *stats = &tp->netdev->stats;
1589
1590 stats->tx_dropped++;
1591 dev_kfree_skb_any(skb);
1592 tx_data -= sizeof(*tx_desc);
1593 continue;
1594 }
hayeswangb1379d92013-08-16 16:09:37 +08001595
hayeswang7937f9e2013-11-20 17:30:54 +08001596 tx_data += len;
hayeswang60c89072014-03-07 11:04:39 +08001597 agg->skb_len += len;
1598 agg->skb_num++;
1599
1600 dev_kfree_skb_any(skb);
1601
hayeswang52aec122014-09-02 10:27:52 +08001602 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
hayeswangb1379d92013-08-16 16:09:37 +08001603 }
1604
hayeswangd84130a2014-02-18 21:49:02 +08001605 if (!skb_queue_empty(&skb_head)) {
hayeswang0c3121f2014-03-07 11:04:36 +08001606 spin_lock(&tx_queue->lock);
hayeswangd84130a2014-02-18 21:49:02 +08001607 skb_queue_splice(&skb_head, tx_queue);
hayeswang0c3121f2014-03-07 11:04:36 +08001608 spin_unlock(&tx_queue->lock);
hayeswangd84130a2014-02-18 21:49:02 +08001609 }
1610
hayeswang0c3121f2014-03-07 11:04:36 +08001611 netif_tx_lock(tp->netdev);
hayeswangdd1b1192013-11-20 17:30:56 +08001612
1613 if (netif_queue_stopped(tp->netdev) &&
1614 skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1615 netif_wake_queue(tp->netdev);
1616
hayeswang0c3121f2014-03-07 11:04:36 +08001617 netif_tx_unlock(tp->netdev);
hayeswang9a4be1b2014-02-18 21:49:07 +08001618
hayeswang0c3121f2014-03-07 11:04:36 +08001619 ret = usb_autopm_get_interface_async(tp->intf);
hayeswang9a4be1b2014-02-18 21:49:07 +08001620 if (ret < 0)
1621 goto out_tx_fill;
hayeswangdd1b1192013-11-20 17:30:56 +08001622
hayeswangb1379d92013-08-16 16:09:37 +08001623 usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1624 agg->head, (int)(tx_data - (u8 *)agg->head),
1625 (usb_complete_t)write_bulk_callback, agg);
1626
hayeswang0c3121f2014-03-07 11:04:36 +08001627 ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
hayeswang9a4be1b2014-02-18 21:49:07 +08001628 if (ret < 0)
hayeswang0c3121f2014-03-07 11:04:36 +08001629 usb_autopm_put_interface_async(tp->intf);
hayeswang9a4be1b2014-02-18 21:49:07 +08001630
1631out_tx_fill:
1632 return ret;
hayeswangb1379d92013-08-16 16:09:37 +08001633}
1634
hayeswang565cab02014-03-07 11:04:38 +08001635static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1636{
1637 u8 checksum = CHECKSUM_NONE;
1638 u32 opts2, opts3;
1639
1640 if (tp->version == RTL_VER_01)
1641 goto return_result;
1642
1643 opts2 = le32_to_cpu(rx_desc->opts2);
1644 opts3 = le32_to_cpu(rx_desc->opts3);
1645
1646 if (opts2 & RD_IPV4_CS) {
1647 if (opts3 & IPF)
1648 checksum = CHECKSUM_NONE;
1649 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1650 checksum = CHECKSUM_NONE;
1651 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1652 checksum = CHECKSUM_NONE;
1653 else
1654 checksum = CHECKSUM_UNNECESSARY;
hayeswang6128d1b2014-03-07 11:04:40 +08001655 } else if (RD_IPV6_CS) {
1656 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1657 checksum = CHECKSUM_UNNECESSARY;
1658 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1659 checksum = CHECKSUM_UNNECESSARY;
hayeswang565cab02014-03-07 11:04:38 +08001660 }
1661
1662return_result:
1663 return checksum;
1664}
1665
hayeswangebc2ec42013-08-14 20:54:38 +08001666static void rx_bottom(struct r8152 *tp)
1667{
hayeswanga5a4f462013-08-16 16:09:34 +08001668 unsigned long flags;
hayeswangd84130a2014-02-18 21:49:02 +08001669 struct list_head *cursor, *next, rx_queue;
hayeswangebc2ec42013-08-14 20:54:38 +08001670
hayeswangd84130a2014-02-18 21:49:02 +08001671 if (list_empty(&tp->rx_done))
1672 return;
1673
1674 INIT_LIST_HEAD(&rx_queue);
hayeswanga5a4f462013-08-16 16:09:34 +08001675 spin_lock_irqsave(&tp->rx_lock, flags);
hayeswangd84130a2014-02-18 21:49:02 +08001676 list_splice_init(&tp->rx_done, &rx_queue);
1677 spin_unlock_irqrestore(&tp->rx_lock, flags);
1678
1679 list_for_each_safe(cursor, next, &rx_queue) {
hayeswang43a44782013-08-16 16:09:36 +08001680 struct rx_desc *rx_desc;
1681 struct rx_agg *agg;
hayeswang43a44782013-08-16 16:09:36 +08001682 int len_used = 0;
1683 struct urb *urb;
1684 u8 *rx_data;
1685 int ret;
1686
hayeswangebc2ec42013-08-14 20:54:38 +08001687 list_del_init(cursor);
hayeswangebc2ec42013-08-14 20:54:38 +08001688
1689 agg = list_entry(cursor, struct rx_agg, list);
1690 urb = agg->urb;
hayeswang0de98f62013-08-16 16:09:35 +08001691 if (urb->actual_length < ETH_ZLEN)
1692 goto submit;
hayeswangebc2ec42013-08-14 20:54:38 +08001693
hayeswangebc2ec42013-08-14 20:54:38 +08001694 rx_desc = agg->head;
1695 rx_data = agg->head;
hayeswang7937f9e2013-11-20 17:30:54 +08001696 len_used += sizeof(struct rx_desc);
hayeswangebc2ec42013-08-14 20:54:38 +08001697
hayeswang7937f9e2013-11-20 17:30:54 +08001698 while (urb->actual_length > len_used) {
hayeswang43a44782013-08-16 16:09:36 +08001699 struct net_device *netdev = tp->netdev;
hayeswang05e0f1a2014-03-06 15:07:18 +08001700 struct net_device_stats *stats = &netdev->stats;
hayeswang7937f9e2013-11-20 17:30:54 +08001701 unsigned int pkt_len;
hayeswang43a44782013-08-16 16:09:36 +08001702 struct sk_buff *skb;
1703
hayeswang7937f9e2013-11-20 17:30:54 +08001704 pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
hayeswangebc2ec42013-08-14 20:54:38 +08001705 if (pkt_len < ETH_ZLEN)
1706 break;
1707
hayeswang7937f9e2013-11-20 17:30:54 +08001708 len_used += pkt_len;
1709 if (urb->actual_length < len_used)
1710 break;
1711
hayeswang8e1f51b2014-01-02 11:22:41 +08001712 pkt_len -= CRC_SIZE;
hayeswangebc2ec42013-08-14 20:54:38 +08001713 rx_data += sizeof(struct rx_desc);
1714
1715 skb = netdev_alloc_skb_ip_align(netdev, pkt_len);
1716 if (!skb) {
1717 stats->rx_dropped++;
hayeswang5e2f7482014-03-07 11:04:37 +08001718 goto find_next_rx;
hayeswangebc2ec42013-08-14 20:54:38 +08001719 }
hayeswang565cab02014-03-07 11:04:38 +08001720
1721 skb->ip_summed = r8152_rx_csum(tp, rx_desc);
hayeswangebc2ec42013-08-14 20:54:38 +08001722 memcpy(skb->data, rx_data, pkt_len);
1723 skb_put(skb, pkt_len);
1724 skb->protocol = eth_type_trans(skb, netdev);
hayeswangc5554292014-09-12 10:43:11 +08001725 rtl_rx_vlan_tag(rx_desc, skb);
hayeswang9d9aafa2014-02-18 21:49:09 +08001726 netif_receive_skb(skb);
hayeswangebc2ec42013-08-14 20:54:38 +08001727 stats->rx_packets++;
1728 stats->rx_bytes += pkt_len;
1729
hayeswang5e2f7482014-03-07 11:04:37 +08001730find_next_rx:
hayeswang8e1f51b2014-01-02 11:22:41 +08001731 rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
hayeswangebc2ec42013-08-14 20:54:38 +08001732 rx_desc = (struct rx_desc *)rx_data;
hayeswangebc2ec42013-08-14 20:54:38 +08001733 len_used = (int)(rx_data - (u8 *)agg->head);
hayeswang7937f9e2013-11-20 17:30:54 +08001734 len_used += sizeof(struct rx_desc);
hayeswangebc2ec42013-08-14 20:54:38 +08001735 }
1736
hayeswang0de98f62013-08-16 16:09:35 +08001737submit:
hayeswangebc2ec42013-08-14 20:54:38 +08001738 ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
hayeswangebc2ec42013-08-14 20:54:38 +08001739 if (ret && ret != -ENODEV) {
hayeswangd84130a2014-02-18 21:49:02 +08001740 spin_lock_irqsave(&tp->rx_lock, flags);
1741 list_add_tail(&agg->list, &tp->rx_done);
1742 spin_unlock_irqrestore(&tp->rx_lock, flags);
hayeswangebc2ec42013-08-14 20:54:38 +08001743 tasklet_schedule(&tp->tl);
1744 }
1745 }
hayeswangebc2ec42013-08-14 20:54:38 +08001746}
1747
1748static void tx_bottom(struct r8152 *tp)
1749{
hayeswangebc2ec42013-08-14 20:54:38 +08001750 int res;
1751
hayeswangb1379d92013-08-16 16:09:37 +08001752 do {
1753 struct tx_agg *agg;
hayeswangebc2ec42013-08-14 20:54:38 +08001754
hayeswangb1379d92013-08-16 16:09:37 +08001755 if (skb_queue_empty(&tp->tx_queue))
hayeswangebc2ec42013-08-14 20:54:38 +08001756 break;
1757
hayeswangb1379d92013-08-16 16:09:37 +08001758 agg = r8152_get_tx_agg(tp);
1759 if (!agg)
hayeswangebc2ec42013-08-14 20:54:38 +08001760 break;
hayeswangb1379d92013-08-16 16:09:37 +08001761
1762 res = r8152_tx_agg_fill(tp, agg);
1763 if (res) {
hayeswang05e0f1a2014-03-06 15:07:18 +08001764 struct net_device *netdev = tp->netdev;
hayeswangb1379d92013-08-16 16:09:37 +08001765
1766 if (res == -ENODEV) {
hayeswang67610492014-10-30 11:46:40 +08001767 set_bit(RTL8152_UNPLUG, &tp->flags);
hayeswangb1379d92013-08-16 16:09:37 +08001768 netif_device_detach(netdev);
1769 } else {
hayeswang05e0f1a2014-03-06 15:07:18 +08001770 struct net_device_stats *stats = &netdev->stats;
1771 unsigned long flags;
1772
hayeswangb1379d92013-08-16 16:09:37 +08001773 netif_warn(tp, tx_err, netdev,
1774 "failed tx_urb %d\n", res);
1775 stats->tx_dropped += agg->skb_num;
hayeswangdb8515e2014-03-06 15:07:16 +08001776
hayeswangb1379d92013-08-16 16:09:37 +08001777 spin_lock_irqsave(&tp->tx_lock, flags);
1778 list_add_tail(&agg->list, &tp->tx_free);
1779 spin_unlock_irqrestore(&tp->tx_lock, flags);
1780 }
hayeswangebc2ec42013-08-14 20:54:38 +08001781 }
hayeswangb1379d92013-08-16 16:09:37 +08001782 } while (res == 0);
hayeswangebc2ec42013-08-14 20:54:38 +08001783}
1784
1785static void bottom_half(unsigned long data)
1786{
1787 struct r8152 *tp;
1788
1789 tp = (struct r8152 *)data;
1790
1791 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1792 return;
1793
1794 if (!test_bit(WORK_ENABLE, &tp->flags))
1795 return;
1796
hayeswang7559fb2f2013-08-16 16:09:38 +08001797 /* When link down, the driver would cancel all bulks. */
1798 /* This avoid the re-submitting bulk */
hayeswangebc2ec42013-08-14 20:54:38 +08001799 if (!netif_carrier_ok(tp->netdev))
1800 return;
1801
1802 rx_bottom(tp);
hayeswang0c3121f2014-03-07 11:04:36 +08001803 tx_bottom(tp);
hayeswangebc2ec42013-08-14 20:54:38 +08001804}
1805
1806static
1807int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1808{
1809 usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
hayeswang52aec122014-09-02 10:27:52 +08001810 agg->head, agg_buf_sz,
hayeswangb209af92014-08-25 15:53:00 +08001811 (usb_complete_t)read_bulk_callback, agg);
hayeswangebc2ec42013-08-14 20:54:38 +08001812
1813 return usb_submit_urb(agg->urb, mem_flags);
hayeswangac718b62013-05-02 16:01:25 +00001814}
1815
hayeswang00a5e362014-02-18 21:48:59 +08001816static void rtl_drop_queued_tx(struct r8152 *tp)
1817{
1818 struct net_device_stats *stats = &tp->netdev->stats;
hayeswangd84130a2014-02-18 21:49:02 +08001819 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
hayeswang00a5e362014-02-18 21:48:59 +08001820 struct sk_buff *skb;
1821
hayeswangd84130a2014-02-18 21:49:02 +08001822 if (skb_queue_empty(tx_queue))
1823 return;
1824
1825 __skb_queue_head_init(&skb_head);
hayeswang2685d412014-03-07 11:04:34 +08001826 spin_lock_bh(&tx_queue->lock);
hayeswangd84130a2014-02-18 21:49:02 +08001827 skb_queue_splice_init(tx_queue, &skb_head);
hayeswang2685d412014-03-07 11:04:34 +08001828 spin_unlock_bh(&tx_queue->lock);
hayeswangd84130a2014-02-18 21:49:02 +08001829
1830 while ((skb = __skb_dequeue(&skb_head))) {
hayeswang00a5e362014-02-18 21:48:59 +08001831 dev_kfree_skb(skb);
1832 stats->tx_dropped++;
1833 }
1834}
1835
hayeswangac718b62013-05-02 16:01:25 +00001836static void rtl8152_tx_timeout(struct net_device *netdev)
1837{
1838 struct r8152 *tp = netdev_priv(netdev);
hayeswangebc2ec42013-08-14 20:54:38 +08001839 int i;
1840
Hayes Wang4a8deae2014-01-07 11:18:22 +08001841 netif_warn(tp, tx_err, netdev, "Tx timeout\n");
hayeswangebc2ec42013-08-14 20:54:38 +08001842 for (i = 0; i < RTL8152_MAX_TX; i++)
1843 usb_unlink_urb(tp->tx_info[i].urb);
hayeswangac718b62013-05-02 16:01:25 +00001844}
1845
1846static void rtl8152_set_rx_mode(struct net_device *netdev)
1847{
1848 struct r8152 *tp = netdev_priv(netdev);
1849
hayeswang40a82912013-08-14 20:54:40 +08001850 if (tp->speed & LINK_STATUS) {
hayeswangac718b62013-05-02 16:01:25 +00001851 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
hayeswang40a82912013-08-14 20:54:40 +08001852 schedule_delayed_work(&tp->schedule, 0);
1853 }
hayeswangac718b62013-05-02 16:01:25 +00001854}
1855
1856static void _rtl8152_set_rx_mode(struct net_device *netdev)
1857{
1858 struct r8152 *tp = netdev_priv(netdev);
hayeswang31787f52013-07-31 17:21:25 +08001859 u32 mc_filter[2]; /* Multicast hash filter */
1860 __le32 tmp[2];
hayeswangac718b62013-05-02 16:01:25 +00001861 u32 ocp_data;
1862
hayeswangac718b62013-05-02 16:01:25 +00001863 clear_bit(RTL8152_SET_RX_MODE, &tp->flags);
1864 netif_stop_queue(netdev);
1865 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1866 ocp_data &= ~RCR_ACPT_ALL;
1867 ocp_data |= RCR_AB | RCR_APM;
1868
1869 if (netdev->flags & IFF_PROMISC) {
1870 /* Unconditionally log net taps. */
1871 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
1872 ocp_data |= RCR_AM | RCR_AAP;
hayeswangb209af92014-08-25 15:53:00 +08001873 mc_filter[1] = 0xffffffff;
1874 mc_filter[0] = 0xffffffff;
hayeswangac718b62013-05-02 16:01:25 +00001875 } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
1876 (netdev->flags & IFF_ALLMULTI)) {
1877 /* Too many to filter perfectly -- accept all multicasts. */
1878 ocp_data |= RCR_AM;
hayeswangb209af92014-08-25 15:53:00 +08001879 mc_filter[1] = 0xffffffff;
1880 mc_filter[0] = 0xffffffff;
hayeswangac718b62013-05-02 16:01:25 +00001881 } else {
1882 struct netdev_hw_addr *ha;
1883
hayeswangb209af92014-08-25 15:53:00 +08001884 mc_filter[1] = 0;
1885 mc_filter[0] = 0;
hayeswangac718b62013-05-02 16:01:25 +00001886 netdev_for_each_mc_addr(ha, netdev) {
1887 int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
hayeswangb209af92014-08-25 15:53:00 +08001888
hayeswangac718b62013-05-02 16:01:25 +00001889 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1890 ocp_data |= RCR_AM;
1891 }
1892 }
1893
hayeswang31787f52013-07-31 17:21:25 +08001894 tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
1895 tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
hayeswangac718b62013-05-02 16:01:25 +00001896
hayeswang31787f52013-07-31 17:21:25 +08001897 pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
hayeswangac718b62013-05-02 16:01:25 +00001898 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1899 netif_wake_queue(netdev);
hayeswangac718b62013-05-02 16:01:25 +00001900}
1901
1902static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
hayeswangb209af92014-08-25 15:53:00 +08001903 struct net_device *netdev)
hayeswangac718b62013-05-02 16:01:25 +00001904{
1905 struct r8152 *tp = netdev_priv(netdev);
hayeswangac718b62013-05-02 16:01:25 +00001906
hayeswangac718b62013-05-02 16:01:25 +00001907 skb_tx_timestamp(skb);
hayeswangebc2ec42013-08-14 20:54:38 +08001908
hayeswang61598782013-11-20 17:30:55 +08001909 skb_queue_tail(&tp->tx_queue, skb);
hayeswangebc2ec42013-08-14 20:54:38 +08001910
hayeswang0c3121f2014-03-07 11:04:36 +08001911 if (!list_empty(&tp->tx_free)) {
1912 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
1913 set_bit(SCHEDULE_TASKLET, &tp->flags);
1914 schedule_delayed_work(&tp->schedule, 0);
1915 } else {
1916 usb_mark_last_busy(tp->udev);
1917 tasklet_schedule(&tp->tl);
1918 }
hayeswangb209af92014-08-25 15:53:00 +08001919 } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
hayeswangdd1b1192013-11-20 17:30:56 +08001920 netif_stop_queue(netdev);
hayeswangb209af92014-08-25 15:53:00 +08001921 }
hayeswangdd1b1192013-11-20 17:30:56 +08001922
hayeswangac718b62013-05-02 16:01:25 +00001923 return NETDEV_TX_OK;
1924}
1925
1926static void r8152b_reset_packet_filter(struct r8152 *tp)
1927{
1928 u32 ocp_data;
1929
1930 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
1931 ocp_data &= ~FMC_FCR_MCU_EN;
1932 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
1933 ocp_data |= FMC_FCR_MCU_EN;
1934 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
1935}
1936
1937static void rtl8152_nic_reset(struct r8152 *tp)
1938{
1939 int i;
1940
1941 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
1942
1943 for (i = 0; i < 1000; i++) {
1944 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
1945 break;
hayeswangb209af92014-08-25 15:53:00 +08001946 usleep_range(100, 400);
hayeswangac718b62013-05-02 16:01:25 +00001947 }
1948}
1949
hayeswangdd1b1192013-11-20 17:30:56 +08001950static void set_tx_qlen(struct r8152 *tp)
1951{
1952 struct net_device *netdev = tp->netdev;
1953
hayeswang52aec122014-09-02 10:27:52 +08001954 tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
1955 sizeof(struct tx_desc));
hayeswangdd1b1192013-11-20 17:30:56 +08001956}
1957
hayeswangac718b62013-05-02 16:01:25 +00001958static inline u8 rtl8152_get_speed(struct r8152 *tp)
1959{
1960 return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
1961}
1962
hayeswang507605a2014-01-02 11:22:43 +08001963static void rtl_set_eee_plus(struct r8152 *tp)
hayeswangac718b62013-05-02 16:01:25 +00001964{
hayeswangebc2ec42013-08-14 20:54:38 +08001965 u32 ocp_data;
hayeswangac718b62013-05-02 16:01:25 +00001966 u8 speed;
1967
1968 speed = rtl8152_get_speed(tp);
hayeswangebc2ec42013-08-14 20:54:38 +08001969 if (speed & _10bps) {
hayeswangac718b62013-05-02 16:01:25 +00001970 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
hayeswangebc2ec42013-08-14 20:54:38 +08001971 ocp_data |= EEEP_CR_EEEP_TX;
hayeswangac718b62013-05-02 16:01:25 +00001972 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
1973 } else {
1974 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
hayeswangebc2ec42013-08-14 20:54:38 +08001975 ocp_data &= ~EEEP_CR_EEEP_TX;
hayeswangac718b62013-05-02 16:01:25 +00001976 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
1977 }
hayeswang507605a2014-01-02 11:22:43 +08001978}
1979
hayeswang00a5e362014-02-18 21:48:59 +08001980static void rxdy_gated_en(struct r8152 *tp, bool enable)
1981{
1982 u32 ocp_data;
1983
1984 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
1985 if (enable)
1986 ocp_data |= RXDY_GATED_EN;
1987 else
1988 ocp_data &= ~RXDY_GATED_EN;
1989 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
1990}
1991
hayeswang445f7f42014-09-23 16:31:47 +08001992static int rtl_start_rx(struct r8152 *tp)
1993{
1994 int i, ret = 0;
1995
1996 INIT_LIST_HEAD(&tp->rx_done);
1997 for (i = 0; i < RTL8152_MAX_RX; i++) {
1998 INIT_LIST_HEAD(&tp->rx_info[i].list);
1999 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2000 if (ret)
2001 break;
2002 }
2003
2004 return ret;
2005}
2006
2007static int rtl_stop_rx(struct r8152 *tp)
2008{
2009 int i;
2010
2011 for (i = 0; i < RTL8152_MAX_RX; i++)
2012 usb_kill_urb(tp->rx_info[i].urb);
2013
2014 return 0;
2015}
2016
hayeswang507605a2014-01-02 11:22:43 +08002017static int rtl_enable(struct r8152 *tp)
2018{
2019 u32 ocp_data;
hayeswangac718b62013-05-02 16:01:25 +00002020
2021 r8152b_reset_packet_filter(tp);
2022
2023 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2024 ocp_data |= CR_RE | CR_TE;
2025 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2026
hayeswang00a5e362014-02-18 21:48:59 +08002027 rxdy_gated_en(tp, false);
hayeswangac718b62013-05-02 16:01:25 +00002028
hayeswang445f7f42014-09-23 16:31:47 +08002029 return rtl_start_rx(tp);
hayeswangac718b62013-05-02 16:01:25 +00002030}
2031
hayeswang507605a2014-01-02 11:22:43 +08002032static int rtl8152_enable(struct r8152 *tp)
2033{
hayeswang68714382014-04-11 17:54:31 +08002034 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2035 return -ENODEV;
2036
hayeswang507605a2014-01-02 11:22:43 +08002037 set_tx_qlen(tp);
2038 rtl_set_eee_plus(tp);
2039
2040 return rtl_enable(tp);
2041}
2042
hayeswang43779f82014-01-02 11:25:10 +08002043static void r8153_set_rx_agg(struct r8152 *tp)
2044{
2045 u8 speed;
2046
2047 speed = rtl8152_get_speed(tp);
2048 if (speed & _1000bps) {
2049 if (tp->udev->speed == USB_SPEED_SUPER) {
2050 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH,
2051 RX_THR_SUPPER);
2052 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2053 EARLY_AGG_SUPPER);
2054 } else {
2055 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH,
2056 RX_THR_HIGH);
2057 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2058 EARLY_AGG_HIGH);
2059 }
2060 } else {
2061 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_SLOW);
2062 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2063 EARLY_AGG_SLOW);
2064 }
2065}
2066
2067static int rtl8153_enable(struct r8152 *tp)
2068{
hayeswang68714382014-04-11 17:54:31 +08002069 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2070 return -ENODEV;
2071
hayeswang43779f82014-01-02 11:25:10 +08002072 set_tx_qlen(tp);
2073 rtl_set_eee_plus(tp);
2074 r8153_set_rx_agg(tp);
2075
2076 return rtl_enable(tp);
2077}
2078
hayeswangd70b1132014-09-19 15:17:18 +08002079static void rtl_disable(struct r8152 *tp)
hayeswangac718b62013-05-02 16:01:25 +00002080{
hayeswangebc2ec42013-08-14 20:54:38 +08002081 u32 ocp_data;
2082 int i;
hayeswangac718b62013-05-02 16:01:25 +00002083
hayeswang68714382014-04-11 17:54:31 +08002084 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2085 rtl_drop_queued_tx(tp);
2086 return;
2087 }
2088
hayeswangac718b62013-05-02 16:01:25 +00002089 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2090 ocp_data &= ~RCR_ACPT_ALL;
2091 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2092
hayeswang00a5e362014-02-18 21:48:59 +08002093 rtl_drop_queued_tx(tp);
hayeswangebc2ec42013-08-14 20:54:38 +08002094
2095 for (i = 0; i < RTL8152_MAX_TX; i++)
2096 usb_kill_urb(tp->tx_info[i].urb);
hayeswangac718b62013-05-02 16:01:25 +00002097
hayeswang00a5e362014-02-18 21:48:59 +08002098 rxdy_gated_en(tp, true);
hayeswangac718b62013-05-02 16:01:25 +00002099
2100 for (i = 0; i < 1000; i++) {
2101 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2102 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2103 break;
hayeswang8ddfa072014-09-09 11:40:28 +08002104 usleep_range(1000, 2000);
hayeswangac718b62013-05-02 16:01:25 +00002105 }
2106
2107 for (i = 0; i < 1000; i++) {
2108 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2109 break;
hayeswang8ddfa072014-09-09 11:40:28 +08002110 usleep_range(1000, 2000);
hayeswangac718b62013-05-02 16:01:25 +00002111 }
2112
hayeswang445f7f42014-09-23 16:31:47 +08002113 rtl_stop_rx(tp);
hayeswangac718b62013-05-02 16:01:25 +00002114
2115 rtl8152_nic_reset(tp);
2116}
2117
hayeswang00a5e362014-02-18 21:48:59 +08002118static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2119{
2120 u32 ocp_data;
2121
2122 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2123 if (enable)
2124 ocp_data |= POWER_CUT;
2125 else
2126 ocp_data &= ~POWER_CUT;
2127 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2128
2129 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2130 ocp_data &= ~RESUME_INDICATE;
2131 ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
hayeswang00a5e362014-02-18 21:48:59 +08002132}
2133
hayeswangc5554292014-09-12 10:43:11 +08002134static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2135{
2136 u32 ocp_data;
2137
2138 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2139 if (enable)
2140 ocp_data |= CPCR_RX_VLAN;
2141 else
2142 ocp_data &= ~CPCR_RX_VLAN;
2143 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2144}
2145
2146static int rtl8152_set_features(struct net_device *dev,
2147 netdev_features_t features)
2148{
2149 netdev_features_t changed = features ^ dev->features;
2150 struct r8152 *tp = netdev_priv(dev);
hayeswang405f8a02014-10-09 18:00:24 +08002151 int ret;
2152
2153 ret = usb_autopm_get_interface(tp->intf);
2154 if (ret < 0)
2155 goto out;
hayeswangc5554292014-09-12 10:43:11 +08002156
hayeswangb5403272014-10-09 18:00:26 +08002157 mutex_lock(&tp->control);
2158
hayeswangc5554292014-09-12 10:43:11 +08002159 if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2160 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2161 rtl_rx_vlan_en(tp, true);
2162 else
2163 rtl_rx_vlan_en(tp, false);
2164 }
2165
hayeswangb5403272014-10-09 18:00:26 +08002166 mutex_unlock(&tp->control);
2167
hayeswang405f8a02014-10-09 18:00:24 +08002168 usb_autopm_put_interface(tp->intf);
2169
2170out:
2171 return ret;
hayeswangc5554292014-09-12 10:43:11 +08002172}
2173
hayeswang21ff2e82014-02-18 21:49:06 +08002174#define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2175
2176static u32 __rtl_get_wol(struct r8152 *tp)
2177{
2178 u32 ocp_data;
2179 u32 wolopts = 0;
2180
2181 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2182 if (!(ocp_data & LAN_WAKE_EN))
2183 return 0;
2184
2185 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2186 if (ocp_data & LINK_ON_WAKE_EN)
2187 wolopts |= WAKE_PHY;
2188
2189 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2190 if (ocp_data & UWF_EN)
2191 wolopts |= WAKE_UCAST;
2192 if (ocp_data & BWF_EN)
2193 wolopts |= WAKE_BCAST;
2194 if (ocp_data & MWF_EN)
2195 wolopts |= WAKE_MCAST;
2196
2197 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2198 if (ocp_data & MAGIC_EN)
2199 wolopts |= WAKE_MAGIC;
2200
2201 return wolopts;
2202}
2203
2204static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2205{
2206 u32 ocp_data;
2207
2208 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2209
2210 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2211 ocp_data &= ~LINK_ON_WAKE_EN;
2212 if (wolopts & WAKE_PHY)
2213 ocp_data |= LINK_ON_WAKE_EN;
2214 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2215
2216 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2217 ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN | LAN_WAKE_EN);
2218 if (wolopts & WAKE_UCAST)
2219 ocp_data |= UWF_EN;
2220 if (wolopts & WAKE_BCAST)
2221 ocp_data |= BWF_EN;
2222 if (wolopts & WAKE_MCAST)
2223 ocp_data |= MWF_EN;
2224 if (wolopts & WAKE_ANY)
2225 ocp_data |= LAN_WAKE_EN;
2226 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2227
2228 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2229
2230 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2231 ocp_data &= ~MAGIC_EN;
2232 if (wolopts & WAKE_MAGIC)
2233 ocp_data |= MAGIC_EN;
2234 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2235
2236 if (wolopts & WAKE_ANY)
2237 device_set_wakeup_enable(&tp->udev->dev, true);
2238 else
2239 device_set_wakeup_enable(&tp->udev->dev, false);
2240}
2241
hayeswang9a4be1b2014-02-18 21:49:07 +08002242static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2243{
2244 if (enable) {
2245 u32 ocp_data;
2246
2247 __rtl_set_wol(tp, WAKE_ANY);
2248
2249 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2250
2251 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2252 ocp_data |= LINK_OFF_WAKE_EN;
2253 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2254
2255 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2256 } else {
2257 __rtl_set_wol(tp, tp->saved_wolopts);
2258 }
2259}
2260
hayeswangaa66a5f2014-02-18 21:49:04 +08002261static void rtl_phy_reset(struct r8152 *tp)
2262{
2263 u16 data;
2264 int i;
2265
2266 clear_bit(PHY_RESET, &tp->flags);
2267
2268 data = r8152_mdio_read(tp, MII_BMCR);
2269
2270 /* don't reset again before the previous one complete */
2271 if (data & BMCR_RESET)
2272 return;
2273
2274 data |= BMCR_RESET;
2275 r8152_mdio_write(tp, MII_BMCR, data);
2276
2277 for (i = 0; i < 50; i++) {
2278 msleep(20);
2279 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2280 break;
2281 }
2282}
2283
hayeswang43499682014-02-18 21:48:58 +08002284static void r8153_teredo_off(struct r8152 *tp)
2285{
2286 u32 ocp_data;
2287
2288 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2289 ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2290 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2291
2292 ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2293 ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2294 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2295}
2296
2297static void r8152b_disable_aldps(struct r8152 *tp)
2298{
2299 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA | DIS_SDSAVE);
2300 msleep(20);
2301}
2302
2303static inline void r8152b_enable_aldps(struct r8152 *tp)
2304{
2305 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2306 LINKENA | DIS_SDSAVE);
2307}
2308
hayeswangd70b1132014-09-19 15:17:18 +08002309static void rtl8152_disable(struct r8152 *tp)
2310{
2311 r8152b_disable_aldps(tp);
2312 rtl_disable(tp);
2313 r8152b_enable_aldps(tp);
2314}
2315
hayeswang43499682014-02-18 21:48:58 +08002316static void r8152b_hw_phy_cfg(struct r8152 *tp)
2317{
hayeswangf0cbe0a2014-02-18 21:49:03 +08002318 u16 data;
2319
2320 data = r8152_mdio_read(tp, MII_BMCR);
2321 if (data & BMCR_PDOWN) {
2322 data &= ~BMCR_PDOWN;
2323 r8152_mdio_write(tp, MII_BMCR, data);
2324 }
2325
hayeswangaa66a5f2014-02-18 21:49:04 +08002326 set_bit(PHY_RESET, &tp->flags);
hayeswang43499682014-02-18 21:48:58 +08002327}
2328
hayeswangac718b62013-05-02 16:01:25 +00002329static void r8152b_exit_oob(struct r8152 *tp)
2330{
hayeswangdb8515e2014-03-06 15:07:16 +08002331 u32 ocp_data;
2332 int i;
hayeswangac718b62013-05-02 16:01:25 +00002333
2334 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2335 ocp_data &= ~RCR_ACPT_ALL;
2336 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2337
hayeswang00a5e362014-02-18 21:48:59 +08002338 rxdy_gated_en(tp, true);
hayeswangda9bd112014-02-18 21:49:08 +08002339 r8153_teredo_off(tp);
hayeswang7e9da482014-02-18 21:49:05 +08002340 r8152b_hw_phy_cfg(tp);
hayeswangac718b62013-05-02 16:01:25 +00002341
2342 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2343 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2344
2345 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2346 ocp_data &= ~NOW_IS_OOB;
2347 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2348
2349 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2350 ocp_data &= ~MCU_BORW_EN;
2351 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2352
2353 for (i = 0; i < 1000; i++) {
2354 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2355 if (ocp_data & LINK_LIST_READY)
2356 break;
hayeswang8ddfa072014-09-09 11:40:28 +08002357 usleep_range(1000, 2000);
hayeswangac718b62013-05-02 16:01:25 +00002358 }
2359
2360 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2361 ocp_data |= RE_INIT_LL;
2362 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2363
2364 for (i = 0; i < 1000; i++) {
2365 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2366 if (ocp_data & LINK_LIST_READY)
2367 break;
hayeswang8ddfa072014-09-09 11:40:28 +08002368 usleep_range(1000, 2000);
hayeswangac718b62013-05-02 16:01:25 +00002369 }
2370
2371 rtl8152_nic_reset(tp);
2372
2373 /* rx share fifo credit full threshold */
2374 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2375
hayeswanga3cc4652014-07-24 16:37:43 +08002376 if (tp->udev->speed == USB_SPEED_FULL ||
2377 tp->udev->speed == USB_SPEED_LOW) {
hayeswangac718b62013-05-02 16:01:25 +00002378 /* rx share fifo credit near full threshold */
2379 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2380 RXFIFO_THR2_FULL);
2381 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2382 RXFIFO_THR3_FULL);
2383 } else {
2384 /* rx share fifo credit near full threshold */
2385 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2386 RXFIFO_THR2_HIGH);
2387 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2388 RXFIFO_THR3_HIGH);
2389 }
2390
2391 /* TX share fifo free credit full threshold */
2392 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2393
2394 ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
hayeswang8e1f51b2014-01-02 11:22:41 +08002395 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
hayeswangac718b62013-05-02 16:01:25 +00002396 ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2397 TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2398
hayeswangc5554292014-09-12 10:43:11 +08002399 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
hayeswangac718b62013-05-02 16:01:25 +00002400
2401 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2402
2403 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2404 ocp_data |= TCR0_AUTO_FIFO;
2405 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2406}
2407
2408static void r8152b_enter_oob(struct r8152 *tp)
2409{
hayeswang45f4a192014-01-06 17:08:41 +08002410 u32 ocp_data;
2411 int i;
hayeswangac718b62013-05-02 16:01:25 +00002412
2413 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2414 ocp_data &= ~NOW_IS_OOB;
2415 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2416
2417 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2418 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2419 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2420
hayeswangd70b1132014-09-19 15:17:18 +08002421 rtl_disable(tp);
hayeswangac718b62013-05-02 16:01:25 +00002422
2423 for (i = 0; i < 1000; i++) {
2424 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2425 if (ocp_data & LINK_LIST_READY)
2426 break;
hayeswang8ddfa072014-09-09 11:40:28 +08002427 usleep_range(1000, 2000);
hayeswangac718b62013-05-02 16:01:25 +00002428 }
2429
2430 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2431 ocp_data |= RE_INIT_LL;
2432 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2433
2434 for (i = 0; i < 1000; i++) {
2435 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2436 if (ocp_data & LINK_LIST_READY)
2437 break;
hayeswang8ddfa072014-09-09 11:40:28 +08002438 usleep_range(1000, 2000);
hayeswangac718b62013-05-02 16:01:25 +00002439 }
2440
2441 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2442
hayeswangc5554292014-09-12 10:43:11 +08002443 rtl_rx_vlan_en(tp, true);
hayeswangac718b62013-05-02 16:01:25 +00002444
2445 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2446 ocp_data |= ALDPS_PROXY_MODE;
2447 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2448
2449 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2450 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2451 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2452
hayeswang00a5e362014-02-18 21:48:59 +08002453 rxdy_gated_en(tp, false);
hayeswangac718b62013-05-02 16:01:25 +00002454
2455 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2456 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2457 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2458}
2459
hayeswang43779f82014-01-02 11:25:10 +08002460static void r8153_hw_phy_cfg(struct r8152 *tp)
2461{
2462 u32 ocp_data;
2463 u16 data;
2464
2465 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
hayeswangf0cbe0a2014-02-18 21:49:03 +08002466 data = r8152_mdio_read(tp, MII_BMCR);
2467 if (data & BMCR_PDOWN) {
2468 data &= ~BMCR_PDOWN;
2469 r8152_mdio_write(tp, MII_BMCR, data);
2470 }
hayeswang43779f82014-01-02 11:25:10 +08002471
2472 if (tp->version == RTL_VER_03) {
2473 data = ocp_reg_read(tp, OCP_EEE_CFG);
2474 data &= ~CTAP_SHORT_EN;
2475 ocp_reg_write(tp, OCP_EEE_CFG, data);
2476 }
2477
2478 data = ocp_reg_read(tp, OCP_POWER_CFG);
2479 data |= EEE_CLKDIV_EN;
2480 ocp_reg_write(tp, OCP_POWER_CFG, data);
2481
2482 data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2483 data |= EN_10M_BGOFF;
2484 ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2485 data = ocp_reg_read(tp, OCP_POWER_CFG);
2486 data |= EN_10M_PLLOFF;
2487 ocp_reg_write(tp, OCP_POWER_CFG, data);
2488 data = sram_read(tp, SRAM_IMPEDANCE);
2489 data &= ~RX_DRIVING_MASK;
2490 sram_write(tp, SRAM_IMPEDANCE, data);
2491
2492 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2493 ocp_data |= PFM_PWM_SWITCH;
2494 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2495
2496 data = sram_read(tp, SRAM_LPF_CFG);
2497 data |= LPF_AUTO_TUNE;
2498 sram_write(tp, SRAM_LPF_CFG, data);
2499
2500 data = sram_read(tp, SRAM_10M_AMP1);
2501 data |= GDAC_IB_UPALL;
2502 sram_write(tp, SRAM_10M_AMP1, data);
2503 data = sram_read(tp, SRAM_10M_AMP2);
2504 data |= AMP_DN;
2505 sram_write(tp, SRAM_10M_AMP2, data);
hayeswangaa66a5f2014-02-18 21:49:04 +08002506
2507 set_bit(PHY_RESET, &tp->flags);
hayeswang43779f82014-01-02 11:25:10 +08002508}
2509
hayeswangb9702722014-02-18 21:49:00 +08002510static void r8153_u1u2en(struct r8152 *tp, bool enable)
hayeswang43779f82014-01-02 11:25:10 +08002511{
2512 u8 u1u2[8];
2513
2514 if (enable)
2515 memset(u1u2, 0xff, sizeof(u1u2));
2516 else
2517 memset(u1u2, 0x00, sizeof(u1u2));
2518
2519 usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2520}
2521
hayeswangb9702722014-02-18 21:49:00 +08002522static void r8153_u2p3en(struct r8152 *tp, bool enable)
hayeswang43779f82014-01-02 11:25:10 +08002523{
2524 u32 ocp_data;
2525
2526 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2527 if (enable)
2528 ocp_data |= U2P3_ENABLE;
2529 else
2530 ocp_data &= ~U2P3_ENABLE;
2531 ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2532}
2533
hayeswangb9702722014-02-18 21:49:00 +08002534static void r8153_power_cut_en(struct r8152 *tp, bool enable)
hayeswang43779f82014-01-02 11:25:10 +08002535{
2536 u32 ocp_data;
2537
2538 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2539 if (enable)
2540 ocp_data |= PWR_EN | PHASE2_EN;
2541 else
2542 ocp_data &= ~(PWR_EN | PHASE2_EN);
2543 ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2544
2545 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2546 ocp_data &= ~PCUT_STATUS;
2547 ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2548}
2549
hayeswang43779f82014-01-02 11:25:10 +08002550static void r8153_first_init(struct r8152 *tp)
2551{
2552 u32 ocp_data;
2553 int i;
2554
hayeswang00a5e362014-02-18 21:48:59 +08002555 rxdy_gated_en(tp, true);
hayeswang43779f82014-01-02 11:25:10 +08002556 r8153_teredo_off(tp);
2557
2558 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2559 ocp_data &= ~RCR_ACPT_ALL;
2560 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2561
2562 r8153_hw_phy_cfg(tp);
2563
2564 rtl8152_nic_reset(tp);
2565
2566 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2567 ocp_data &= ~NOW_IS_OOB;
2568 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2569
2570 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2571 ocp_data &= ~MCU_BORW_EN;
2572 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2573
2574 for (i = 0; i < 1000; i++) {
2575 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2576 if (ocp_data & LINK_LIST_READY)
2577 break;
hayeswang8ddfa072014-09-09 11:40:28 +08002578 usleep_range(1000, 2000);
hayeswang43779f82014-01-02 11:25:10 +08002579 }
2580
2581 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2582 ocp_data |= RE_INIT_LL;
2583 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2584
2585 for (i = 0; i < 1000; i++) {
2586 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2587 if (ocp_data & LINK_LIST_READY)
2588 break;
hayeswang8ddfa072014-09-09 11:40:28 +08002589 usleep_range(1000, 2000);
hayeswang43779f82014-01-02 11:25:10 +08002590 }
2591
hayeswangc5554292014-09-12 10:43:11 +08002592 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
hayeswang43779f82014-01-02 11:25:10 +08002593
hayeswang69b4b7a2014-07-10 10:58:54 +08002594 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2595 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
hayeswang43779f82014-01-02 11:25:10 +08002596
2597 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2598 ocp_data |= TCR0_AUTO_FIFO;
2599 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2600
2601 rtl8152_nic_reset(tp);
2602
2603 /* rx share fifo credit full threshold */
2604 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2605 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2606 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2607 /* TX share fifo free credit full threshold */
2608 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2609
hayeswang9629e3c2014-01-15 10:42:15 +08002610 /* rx aggregation */
hayeswang43779f82014-01-02 11:25:10 +08002611 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2612 ocp_data &= ~RX_AGG_DISABLE;
2613 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2614}
2615
2616static void r8153_enter_oob(struct r8152 *tp)
2617{
2618 u32 ocp_data;
2619 int i;
2620
2621 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2622 ocp_data &= ~NOW_IS_OOB;
2623 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2624
hayeswangd70b1132014-09-19 15:17:18 +08002625 rtl_disable(tp);
hayeswang43779f82014-01-02 11:25:10 +08002626
2627 for (i = 0; i < 1000; i++) {
2628 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2629 if (ocp_data & LINK_LIST_READY)
2630 break;
hayeswang8ddfa072014-09-09 11:40:28 +08002631 usleep_range(1000, 2000);
hayeswang43779f82014-01-02 11:25:10 +08002632 }
2633
2634 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2635 ocp_data |= RE_INIT_LL;
2636 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2637
2638 for (i = 0; i < 1000; i++) {
2639 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2640 if (ocp_data & LINK_LIST_READY)
2641 break;
hayeswang8ddfa072014-09-09 11:40:28 +08002642 usleep_range(1000, 2000);
hayeswang43779f82014-01-02 11:25:10 +08002643 }
2644
hayeswang69b4b7a2014-07-10 10:58:54 +08002645 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
hayeswang43779f82014-01-02 11:25:10 +08002646
hayeswang43779f82014-01-02 11:25:10 +08002647 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2648 ocp_data &= ~TEREDO_WAKE_MASK;
2649 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2650
hayeswangc5554292014-09-12 10:43:11 +08002651 rtl_rx_vlan_en(tp, true);
hayeswang43779f82014-01-02 11:25:10 +08002652
2653 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2654 ocp_data |= ALDPS_PROXY_MODE;
2655 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2656
2657 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2658 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2659 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2660
hayeswang00a5e362014-02-18 21:48:59 +08002661 rxdy_gated_en(tp, false);
hayeswang43779f82014-01-02 11:25:10 +08002662
2663 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2664 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2665 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2666}
2667
2668static void r8153_disable_aldps(struct r8152 *tp)
2669{
2670 u16 data;
2671
2672 data = ocp_reg_read(tp, OCP_POWER_CFG);
2673 data &= ~EN_ALDPS;
2674 ocp_reg_write(tp, OCP_POWER_CFG, data);
2675 msleep(20);
2676}
2677
2678static void r8153_enable_aldps(struct r8152 *tp)
2679{
2680 u16 data;
2681
2682 data = ocp_reg_read(tp, OCP_POWER_CFG);
2683 data |= EN_ALDPS;
2684 ocp_reg_write(tp, OCP_POWER_CFG, data);
2685}
2686
hayeswangd70b1132014-09-19 15:17:18 +08002687static void rtl8153_disable(struct r8152 *tp)
2688{
2689 r8153_disable_aldps(tp);
2690 rtl_disable(tp);
2691 r8153_enable_aldps(tp);
2692}
2693
hayeswangac718b62013-05-02 16:01:25 +00002694static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2695{
hayeswang43779f82014-01-02 11:25:10 +08002696 u16 bmcr, anar, gbcr;
hayeswangac718b62013-05-02 16:01:25 +00002697 int ret = 0;
2698
2699 cancel_delayed_work_sync(&tp->schedule);
2700 anar = r8152_mdio_read(tp, MII_ADVERTISE);
2701 anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2702 ADVERTISE_100HALF | ADVERTISE_100FULL);
hayeswang43779f82014-01-02 11:25:10 +08002703 if (tp->mii.supports_gmii) {
2704 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
2705 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
2706 } else {
2707 gbcr = 0;
2708 }
hayeswangac718b62013-05-02 16:01:25 +00002709
2710 if (autoneg == AUTONEG_DISABLE) {
2711 if (speed == SPEED_10) {
2712 bmcr = 0;
2713 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2714 } else if (speed == SPEED_100) {
2715 bmcr = BMCR_SPEED100;
2716 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
hayeswang43779f82014-01-02 11:25:10 +08002717 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2718 bmcr = BMCR_SPEED1000;
2719 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
hayeswangac718b62013-05-02 16:01:25 +00002720 } else {
2721 ret = -EINVAL;
2722 goto out;
2723 }
2724
2725 if (duplex == DUPLEX_FULL)
2726 bmcr |= BMCR_FULLDPLX;
2727 } else {
2728 if (speed == SPEED_10) {
2729 if (duplex == DUPLEX_FULL)
2730 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2731 else
2732 anar |= ADVERTISE_10HALF;
2733 } else if (speed == SPEED_100) {
2734 if (duplex == DUPLEX_FULL) {
2735 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2736 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2737 } else {
2738 anar |= ADVERTISE_10HALF;
2739 anar |= ADVERTISE_100HALF;
2740 }
hayeswang43779f82014-01-02 11:25:10 +08002741 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2742 if (duplex == DUPLEX_FULL) {
2743 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2744 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2745 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2746 } else {
2747 anar |= ADVERTISE_10HALF;
2748 anar |= ADVERTISE_100HALF;
2749 gbcr |= ADVERTISE_1000HALF;
2750 }
hayeswangac718b62013-05-02 16:01:25 +00002751 } else {
2752 ret = -EINVAL;
2753 goto out;
2754 }
2755
2756 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
2757 }
2758
hayeswangaa66a5f2014-02-18 21:49:04 +08002759 if (test_bit(PHY_RESET, &tp->flags))
2760 bmcr |= BMCR_RESET;
2761
hayeswang43779f82014-01-02 11:25:10 +08002762 if (tp->mii.supports_gmii)
2763 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
2764
hayeswangac718b62013-05-02 16:01:25 +00002765 r8152_mdio_write(tp, MII_ADVERTISE, anar);
2766 r8152_mdio_write(tp, MII_BMCR, bmcr);
2767
hayeswangaa66a5f2014-02-18 21:49:04 +08002768 if (test_bit(PHY_RESET, &tp->flags)) {
2769 int i;
2770
2771 clear_bit(PHY_RESET, &tp->flags);
2772 for (i = 0; i < 50; i++) {
2773 msleep(20);
2774 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2775 break;
2776 }
2777 }
2778
hayeswangac718b62013-05-02 16:01:25 +00002779out:
hayeswangac718b62013-05-02 16:01:25 +00002780
2781 return ret;
2782}
2783
hayeswangd70b1132014-09-19 15:17:18 +08002784static void rtl8152_up(struct r8152 *tp)
2785{
2786 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2787 return;
2788
2789 r8152b_disable_aldps(tp);
2790 r8152b_exit_oob(tp);
2791 r8152b_enable_aldps(tp);
2792}
2793
hayeswangac718b62013-05-02 16:01:25 +00002794static void rtl8152_down(struct r8152 *tp)
2795{
hayeswang68714382014-04-11 17:54:31 +08002796 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2797 rtl_drop_queued_tx(tp);
2798 return;
2799 }
2800
hayeswang00a5e362014-02-18 21:48:59 +08002801 r8152_power_cut_en(tp, false);
hayeswangac718b62013-05-02 16:01:25 +00002802 r8152b_disable_aldps(tp);
2803 r8152b_enter_oob(tp);
2804 r8152b_enable_aldps(tp);
2805}
2806
hayeswangd70b1132014-09-19 15:17:18 +08002807static void rtl8153_up(struct r8152 *tp)
2808{
2809 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2810 return;
2811
2812 r8153_disable_aldps(tp);
2813 r8153_first_init(tp);
2814 r8153_enable_aldps(tp);
2815}
2816
hayeswang43779f82014-01-02 11:25:10 +08002817static void rtl8153_down(struct r8152 *tp)
2818{
hayeswang68714382014-04-11 17:54:31 +08002819 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2820 rtl_drop_queued_tx(tp);
2821 return;
2822 }
2823
hayeswangb9702722014-02-18 21:49:00 +08002824 r8153_u1u2en(tp, false);
2825 r8153_power_cut_en(tp, false);
hayeswang43779f82014-01-02 11:25:10 +08002826 r8153_disable_aldps(tp);
2827 r8153_enter_oob(tp);
2828 r8153_enable_aldps(tp);
2829}
2830
hayeswangac718b62013-05-02 16:01:25 +00002831static void set_carrier(struct r8152 *tp)
2832{
2833 struct net_device *netdev = tp->netdev;
2834 u8 speed;
2835
hayeswang40a82912013-08-14 20:54:40 +08002836 clear_bit(RTL8152_LINK_CHG, &tp->flags);
hayeswangac718b62013-05-02 16:01:25 +00002837 speed = rtl8152_get_speed(tp);
2838
2839 if (speed & LINK_STATUS) {
2840 if (!(tp->speed & LINK_STATUS)) {
hayeswangc81229c2014-01-02 11:22:42 +08002841 tp->rtl_ops.enable(tp);
hayeswangac718b62013-05-02 16:01:25 +00002842 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2843 netif_carrier_on(netdev);
2844 }
2845 } else {
2846 if (tp->speed & LINK_STATUS) {
2847 netif_carrier_off(netdev);
hayeswangebc2ec42013-08-14 20:54:38 +08002848 tasklet_disable(&tp->tl);
hayeswangc81229c2014-01-02 11:22:42 +08002849 tp->rtl_ops.disable(tp);
hayeswangebc2ec42013-08-14 20:54:38 +08002850 tasklet_enable(&tp->tl);
hayeswangac718b62013-05-02 16:01:25 +00002851 }
2852 }
2853 tp->speed = speed;
2854}
2855
2856static void rtl_work_func_t(struct work_struct *work)
2857{
2858 struct r8152 *tp = container_of(work, struct r8152, schedule.work);
2859
hayeswang9a4be1b2014-02-18 21:49:07 +08002860 if (usb_autopm_get_interface(tp->intf) < 0)
2861 return;
2862
hayeswangac718b62013-05-02 16:01:25 +00002863 if (!test_bit(WORK_ENABLE, &tp->flags))
2864 goto out1;
2865
2866 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2867 goto out1;
2868
hayeswangb5403272014-10-09 18:00:26 +08002869 if (!mutex_trylock(&tp->control)) {
2870 schedule_delayed_work(&tp->schedule, 0);
2871 goto out1;
2872 }
2873
hayeswang40a82912013-08-14 20:54:40 +08002874 if (test_bit(RTL8152_LINK_CHG, &tp->flags))
2875 set_carrier(tp);
hayeswangac718b62013-05-02 16:01:25 +00002876
2877 if (test_bit(RTL8152_SET_RX_MODE, &tp->flags))
2878 _rtl8152_set_rx_mode(tp->netdev);
2879
hayeswang0c3121f2014-03-07 11:04:36 +08002880 if (test_bit(SCHEDULE_TASKLET, &tp->flags) &&
2881 (tp->speed & LINK_STATUS)) {
2882 clear_bit(SCHEDULE_TASKLET, &tp->flags);
2883 tasklet_schedule(&tp->tl);
2884 }
hayeswangaa66a5f2014-02-18 21:49:04 +08002885
2886 if (test_bit(PHY_RESET, &tp->flags))
2887 rtl_phy_reset(tp);
2888
hayeswangb5403272014-10-09 18:00:26 +08002889 mutex_unlock(&tp->control);
2890
hayeswangac718b62013-05-02 16:01:25 +00002891out1:
hayeswang9a4be1b2014-02-18 21:49:07 +08002892 usb_autopm_put_interface(tp->intf);
hayeswangac718b62013-05-02 16:01:25 +00002893}
2894
2895static int rtl8152_open(struct net_device *netdev)
2896{
2897 struct r8152 *tp = netdev_priv(netdev);
2898 int res = 0;
2899
hayeswang7e9da482014-02-18 21:49:05 +08002900 res = alloc_all_mem(tp);
2901 if (res)
2902 goto out;
2903
hayeswang9a4be1b2014-02-18 21:49:07 +08002904 res = usb_autopm_get_interface(tp->intf);
2905 if (res < 0) {
2906 free_all_mem(tp);
2907 goto out;
2908 }
2909
hayeswangb5403272014-10-09 18:00:26 +08002910 mutex_lock(&tp->control);
2911
hayeswang9a4be1b2014-02-18 21:49:07 +08002912 /* The WORK_ENABLE may be set when autoresume occurs */
2913 if (test_bit(WORK_ENABLE, &tp->flags)) {
2914 clear_bit(WORK_ENABLE, &tp->flags);
2915 usb_kill_urb(tp->intr_urb);
2916 cancel_delayed_work_sync(&tp->schedule);
2917 if (tp->speed & LINK_STATUS)
2918 tp->rtl_ops.disable(tp);
2919 }
2920
hayeswang7e9da482014-02-18 21:49:05 +08002921 tp->rtl_ops.up(tp);
2922
hayeswang43779f82014-01-02 11:25:10 +08002923 rtl8152_set_speed(tp, AUTONEG_ENABLE,
2924 tp->mii.supports_gmii ? SPEED_1000 : SPEED_100,
2925 DUPLEX_FULL);
hayeswang40a82912013-08-14 20:54:40 +08002926 tp->speed = 0;
2927 netif_carrier_off(netdev);
hayeswangac718b62013-05-02 16:01:25 +00002928 netif_start_queue(netdev);
2929 set_bit(WORK_ENABLE, &tp->flags);
hayeswangdb8515e2014-03-06 15:07:16 +08002930
hayeswang3d55f442014-02-06 11:55:48 +08002931 res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
2932 if (res) {
2933 if (res == -ENODEV)
2934 netif_device_detach(tp->netdev);
2935 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
2936 res);
hayeswang7e9da482014-02-18 21:49:05 +08002937 free_all_mem(tp);
hayeswang3d55f442014-02-06 11:55:48 +08002938 }
2939
hayeswangb5403272014-10-09 18:00:26 +08002940 mutex_unlock(&tp->control);
2941
hayeswang9a4be1b2014-02-18 21:49:07 +08002942 usb_autopm_put_interface(tp->intf);
hayeswangac718b62013-05-02 16:01:25 +00002943
hayeswang7e9da482014-02-18 21:49:05 +08002944out:
hayeswangac718b62013-05-02 16:01:25 +00002945 return res;
2946}
2947
2948static int rtl8152_close(struct net_device *netdev)
2949{
2950 struct r8152 *tp = netdev_priv(netdev);
2951 int res = 0;
2952
2953 clear_bit(WORK_ENABLE, &tp->flags);
hayeswang3d55f442014-02-06 11:55:48 +08002954 usb_kill_urb(tp->intr_urb);
hayeswangac718b62013-05-02 16:01:25 +00002955 cancel_delayed_work_sync(&tp->schedule);
2956 netif_stop_queue(netdev);
hayeswang9a4be1b2014-02-18 21:49:07 +08002957
2958 res = usb_autopm_get_interface(tp->intf);
2959 if (res < 0) {
2960 rtl_drop_queued_tx(tp);
2961 } else {
hayeswangb5403272014-10-09 18:00:26 +08002962 mutex_lock(&tp->control);
2963
hayeswangb209af92014-08-25 15:53:00 +08002964 /* The autosuspend may have been enabled and wouldn't
hayeswang9a4be1b2014-02-18 21:49:07 +08002965 * be disable when autoresume occurs, because the
2966 * netif_running() would be false.
2967 */
2968 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2969 rtl_runtime_suspend_enable(tp, false);
2970 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
2971 }
2972
2973 tasklet_disable(&tp->tl);
2974 tp->rtl_ops.down(tp);
2975 tasklet_enable(&tp->tl);
hayeswangb5403272014-10-09 18:00:26 +08002976
2977 mutex_unlock(&tp->control);
2978
hayeswang9a4be1b2014-02-18 21:49:07 +08002979 usb_autopm_put_interface(tp->intf);
2980 }
hayeswangac718b62013-05-02 16:01:25 +00002981
hayeswang7e9da482014-02-18 21:49:05 +08002982 free_all_mem(tp);
2983
hayeswangac718b62013-05-02 16:01:25 +00002984 return res;
2985}
2986
hayeswangd24f6132014-09-25 20:54:01 +08002987static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
hayeswangac718b62013-05-02 16:01:25 +00002988{
hayeswangd24f6132014-09-25 20:54:01 +08002989 ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
2990 ocp_reg_write(tp, OCP_EEE_DATA, reg);
2991 ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
2992}
2993
2994static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
2995{
2996 u16 data;
2997
2998 r8152_mmd_indirect(tp, dev, reg);
2999 data = ocp_reg_read(tp, OCP_EEE_DATA);
3000 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3001
3002 return data;
3003}
3004
3005static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
3006{
3007 r8152_mmd_indirect(tp, dev, reg);
3008 ocp_reg_write(tp, OCP_EEE_DATA, data);
3009 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3010}
3011
3012static void r8152_eee_en(struct r8152 *tp, bool enable)
3013{
3014 u16 config1, config2, config3;
hayeswang45f4a192014-01-06 17:08:41 +08003015 u32 ocp_data;
hayeswangac718b62013-05-02 16:01:25 +00003016
3017 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
hayeswangd24f6132014-09-25 20:54:01 +08003018 config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
3019 config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
3020 config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
3021
3022 if (enable) {
3023 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3024 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
3025 config1 |= sd_rise_time(1);
3026 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
3027 config3 |= fast_snr(42);
3028 } else {
3029 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3030 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
3031 RX_QUIET_EN);
3032 config1 |= sd_rise_time(7);
3033 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
3034 config3 |= fast_snr(511);
3035 }
3036
hayeswangac718b62013-05-02 16:01:25 +00003037 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
hayeswangd24f6132014-09-25 20:54:01 +08003038 ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
3039 ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
3040 ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
3041}
3042
3043static void r8152b_enable_eee(struct r8152 *tp)
3044{
3045 r8152_eee_en(tp, true);
3046 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
3047}
3048
3049static void r8153_eee_en(struct r8152 *tp, bool enable)
3050{
3051 u32 ocp_data;
3052 u16 config;
3053
3054 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3055 config = ocp_reg_read(tp, OCP_EEE_CFG);
3056
3057 if (enable) {
3058 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3059 config |= EEE10_EN;
3060 } else {
3061 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3062 config &= ~EEE10_EN;
3063 }
3064
3065 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3066 ocp_reg_write(tp, OCP_EEE_CFG, config);
hayeswangac718b62013-05-02 16:01:25 +00003067}
3068
hayeswang43779f82014-01-02 11:25:10 +08003069static void r8153_enable_eee(struct r8152 *tp)
3070{
hayeswangd24f6132014-09-25 20:54:01 +08003071 r8153_eee_en(tp, true);
3072 ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
hayeswang43779f82014-01-02 11:25:10 +08003073}
3074
hayeswangac718b62013-05-02 16:01:25 +00003075static void r8152b_enable_fc(struct r8152 *tp)
3076{
3077 u16 anar;
3078
3079 anar = r8152_mdio_read(tp, MII_ADVERTISE);
3080 anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
3081 r8152_mdio_write(tp, MII_ADVERTISE, anar);
3082}
3083
hayeswang4f1d4d52014-03-11 16:24:19 +08003084static void rtl_tally_reset(struct r8152 *tp)
3085{
3086 u32 ocp_data;
3087
3088 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3089 ocp_data |= TALLY_RESET;
3090 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3091}
3092
hayeswangac718b62013-05-02 16:01:25 +00003093static void r8152b_init(struct r8152 *tp)
3094{
hayeswangebc2ec42013-08-14 20:54:38 +08003095 u32 ocp_data;
hayeswangac718b62013-05-02 16:01:25 +00003096
hayeswang68714382014-04-11 17:54:31 +08003097 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3098 return;
3099
hayeswangd70b1132014-09-19 15:17:18 +08003100 r8152b_disable_aldps(tp);
3101
hayeswangac718b62013-05-02 16:01:25 +00003102 if (tp->version == RTL_VER_01) {
3103 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3104 ocp_data &= ~LED_MODE_MASK;
3105 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3106 }
3107
hayeswang00a5e362014-02-18 21:48:59 +08003108 r8152_power_cut_en(tp, false);
hayeswangac718b62013-05-02 16:01:25 +00003109
hayeswangac718b62013-05-02 16:01:25 +00003110 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3111 ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3112 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3113 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3114 ocp_data &= ~MCU_CLK_RATIO_MASK;
3115 ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3116 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3117 ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3118 SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3119 ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3120
3121 r8152b_enable_eee(tp);
3122 r8152b_enable_aldps(tp);
3123 r8152b_enable_fc(tp);
hayeswang4f1d4d52014-03-11 16:24:19 +08003124 rtl_tally_reset(tp);
hayeswangac718b62013-05-02 16:01:25 +00003125
hayeswangebc2ec42013-08-14 20:54:38 +08003126 /* enable rx aggregation */
hayeswangac718b62013-05-02 16:01:25 +00003127 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
hayeswangebc2ec42013-08-14 20:54:38 +08003128 ocp_data &= ~RX_AGG_DISABLE;
hayeswangac718b62013-05-02 16:01:25 +00003129 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3130}
3131
hayeswang43779f82014-01-02 11:25:10 +08003132static void r8153_init(struct r8152 *tp)
3133{
3134 u32 ocp_data;
3135 int i;
3136
hayeswang68714382014-04-11 17:54:31 +08003137 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3138 return;
3139
hayeswangd70b1132014-09-19 15:17:18 +08003140 r8153_disable_aldps(tp);
hayeswangb9702722014-02-18 21:49:00 +08003141 r8153_u1u2en(tp, false);
hayeswang43779f82014-01-02 11:25:10 +08003142
3143 for (i = 0; i < 500; i++) {
3144 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3145 AUTOLOAD_DONE)
3146 break;
3147 msleep(20);
3148 }
3149
3150 for (i = 0; i < 500; i++) {
3151 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3152 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3153 break;
3154 msleep(20);
3155 }
3156
hayeswangb9702722014-02-18 21:49:00 +08003157 r8153_u2p3en(tp, false);
hayeswang43779f82014-01-02 11:25:10 +08003158
3159 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3160 ocp_data &= ~TIMER11_EN;
3161 ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3162
hayeswang43779f82014-01-02 11:25:10 +08003163 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3164 ocp_data &= ~LED_MODE_MASK;
3165 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3166
3167 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL);
3168 ocp_data &= ~LPM_TIMER_MASK;
3169 if (tp->udev->speed == USB_SPEED_SUPER)
3170 ocp_data |= LPM_TIMER_500US;
3171 else
3172 ocp_data |= LPM_TIMER_500MS;
3173 ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3174
3175 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3176 ocp_data &= ~SEN_VAL_MASK;
3177 ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3178 ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3179
hayeswangb9702722014-02-18 21:49:00 +08003180 r8153_power_cut_en(tp, false);
3181 r8153_u1u2en(tp, true);
hayeswang43779f82014-01-02 11:25:10 +08003182
hayeswang43779f82014-01-02 11:25:10 +08003183 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ALDPS_SPDWN_RATIO);
3184 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, EEE_SPDWN_RATIO);
3185 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3,
3186 PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN |
3187 U1U2_SPDWN_EN | L1_SPDWN_EN);
3188 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4,
3189 PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN |
3190 TP100_SPDWN_EN | TP500_SPDWN_EN | TP1000_SPDWN_EN |
3191 EEE_SPDWN_EN);
3192
3193 r8153_enable_eee(tp);
3194 r8153_enable_aldps(tp);
3195 r8152b_enable_fc(tp);
hayeswang4f1d4d52014-03-11 16:24:19 +08003196 rtl_tally_reset(tp);
hayeswang43779f82014-01-02 11:25:10 +08003197}
3198
hayeswangac718b62013-05-02 16:01:25 +00003199static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3200{
3201 struct r8152 *tp = usb_get_intfdata(intf);
hayeswang6cc69f22014-10-17 16:55:08 +08003202 struct net_device *netdev = tp->netdev;
3203 int ret = 0;
hayeswangac718b62013-05-02 16:01:25 +00003204
hayeswangb5403272014-10-09 18:00:26 +08003205 mutex_lock(&tp->control);
3206
hayeswang6cc69f22014-10-17 16:55:08 +08003207 if (PMSG_IS_AUTO(message)) {
3208 if (netif_running(netdev) && work_busy(&tp->schedule.work)) {
3209 ret = -EBUSY;
3210 goto out1;
3211 }
hayeswangac718b62013-05-02 16:01:25 +00003212
hayeswang6cc69f22014-10-17 16:55:08 +08003213 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3214 } else {
3215 netif_device_detach(netdev);
3216 }
3217
3218 if (netif_running(netdev)) {
hayeswangac718b62013-05-02 16:01:25 +00003219 clear_bit(WORK_ENABLE, &tp->flags);
hayeswang40a82912013-08-14 20:54:40 +08003220 usb_kill_urb(tp->intr_urb);
hayeswang445f7f42014-09-23 16:31:47 +08003221 tasklet_disable(&tp->tl);
hayeswang9a4be1b2014-02-18 21:49:07 +08003222 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
hayeswang445f7f42014-09-23 16:31:47 +08003223 rtl_stop_rx(tp);
hayeswang9a4be1b2014-02-18 21:49:07 +08003224 rtl_runtime_suspend_enable(tp, true);
3225 } else {
hayeswang6cc69f22014-10-17 16:55:08 +08003226 cancel_delayed_work_sync(&tp->schedule);
hayeswang9a4be1b2014-02-18 21:49:07 +08003227 tp->rtl_ops.down(tp);
hayeswang9a4be1b2014-02-18 21:49:07 +08003228 }
hayeswang445f7f42014-09-23 16:31:47 +08003229 tasklet_enable(&tp->tl);
hayeswangac718b62013-05-02 16:01:25 +00003230 }
hayeswang6cc69f22014-10-17 16:55:08 +08003231out1:
hayeswangb5403272014-10-09 18:00:26 +08003232 mutex_unlock(&tp->control);
3233
hayeswang6cc69f22014-10-17 16:55:08 +08003234 return ret;
hayeswangac718b62013-05-02 16:01:25 +00003235}
3236
3237static int rtl8152_resume(struct usb_interface *intf)
3238{
3239 struct r8152 *tp = usb_get_intfdata(intf);
3240
hayeswangb5403272014-10-09 18:00:26 +08003241 mutex_lock(&tp->control);
3242
hayeswang9a4be1b2014-02-18 21:49:07 +08003243 if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3244 tp->rtl_ops.init(tp);
3245 netif_device_attach(tp->netdev);
3246 }
3247
hayeswangac718b62013-05-02 16:01:25 +00003248 if (netif_running(tp->netdev)) {
hayeswang9a4be1b2014-02-18 21:49:07 +08003249 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3250 rtl_runtime_suspend_enable(tp, false);
3251 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
hayeswang445f7f42014-09-23 16:31:47 +08003252 set_bit(WORK_ENABLE, &tp->flags);
hayeswang9a4be1b2014-02-18 21:49:07 +08003253 if (tp->speed & LINK_STATUS)
hayeswang445f7f42014-09-23 16:31:47 +08003254 rtl_start_rx(tp);
hayeswang9a4be1b2014-02-18 21:49:07 +08003255 } else {
3256 tp->rtl_ops.up(tp);
3257 rtl8152_set_speed(tp, AUTONEG_ENABLE,
hayeswangb209af92014-08-25 15:53:00 +08003258 tp->mii.supports_gmii ?
3259 SPEED_1000 : SPEED_100,
3260 DUPLEX_FULL);
hayeswang445f7f42014-09-23 16:31:47 +08003261 tp->speed = 0;
3262 netif_carrier_off(tp->netdev);
3263 set_bit(WORK_ENABLE, &tp->flags);
hayeswang9a4be1b2014-02-18 21:49:07 +08003264 }
hayeswang40a82912013-08-14 20:54:40 +08003265 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
hayeswangac718b62013-05-02 16:01:25 +00003266 }
3267
hayeswangb5403272014-10-09 18:00:26 +08003268 mutex_unlock(&tp->control);
3269
hayeswangac718b62013-05-02 16:01:25 +00003270 return 0;
3271}
3272
hayeswang21ff2e82014-02-18 21:49:06 +08003273static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3274{
3275 struct r8152 *tp = netdev_priv(dev);
3276
hayeswang9a4be1b2014-02-18 21:49:07 +08003277 if (usb_autopm_get_interface(tp->intf) < 0)
3278 return;
3279
hayeswangb5403272014-10-09 18:00:26 +08003280 mutex_lock(&tp->control);
3281
hayeswang21ff2e82014-02-18 21:49:06 +08003282 wol->supported = WAKE_ANY;
3283 wol->wolopts = __rtl_get_wol(tp);
hayeswang9a4be1b2014-02-18 21:49:07 +08003284
hayeswangb5403272014-10-09 18:00:26 +08003285 mutex_unlock(&tp->control);
3286
hayeswang9a4be1b2014-02-18 21:49:07 +08003287 usb_autopm_put_interface(tp->intf);
hayeswang21ff2e82014-02-18 21:49:06 +08003288}
3289
3290static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3291{
3292 struct r8152 *tp = netdev_priv(dev);
hayeswang9a4be1b2014-02-18 21:49:07 +08003293 int ret;
3294
3295 ret = usb_autopm_get_interface(tp->intf);
3296 if (ret < 0)
3297 goto out_set_wol;
hayeswang21ff2e82014-02-18 21:49:06 +08003298
hayeswangb5403272014-10-09 18:00:26 +08003299 mutex_lock(&tp->control);
3300
hayeswang21ff2e82014-02-18 21:49:06 +08003301 __rtl_set_wol(tp, wol->wolopts);
3302 tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3303
hayeswangb5403272014-10-09 18:00:26 +08003304 mutex_unlock(&tp->control);
3305
hayeswang9a4be1b2014-02-18 21:49:07 +08003306 usb_autopm_put_interface(tp->intf);
3307
3308out_set_wol:
3309 return ret;
hayeswang21ff2e82014-02-18 21:49:06 +08003310}
3311
hayeswanga5ec27c2014-02-18 21:49:11 +08003312static u32 rtl8152_get_msglevel(struct net_device *dev)
3313{
3314 struct r8152 *tp = netdev_priv(dev);
3315
3316 return tp->msg_enable;
3317}
3318
3319static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3320{
3321 struct r8152 *tp = netdev_priv(dev);
3322
3323 tp->msg_enable = value;
3324}
3325
hayeswangac718b62013-05-02 16:01:25 +00003326static void rtl8152_get_drvinfo(struct net_device *netdev,
3327 struct ethtool_drvinfo *info)
3328{
3329 struct r8152 *tp = netdev_priv(netdev);
3330
hayeswangb0b46c72014-08-26 10:08:23 +08003331 strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3332 strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
hayeswangac718b62013-05-02 16:01:25 +00003333 usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3334}
3335
3336static
3337int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3338{
3339 struct r8152 *tp = netdev_priv(netdev);
hayeswang8d4a4d72014-10-09 18:00:25 +08003340 int ret;
hayeswangac718b62013-05-02 16:01:25 +00003341
3342 if (!tp->mii.mdio_read)
3343 return -EOPNOTSUPP;
3344
hayeswang8d4a4d72014-10-09 18:00:25 +08003345 ret = usb_autopm_get_interface(tp->intf);
3346 if (ret < 0)
3347 goto out;
3348
hayeswangb5403272014-10-09 18:00:26 +08003349 mutex_lock(&tp->control);
3350
hayeswang8d4a4d72014-10-09 18:00:25 +08003351 ret = mii_ethtool_gset(&tp->mii, cmd);
3352
hayeswangb5403272014-10-09 18:00:26 +08003353 mutex_unlock(&tp->control);
3354
hayeswang8d4a4d72014-10-09 18:00:25 +08003355 usb_autopm_put_interface(tp->intf);
3356
3357out:
3358 return ret;
hayeswangac718b62013-05-02 16:01:25 +00003359}
3360
3361static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3362{
3363 struct r8152 *tp = netdev_priv(dev);
hayeswang9a4be1b2014-02-18 21:49:07 +08003364 int ret;
hayeswangac718b62013-05-02 16:01:25 +00003365
hayeswang9a4be1b2014-02-18 21:49:07 +08003366 ret = usb_autopm_get_interface(tp->intf);
3367 if (ret < 0)
3368 goto out;
3369
hayeswangb5403272014-10-09 18:00:26 +08003370 mutex_lock(&tp->control);
3371
hayeswang9a4be1b2014-02-18 21:49:07 +08003372 ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3373
hayeswangb5403272014-10-09 18:00:26 +08003374 mutex_unlock(&tp->control);
3375
hayeswang9a4be1b2014-02-18 21:49:07 +08003376 usb_autopm_put_interface(tp->intf);
3377
3378out:
3379 return ret;
hayeswangac718b62013-05-02 16:01:25 +00003380}
3381
hayeswang4f1d4d52014-03-11 16:24:19 +08003382static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3383 "tx_packets",
3384 "rx_packets",
3385 "tx_errors",
3386 "rx_errors",
3387 "rx_missed",
3388 "align_errors",
3389 "tx_single_collisions",
3390 "tx_multi_collisions",
3391 "rx_unicast",
3392 "rx_broadcast",
3393 "rx_multicast",
3394 "tx_aborted",
3395 "tx_underrun",
3396};
3397
3398static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3399{
3400 switch (sset) {
3401 case ETH_SS_STATS:
3402 return ARRAY_SIZE(rtl8152_gstrings);
3403 default:
3404 return -EOPNOTSUPP;
3405 }
3406}
3407
3408static void rtl8152_get_ethtool_stats(struct net_device *dev,
3409 struct ethtool_stats *stats, u64 *data)
3410{
3411 struct r8152 *tp = netdev_priv(dev);
3412 struct tally_counter tally;
3413
hayeswang0b030242014-07-08 14:49:28 +08003414 if (usb_autopm_get_interface(tp->intf) < 0)
3415 return;
3416
hayeswang4f1d4d52014-03-11 16:24:19 +08003417 generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3418
hayeswang0b030242014-07-08 14:49:28 +08003419 usb_autopm_put_interface(tp->intf);
3420
hayeswang4f1d4d52014-03-11 16:24:19 +08003421 data[0] = le64_to_cpu(tally.tx_packets);
3422 data[1] = le64_to_cpu(tally.rx_packets);
3423 data[2] = le64_to_cpu(tally.tx_errors);
3424 data[3] = le32_to_cpu(tally.rx_errors);
3425 data[4] = le16_to_cpu(tally.rx_missed);
3426 data[5] = le16_to_cpu(tally.align_errors);
3427 data[6] = le32_to_cpu(tally.tx_one_collision);
3428 data[7] = le32_to_cpu(tally.tx_multi_collision);
3429 data[8] = le64_to_cpu(tally.rx_unicast);
3430 data[9] = le64_to_cpu(tally.rx_broadcast);
3431 data[10] = le32_to_cpu(tally.rx_multicast);
3432 data[11] = le16_to_cpu(tally.tx_aborted);
hayeswangf37119c2014-10-28 14:05:51 +08003433 data[12] = le16_to_cpu(tally.tx_underrun);
hayeswang4f1d4d52014-03-11 16:24:19 +08003434}
3435
3436static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3437{
3438 switch (stringset) {
3439 case ETH_SS_STATS:
3440 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3441 break;
3442 }
3443}
3444
hayeswangdf35d282014-09-25 20:54:02 +08003445static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3446{
3447 u32 ocp_data, lp, adv, supported = 0;
3448 u16 val;
3449
3450 val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3451 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3452
3453 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3454 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3455
3456 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3457 lp = mmd_eee_adv_to_ethtool_adv_t(val);
3458
3459 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3460 ocp_data &= EEE_RX_EN | EEE_TX_EN;
3461
3462 eee->eee_enabled = !!ocp_data;
3463 eee->eee_active = !!(supported & adv & lp);
3464 eee->supported = supported;
3465 eee->advertised = adv;
3466 eee->lp_advertised = lp;
3467
3468 return 0;
3469}
3470
3471static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3472{
3473 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3474
3475 r8152_eee_en(tp, eee->eee_enabled);
3476
3477 if (!eee->eee_enabled)
3478 val = 0;
3479
3480 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3481
3482 return 0;
3483}
3484
3485static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3486{
3487 u32 ocp_data, lp, adv, supported = 0;
3488 u16 val;
3489
3490 val = ocp_reg_read(tp, OCP_EEE_ABLE);
3491 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3492
3493 val = ocp_reg_read(tp, OCP_EEE_ADV);
3494 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3495
3496 val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3497 lp = mmd_eee_adv_to_ethtool_adv_t(val);
3498
3499 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3500 ocp_data &= EEE_RX_EN | EEE_TX_EN;
3501
3502 eee->eee_enabled = !!ocp_data;
3503 eee->eee_active = !!(supported & adv & lp);
3504 eee->supported = supported;
3505 eee->advertised = adv;
3506 eee->lp_advertised = lp;
3507
3508 return 0;
3509}
3510
3511static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3512{
3513 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3514
3515 r8153_eee_en(tp, eee->eee_enabled);
3516
3517 if (!eee->eee_enabled)
3518 val = 0;
3519
3520 ocp_reg_write(tp, OCP_EEE_ADV, val);
3521
3522 return 0;
3523}
3524
3525static int
3526rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
3527{
3528 struct r8152 *tp = netdev_priv(net);
3529 int ret;
3530
3531 ret = usb_autopm_get_interface(tp->intf);
3532 if (ret < 0)
3533 goto out;
3534
hayeswangb5403272014-10-09 18:00:26 +08003535 mutex_lock(&tp->control);
3536
hayeswangdf35d282014-09-25 20:54:02 +08003537 ret = tp->rtl_ops.eee_get(tp, edata);
3538
hayeswangb5403272014-10-09 18:00:26 +08003539 mutex_unlock(&tp->control);
3540
hayeswangdf35d282014-09-25 20:54:02 +08003541 usb_autopm_put_interface(tp->intf);
3542
3543out:
3544 return ret;
3545}
3546
3547static int
3548rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
3549{
3550 struct r8152 *tp = netdev_priv(net);
3551 int ret;
3552
3553 ret = usb_autopm_get_interface(tp->intf);
3554 if (ret < 0)
3555 goto out;
3556
hayeswangb5403272014-10-09 18:00:26 +08003557 mutex_lock(&tp->control);
3558
hayeswangdf35d282014-09-25 20:54:02 +08003559 ret = tp->rtl_ops.eee_set(tp, edata);
hayeswang9d31a7b2014-10-06 10:36:04 +08003560 if (!ret)
3561 ret = mii_nway_restart(&tp->mii);
hayeswangdf35d282014-09-25 20:54:02 +08003562
hayeswangb5403272014-10-09 18:00:26 +08003563 mutex_unlock(&tp->control);
3564
hayeswangdf35d282014-09-25 20:54:02 +08003565 usb_autopm_put_interface(tp->intf);
3566
3567out:
3568 return ret;
3569}
3570
hayeswang8884f502014-10-28 14:05:52 +08003571static int rtl8152_nway_reset(struct net_device *dev)
3572{
3573 struct r8152 *tp = netdev_priv(dev);
3574 int ret;
3575
3576 ret = usb_autopm_get_interface(tp->intf);
3577 if (ret < 0)
3578 goto out;
3579
3580 mutex_lock(&tp->control);
3581
3582 ret = mii_nway_restart(&tp->mii);
3583
3584 mutex_unlock(&tp->control);
3585
3586 usb_autopm_put_interface(tp->intf);
3587
3588out:
3589 return ret;
3590}
3591
hayeswangac718b62013-05-02 16:01:25 +00003592static struct ethtool_ops ops = {
3593 .get_drvinfo = rtl8152_get_drvinfo,
3594 .get_settings = rtl8152_get_settings,
3595 .set_settings = rtl8152_set_settings,
3596 .get_link = ethtool_op_get_link,
hayeswang8884f502014-10-28 14:05:52 +08003597 .nway_reset = rtl8152_nway_reset,
hayeswanga5ec27c2014-02-18 21:49:11 +08003598 .get_msglevel = rtl8152_get_msglevel,
3599 .set_msglevel = rtl8152_set_msglevel,
hayeswang21ff2e82014-02-18 21:49:06 +08003600 .get_wol = rtl8152_get_wol,
3601 .set_wol = rtl8152_set_wol,
hayeswang4f1d4d52014-03-11 16:24:19 +08003602 .get_strings = rtl8152_get_strings,
3603 .get_sset_count = rtl8152_get_sset_count,
3604 .get_ethtool_stats = rtl8152_get_ethtool_stats,
hayeswangdf35d282014-09-25 20:54:02 +08003605 .get_eee = rtl_ethtool_get_eee,
3606 .set_eee = rtl_ethtool_set_eee,
hayeswangac718b62013-05-02 16:01:25 +00003607};
3608
3609static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
3610{
3611 struct r8152 *tp = netdev_priv(netdev);
3612 struct mii_ioctl_data *data = if_mii(rq);
hayeswang9a4be1b2014-02-18 21:49:07 +08003613 int res;
3614
hayeswang68714382014-04-11 17:54:31 +08003615 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3616 return -ENODEV;
3617
hayeswang9a4be1b2014-02-18 21:49:07 +08003618 res = usb_autopm_get_interface(tp->intf);
3619 if (res < 0)
3620 goto out;
hayeswangac718b62013-05-02 16:01:25 +00003621
3622 switch (cmd) {
3623 case SIOCGMIIPHY:
3624 data->phy_id = R8152_PHY_ID; /* Internal PHY */
3625 break;
3626
3627 case SIOCGMIIREG:
hayeswangb5403272014-10-09 18:00:26 +08003628 mutex_lock(&tp->control);
hayeswangac718b62013-05-02 16:01:25 +00003629 data->val_out = r8152_mdio_read(tp, data->reg_num);
hayeswangb5403272014-10-09 18:00:26 +08003630 mutex_unlock(&tp->control);
hayeswangac718b62013-05-02 16:01:25 +00003631 break;
3632
3633 case SIOCSMIIREG:
3634 if (!capable(CAP_NET_ADMIN)) {
3635 res = -EPERM;
3636 break;
3637 }
hayeswangb5403272014-10-09 18:00:26 +08003638 mutex_lock(&tp->control);
hayeswangac718b62013-05-02 16:01:25 +00003639 r8152_mdio_write(tp, data->reg_num, data->val_in);
hayeswangb5403272014-10-09 18:00:26 +08003640 mutex_unlock(&tp->control);
hayeswangac718b62013-05-02 16:01:25 +00003641 break;
3642
3643 default:
3644 res = -EOPNOTSUPP;
3645 }
3646
hayeswang9a4be1b2014-02-18 21:49:07 +08003647 usb_autopm_put_interface(tp->intf);
3648
3649out:
hayeswangac718b62013-05-02 16:01:25 +00003650 return res;
3651}
3652
hayeswang69b4b7a2014-07-10 10:58:54 +08003653static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
3654{
3655 struct r8152 *tp = netdev_priv(dev);
3656
3657 switch (tp->version) {
3658 case RTL_VER_01:
3659 case RTL_VER_02:
3660 return eth_change_mtu(dev, new_mtu);
3661 default:
3662 break;
3663 }
3664
3665 if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
3666 return -EINVAL;
3667
3668 dev->mtu = new_mtu;
3669
3670 return 0;
3671}
3672
hayeswangac718b62013-05-02 16:01:25 +00003673static const struct net_device_ops rtl8152_netdev_ops = {
3674 .ndo_open = rtl8152_open,
3675 .ndo_stop = rtl8152_close,
3676 .ndo_do_ioctl = rtl8152_ioctl,
3677 .ndo_start_xmit = rtl8152_start_xmit,
3678 .ndo_tx_timeout = rtl8152_tx_timeout,
hayeswangc5554292014-09-12 10:43:11 +08003679 .ndo_set_features = rtl8152_set_features,
hayeswangac718b62013-05-02 16:01:25 +00003680 .ndo_set_rx_mode = rtl8152_set_rx_mode,
3681 .ndo_set_mac_address = rtl8152_set_mac_address,
hayeswang69b4b7a2014-07-10 10:58:54 +08003682 .ndo_change_mtu = rtl8152_change_mtu,
hayeswangac718b62013-05-02 16:01:25 +00003683 .ndo_validate_addr = eth_validate_addr,
3684};
3685
3686static void r8152b_get_version(struct r8152 *tp)
3687{
3688 u32 ocp_data;
3689 u16 version;
3690
3691 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
3692 version = (u16)(ocp_data & VERSION_MASK);
3693
3694 switch (version) {
3695 case 0x4c00:
3696 tp->version = RTL_VER_01;
3697 break;
3698 case 0x4c10:
3699 tp->version = RTL_VER_02;
3700 break;
hayeswang43779f82014-01-02 11:25:10 +08003701 case 0x5c00:
3702 tp->version = RTL_VER_03;
3703 tp->mii.supports_gmii = 1;
3704 break;
3705 case 0x5c10:
3706 tp->version = RTL_VER_04;
3707 tp->mii.supports_gmii = 1;
3708 break;
3709 case 0x5c20:
3710 tp->version = RTL_VER_05;
3711 tp->mii.supports_gmii = 1;
3712 break;
hayeswangac718b62013-05-02 16:01:25 +00003713 default:
3714 netif_info(tp, probe, tp->netdev,
3715 "Unknown version 0x%04x\n", version);
3716 break;
3717 }
3718}
3719
hayeswange3fe0b12014-01-02 11:22:39 +08003720static void rtl8152_unload(struct r8152 *tp)
3721{
hayeswang68714382014-04-11 17:54:31 +08003722 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3723 return;
3724
hayeswang00a5e362014-02-18 21:48:59 +08003725 if (tp->version != RTL_VER_01)
3726 r8152_power_cut_en(tp, true);
hayeswange3fe0b12014-01-02 11:22:39 +08003727}
3728
hayeswang43779f82014-01-02 11:25:10 +08003729static void rtl8153_unload(struct r8152 *tp)
3730{
hayeswang68714382014-04-11 17:54:31 +08003731 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3732 return;
3733
hayeswang49be1722014-10-01 13:25:11 +08003734 r8153_power_cut_en(tp, false);
hayeswang43779f82014-01-02 11:25:10 +08003735}
3736
hayeswang31ca1de2014-01-06 17:08:43 +08003737static int rtl_ops_init(struct r8152 *tp, const struct usb_device_id *id)
hayeswangc81229c2014-01-02 11:22:42 +08003738{
3739 struct rtl_ops *ops = &tp->rtl_ops;
hayeswang31ca1de2014-01-06 17:08:43 +08003740 int ret = -ENODEV;
hayeswangc81229c2014-01-02 11:22:42 +08003741
3742 switch (id->idVendor) {
3743 case VENDOR_ID_REALTEK:
3744 switch (id->idProduct) {
3745 case PRODUCT_ID_RTL8152:
3746 ops->init = r8152b_init;
3747 ops->enable = rtl8152_enable;
3748 ops->disable = rtl8152_disable;
hayeswangd70b1132014-09-19 15:17:18 +08003749 ops->up = rtl8152_up;
hayeswangc81229c2014-01-02 11:22:42 +08003750 ops->down = rtl8152_down;
3751 ops->unload = rtl8152_unload;
hayeswangdf35d282014-09-25 20:54:02 +08003752 ops->eee_get = r8152_get_eee;
3753 ops->eee_set = r8152_set_eee;
hayeswang31ca1de2014-01-06 17:08:43 +08003754 ret = 0;
hayeswangc81229c2014-01-02 11:22:42 +08003755 break;
hayeswang43779f82014-01-02 11:25:10 +08003756 case PRODUCT_ID_RTL8153:
3757 ops->init = r8153_init;
3758 ops->enable = rtl8153_enable;
hayeswangd70b1132014-09-19 15:17:18 +08003759 ops->disable = rtl8153_disable;
3760 ops->up = rtl8153_up;
hayeswang43779f82014-01-02 11:25:10 +08003761 ops->down = rtl8153_down;
3762 ops->unload = rtl8153_unload;
hayeswangdf35d282014-09-25 20:54:02 +08003763 ops->eee_get = r8153_get_eee;
3764 ops->eee_set = r8153_set_eee;
hayeswang31ca1de2014-01-06 17:08:43 +08003765 ret = 0;
hayeswang43779f82014-01-02 11:25:10 +08003766 break;
3767 default:
hayeswang43779f82014-01-02 11:25:10 +08003768 break;
3769 }
3770 break;
3771
3772 case VENDOR_ID_SAMSUNG:
3773 switch (id->idProduct) {
3774 case PRODUCT_ID_SAMSUNG:
3775 ops->init = r8153_init;
3776 ops->enable = rtl8153_enable;
hayeswangd70b1132014-09-19 15:17:18 +08003777 ops->disable = rtl8153_disable;
3778 ops->up = rtl8153_up;
hayeswang43779f82014-01-02 11:25:10 +08003779 ops->down = rtl8153_down;
3780 ops->unload = rtl8153_unload;
hayeswangdf35d282014-09-25 20:54:02 +08003781 ops->eee_get = r8153_get_eee;
3782 ops->eee_set = r8153_set_eee;
hayeswang31ca1de2014-01-06 17:08:43 +08003783 ret = 0;
hayeswang43779f82014-01-02 11:25:10 +08003784 break;
hayeswangc81229c2014-01-02 11:22:42 +08003785 default:
hayeswangc81229c2014-01-02 11:22:42 +08003786 break;
3787 }
3788 break;
3789
3790 default:
hayeswangc81229c2014-01-02 11:22:42 +08003791 break;
3792 }
3793
hayeswang31ca1de2014-01-06 17:08:43 +08003794 if (ret)
3795 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
3796
hayeswangc81229c2014-01-02 11:22:42 +08003797 return ret;
3798}
3799
hayeswangac718b62013-05-02 16:01:25 +00003800static int rtl8152_probe(struct usb_interface *intf,
3801 const struct usb_device_id *id)
3802{
3803 struct usb_device *udev = interface_to_usbdev(intf);
3804 struct r8152 *tp;
3805 struct net_device *netdev;
hayeswangebc2ec42013-08-14 20:54:38 +08003806 int ret;
hayeswangac718b62013-05-02 16:01:25 +00003807
hayeswang10c32712014-03-04 20:47:48 +08003808 if (udev->actconfig->desc.bConfigurationValue != 1) {
3809 usb_driver_set_configuration(udev, 1);
3810 return -ENODEV;
3811 }
3812
3813 usb_reset_device(udev);
hayeswangac718b62013-05-02 16:01:25 +00003814 netdev = alloc_etherdev(sizeof(struct r8152));
3815 if (!netdev) {
Hayes Wang4a8deae2014-01-07 11:18:22 +08003816 dev_err(&intf->dev, "Out of memory\n");
hayeswangac718b62013-05-02 16:01:25 +00003817 return -ENOMEM;
3818 }
3819
hayeswangebc2ec42013-08-14 20:54:38 +08003820 SET_NETDEV_DEV(netdev, &intf->dev);
hayeswangac718b62013-05-02 16:01:25 +00003821 tp = netdev_priv(netdev);
3822 tp->msg_enable = 0x7FFF;
3823
hayeswange3ad4122014-01-06 17:08:42 +08003824 tp->udev = udev;
3825 tp->netdev = netdev;
3826 tp->intf = intf;
3827
hayeswang31ca1de2014-01-06 17:08:43 +08003828 ret = rtl_ops_init(tp, id);
3829 if (ret)
3830 goto out;
hayeswangc81229c2014-01-02 11:22:42 +08003831
hayeswangebc2ec42013-08-14 20:54:38 +08003832 tasklet_init(&tp->tl, bottom_half, (unsigned long)tp);
hayeswangb5403272014-10-09 18:00:26 +08003833 mutex_init(&tp->control);
hayeswangac718b62013-05-02 16:01:25 +00003834 INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
3835
hayeswangac718b62013-05-02 16:01:25 +00003836 netdev->netdev_ops = &rtl8152_netdev_ops;
3837 netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
hayeswang5bd23882013-08-14 20:54:39 +08003838
hayeswang60c89072014-03-07 11:04:39 +08003839 netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
hayeswang6128d1b2014-03-07 11:04:40 +08003840 NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
hayeswangc5554292014-09-12 10:43:11 +08003841 NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
3842 NETIF_F_HW_VLAN_CTAG_TX;
hayeswang60c89072014-03-07 11:04:39 +08003843 netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
hayeswang6128d1b2014-03-07 11:04:40 +08003844 NETIF_F_TSO | NETIF_F_FRAGLIST |
hayeswangc5554292014-09-12 10:43:11 +08003845 NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
3846 NETIF_F_HW_VLAN_CTAG_RX |
3847 NETIF_F_HW_VLAN_CTAG_TX;
3848 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
3849 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
3850 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
hayeswangdb8515e2014-03-06 15:07:16 +08003851
Wilfried Klaebe7ad24ea2014-05-11 00:12:32 +00003852 netdev->ethtool_ops = &ops;
hayeswang60c89072014-03-07 11:04:39 +08003853 netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
hayeswangac718b62013-05-02 16:01:25 +00003854
3855 tp->mii.dev = netdev;
3856 tp->mii.mdio_read = read_mii_word;
3857 tp->mii.mdio_write = write_mii_word;
3858 tp->mii.phy_id_mask = 0x3f;
3859 tp->mii.reg_num_mask = 0x1f;
3860 tp->mii.phy_id = R8152_PHY_ID;
3861 tp->mii.supports_gmii = 0;
3862
hayeswang9a4be1b2014-02-18 21:49:07 +08003863 intf->needs_remote_wakeup = 1;
3864
hayeswangac718b62013-05-02 16:01:25 +00003865 r8152b_get_version(tp);
hayeswangc81229c2014-01-02 11:22:42 +08003866 tp->rtl_ops.init(tp);
hayeswangac718b62013-05-02 16:01:25 +00003867 set_ethernet_addr(tp);
3868
hayeswangac718b62013-05-02 16:01:25 +00003869 usb_set_intfdata(intf, tp);
hayeswangac718b62013-05-02 16:01:25 +00003870
hayeswangebc2ec42013-08-14 20:54:38 +08003871 ret = register_netdev(netdev);
3872 if (ret != 0) {
Hayes Wang4a8deae2014-01-07 11:18:22 +08003873 netif_err(tp, probe, netdev, "couldn't register the device\n");
hayeswangebc2ec42013-08-14 20:54:38 +08003874 goto out1;
hayeswangac718b62013-05-02 16:01:25 +00003875 }
3876
hayeswang21ff2e82014-02-18 21:49:06 +08003877 tp->saved_wolopts = __rtl_get_wol(tp);
3878 if (tp->saved_wolopts)
3879 device_set_wakeup_enable(&udev->dev, true);
3880 else
3881 device_set_wakeup_enable(&udev->dev, false);
3882
Hayes Wang4a8deae2014-01-07 11:18:22 +08003883 netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
hayeswangac718b62013-05-02 16:01:25 +00003884
3885 return 0;
3886
hayeswangac718b62013-05-02 16:01:25 +00003887out1:
hayeswangebc2ec42013-08-14 20:54:38 +08003888 usb_set_intfdata(intf, NULL);
hayeswangac718b62013-05-02 16:01:25 +00003889out:
3890 free_netdev(netdev);
hayeswangebc2ec42013-08-14 20:54:38 +08003891 return ret;
hayeswangac718b62013-05-02 16:01:25 +00003892}
3893
hayeswangac718b62013-05-02 16:01:25 +00003894static void rtl8152_disconnect(struct usb_interface *intf)
3895{
3896 struct r8152 *tp = usb_get_intfdata(intf);
3897
3898 usb_set_intfdata(intf, NULL);
3899 if (tp) {
hayeswangf561de32014-09-30 16:48:01 +08003900 struct usb_device *udev = tp->udev;
3901
3902 if (udev->state == USB_STATE_NOTATTACHED)
3903 set_bit(RTL8152_UNPLUG, &tp->flags);
3904
hayeswangac718b62013-05-02 16:01:25 +00003905 tasklet_kill(&tp->tl);
3906 unregister_netdev(tp->netdev);
hayeswangc81229c2014-01-02 11:22:42 +08003907 tp->rtl_ops.unload(tp);
hayeswangac718b62013-05-02 16:01:25 +00003908 free_netdev(tp->netdev);
3909 }
3910}
3911
3912/* table of devices that work with this driver */
3913static struct usb_device_id rtl8152_table[] = {
hayeswang10c32712014-03-04 20:47:48 +08003914 {USB_DEVICE(VENDOR_ID_REALTEK, PRODUCT_ID_RTL8152)},
3915 {USB_DEVICE(VENDOR_ID_REALTEK, PRODUCT_ID_RTL8153)},
3916 {USB_DEVICE(VENDOR_ID_SAMSUNG, PRODUCT_ID_SAMSUNG)},
hayeswangac718b62013-05-02 16:01:25 +00003917 {}
3918};
3919
3920MODULE_DEVICE_TABLE(usb, rtl8152_table);
3921
3922static struct usb_driver rtl8152_driver = {
3923 .name = MODULENAME,
hayeswangebc2ec42013-08-14 20:54:38 +08003924 .id_table = rtl8152_table,
hayeswangac718b62013-05-02 16:01:25 +00003925 .probe = rtl8152_probe,
3926 .disconnect = rtl8152_disconnect,
hayeswangac718b62013-05-02 16:01:25 +00003927 .suspend = rtl8152_suspend,
hayeswangebc2ec42013-08-14 20:54:38 +08003928 .resume = rtl8152_resume,
3929 .reset_resume = rtl8152_resume,
hayeswang9a4be1b2014-02-18 21:49:07 +08003930 .supports_autosuspend = 1,
hayeswanga6347822014-02-18 21:49:10 +08003931 .disable_hub_initiated_lpm = 1,
hayeswangac718b62013-05-02 16:01:25 +00003932};
3933
Sachin Kamatb4236daa2013-05-16 17:48:08 +00003934module_usb_driver(rtl8152_driver);
hayeswangac718b62013-05-02 16:01:25 +00003935
3936MODULE_AUTHOR(DRIVER_AUTHOR);
3937MODULE_DESCRIPTION(DRIVER_DESC);
3938MODULE_LICENSE("GPL");