blob: a4d149f34541e2b455a528c35096cbfe5b337ace [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Advanced Linux Sound Architecture - ALSA - Driver
3 * Copyright (c) 1994-2003 by Jaroslav Kysela <perex@suse.cz>,
4 * Abramo Bagnara <abramo@alsa-project.org>
5 *
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 */
22
23#ifndef __SOUND_ASOUND_H
24#define __SOUND_ASOUND_H
25
26#if defined(LINUX) || defined(__LINUX__) || defined(__linux__)
27
28#include <linux/ioctl.h>
29
30#ifdef __KERNEL__
31
32#include <linux/types.h>
33#include <linux/time.h>
34#include <asm/byteorder.h>
35
36#ifdef __LITTLE_ENDIAN
37#define SNDRV_LITTLE_ENDIAN
38#else
39#ifdef __BIG_ENDIAN
40#define SNDRV_BIG_ENDIAN
41#else
42#error "Unsupported endian..."
43#endif
44#endif
45
46#else /* !__KERNEL__ */
47
48#include <endian.h>
49#if __BYTE_ORDER == __LITTLE_ENDIAN
50#define SNDRV_LITTLE_ENDIAN
51#elif __BYTE_ORDER == __BIG_ENDIAN
52#define SNDRV_BIG_ENDIAN
53#else
54#error "Unsupported endian..."
55#endif
56
57#endif /* __KERNEL **/
58
59#endif /* LINUX */
60
61#ifndef __KERNEL__
62#include <sys/time.h>
63#include <sys/types.h>
64#endif
65
66/*
67 * protocol version
68 */
69
70#define SNDRV_PROTOCOL_VERSION(major, minor, subminor) (((major)<<16)|((minor)<<8)|(subminor))
71#define SNDRV_PROTOCOL_MAJOR(version) (((version)>>16)&0xffff)
72#define SNDRV_PROTOCOL_MINOR(version) (((version)>>8)&0xff)
73#define SNDRV_PROTOCOL_MICRO(version) ((version)&0xff)
74#define SNDRV_PROTOCOL_INCOMPATIBLE(kversion, uversion) \
75 (SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || \
76 (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && \
77 SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion)))
78
79/****************************************************************************
80 * *
81 * Digital audio interface *
82 * *
83 ****************************************************************************/
84
85struct sndrv_aes_iec958 {
86 unsigned char status[24]; /* AES/IEC958 channel status bits */
87 unsigned char subcode[147]; /* AES/IEC958 subcode bits */
88 unsigned char pad; /* nothing */
89 unsigned char dig_subframe[4]; /* AES/IEC958 subframe bits */
90};
91
92/****************************************************************************
93 * *
94 * Section for driver hardware dependent interface - /dev/snd/hw? *
95 * *
96 ****************************************************************************/
97
98#define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
99
100enum sndrv_hwdep_iface {
101 SNDRV_HWDEP_IFACE_OPL2 = 0,
102 SNDRV_HWDEP_IFACE_OPL3,
103 SNDRV_HWDEP_IFACE_OPL4,
104 SNDRV_HWDEP_IFACE_SB16CSP, /* Creative Signal Processor */
105 SNDRV_HWDEP_IFACE_EMU10K1, /* FX8010 processor in EMU10K1 chip */
106 SNDRV_HWDEP_IFACE_YSS225, /* Yamaha FX processor */
107 SNDRV_HWDEP_IFACE_ICS2115, /* Wavetable synth */
108 SNDRV_HWDEP_IFACE_SSCAPE, /* Ensoniq SoundScape ISA card (MC68EC000) */
109 SNDRV_HWDEP_IFACE_VX, /* Digigram VX cards */
110 SNDRV_HWDEP_IFACE_MIXART, /* Digigram miXart cards */
111 SNDRV_HWDEP_IFACE_USX2Y, /* Tascam US122, US224 & US428 usb */
112 SNDRV_HWDEP_IFACE_EMUX_WAVETABLE, /* EmuX wavetable */
113 SNDRV_HWDEP_IFACE_BLUETOOTH, /* Bluetooth audio */
114 SNDRV_HWDEP_IFACE_USX2Y_PCM, /* Tascam US122, US224 & US428 rawusb pcm */
115 SNDRV_HWDEP_IFACE_PCXHR, /* Digigram PCXHR */
116
117 /* Don't forget to change the following: */
118 SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_PCXHR
119};
120
121struct sndrv_hwdep_info {
122 unsigned int device; /* WR: device number */
123 int card; /* R: card number */
124 unsigned char id[64]; /* ID (user selectable) */
125 unsigned char name[80]; /* hwdep name */
126 enum sndrv_hwdep_iface iface; /* hwdep interface */
127 unsigned char reserved[64]; /* reserved for future */
128};
129
130/* generic DSP loader */
131struct sndrv_hwdep_dsp_status {
132 unsigned int version; /* R: driver-specific version */
133 unsigned char id[32]; /* R: driver-specific ID string */
134 unsigned int num_dsps; /* R: number of DSP images to transfer */
135 unsigned int dsp_loaded; /* R: bit flags indicating the loaded DSPs */
136 unsigned int chip_ready; /* R: 1 = initialization finished */
137 unsigned char reserved[16]; /* reserved for future use */
138};
139
140struct sndrv_hwdep_dsp_image {
141 unsigned int index; /* W: DSP index */
142 unsigned char name[64]; /* W: ID (e.g. file name) */
143 unsigned char __user *image; /* W: binary image */
144 size_t length; /* W: size of image in bytes */
145 unsigned long driver_data; /* W: driver-specific data */
146};
147
148enum {
149 SNDRV_HWDEP_IOCTL_PVERSION = _IOR ('H', 0x00, int),
150 SNDRV_HWDEP_IOCTL_INFO = _IOR ('H', 0x01, struct sndrv_hwdep_info),
151 SNDRV_HWDEP_IOCTL_DSP_STATUS = _IOR('H', 0x02, struct sndrv_hwdep_dsp_status),
152 SNDRV_HWDEP_IOCTL_DSP_LOAD = _IOW('H', 0x03, struct sndrv_hwdep_dsp_image)
153};
154
155/*****************************************************************************
156 * *
157 * Digital Audio (PCM) interface - /dev/snd/pcm?? *
158 * *
159 *****************************************************************************/
160
161#define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 7)
162
163typedef unsigned long sndrv_pcm_uframes_t;
164typedef long sndrv_pcm_sframes_t;
165
166enum sndrv_pcm_class {
167 SNDRV_PCM_CLASS_GENERIC = 0, /* standard mono or stereo device */
168 SNDRV_PCM_CLASS_MULTI, /* multichannel device */
169 SNDRV_PCM_CLASS_MODEM, /* software modem class */
170 SNDRV_PCM_CLASS_DIGITIZER, /* digitizer class */
171 /* Don't forget to change the following: */
172 SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER,
173};
174
175enum sndrv_pcm_subclass {
176 SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0, /* mono or stereo subdevices are mixed together */
177 SNDRV_PCM_SUBCLASS_MULTI_MIX, /* multichannel subdevices are mixed together */
178 /* Don't forget to change the following: */
179 SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX,
180};
181
182enum sndrv_pcm_stream {
183 SNDRV_PCM_STREAM_PLAYBACK = 0,
184 SNDRV_PCM_STREAM_CAPTURE,
185 SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE,
186};
187
188enum sndrv_pcm_access {
189 SNDRV_PCM_ACCESS_MMAP_INTERLEAVED = 0, /* interleaved mmap */
190 SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED, /* noninterleaved mmap */
191 SNDRV_PCM_ACCESS_MMAP_COMPLEX, /* complex mmap */
192 SNDRV_PCM_ACCESS_RW_INTERLEAVED, /* readi/writei */
193 SNDRV_PCM_ACCESS_RW_NONINTERLEAVED, /* readn/writen */
194 SNDRV_PCM_ACCESS_LAST = SNDRV_PCM_ACCESS_RW_NONINTERLEAVED,
195};
196
197enum sndrv_pcm_format {
198 SNDRV_PCM_FORMAT_S8 = 0,
199 SNDRV_PCM_FORMAT_U8,
200 SNDRV_PCM_FORMAT_S16_LE,
201 SNDRV_PCM_FORMAT_S16_BE,
202 SNDRV_PCM_FORMAT_U16_LE,
203 SNDRV_PCM_FORMAT_U16_BE,
204 SNDRV_PCM_FORMAT_S24_LE, /* low three bytes */
205 SNDRV_PCM_FORMAT_S24_BE, /* low three bytes */
206 SNDRV_PCM_FORMAT_U24_LE, /* low three bytes */
207 SNDRV_PCM_FORMAT_U24_BE, /* low three bytes */
208 SNDRV_PCM_FORMAT_S32_LE,
209 SNDRV_PCM_FORMAT_S32_BE,
210 SNDRV_PCM_FORMAT_U32_LE,
211 SNDRV_PCM_FORMAT_U32_BE,
212 SNDRV_PCM_FORMAT_FLOAT_LE, /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
213 SNDRV_PCM_FORMAT_FLOAT_BE, /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
214 SNDRV_PCM_FORMAT_FLOAT64_LE, /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
215 SNDRV_PCM_FORMAT_FLOAT64_BE, /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
216 SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE, /* IEC-958 subframe, Little Endian */
217 SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE, /* IEC-958 subframe, Big Endian */
218 SNDRV_PCM_FORMAT_MU_LAW,
219 SNDRV_PCM_FORMAT_A_LAW,
220 SNDRV_PCM_FORMAT_IMA_ADPCM,
221 SNDRV_PCM_FORMAT_MPEG,
222 SNDRV_PCM_FORMAT_GSM,
223 SNDRV_PCM_FORMAT_SPECIAL = 31,
224 SNDRV_PCM_FORMAT_S24_3LE = 32, /* in three bytes */
225 SNDRV_PCM_FORMAT_S24_3BE, /* in three bytes */
226 SNDRV_PCM_FORMAT_U24_3LE, /* in three bytes */
227 SNDRV_PCM_FORMAT_U24_3BE, /* in three bytes */
228 SNDRV_PCM_FORMAT_S20_3LE, /* in three bytes */
229 SNDRV_PCM_FORMAT_S20_3BE, /* in three bytes */
230 SNDRV_PCM_FORMAT_U20_3LE, /* in three bytes */
231 SNDRV_PCM_FORMAT_U20_3BE, /* in three bytes */
232 SNDRV_PCM_FORMAT_S18_3LE, /* in three bytes */
233 SNDRV_PCM_FORMAT_S18_3BE, /* in three bytes */
234 SNDRV_PCM_FORMAT_U18_3LE, /* in three bytes */
235 SNDRV_PCM_FORMAT_U18_3BE, /* in three bytes */
236 SNDRV_PCM_FORMAT_LAST = SNDRV_PCM_FORMAT_U18_3BE,
237
238#ifdef SNDRV_LITTLE_ENDIAN
239 SNDRV_PCM_FORMAT_S16 = SNDRV_PCM_FORMAT_S16_LE,
240 SNDRV_PCM_FORMAT_U16 = SNDRV_PCM_FORMAT_U16_LE,
241 SNDRV_PCM_FORMAT_S24 = SNDRV_PCM_FORMAT_S24_LE,
242 SNDRV_PCM_FORMAT_U24 = SNDRV_PCM_FORMAT_U24_LE,
243 SNDRV_PCM_FORMAT_S32 = SNDRV_PCM_FORMAT_S32_LE,
244 SNDRV_PCM_FORMAT_U32 = SNDRV_PCM_FORMAT_U32_LE,
245 SNDRV_PCM_FORMAT_FLOAT = SNDRV_PCM_FORMAT_FLOAT_LE,
246 SNDRV_PCM_FORMAT_FLOAT64 = SNDRV_PCM_FORMAT_FLOAT64_LE,
247 SNDRV_PCM_FORMAT_IEC958_SUBFRAME = SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE,
248#endif
249#ifdef SNDRV_BIG_ENDIAN
250 SNDRV_PCM_FORMAT_S16 = SNDRV_PCM_FORMAT_S16_BE,
251 SNDRV_PCM_FORMAT_U16 = SNDRV_PCM_FORMAT_U16_BE,
252 SNDRV_PCM_FORMAT_S24 = SNDRV_PCM_FORMAT_S24_BE,
253 SNDRV_PCM_FORMAT_U24 = SNDRV_PCM_FORMAT_U24_BE,
254 SNDRV_PCM_FORMAT_S32 = SNDRV_PCM_FORMAT_S32_BE,
255 SNDRV_PCM_FORMAT_U32 = SNDRV_PCM_FORMAT_U32_BE,
256 SNDRV_PCM_FORMAT_FLOAT = SNDRV_PCM_FORMAT_FLOAT_BE,
257 SNDRV_PCM_FORMAT_FLOAT64 = SNDRV_PCM_FORMAT_FLOAT64_BE,
258 SNDRV_PCM_FORMAT_IEC958_SUBFRAME = SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE,
259#endif
260};
261
262enum sndrv_pcm_subformat {
263 SNDRV_PCM_SUBFORMAT_STD = 0,
264 SNDRV_PCM_SUBFORMAT_LAST = SNDRV_PCM_SUBFORMAT_STD,
265};
266
267#define SNDRV_PCM_INFO_MMAP 0x00000001 /* hardware supports mmap */
268#define SNDRV_PCM_INFO_MMAP_VALID 0x00000002 /* period data are valid during transfer */
269#define SNDRV_PCM_INFO_DOUBLE 0x00000004 /* Double buffering needed for PCM start/stop */
270#define SNDRV_PCM_INFO_BATCH 0x00000010 /* double buffering */
271#define SNDRV_PCM_INFO_INTERLEAVED 0x00000100 /* channels are interleaved */
272#define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200 /* channels are not interleaved */
273#define SNDRV_PCM_INFO_COMPLEX 0x00000400 /* complex frame organization (mmap only) */
274#define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000 /* hardware transfer block of samples */
275#define SNDRV_PCM_INFO_OVERRANGE 0x00020000 /* hardware supports ADC (capture) overrange detection */
276#define SNDRV_PCM_INFO_RESUME 0x00040000 /* hardware supports stream resume after suspend */
277#define SNDRV_PCM_INFO_PAUSE 0x00080000 /* pause ioctl is supported */
278#define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000 /* only half duplex */
279#define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000 /* playback and capture stream are somewhat correlated */
280#define SNDRV_PCM_INFO_SYNC_START 0x00400000 /* pcm support some kind of sync go */
281
282enum sndrv_pcm_state {
283 SNDRV_PCM_STATE_OPEN = 0, /* stream is open */
284 SNDRV_PCM_STATE_SETUP, /* stream has a setup */
285 SNDRV_PCM_STATE_PREPARED, /* stream is ready to start */
286 SNDRV_PCM_STATE_RUNNING, /* stream is running */
287 SNDRV_PCM_STATE_XRUN, /* stream reached an xrun */
288 SNDRV_PCM_STATE_DRAINING, /* stream is draining */
289 SNDRV_PCM_STATE_PAUSED, /* stream is paused */
290 SNDRV_PCM_STATE_SUSPENDED, /* hardware is suspended */
291 SNDRV_PCM_STATE_DISCONNECTED, /* hardware is disconnected */
292 SNDRV_PCM_STATE_LAST = SNDRV_PCM_STATE_DISCONNECTED,
293};
294
295enum {
296 SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000,
297 SNDRV_PCM_MMAP_OFFSET_STATUS = 0x80000000,
298 SNDRV_PCM_MMAP_OFFSET_CONTROL = 0x81000000,
299};
300
301union sndrv_pcm_sync_id {
302 unsigned char id[16];
303 unsigned short id16[8];
304 unsigned int id32[4];
305};
306
307struct sndrv_pcm_info {
308 unsigned int device; /* RO/WR (control): device number */
309 unsigned int subdevice; /* RO/WR (control): subdevice number */
310 enum sndrv_pcm_stream stream; /* RO/WR (control): stream number */
311 int card; /* R: card number */
312 unsigned char id[64]; /* ID (user selectable) */
313 unsigned char name[80]; /* name of this device */
314 unsigned char subname[32]; /* subdevice name */
315 enum sndrv_pcm_class dev_class; /* SNDRV_PCM_CLASS_* */
316 enum sndrv_pcm_subclass dev_subclass; /* SNDRV_PCM_SUBCLASS_* */
317 unsigned int subdevices_count;
318 unsigned int subdevices_avail;
319 union sndrv_pcm_sync_id sync; /* hardware synchronization ID */
320 unsigned char reserved[64]; /* reserved for future... */
321};
322
323enum sndrv_pcm_hw_param {
324 SNDRV_PCM_HW_PARAM_ACCESS = 0, /* Access type */
325 SNDRV_PCM_HW_PARAM_FIRST_MASK = SNDRV_PCM_HW_PARAM_ACCESS,
326 SNDRV_PCM_HW_PARAM_FORMAT, /* Format */
327 SNDRV_PCM_HW_PARAM_SUBFORMAT, /* Subformat */
328 SNDRV_PCM_HW_PARAM_LAST_MASK = SNDRV_PCM_HW_PARAM_SUBFORMAT,
329
330 SNDRV_PCM_HW_PARAM_SAMPLE_BITS = 8, /* Bits per sample */
331 SNDRV_PCM_HW_PARAM_FIRST_INTERVAL = SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
332 SNDRV_PCM_HW_PARAM_FRAME_BITS, /* Bits per frame */
333 SNDRV_PCM_HW_PARAM_CHANNELS, /* Channels */
334 SNDRV_PCM_HW_PARAM_RATE, /* Approx rate */
335 SNDRV_PCM_HW_PARAM_PERIOD_TIME, /* Approx distance between interrupts
336 in us */
337 SNDRV_PCM_HW_PARAM_PERIOD_SIZE, /* Approx frames between interrupts */
338 SNDRV_PCM_HW_PARAM_PERIOD_BYTES, /* Approx bytes between interrupts */
339 SNDRV_PCM_HW_PARAM_PERIODS, /* Approx interrupts per buffer */
340 SNDRV_PCM_HW_PARAM_BUFFER_TIME, /* Approx duration of buffer in us */
341 SNDRV_PCM_HW_PARAM_BUFFER_SIZE, /* Size of buffer in frames */
342 SNDRV_PCM_HW_PARAM_BUFFER_BYTES, /* Size of buffer in bytes */
343 SNDRV_PCM_HW_PARAM_TICK_TIME, /* Approx tick duration in us */
344 SNDRV_PCM_HW_PARAM_LAST_INTERVAL = SNDRV_PCM_HW_PARAM_TICK_TIME
345};
346
347#define SNDRV_PCM_HW_PARAMS_RUNTIME (1<<0)
348
349struct sndrv_interval {
350 unsigned int min, max;
351 unsigned int openmin:1,
352 openmax:1,
353 integer:1,
354 empty:1;
355};
356
357#define SNDRV_MASK_MAX 256
358
359struct sndrv_mask {
360 u_int32_t bits[(SNDRV_MASK_MAX+31)/32];
361};
362
363struct sndrv_pcm_hw_params {
364 unsigned int flags;
365 struct sndrv_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK -
366 SNDRV_PCM_HW_PARAM_FIRST_MASK + 1];
367 struct sndrv_mask mres[5]; /* reserved masks */
368 struct sndrv_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL -
369 SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1];
370 struct sndrv_interval ires[9]; /* reserved intervals */
371 unsigned int rmask; /* W: requested masks */
372 unsigned int cmask; /* R: changed masks */
373 unsigned int info; /* R: Info flags for returned setup */
374 unsigned int msbits; /* R: used most significant bits */
375 unsigned int rate_num; /* R: rate numerator */
376 unsigned int rate_den; /* R: rate denominator */
377 sndrv_pcm_uframes_t fifo_size; /* R: chip FIFO size in frames */
378 unsigned char reserved[64]; /* reserved for future */
379};
380
381enum sndrv_pcm_tstamp {
382 SNDRV_PCM_TSTAMP_NONE = 0,
383 SNDRV_PCM_TSTAMP_MMAP,
384 SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_MMAP,
385};
386
387struct sndrv_pcm_sw_params {
388 enum sndrv_pcm_tstamp tstamp_mode; /* timestamp mode */
389 unsigned int period_step;
390 unsigned int sleep_min; /* min ticks to sleep */
391 sndrv_pcm_uframes_t avail_min; /* min avail frames for wakeup */
392 sndrv_pcm_uframes_t xfer_align; /* xfer size need to be a multiple */
393 sndrv_pcm_uframes_t start_threshold; /* min hw_avail frames for automatic start */
394 sndrv_pcm_uframes_t stop_threshold; /* min avail frames for automatic stop */
395 sndrv_pcm_uframes_t silence_threshold; /* min distance from noise for silence filling */
396 sndrv_pcm_uframes_t silence_size; /* silence block size */
397 sndrv_pcm_uframes_t boundary; /* pointers wrap point */
398 unsigned char reserved[64]; /* reserved for future */
399};
400
401struct sndrv_pcm_channel_info {
402 unsigned int channel;
403 off_t offset; /* mmap offset */
404 unsigned int first; /* offset to first sample in bits */
405 unsigned int step; /* samples distance in bits */
406};
407
408struct sndrv_pcm_status {
409 enum sndrv_pcm_state state; /* stream state */
410 struct timespec trigger_tstamp; /* time when stream was started/stopped/paused */
411 struct timespec tstamp; /* reference timestamp */
412 sndrv_pcm_uframes_t appl_ptr; /* appl ptr */
413 sndrv_pcm_uframes_t hw_ptr; /* hw ptr */
414 sndrv_pcm_sframes_t delay; /* current delay in frames */
415 sndrv_pcm_uframes_t avail; /* number of frames available */
416 sndrv_pcm_uframes_t avail_max; /* max frames available on hw since last status */
417 sndrv_pcm_uframes_t overrange; /* count of ADC (capture) overrange detections from last status */
418 enum sndrv_pcm_state suspended_state; /* suspended stream state */
419 unsigned char reserved[60]; /* must be filled with zero */
420};
421
422struct sndrv_pcm_mmap_status {
423 enum sndrv_pcm_state state; /* RO: state - SNDRV_PCM_STATE_XXXX */
424 int pad1; /* Needed for 64 bit alignment */
425 sndrv_pcm_uframes_t hw_ptr; /* RO: hw ptr (0...boundary-1) */
426 struct timespec tstamp; /* Timestamp */
427 enum sndrv_pcm_state suspended_state; /* RO: suspended stream state */
428};
429
430struct sndrv_pcm_mmap_control {
431 sndrv_pcm_uframes_t appl_ptr; /* RW: appl ptr (0...boundary-1) */
432 sndrv_pcm_uframes_t avail_min; /* RW: min available frames for wakeup */
433};
434
435#define SNDRV_PCM_SYNC_PTR_HWSYNC (1<<0) /* execute hwsync */
436#define SNDRV_PCM_SYNC_PTR_APPL (1<<1) /* get appl_ptr from driver (r/w op) */
437#define SNDRV_PCM_SYNC_PTR_AVAIL_MIN (1<<2) /* get avail_min from driver */
438
439struct sndrv_pcm_sync_ptr {
440 unsigned int flags;
441 union {
442 struct sndrv_pcm_mmap_status status;
443 unsigned char reserved[64];
444 } s;
445 union {
446 struct sndrv_pcm_mmap_control control;
447 unsigned char reserved[64];
448 } c;
449};
450
451struct sndrv_xferi {
452 sndrv_pcm_sframes_t result;
453 void __user *buf;
454 sndrv_pcm_uframes_t frames;
455};
456
457struct sndrv_xfern {
458 sndrv_pcm_sframes_t result;
459 void __user * __user *bufs;
460 sndrv_pcm_uframes_t frames;
461};
462
463enum {
464 SNDRV_PCM_IOCTL_PVERSION = _IOR('A', 0x00, int),
465 SNDRV_PCM_IOCTL_INFO = _IOR('A', 0x01, struct sndrv_pcm_info),
466 SNDRV_PCM_IOCTL_TSTAMP = _IOW('A', 0x02, int),
467 SNDRV_PCM_IOCTL_HW_REFINE = _IOWR('A', 0x10, struct sndrv_pcm_hw_params),
468 SNDRV_PCM_IOCTL_HW_PARAMS = _IOWR('A', 0x11, struct sndrv_pcm_hw_params),
469 SNDRV_PCM_IOCTL_HW_FREE = _IO('A', 0x12),
470 SNDRV_PCM_IOCTL_SW_PARAMS = _IOWR('A', 0x13, struct sndrv_pcm_sw_params),
471 SNDRV_PCM_IOCTL_STATUS = _IOR('A', 0x20, struct sndrv_pcm_status),
472 SNDRV_PCM_IOCTL_DELAY = _IOR('A', 0x21, sndrv_pcm_sframes_t),
473 SNDRV_PCM_IOCTL_HWSYNC = _IO('A', 0x22),
474 SNDRV_PCM_IOCTL_SYNC_PTR = _IOWR('A', 0x23, struct sndrv_pcm_sync_ptr),
475 SNDRV_PCM_IOCTL_CHANNEL_INFO = _IOR('A', 0x32, struct sndrv_pcm_channel_info),
476 SNDRV_PCM_IOCTL_PREPARE = _IO('A', 0x40),
477 SNDRV_PCM_IOCTL_RESET = _IO('A', 0x41),
478 SNDRV_PCM_IOCTL_START = _IO('A', 0x42),
479 SNDRV_PCM_IOCTL_DROP = _IO('A', 0x43),
480 SNDRV_PCM_IOCTL_DRAIN = _IO('A', 0x44),
481 SNDRV_PCM_IOCTL_PAUSE = _IOW('A', 0x45, int),
482 SNDRV_PCM_IOCTL_REWIND = _IOW('A', 0x46, sndrv_pcm_uframes_t),
483 SNDRV_PCM_IOCTL_RESUME = _IO('A', 0x47),
484 SNDRV_PCM_IOCTL_XRUN = _IO('A', 0x48),
485 SNDRV_PCM_IOCTL_FORWARD = _IOW('A', 0x49, sndrv_pcm_uframes_t),
486 SNDRV_PCM_IOCTL_WRITEI_FRAMES = _IOW('A', 0x50, struct sndrv_xferi),
487 SNDRV_PCM_IOCTL_READI_FRAMES = _IOR('A', 0x51, struct sndrv_xferi),
488 SNDRV_PCM_IOCTL_WRITEN_FRAMES = _IOW('A', 0x52, struct sndrv_xfern),
489 SNDRV_PCM_IOCTL_READN_FRAMES = _IOR('A', 0x53, struct sndrv_xfern),
490 SNDRV_PCM_IOCTL_LINK = _IOW('A', 0x60, int),
491 SNDRV_PCM_IOCTL_UNLINK = _IO('A', 0x61),
492};
493
494/* Trick to make alsa-lib/acinclude.m4 happy */
495#define SNDRV_PCM_IOCTL_REWIND SNDRV_PCM_IOCTL_REWIND
496
497/*****************************************************************************
498 * *
499 * MIDI v1.0 interface *
500 * *
501 *****************************************************************************/
502
503/*
504 * Raw MIDI section - /dev/snd/midi??
505 */
506
507#define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 0)
508
509enum sndrv_rawmidi_stream {
510 SNDRV_RAWMIDI_STREAM_OUTPUT = 0,
511 SNDRV_RAWMIDI_STREAM_INPUT,
512 SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT,
513};
514
515#define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001
516#define SNDRV_RAWMIDI_INFO_INPUT 0x00000002
517#define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004
518
519struct sndrv_rawmidi_info {
520 unsigned int device; /* RO/WR (control): device number */
521 unsigned int subdevice; /* RO/WR (control): subdevice number */
522 enum sndrv_rawmidi_stream stream; /* WR: stream */
523 int card; /* R: card number */
524 unsigned int flags; /* SNDRV_RAWMIDI_INFO_XXXX */
525 unsigned char id[64]; /* ID (user selectable) */
526 unsigned char name[80]; /* name of device */
527 unsigned char subname[32]; /* name of active or selected subdevice */
528 unsigned int subdevices_count;
529 unsigned int subdevices_avail;
530 unsigned char reserved[64]; /* reserved for future use */
531};
532
533struct sndrv_rawmidi_params {
534 enum sndrv_rawmidi_stream stream;
535 size_t buffer_size; /* queue size in bytes */
536 size_t avail_min; /* minimum avail bytes for wakeup */
537 unsigned int no_active_sensing: 1; /* do not send active sensing byte in close() */
538 unsigned char reserved[16]; /* reserved for future use */
539};
540
541struct sndrv_rawmidi_status {
542 enum sndrv_rawmidi_stream stream;
543 struct timespec tstamp; /* Timestamp */
544 size_t avail; /* available bytes */
545 size_t xruns; /* count of overruns since last status (in bytes) */
546 unsigned char reserved[16]; /* reserved for future use */
547};
548
549enum {
550 SNDRV_RAWMIDI_IOCTL_PVERSION = _IOR('W', 0x00, int),
551 SNDRV_RAWMIDI_IOCTL_INFO = _IOR('W', 0x01, struct sndrv_rawmidi_info),
552 SNDRV_RAWMIDI_IOCTL_PARAMS = _IOWR('W', 0x10, struct sndrv_rawmidi_params),
553 SNDRV_RAWMIDI_IOCTL_STATUS = _IOWR('W', 0x20, struct sndrv_rawmidi_status),
554 SNDRV_RAWMIDI_IOCTL_DROP = _IOW('W', 0x30, int),
555 SNDRV_RAWMIDI_IOCTL_DRAIN = _IOW('W', 0x31, int),
556};
557
558/*
559 * Timer section - /dev/snd/timer
560 */
561
562#define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 2)
563
564enum sndrv_timer_class {
565 SNDRV_TIMER_CLASS_NONE = -1,
566 SNDRV_TIMER_CLASS_SLAVE = 0,
567 SNDRV_TIMER_CLASS_GLOBAL,
568 SNDRV_TIMER_CLASS_CARD,
569 SNDRV_TIMER_CLASS_PCM,
570 SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM,
571};
572
573/* slave timer classes */
574enum sndrv_timer_slave_class {
575 SNDRV_TIMER_SCLASS_NONE = 0,
576 SNDRV_TIMER_SCLASS_APPLICATION,
577 SNDRV_TIMER_SCLASS_SEQUENCER, /* alias */
578 SNDRV_TIMER_SCLASS_OSS_SEQUENCER, /* alias */
579 SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
580};
581
582/* global timers (device member) */
583#define SNDRV_TIMER_GLOBAL_SYSTEM 0
584#define SNDRV_TIMER_GLOBAL_RTC 1
585#define SNDRV_TIMER_GLOBAL_HPET 2
586
587/* info flags */
588#define SNDRV_TIMER_FLG_SLAVE (1<<0) /* cannot be controlled */
589
590struct sndrv_timer_id {
591 enum sndrv_timer_class dev_class;
592 enum sndrv_timer_slave_class dev_sclass;
593 int card;
594 int device;
595 int subdevice;
596};
597
598struct sndrv_timer_ginfo {
599 struct sndrv_timer_id tid; /* requested timer ID */
600 unsigned int flags; /* timer flags - SNDRV_TIMER_FLG_* */
601 int card; /* card number */
602 unsigned char id[64]; /* timer identification */
603 unsigned char name[80]; /* timer name */
604 unsigned long reserved0; /* reserved for future use */
605 unsigned long resolution; /* average period resolution in ns */
606 unsigned long resolution_min; /* minimal period resolution in ns */
607 unsigned long resolution_max; /* maximal period resolution in ns */
608 unsigned int clients; /* active timer clients */
609 unsigned char reserved[32];
610};
611
612struct sndrv_timer_gparams {
613 struct sndrv_timer_id tid; /* requested timer ID */
614 unsigned long period_num; /* requested precise period duration (in seconds) - numerator */
615 unsigned long period_den; /* requested precise period duration (in seconds) - denominator */
616 unsigned char reserved[32];
617};
618
619struct sndrv_timer_gstatus {
620 struct sndrv_timer_id tid; /* requested timer ID */
621 unsigned long resolution; /* current period resolution in ns */
622 unsigned long resolution_num; /* precise current period resolution (in seconds) - numerator */
623 unsigned long resolution_den; /* precise current period resolution (in seconds) - denominator */
624 unsigned char reserved[32];
625};
626
627struct sndrv_timer_select {
628 struct sndrv_timer_id id; /* bind to timer ID */
629 unsigned char reserved[32]; /* reserved */
630};
631
632struct sndrv_timer_info {
633 unsigned int flags; /* timer flags - SNDRV_TIMER_FLG_* */
634 int card; /* card number */
635 unsigned char id[64]; /* timer identificator */
636 unsigned char name[80]; /* timer name */
637 unsigned long reserved0; /* reserved for future use */
638 unsigned long resolution; /* average period resolution in ns */
639 unsigned char reserved[64]; /* reserved */
640};
641
642#define SNDRV_TIMER_PSFLG_AUTO (1<<0) /* auto start, otherwise one-shot */
643#define SNDRV_TIMER_PSFLG_EXCLUSIVE (1<<1) /* exclusive use, precise start/stop/pause/continue */
644#define SNDRV_TIMER_PSFLG_EARLY_EVENT (1<<2) /* write early event to the poll queue */
645
646struct sndrv_timer_params {
647 unsigned int flags; /* flags - SNDRV_MIXER_PSFLG_* */
648 unsigned int ticks; /* requested resolution in ticks */
649 unsigned int queue_size; /* total size of queue (32-1024) */
650 unsigned int reserved0; /* reserved, was: failure locations */
651 unsigned int filter; /* event filter (bitmask of SNDRV_TIMER_EVENT_*) */
652 unsigned char reserved[60]; /* reserved */
653};
654
655struct sndrv_timer_status {
656 struct timespec tstamp; /* Timestamp - last update */
657 unsigned int resolution; /* current period resolution in ns */
658 unsigned int lost; /* counter of master tick lost */
659 unsigned int overrun; /* count of read queue overruns */
660 unsigned int queue; /* used queue size */
661 unsigned char reserved[64]; /* reserved */
662};
663
664enum {
665 SNDRV_TIMER_IOCTL_PVERSION = _IOR('T', 0x00, int),
666 SNDRV_TIMER_IOCTL_NEXT_DEVICE = _IOWR('T', 0x01, struct sndrv_timer_id),
667 SNDRV_TIMER_IOCTL_TREAD = _IOW('T', 0x02, int),
668 SNDRV_TIMER_IOCTL_GINFO = _IOWR('T', 0x03, struct sndrv_timer_ginfo),
669 SNDRV_TIMER_IOCTL_GPARAMS = _IOW('T', 0x04, struct sndrv_timer_gparams),
670 SNDRV_TIMER_IOCTL_GSTATUS = _IOWR('T', 0x05, struct sndrv_timer_gstatus),
671 SNDRV_TIMER_IOCTL_SELECT = _IOW('T', 0x10, struct sndrv_timer_select),
672 SNDRV_TIMER_IOCTL_INFO = _IOR('T', 0x11, struct sndrv_timer_info),
673 SNDRV_TIMER_IOCTL_PARAMS = _IOW('T', 0x12, struct sndrv_timer_params),
674 SNDRV_TIMER_IOCTL_STATUS = _IOR('T', 0x14, struct sndrv_timer_status),
675 SNDRV_TIMER_IOCTL_START = _IO('T', 0x20),
676 SNDRV_TIMER_IOCTL_STOP = _IO('T', 0x21),
677 SNDRV_TIMER_IOCTL_CONTINUE = _IO('T', 0x22),
678 SNDRV_TIMER_IOCTL_PAUSE = _IO('T', 0x23),
679};
680
681struct sndrv_timer_read {
682 unsigned int resolution;
683 unsigned int ticks;
684};
685
686enum sndrv_timer_event {
687 SNDRV_TIMER_EVENT_RESOLUTION = 0, /* val = resolution in ns */
688 SNDRV_TIMER_EVENT_TICK, /* val = ticks */
689 SNDRV_TIMER_EVENT_START, /* val = resolution in ns */
690 SNDRV_TIMER_EVENT_STOP, /* val = 0 */
691 SNDRV_TIMER_EVENT_CONTINUE, /* val = resolution in ns */
692 SNDRV_TIMER_EVENT_PAUSE, /* val = 0 */
693 SNDRV_TIMER_EVENT_EARLY, /* val = 0, early event */
694 /* master timer events for slave timer instances */
695 SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10,
696 SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10,
697 SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10,
698 SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10,
699};
700
701struct sndrv_timer_tread {
702 enum sndrv_timer_event event;
703 struct timespec tstamp;
704 unsigned int val;
705};
706
707/****************************************************************************
708 * *
709 * Section for driver control interface - /dev/snd/control? *
710 * *
711 ****************************************************************************/
712
713#define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 3)
714
715struct sndrv_ctl_card_info {
716 int card; /* card number */
717 int pad; /* reserved for future (was type) */
718 unsigned char id[16]; /* ID of card (user selectable) */
719 unsigned char driver[16]; /* Driver name */
720 unsigned char name[32]; /* Short name of soundcard */
721 unsigned char longname[80]; /* name + info text about soundcard */
722 unsigned char reserved_[16]; /* reserved for future (was ID of mixer) */
723 unsigned char mixername[80]; /* visual mixer identification */
724 unsigned char components[80]; /* card components / fine identification, delimited with one space (AC97 etc..) */
725 unsigned char reserved[48]; /* reserved for future */
726};
727
728enum sndrv_ctl_elem_type {
729 SNDRV_CTL_ELEM_TYPE_NONE = 0, /* invalid */
730 SNDRV_CTL_ELEM_TYPE_BOOLEAN, /* boolean type */
731 SNDRV_CTL_ELEM_TYPE_INTEGER, /* integer type */
732 SNDRV_CTL_ELEM_TYPE_ENUMERATED, /* enumerated type */
733 SNDRV_CTL_ELEM_TYPE_BYTES, /* byte array */
734 SNDRV_CTL_ELEM_TYPE_IEC958, /* IEC958 (S/PDIF) setup */
735 SNDRV_CTL_ELEM_TYPE_INTEGER64, /* 64-bit integer type */
736 SNDRV_CTL_ELEM_TYPE_LAST = SNDRV_CTL_ELEM_TYPE_INTEGER64,
737};
738
739enum sndrv_ctl_elem_iface {
740 SNDRV_CTL_ELEM_IFACE_CARD = 0, /* global control */
741 SNDRV_CTL_ELEM_IFACE_HWDEP, /* hardware dependent device */
742 SNDRV_CTL_ELEM_IFACE_MIXER, /* virtual mixer device */
743 SNDRV_CTL_ELEM_IFACE_PCM, /* PCM device */
744 SNDRV_CTL_ELEM_IFACE_RAWMIDI, /* RawMidi device */
745 SNDRV_CTL_ELEM_IFACE_TIMER, /* timer device */
746 SNDRV_CTL_ELEM_IFACE_SEQUENCER, /* sequencer client */
747 SNDRV_CTL_ELEM_IFACE_LAST = SNDRV_CTL_ELEM_IFACE_SEQUENCER,
748};
749
750#define SNDRV_CTL_ELEM_ACCESS_READ (1<<0)
751#define SNDRV_CTL_ELEM_ACCESS_WRITE (1<<1)
752#define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE)
753#define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1<<2) /* control value may be changed without a notification */
754#define SNDRV_CTL_ELEM_ACCESS_TIMESTAMP (1<<2) /* when was control changed */
755#define SNDRV_CTL_ELEM_ACCESS_INACTIVE (1<<8) /* control does actually nothing, but may be updated */
756#define SNDRV_CTL_ELEM_ACCESS_LOCK (1<<9) /* write lock */
757#define SNDRV_CTL_ELEM_ACCESS_OWNER (1<<10) /* write lock owner */
758#define SNDRV_CTL_ELEM_ACCESS_USER (1<<29) /* user space element */
759#define SNDRV_CTL_ELEM_ACCESS_DINDIRECT (1<<30) /* indirect access for matrix dimensions in the info structure */
760#define SNDRV_CTL_ELEM_ACCESS_INDIRECT (1<<31) /* indirect access for element value in the value structure */
761
762/* for further details see the ACPI and PCI power management specification */
763#define SNDRV_CTL_POWER_D0 0x0000 /* full On */
764#define SNDRV_CTL_POWER_D1 0x0100 /* partial On */
765#define SNDRV_CTL_POWER_D2 0x0200 /* partial On */
766#define SNDRV_CTL_POWER_D3 0x0300 /* Off */
767#define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3|0x0000) /* Off, with power */
768#define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3|0x0001) /* Off, without power */
769
770struct sndrv_ctl_elem_id {
771 unsigned int numid; /* numeric identifier, zero = invalid */
772 enum sndrv_ctl_elem_iface iface; /* interface identifier */
773 unsigned int device; /* device/client number */
774 unsigned int subdevice; /* subdevice (substream) number */
775 unsigned char name[44]; /* ASCII name of item */
776 unsigned int index; /* index of item */
777};
778
779struct sndrv_ctl_elem_list {
780 unsigned int offset; /* W: first element ID to get */
781 unsigned int space; /* W: count of element IDs to get */
782 unsigned int used; /* R: count of element IDs set */
783 unsigned int count; /* R: count of all elements */
784 struct sndrv_ctl_elem_id __user *pids; /* R: IDs */
785 unsigned char reserved[50];
786};
787
788struct sndrv_ctl_elem_info {
789 struct sndrv_ctl_elem_id id; /* W: element ID */
790 enum sndrv_ctl_elem_type type; /* R: value type - SNDRV_CTL_ELEM_TYPE_* */
791 unsigned int access; /* R: value access (bitmask) - SNDRV_CTL_ELEM_ACCESS_* */
792 unsigned int count; /* count of values */
793 pid_t owner; /* owner's PID of this control */
794 union {
795 struct {
796 long min; /* R: minimum value */
797 long max; /* R: maximum value */
798 long step; /* R: step (0 variable) */
799 } integer;
800 struct {
801 long long min; /* R: minimum value */
802 long long max; /* R: maximum value */
803 long long step; /* R: step (0 variable) */
804 } integer64;
805 struct {
806 unsigned int items; /* R: number of items */
807 unsigned int item; /* W: item number */
808 char name[64]; /* R: value name */
809 } enumerated;
810 unsigned char reserved[128];
811 } value;
812 union {
813 unsigned short d[4]; /* dimensions */
814 unsigned short *d_ptr; /* indirect */
815 } dimen;
816 unsigned char reserved[64-4*sizeof(unsigned short)];
817};
818
819struct sndrv_ctl_elem_value {
820 struct sndrv_ctl_elem_id id; /* W: element ID */
821 unsigned int indirect: 1; /* W: use indirect pointer (xxx_ptr member) */
822 union {
823 union {
824 long value[128];
825 long *value_ptr;
826 } integer;
827 union {
828 long long value[64];
829 long long *value_ptr;
830 } integer64;
831 union {
832 unsigned int item[128];
833 unsigned int *item_ptr;
834 } enumerated;
835 union {
836 unsigned char data[512];
837 unsigned char *data_ptr;
838 } bytes;
839 struct sndrv_aes_iec958 iec958;
840 } value; /* RO */
841 struct timespec tstamp;
842 unsigned char reserved[128-sizeof(struct timespec)];
843};
844
845enum {
846 SNDRV_CTL_IOCTL_PVERSION = _IOR('U', 0x00, int),
847 SNDRV_CTL_IOCTL_CARD_INFO = _IOR('U', 0x01, struct sndrv_ctl_card_info),
848 SNDRV_CTL_IOCTL_ELEM_LIST = _IOWR('U', 0x10, struct sndrv_ctl_elem_list),
849 SNDRV_CTL_IOCTL_ELEM_INFO = _IOWR('U', 0x11, struct sndrv_ctl_elem_info),
850 SNDRV_CTL_IOCTL_ELEM_READ = _IOWR('U', 0x12, struct sndrv_ctl_elem_value),
851 SNDRV_CTL_IOCTL_ELEM_WRITE = _IOWR('U', 0x13, struct sndrv_ctl_elem_value),
852 SNDRV_CTL_IOCTL_ELEM_LOCK = _IOW('U', 0x14, struct sndrv_ctl_elem_id),
853 SNDRV_CTL_IOCTL_ELEM_UNLOCK = _IOW('U', 0x15, struct sndrv_ctl_elem_id),
854 SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS = _IOWR('U', 0x16, int),
855 SNDRV_CTL_IOCTL_ELEM_ADD = _IOWR('U', 0x17, struct sndrv_ctl_elem_info),
856 SNDRV_CTL_IOCTL_ELEM_REPLACE = _IOWR('U', 0x18, struct sndrv_ctl_elem_info),
857 SNDRV_CTL_IOCTL_ELEM_REMOVE = _IOWR('U', 0x19, struct sndrv_ctl_elem_id),
858 SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE = _IOWR('U', 0x20, int),
859 SNDRV_CTL_IOCTL_HWDEP_INFO = _IOR('U', 0x21, struct sndrv_hwdep_info),
860 SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE = _IOR('U', 0x30, int),
861 SNDRV_CTL_IOCTL_PCM_INFO = _IOWR('U', 0x31, struct sndrv_pcm_info),
862 SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE = _IOW('U', 0x32, int),
863 SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE = _IOWR('U', 0x40, int),
864 SNDRV_CTL_IOCTL_RAWMIDI_INFO = _IOWR('U', 0x41, struct sndrv_rawmidi_info),
865 SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE = _IOW('U', 0x42, int),
866 SNDRV_CTL_IOCTL_POWER = _IOWR('U', 0xd0, int),
867 SNDRV_CTL_IOCTL_POWER_STATE = _IOR('U', 0xd1, int),
868};
869
870/*
871 * Read interface.
872 */
873
874enum sndrv_ctl_event_type {
875 SNDRV_CTL_EVENT_ELEM = 0,
876 SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM,
877};
878
879#define SNDRV_CTL_EVENT_MASK_VALUE (1<<0) /* element value was changed */
880#define SNDRV_CTL_EVENT_MASK_INFO (1<<1) /* element info was changed */
881#define SNDRV_CTL_EVENT_MASK_ADD (1<<2) /* element was added */
882#define SNDRV_CTL_EVENT_MASK_REMOVE (~0U) /* element was removed */
883
884struct sndrv_ctl_event {
885 enum sndrv_ctl_event_type type; /* event type - SNDRV_CTL_EVENT_* */
886 union {
887 struct {
888 unsigned int mask;
889 struct sndrv_ctl_elem_id id;
890 } elem;
891 unsigned char data8[60];
892 } data;
893};
894
895/*
896 * Control names
897 */
898
899#define SNDRV_CTL_NAME_NONE ""
900#define SNDRV_CTL_NAME_PLAYBACK "Playback "
901#define SNDRV_CTL_NAME_CAPTURE "Capture "
902
903#define SNDRV_CTL_NAME_IEC958_NONE ""
904#define SNDRV_CTL_NAME_IEC958_SWITCH "Switch"
905#define SNDRV_CTL_NAME_IEC958_VOLUME "Volume"
906#define SNDRV_CTL_NAME_IEC958_DEFAULT "Default"
907#define SNDRV_CTL_NAME_IEC958_MASK "Mask"
908#define SNDRV_CTL_NAME_IEC958_CON_MASK "Con Mask"
909#define SNDRV_CTL_NAME_IEC958_PRO_MASK "Pro Mask"
910#define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream"
911#define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_##direction SNDRV_CTL_NAME_IEC958_##what
912
913/*
914 *
915 */
916
917struct sndrv_xferv {
918 const struct iovec *vector;
919 unsigned long count;
920};
921
922enum {
923 SNDRV_IOCTL_READV = _IOW('K', 0x00, struct sndrv_xferv),
924 SNDRV_IOCTL_WRITEV = _IOW('K', 0x01, struct sndrv_xferv),
925};
926
927#endif /* __SOUND_ASOUND_H */