Sascha Hauer | 6c7b06850 | 2012-03-07 21:01:28 +0100 | [diff] [blame] | 1 | #ifndef __MACH_IMX_CLK_H |
| 2 | #define __MACH_IMX_CLK_H |
| 3 | |
| 4 | #include <linux/spinlock.h> |
| 5 | #include <linux/clk-provider.h> |
Sascha Hauer | 3a84d17 | 2012-09-11 08:50:00 +0200 | [diff] [blame] | 6 | |
| 7 | extern spinlock_t imx_ccm_lock; |
Sascha Hauer | 6c7b06850 | 2012-03-07 21:01:28 +0100 | [diff] [blame] | 8 | |
Alexander Shiyan | 229be9c | 2014-06-10 19:40:26 +0400 | [diff] [blame] | 9 | void imx_check_clocks(struct clk *clks[], unsigned int count); |
| 10 | |
Liu Ying | dfd8714 | 2013-07-04 17:57:17 +0800 | [diff] [blame] | 11 | extern void imx_cscmr1_fixup(u32 *val); |
| 12 | |
Sascha Hauer | 2af9e6d | 2012-03-09 09:11:55 +0100 | [diff] [blame] | 13 | struct clk *imx_clk_pllv1(const char *name, const char *parent, |
Sascha Hauer | 6c7b06850 | 2012-03-07 21:01:28 +0100 | [diff] [blame] | 14 | void __iomem *base); |
| 15 | |
Sascha Hauer | a547b81 | 2012-03-19 12:36:10 +0100 | [diff] [blame] | 16 | struct clk *imx_clk_pllv2(const char *name, const char *parent, |
| 17 | void __iomem *base); |
| 18 | |
Shawn Guo | a3f6b9d | 2012-04-04 16:02:28 +0800 | [diff] [blame] | 19 | enum imx_pllv3_type { |
| 20 | IMX_PLLV3_GENERIC, |
| 21 | IMX_PLLV3_SYS, |
| 22 | IMX_PLLV3_USB, |
Stefan Agner | 60ad846 | 2014-12-02 17:59:42 +0100 | [diff] [blame^] | 23 | IMX_PLLV3_USB_VF610, |
Shawn Guo | a3f6b9d | 2012-04-04 16:02:28 +0800 | [diff] [blame] | 24 | IMX_PLLV3_AV, |
| 25 | IMX_PLLV3_ENET, |
Shawn Guo | a3f6b9d | 2012-04-04 16:02:28 +0800 | [diff] [blame] | 26 | }; |
| 27 | |
| 28 | struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name, |
Sascha Hauer | 2b25469 | 2012-11-22 10:18:41 +0100 | [diff] [blame] | 29 | const char *parent_name, void __iomem *base, u32 div_mask); |
Shawn Guo | a3f6b9d | 2012-04-04 16:02:28 +0800 | [diff] [blame] | 30 | |
Sascha Hauer | b75c015 | 2011-04-19 08:33:45 +0200 | [diff] [blame] | 31 | struct clk *clk_register_gate2(struct device *dev, const char *name, |
| 32 | const char *parent_name, unsigned long flags, |
| 33 | void __iomem *reg, u8 bit_idx, |
Shawn Guo | f9f28cd | 2014-04-19 10:58:22 +0800 | [diff] [blame] | 34 | u8 clk_gate_flags, spinlock_t *lock, |
| 35 | unsigned int *share_count); |
Sascha Hauer | b75c015 | 2011-04-19 08:33:45 +0200 | [diff] [blame] | 36 | |
Martin Fuzzey | 75f83d0 | 2013-04-23 20:16:59 +0800 | [diff] [blame] | 37 | struct clk * imx_obtain_fixed_clock( |
| 38 | const char *name, unsigned long rate); |
| 39 | |
Shawn Guo | 19d8634 | 2014-08-26 15:06:33 +0800 | [diff] [blame] | 40 | struct clk *imx_clk_gate_exclusive(const char *name, const char *parent, |
| 41 | void __iomem *reg, u8 shift, u32 exclusive_mask); |
| 42 | |
Sascha Hauer | b75c015 | 2011-04-19 08:33:45 +0200 | [diff] [blame] | 43 | static inline struct clk *imx_clk_gate2(const char *name, const char *parent, |
| 44 | void __iomem *reg, u8 shift) |
| 45 | { |
| 46 | return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg, |
Shawn Guo | f9f28cd | 2014-04-19 10:58:22 +0800 | [diff] [blame] | 47 | shift, 0, &imx_ccm_lock, NULL); |
| 48 | } |
| 49 | |
| 50 | static inline struct clk *imx_clk_gate2_shared(const char *name, |
| 51 | const char *parent, void __iomem *reg, u8 shift, |
| 52 | unsigned int *share_count) |
| 53 | { |
| 54 | return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg, |
| 55 | shift, 0, &imx_ccm_lock, share_count); |
Sascha Hauer | b75c015 | 2011-04-19 08:33:45 +0200 | [diff] [blame] | 56 | } |
| 57 | |
Shawn Guo | a10bd67 | 2012-04-04 16:07:53 +0800 | [diff] [blame] | 58 | struct clk *imx_clk_pfd(const char *name, const char *parent_name, |
| 59 | void __iomem *reg, u8 idx); |
| 60 | |
Shawn Guo | 32af7a8 | 2012-04-04 16:20:56 +0800 | [diff] [blame] | 61 | struct clk *imx_clk_busy_divider(const char *name, const char *parent_name, |
| 62 | void __iomem *reg, u8 shift, u8 width, |
| 63 | void __iomem *busy_reg, u8 busy_shift); |
| 64 | |
| 65 | struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift, |
| 66 | u8 width, void __iomem *busy_reg, u8 busy_shift, |
| 67 | const char **parent_names, int num_parents); |
| 68 | |
Liu Ying | cbe7fc8 | 2013-07-04 17:22:26 +0800 | [diff] [blame] | 69 | struct clk *imx_clk_fixup_divider(const char *name, const char *parent, |
| 70 | void __iomem *reg, u8 shift, u8 width, |
| 71 | void (*fixup)(u32 *val)); |
| 72 | |
Liu Ying | a49e6c4 | 2013-07-04 17:35:46 +0800 | [diff] [blame] | 73 | struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg, |
| 74 | u8 shift, u8 width, const char **parents, |
| 75 | int num_parents, void (*fixup)(u32 *val)); |
| 76 | |
Sascha Hauer | 6c7b06850 | 2012-03-07 21:01:28 +0100 | [diff] [blame] | 77 | static inline struct clk *imx_clk_fixed(const char *name, int rate) |
| 78 | { |
| 79 | return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate); |
| 80 | } |
| 81 | |
| 82 | static inline struct clk *imx_clk_divider(const char *name, const char *parent, |
| 83 | void __iomem *reg, u8 shift, u8 width) |
| 84 | { |
| 85 | return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT, |
| 86 | reg, shift, width, 0, &imx_ccm_lock); |
| 87 | } |
| 88 | |
Philipp Zabel | 3ce9217 | 2013-03-27 18:30:40 +0100 | [diff] [blame] | 89 | static inline struct clk *imx_clk_divider_flags(const char *name, |
| 90 | const char *parent, void __iomem *reg, u8 shift, u8 width, |
| 91 | unsigned long flags) |
| 92 | { |
| 93 | return clk_register_divider(NULL, name, parent, flags, |
| 94 | reg, shift, width, 0, &imx_ccm_lock); |
| 95 | } |
| 96 | |
Sascha Hauer | 6c7b06850 | 2012-03-07 21:01:28 +0100 | [diff] [blame] | 97 | static inline struct clk *imx_clk_gate(const char *name, const char *parent, |
| 98 | void __iomem *reg, u8 shift) |
| 99 | { |
| 100 | return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg, |
| 101 | shift, 0, &imx_ccm_lock); |
| 102 | } |
| 103 | |
Alexander Shiyan | 6525169 | 2014-06-22 17:17:06 +0400 | [diff] [blame] | 104 | static inline struct clk *imx_clk_gate_dis(const char *name, const char *parent, |
| 105 | void __iomem *reg, u8 shift) |
| 106 | { |
| 107 | return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg, |
| 108 | shift, CLK_GATE_SET_TO_DISABLE, &imx_ccm_lock); |
| 109 | } |
| 110 | |
Sascha Hauer | 6c7b06850 | 2012-03-07 21:01:28 +0100 | [diff] [blame] | 111 | static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg, |
| 112 | u8 shift, u8 width, const char **parents, int num_parents) |
| 113 | { |
James Hogan | 819c1de | 2013-07-29 12:25:01 +0100 | [diff] [blame] | 114 | return clk_register_mux(NULL, name, parents, num_parents, |
| 115 | CLK_SET_RATE_NO_REPARENT, reg, shift, |
Sascha Hauer | 6c7b06850 | 2012-03-07 21:01:28 +0100 | [diff] [blame] | 116 | width, 0, &imx_ccm_lock); |
| 117 | } |
| 118 | |
Philipp Zabel | 3ce9217 | 2013-03-27 18:30:40 +0100 | [diff] [blame] | 119 | static inline struct clk *imx_clk_mux_flags(const char *name, |
| 120 | void __iomem *reg, u8 shift, u8 width, const char **parents, |
| 121 | int num_parents, unsigned long flags) |
| 122 | { |
| 123 | return clk_register_mux(NULL, name, parents, num_parents, |
James Hogan | 819c1de | 2013-07-29 12:25:01 +0100 | [diff] [blame] | 124 | flags | CLK_SET_RATE_NO_REPARENT, reg, shift, width, 0, |
Philipp Zabel | 3ce9217 | 2013-03-27 18:30:40 +0100 | [diff] [blame] | 125 | &imx_ccm_lock); |
| 126 | } |
| 127 | |
Sascha Hauer | 6c7b06850 | 2012-03-07 21:01:28 +0100 | [diff] [blame] | 128 | static inline struct clk *imx_clk_fixed_factor(const char *name, |
| 129 | const char *parent, unsigned int mult, unsigned int div) |
| 130 | { |
| 131 | return clk_register_fixed_factor(NULL, name, parent, |
| 132 | CLK_SET_RATE_PARENT, mult, div); |
| 133 | } |
| 134 | |
Lucas Stach | e0fed51 | 2014-09-26 15:41:01 +0200 | [diff] [blame] | 135 | struct clk *imx_clk_cpu(const char *name, const char *parent_name, |
| 136 | struct clk *div, struct clk *mux, struct clk *pll, |
| 137 | struct clk *step); |
| 138 | |
Sascha Hauer | 6c7b06850 | 2012-03-07 21:01:28 +0100 | [diff] [blame] | 139 | #endif |