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Linus Torvalds1da177e2005-04-16 15:20:36 -07001#ifndef __ASM_SH_HW_IRQ_H
2#define __ASM_SH_HW_IRQ_H
3
Magnus Damm02ab3f72007-07-18 17:25:09 +09004#include <linux/init.h>
Paul Mundt35f3c512006-10-06 15:31:16 +09005#include <asm/atomic.h>
6
7extern atomic_t irq_err_count;
8
Magnus Dammd6195002007-06-15 10:41:54 +09009struct intc2_data {
10 unsigned short irq;
11 unsigned char ipr_offset, ipr_shift;
12 unsigned char msk_offset, msk_shift;
13 unsigned char priority;
14};
15
16struct intc2_desc {
17 unsigned long prio_base;
18 unsigned long msk_base;
19 unsigned long mskclr_base;
20 struct intc2_data *intc2_data;
21 unsigned int nr_irqs;
22 struct irq_chip chip;
23};
24
25void register_intc2_controller(struct intc2_desc *);
Magnus Dammd6195002007-06-15 10:41:54 +090026
Magnus Damm68abdbb2007-06-15 18:56:19 +090027struct ipr_data {
28 unsigned char irq;
29 unsigned char ipr_idx; /* Index for the IPR registered */
30 unsigned char shift; /* Number of bits to shift the data */
31 unsigned char priority; /* The priority */
32};
33
34struct ipr_desc {
35 unsigned long *ipr_offsets;
36 unsigned int nr_offsets;
37 struct ipr_data *ipr_data;
38 unsigned int nr_irqs;
39 struct irq_chip chip;
40};
41
42void register_ipr_controller(struct ipr_desc *);
Magnus Damm68abdbb2007-06-15 18:56:19 +090043
44/*
45 * Enable individual interrupt mode for external IPR IRQs.
46 */
Magnus Damm56386f62007-07-20 18:44:49 +090047void __init ipr_irq_enable_irlm(void);
Magnus Damm68abdbb2007-06-15 18:56:19 +090048
Magnus Damm02ab3f72007-07-18 17:25:09 +090049typedef unsigned char intc_enum;
50
51struct intc_vect {
52 intc_enum enum_id;
53 unsigned short vect;
54};
55
56#define INTC_VECT(enum_id, vect) { enum_id, vect }
57
58struct intc_prio {
59 intc_enum enum_id;
60 unsigned char priority;
61};
62
63#define INTC_PRIO(enum_id, prio) { enum_id, prio }
64
65struct intc_group {
66 intc_enum enum_id;
67 intc_enum *enum_ids;
68};
69
70#define INTC_GROUP(enum_id, ids...) { enum_id, (intc_enum []) { ids, 0 } }
71
72struct intc_mask_reg {
73 unsigned long set_reg, clr_reg, reg_width;
74 intc_enum enum_ids[32];
75};
76
77struct intc_prio_reg {
78 unsigned long reg, reg_width, field_width;
79 intc_enum enum_ids[16];
80};
81
82struct intc_sense_reg {
83 unsigned long reg, reg_width, field_width;
84 intc_enum enum_ids[16];
85};
86
87struct intc_desc {
88 struct intc_vect *vectors;
89 unsigned int nr_vectors;
90 struct intc_group *groups;
91 unsigned int nr_groups;
92 struct intc_prio *priorities;
93 unsigned int nr_priorities;
94 struct intc_mask_reg *mask_regs;
95 unsigned int nr_mask_regs;
96 struct intc_prio_reg *prio_regs;
97 unsigned int nr_prio_regs;
98 struct intc_sense_reg *sense_regs;
99 unsigned int nr_sense_regs;
100 struct irq_chip chip;
101};
102
103#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
104#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
105 priorities, mask_regs, prio_regs, sense_regs) \
Magnus Damm1b064282007-07-18 17:51:24 +0900106struct intc_desc symbol = { \
Magnus Damm02ab3f72007-07-18 17:25:09 +0900107 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
108 _INTC_ARRAY(priorities), \
109 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
110 _INTC_ARRAY(sense_regs), \
111 .chip.name = chipname, \
112}
113
114void __init register_intc_controller(struct intc_desc *desc);
115
Magnus Damm90015c82007-07-18 17:57:34 +0900116void __init plat_irq_setup(void);
117
Magnus Damm39c7aa92007-07-20 12:10:29 +0900118enum { IRQ_MODE_IRQ, IRQ_MODE_IRL7654, IRQ_MODE_IRL3210 };
119void __init plat_irq_setup_pins(int mode);
120
Linus Torvalds1da177e2005-04-16 15:20:36 -0700121#endif /* __ASM_SH_HW_IRQ_H */