Bart Van Assche | bec9e8a | 2017-08-17 13:12:47 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Driver for sTec s1120 PCIe SSDs. sTec was acquired in 2013 by HGST and HGST |
| 3 | * was acquired by Western Digital in 2012. |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 4 | * |
Bart Van Assche | bec9e8a | 2017-08-17 13:12:47 -0700 | [diff] [blame] | 5 | * Copyright 2012 sTec, Inc. |
| 6 | * Copyright (c) 2017 Western Digital Corporation or its affiliates. |
| 7 | * |
| 8 | * This file is part of the Linux kernel, and is made available under |
| 9 | * the terms of the GNU General Public License version 2. |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 10 | */ |
| 11 | |
| 12 | #include <linux/kernel.h> |
| 13 | #include <linux/module.h> |
| 14 | #include <linux/init.h> |
| 15 | #include <linux/pci.h> |
| 16 | #include <linux/slab.h> |
| 17 | #include <linux/spinlock.h> |
| 18 | #include <linux/blkdev.h> |
| 19 | #include <linux/sched.h> |
| 20 | #include <linux/interrupt.h> |
| 21 | #include <linux/compiler.h> |
| 22 | #include <linux/workqueue.h> |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 23 | #include <linux/delay.h> |
| 24 | #include <linux/time.h> |
| 25 | #include <linux/hdreg.h> |
| 26 | #include <linux/dma-mapping.h> |
| 27 | #include <linux/completion.h> |
| 28 | #include <linux/scatterlist.h> |
| 29 | #include <linux/version.h> |
| 30 | #include <linux/err.h> |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 31 | #include <linux/aer.h> |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 32 | #include <linux/wait.h> |
Bart Van Assche | 2da7b40 | 2017-08-17 13:13:01 -0700 | [diff] [blame] | 33 | #include <linux/stringify.h> |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 34 | #include <scsi/scsi.h> |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 35 | #include <scsi/sg.h> |
| 36 | #include <linux/io.h> |
| 37 | #include <linux/uaccess.h> |
Bartlomiej Zolnierkiewicz | 4ca90b5 | 2013-11-05 12:37:04 +0100 | [diff] [blame] | 38 | #include <asm/unaligned.h> |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 39 | |
| 40 | #include "skd_s1120.h" |
| 41 | |
| 42 | static int skd_dbg_level; |
| 43 | static int skd_isr_comp_limit = 4; |
| 44 | |
| 45 | enum { |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 46 | SKD_FLUSH_INITIALIZER, |
| 47 | SKD_FLUSH_ZERO_SIZE_FIRST, |
| 48 | SKD_FLUSH_DATA_SECOND, |
| 49 | }; |
| 50 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 51 | #define SKD_ASSERT(expr) \ |
| 52 | do { \ |
| 53 | if (unlikely(!(expr))) { \ |
| 54 | pr_err("Assertion failed! %s,%s,%s,line=%d\n", \ |
| 55 | # expr, __FILE__, __func__, __LINE__); \ |
| 56 | } \ |
| 57 | } while (0) |
| 58 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 59 | #define DRV_NAME "skd" |
| 60 | #define DRV_VERSION "2.2.1" |
| 61 | #define DRV_BUILD_ID "0260" |
| 62 | #define PFX DRV_NAME ": " |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 63 | |
Bart Van Assche | bec9e8a | 2017-08-17 13:12:47 -0700 | [diff] [blame] | 64 | MODULE_LICENSE("GPL"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 65 | |
Mike Snitzer | 38d4a1b | 2013-11-01 15:05:10 -0400 | [diff] [blame] | 66 | MODULE_DESCRIPTION("STEC s1120 PCIe SSD block driver (b" DRV_BUILD_ID ")"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 67 | MODULE_VERSION(DRV_VERSION "-" DRV_BUILD_ID); |
| 68 | |
| 69 | #define PCI_VENDOR_ID_STEC 0x1B39 |
| 70 | #define PCI_DEVICE_ID_S1120 0x0001 |
| 71 | |
| 72 | #define SKD_FUA_NV (1 << 1) |
| 73 | #define SKD_MINORS_PER_DEVICE 16 |
| 74 | |
| 75 | #define SKD_MAX_QUEUE_DEPTH 200u |
| 76 | |
| 77 | #define SKD_PAUSE_TIMEOUT (5 * 1000) |
| 78 | |
| 79 | #define SKD_N_FITMSG_BYTES (512u) |
Bart Van Assche | 2da7b40 | 2017-08-17 13:13:01 -0700 | [diff] [blame] | 80 | #define SKD_MAX_REQ_PER_MSG 14 |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 81 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 82 | #define SKD_N_SPECIAL_FITMSG_BYTES (128u) |
| 83 | |
| 84 | /* SG elements are 32 bytes, so we can make this 4096 and still be under the |
| 85 | * 128KB limit. That allows 4096*4K = 16M xfer size |
| 86 | */ |
| 87 | #define SKD_N_SG_PER_REQ_DEFAULT 256u |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 88 | |
| 89 | #define SKD_N_COMPLETION_ENTRY 256u |
| 90 | #define SKD_N_READ_CAP_BYTES (8u) |
| 91 | |
| 92 | #define SKD_N_INTERNAL_BYTES (512u) |
| 93 | |
Bart Van Assche | 6f7c767 | 2017-08-17 13:13:02 -0700 | [diff] [blame] | 94 | #define SKD_SKCOMP_SIZE \ |
| 95 | ((sizeof(struct fit_completion_entry_v1) + \ |
| 96 | sizeof(struct fit_comp_error_info)) * SKD_N_COMPLETION_ENTRY) |
| 97 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 98 | /* 5 bits of uniqifier, 0xF800 */ |
| 99 | #define SKD_ID_INCR (0x400) |
| 100 | #define SKD_ID_TABLE_MASK (3u << 8u) |
| 101 | #define SKD_ID_RW_REQUEST (0u << 8u) |
| 102 | #define SKD_ID_INTERNAL (1u << 8u) |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 103 | #define SKD_ID_FIT_MSG (3u << 8u) |
| 104 | #define SKD_ID_SLOT_MASK 0x00FFu |
| 105 | #define SKD_ID_SLOT_AND_TABLE_MASK 0x03FFu |
| 106 | |
| 107 | #define SKD_N_TIMEOUT_SLOT 4u |
| 108 | #define SKD_TIMEOUT_SLOT_MASK 3u |
| 109 | |
| 110 | #define SKD_N_MAX_SECTORS 2048u |
| 111 | |
| 112 | #define SKD_MAX_RETRIES 2u |
| 113 | |
| 114 | #define SKD_TIMER_SECONDS(seconds) (seconds) |
| 115 | #define SKD_TIMER_MINUTES(minutes) ((minutes) * (60)) |
| 116 | |
| 117 | #define INQ_STD_NBYTES 36 |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 118 | |
| 119 | enum skd_drvr_state { |
| 120 | SKD_DRVR_STATE_LOAD, |
| 121 | SKD_DRVR_STATE_IDLE, |
| 122 | SKD_DRVR_STATE_BUSY, |
| 123 | SKD_DRVR_STATE_STARTING, |
| 124 | SKD_DRVR_STATE_ONLINE, |
| 125 | SKD_DRVR_STATE_PAUSING, |
| 126 | SKD_DRVR_STATE_PAUSED, |
| 127 | SKD_DRVR_STATE_DRAINING_TIMEOUT, |
| 128 | SKD_DRVR_STATE_RESTARTING, |
| 129 | SKD_DRVR_STATE_RESUMING, |
| 130 | SKD_DRVR_STATE_STOPPING, |
| 131 | SKD_DRVR_STATE_FAULT, |
| 132 | SKD_DRVR_STATE_DISAPPEARED, |
| 133 | SKD_DRVR_STATE_PROTOCOL_MISMATCH, |
| 134 | SKD_DRVR_STATE_BUSY_ERASE, |
| 135 | SKD_DRVR_STATE_BUSY_SANITIZE, |
| 136 | SKD_DRVR_STATE_BUSY_IMMINENT, |
| 137 | SKD_DRVR_STATE_WAIT_BOOT, |
| 138 | SKD_DRVR_STATE_SYNCING, |
| 139 | }; |
| 140 | |
| 141 | #define SKD_WAIT_BOOT_TIMO SKD_TIMER_SECONDS(90u) |
| 142 | #define SKD_STARTING_TIMO SKD_TIMER_SECONDS(8u) |
| 143 | #define SKD_RESTARTING_TIMO SKD_TIMER_MINUTES(4u) |
| 144 | #define SKD_DRAINING_TIMO SKD_TIMER_SECONDS(6u) |
| 145 | #define SKD_BUSY_TIMO SKD_TIMER_MINUTES(20u) |
| 146 | #define SKD_STARTED_BUSY_TIMO SKD_TIMER_SECONDS(60u) |
| 147 | #define SKD_START_WAIT_SECONDS 90u |
| 148 | |
| 149 | enum skd_req_state { |
| 150 | SKD_REQ_STATE_IDLE, |
| 151 | SKD_REQ_STATE_SETUP, |
| 152 | SKD_REQ_STATE_BUSY, |
| 153 | SKD_REQ_STATE_COMPLETED, |
| 154 | SKD_REQ_STATE_TIMEOUT, |
| 155 | SKD_REQ_STATE_ABORTED, |
| 156 | }; |
| 157 | |
| 158 | enum skd_fit_msg_state { |
| 159 | SKD_MSG_STATE_IDLE, |
| 160 | SKD_MSG_STATE_BUSY, |
| 161 | }; |
| 162 | |
| 163 | enum skd_check_status_action { |
| 164 | SKD_CHECK_STATUS_REPORT_GOOD, |
| 165 | SKD_CHECK_STATUS_REPORT_SMART_ALERT, |
| 166 | SKD_CHECK_STATUS_REQUEUE_REQUEST, |
| 167 | SKD_CHECK_STATUS_REPORT_ERROR, |
| 168 | SKD_CHECK_STATUS_BUSY_IMMINENT, |
| 169 | }; |
| 170 | |
Bart Van Assche | d891fe6 | 2017-08-17 13:13:07 -0700 | [diff] [blame] | 171 | struct skd_msg_buf { |
| 172 | struct fit_msg_hdr fmh; |
| 173 | struct skd_scsi_request scsi[SKD_MAX_REQ_PER_MSG]; |
| 174 | }; |
| 175 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 176 | struct skd_fitmsg_context { |
| 177 | enum skd_fit_msg_state state; |
| 178 | |
| 179 | struct skd_fitmsg_context *next; |
| 180 | |
| 181 | u32 id; |
| 182 | u16 outstanding; |
| 183 | |
| 184 | u32 length; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 185 | |
Bart Van Assche | d891fe6 | 2017-08-17 13:13:07 -0700 | [diff] [blame] | 186 | struct skd_msg_buf *msg_buf; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 187 | dma_addr_t mb_dma_address; |
| 188 | }; |
| 189 | |
| 190 | struct skd_request_context { |
| 191 | enum skd_req_state state; |
| 192 | |
| 193 | struct skd_request_context *next; |
| 194 | |
| 195 | u16 id; |
| 196 | u32 fitmsg_id; |
| 197 | |
| 198 | struct request *req; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 199 | u8 flush_cmd; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 200 | |
| 201 | u32 timeout_stamp; |
Bart Van Assche | b1824ee | 2017-08-17 13:13:12 -0700 | [diff] [blame] | 202 | enum dma_data_direction data_dir; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 203 | struct scatterlist *sg; |
| 204 | u32 n_sg; |
| 205 | u32 sg_byte_count; |
| 206 | |
| 207 | struct fit_sg_descriptor *sksg_list; |
| 208 | dma_addr_t sksg_dma_address; |
| 209 | |
| 210 | struct fit_completion_entry_v1 completion; |
| 211 | |
| 212 | struct fit_comp_error_info err_info; |
| 213 | |
| 214 | }; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 215 | |
| 216 | struct skd_special_context { |
| 217 | struct skd_request_context req; |
| 218 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 219 | void *data_buf; |
| 220 | dma_addr_t db_dma_address; |
| 221 | |
Bart Van Assche | d891fe6 | 2017-08-17 13:13:07 -0700 | [diff] [blame] | 222 | struct skd_msg_buf *msg_buf; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 223 | dma_addr_t mb_dma_address; |
| 224 | }; |
| 225 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 226 | typedef enum skd_irq_type { |
| 227 | SKD_IRQ_LEGACY, |
| 228 | SKD_IRQ_MSI, |
| 229 | SKD_IRQ_MSIX |
| 230 | } skd_irq_type_t; |
| 231 | |
| 232 | #define SKD_MAX_BARS 2 |
| 233 | |
| 234 | struct skd_device { |
Bart Van Assche | 85e3411 | 2017-08-17 13:13:17 -0700 | [diff] [blame] | 235 | void __iomem *mem_map[SKD_MAX_BARS]; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 236 | resource_size_t mem_phys[SKD_MAX_BARS]; |
| 237 | u32 mem_size[SKD_MAX_BARS]; |
| 238 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 239 | struct skd_msix_entry *msix_entries; |
| 240 | |
| 241 | struct pci_dev *pdev; |
| 242 | int pcie_error_reporting_is_enabled; |
| 243 | |
| 244 | spinlock_t lock; |
| 245 | struct gendisk *disk; |
| 246 | struct request_queue *queue; |
| 247 | struct device *class_dev; |
| 248 | int gendisk_on; |
| 249 | int sync_done; |
| 250 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 251 | u32 devno; |
| 252 | u32 major; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 253 | char isr_name[30]; |
| 254 | |
| 255 | enum skd_drvr_state state; |
| 256 | u32 drive_state; |
| 257 | |
| 258 | u32 in_flight; |
| 259 | u32 cur_max_queue_depth; |
| 260 | u32 queue_low_water_mark; |
| 261 | u32 dev_max_queue_depth; |
| 262 | |
| 263 | u32 num_fitmsg_context; |
| 264 | u32 num_req_context; |
| 265 | |
| 266 | u32 timeout_slot[SKD_N_TIMEOUT_SLOT]; |
| 267 | u32 timeout_stamp; |
| 268 | struct skd_fitmsg_context *skmsg_free_list; |
| 269 | struct skd_fitmsg_context *skmsg_table; |
| 270 | |
| 271 | struct skd_request_context *skreq_free_list; |
| 272 | struct skd_request_context *skreq_table; |
| 273 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 274 | struct skd_special_context internal_skspcl; |
| 275 | u32 read_cap_blocksize; |
| 276 | u32 read_cap_last_lba; |
| 277 | int read_cap_is_valid; |
| 278 | int inquiry_is_valid; |
| 279 | u8 inq_serial_num[13]; /*12 chars plus null term */ |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 280 | |
| 281 | u8 skcomp_cycle; |
| 282 | u32 skcomp_ix; |
| 283 | struct fit_completion_entry_v1 *skcomp_table; |
| 284 | struct fit_comp_error_info *skerr_table; |
| 285 | dma_addr_t cq_dma_address; |
| 286 | |
| 287 | wait_queue_head_t waitq; |
| 288 | |
| 289 | struct timer_list timer; |
| 290 | u32 timer_countdown; |
| 291 | u32 timer_substate; |
| 292 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 293 | int sgs_per_request; |
| 294 | u32 last_mtd; |
| 295 | |
| 296 | u32 proto_ver; |
| 297 | |
| 298 | int dbg_level; |
| 299 | u32 connect_time_stamp; |
| 300 | int connect_retries; |
| 301 | #define SKD_MAX_CONNECT_RETRIES 16 |
| 302 | u32 drive_jiffies; |
| 303 | |
| 304 | u32 timo_slot; |
| 305 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 306 | struct work_struct completion_worker; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 307 | }; |
| 308 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 309 | #define SKD_WRITEL(DEV, VAL, OFF) skd_reg_write32(DEV, VAL, OFF) |
| 310 | #define SKD_READL(DEV, OFF) skd_reg_read32(DEV, OFF) |
| 311 | #define SKD_WRITEQ(DEV, VAL, OFF) skd_reg_write64(DEV, VAL, OFF) |
| 312 | |
| 313 | static inline u32 skd_reg_read32(struct skd_device *skdev, u32 offset) |
| 314 | { |
Bart Van Assche | 14262a4 | 2017-08-17 13:12:57 -0700 | [diff] [blame] | 315 | u32 val = readl(skdev->mem_map[1] + offset); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 316 | |
Bart Van Assche | 14262a4 | 2017-08-17 13:12:57 -0700 | [diff] [blame] | 317 | if (unlikely(skdev->dbg_level >= 2)) |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 318 | dev_dbg(&skdev->pdev->dev, "offset %x = %x\n", offset, val); |
Bart Van Assche | 14262a4 | 2017-08-17 13:12:57 -0700 | [diff] [blame] | 319 | return val; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 320 | } |
| 321 | |
| 322 | static inline void skd_reg_write32(struct skd_device *skdev, u32 val, |
| 323 | u32 offset) |
| 324 | { |
Bart Van Assche | 14262a4 | 2017-08-17 13:12:57 -0700 | [diff] [blame] | 325 | writel(val, skdev->mem_map[1] + offset); |
| 326 | if (unlikely(skdev->dbg_level >= 2)) |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 327 | dev_dbg(&skdev->pdev->dev, "offset %x = %x\n", offset, val); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 328 | } |
| 329 | |
| 330 | static inline void skd_reg_write64(struct skd_device *skdev, u64 val, |
| 331 | u32 offset) |
| 332 | { |
Bart Van Assche | 14262a4 | 2017-08-17 13:12:57 -0700 | [diff] [blame] | 333 | writeq(val, skdev->mem_map[1] + offset); |
| 334 | if (unlikely(skdev->dbg_level >= 2)) |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 335 | dev_dbg(&skdev->pdev->dev, "offset %x = %016llx\n", offset, |
| 336 | val); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 337 | } |
| 338 | |
| 339 | |
| 340 | #define SKD_IRQ_DEFAULT SKD_IRQ_MSI |
| 341 | static int skd_isr_type = SKD_IRQ_DEFAULT; |
| 342 | |
| 343 | module_param(skd_isr_type, int, 0444); |
| 344 | MODULE_PARM_DESC(skd_isr_type, "Interrupt type capability." |
| 345 | " (0==legacy, 1==MSI, 2==MSI-X, default==1)"); |
| 346 | |
| 347 | #define SKD_MAX_REQ_PER_MSG_DEFAULT 1 |
| 348 | static int skd_max_req_per_msg = SKD_MAX_REQ_PER_MSG_DEFAULT; |
| 349 | |
| 350 | module_param(skd_max_req_per_msg, int, 0444); |
| 351 | MODULE_PARM_DESC(skd_max_req_per_msg, |
| 352 | "Maximum SCSI requests packed in a single message." |
Bart Van Assche | 2da7b40 | 2017-08-17 13:13:01 -0700 | [diff] [blame] | 353 | " (1-" __stringify(SKD_MAX_REQ_PER_MSG) ", default==1)"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 354 | |
| 355 | #define SKD_MAX_QUEUE_DEPTH_DEFAULT 64 |
| 356 | #define SKD_MAX_QUEUE_DEPTH_DEFAULT_STR "64" |
| 357 | static int skd_max_queue_depth = SKD_MAX_QUEUE_DEPTH_DEFAULT; |
| 358 | |
| 359 | module_param(skd_max_queue_depth, int, 0444); |
| 360 | MODULE_PARM_DESC(skd_max_queue_depth, |
| 361 | "Maximum SCSI requests issued to s1120." |
| 362 | " (1-200, default==" SKD_MAX_QUEUE_DEPTH_DEFAULT_STR ")"); |
| 363 | |
| 364 | static int skd_sgs_per_request = SKD_N_SG_PER_REQ_DEFAULT; |
| 365 | module_param(skd_sgs_per_request, int, 0444); |
| 366 | MODULE_PARM_DESC(skd_sgs_per_request, |
| 367 | "Maximum SG elements per block request." |
| 368 | " (1-4096, default==256)"); |
| 369 | |
Bart Van Assche | 6321412 | 2017-08-17 13:13:23 -0700 | [diff] [blame^] | 370 | static int skd_max_pass_thru = 1; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 371 | module_param(skd_max_pass_thru, int, 0444); |
| 372 | MODULE_PARM_DESC(skd_max_pass_thru, |
Bart Van Assche | 6321412 | 2017-08-17 13:13:23 -0700 | [diff] [blame^] | 373 | "Maximum SCSI pass-thru at a time. IGNORED"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 374 | |
| 375 | module_param(skd_dbg_level, int, 0444); |
| 376 | MODULE_PARM_DESC(skd_dbg_level, "s1120 debug level (0,1,2)"); |
| 377 | |
| 378 | module_param(skd_isr_comp_limit, int, 0444); |
| 379 | MODULE_PARM_DESC(skd_isr_comp_limit, "s1120 isr comp limit (0=none) default=4"); |
| 380 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 381 | /* Major device number dynamically assigned. */ |
| 382 | static u32 skd_major; |
| 383 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 384 | static void skd_destruct(struct skd_device *skdev); |
| 385 | static const struct block_device_operations skd_blockdev_ops; |
| 386 | static void skd_send_fitmsg(struct skd_device *skdev, |
| 387 | struct skd_fitmsg_context *skmsg); |
| 388 | static void skd_send_special_fitmsg(struct skd_device *skdev, |
| 389 | struct skd_special_context *skspcl); |
| 390 | static void skd_request_fn(struct request_queue *rq); |
| 391 | static void skd_end_request(struct skd_device *skdev, |
Christoph Hellwig | 2a842ac | 2017-06-03 09:38:04 +0200 | [diff] [blame] | 392 | struct skd_request_context *skreq, blk_status_t status); |
| 393 | static bool skd_preop_sg_list(struct skd_device *skdev, |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 394 | struct skd_request_context *skreq); |
| 395 | static void skd_postop_sg_list(struct skd_device *skdev, |
| 396 | struct skd_request_context *skreq); |
| 397 | |
| 398 | static void skd_restart_device(struct skd_device *skdev); |
| 399 | static int skd_quiesce_dev(struct skd_device *skdev); |
| 400 | static int skd_unquiesce_dev(struct skd_device *skdev); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 401 | static void skd_disable_interrupts(struct skd_device *skdev); |
| 402 | static void skd_isr_fwstate(struct skd_device *skdev); |
Bart Van Assche | 79ce12a | 2017-08-17 13:13:14 -0700 | [diff] [blame] | 403 | static void skd_recover_requests(struct skd_device *skdev); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 404 | static void skd_soft_reset(struct skd_device *skdev); |
| 405 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 406 | const char *skd_drive_state_to_str(int state); |
| 407 | const char *skd_skdev_state_to_str(enum skd_drvr_state state); |
| 408 | static void skd_log_skdev(struct skd_device *skdev, const char *event); |
| 409 | static void skd_log_skmsg(struct skd_device *skdev, |
| 410 | struct skd_fitmsg_context *skmsg, const char *event); |
| 411 | static void skd_log_skreq(struct skd_device *skdev, |
| 412 | struct skd_request_context *skreq, const char *event); |
| 413 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 414 | /* |
| 415 | ***************************************************************************** |
| 416 | * READ/WRITE REQUESTS |
| 417 | ***************************************************************************** |
| 418 | */ |
Jens Axboe | fcd37eb | 2013-11-01 10:14:56 -0600 | [diff] [blame] | 419 | static void skd_fail_all_pending(struct skd_device *skdev) |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 420 | { |
| 421 | struct request_queue *q = skdev->queue; |
| 422 | struct request *req; |
| 423 | |
| 424 | for (;; ) { |
| 425 | req = blk_peek_request(q); |
| 426 | if (req == NULL) |
| 427 | break; |
| 428 | blk_start_request(req); |
Christoph Hellwig | 2a842ac | 2017-06-03 09:38:04 +0200 | [diff] [blame] | 429 | __blk_end_request_all(req, BLK_STS_IOERR); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 430 | } |
| 431 | } |
| 432 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 433 | static void |
| 434 | skd_prep_rw_cdb(struct skd_scsi_request *scsi_req, |
| 435 | int data_dir, unsigned lba, |
| 436 | unsigned count) |
| 437 | { |
| 438 | if (data_dir == READ) |
Bart Van Assche | fb4844b | 2017-08-17 13:13:19 -0700 | [diff] [blame] | 439 | scsi_req->cdb[0] = READ_10; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 440 | else |
Bart Van Assche | fb4844b | 2017-08-17 13:13:19 -0700 | [diff] [blame] | 441 | scsi_req->cdb[0] = WRITE_10; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 442 | |
| 443 | scsi_req->cdb[1] = 0; |
| 444 | scsi_req->cdb[2] = (lba & 0xff000000) >> 24; |
| 445 | scsi_req->cdb[3] = (lba & 0xff0000) >> 16; |
| 446 | scsi_req->cdb[4] = (lba & 0xff00) >> 8; |
| 447 | scsi_req->cdb[5] = (lba & 0xff); |
| 448 | scsi_req->cdb[6] = 0; |
| 449 | scsi_req->cdb[7] = (count & 0xff00) >> 8; |
| 450 | scsi_req->cdb[8] = count & 0xff; |
| 451 | scsi_req->cdb[9] = 0; |
| 452 | } |
| 453 | |
| 454 | static void |
| 455 | skd_prep_zerosize_flush_cdb(struct skd_scsi_request *scsi_req, |
Mike Snitzer | 38d4a1b | 2013-11-01 15:05:10 -0400 | [diff] [blame] | 456 | struct skd_request_context *skreq) |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 457 | { |
| 458 | skreq->flush_cmd = 1; |
| 459 | |
Bart Van Assche | fb4844b | 2017-08-17 13:13:19 -0700 | [diff] [blame] | 460 | scsi_req->cdb[0] = SYNCHRONIZE_CACHE; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 461 | scsi_req->cdb[1] = 0; |
| 462 | scsi_req->cdb[2] = 0; |
| 463 | scsi_req->cdb[3] = 0; |
| 464 | scsi_req->cdb[4] = 0; |
| 465 | scsi_req->cdb[5] = 0; |
| 466 | scsi_req->cdb[6] = 0; |
| 467 | scsi_req->cdb[7] = 0; |
| 468 | scsi_req->cdb[8] = 0; |
| 469 | scsi_req->cdb[9] = 0; |
| 470 | } |
| 471 | |
Bart Van Assche | 3d17a67 | 2017-08-17 13:13:21 -0700 | [diff] [blame] | 472 | /* |
| 473 | * Return true if and only if all pending requests should be failed. |
| 474 | */ |
| 475 | static bool skd_fail_all(struct request_queue *q) |
Bart Van Assche | cb6981b | 2017-08-17 13:13:20 -0700 | [diff] [blame] | 476 | { |
| 477 | struct skd_device *skdev = q->queuedata; |
| 478 | |
| 479 | SKD_ASSERT(skdev->state != SKD_DRVR_STATE_ONLINE); |
| 480 | |
| 481 | skd_log_skdev(skdev, "req_not_online"); |
| 482 | switch (skdev->state) { |
| 483 | case SKD_DRVR_STATE_PAUSING: |
| 484 | case SKD_DRVR_STATE_PAUSED: |
| 485 | case SKD_DRVR_STATE_STARTING: |
| 486 | case SKD_DRVR_STATE_RESTARTING: |
| 487 | case SKD_DRVR_STATE_WAIT_BOOT: |
| 488 | /* In case of starting, we haven't started the queue, |
| 489 | * so we can't get here... but requests are |
| 490 | * possibly hanging out waiting for us because we |
| 491 | * reported the dev/skd0 already. They'll wait |
| 492 | * forever if connect doesn't complete. |
| 493 | * What to do??? delay dev/skd0 ?? |
| 494 | */ |
| 495 | case SKD_DRVR_STATE_BUSY: |
| 496 | case SKD_DRVR_STATE_BUSY_IMMINENT: |
| 497 | case SKD_DRVR_STATE_BUSY_ERASE: |
| 498 | case SKD_DRVR_STATE_DRAINING_TIMEOUT: |
Bart Van Assche | 3d17a67 | 2017-08-17 13:13:21 -0700 | [diff] [blame] | 499 | return false; |
Bart Van Assche | cb6981b | 2017-08-17 13:13:20 -0700 | [diff] [blame] | 500 | |
| 501 | case SKD_DRVR_STATE_BUSY_SANITIZE: |
| 502 | case SKD_DRVR_STATE_STOPPING: |
| 503 | case SKD_DRVR_STATE_SYNCING: |
| 504 | case SKD_DRVR_STATE_FAULT: |
| 505 | case SKD_DRVR_STATE_DISAPPEARED: |
| 506 | default: |
Bart Van Assche | 3d17a67 | 2017-08-17 13:13:21 -0700 | [diff] [blame] | 507 | return true; |
Bart Van Assche | cb6981b | 2017-08-17 13:13:20 -0700 | [diff] [blame] | 508 | } |
Bart Van Assche | cb6981b | 2017-08-17 13:13:20 -0700 | [diff] [blame] | 509 | } |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 510 | |
| 511 | static void skd_request_fn(struct request_queue *q) |
| 512 | { |
| 513 | struct skd_device *skdev = q->queuedata; |
| 514 | struct skd_fitmsg_context *skmsg = NULL; |
| 515 | struct fit_msg_hdr *fmh = NULL; |
| 516 | struct skd_request_context *skreq; |
| 517 | struct request *req = NULL; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 518 | struct skd_scsi_request *scsi_req; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 519 | unsigned long io_flags; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 520 | u32 lba; |
| 521 | u32 count; |
| 522 | int data_dir; |
Bart Van Assche | 4854afe | 2017-08-17 13:12:59 -0700 | [diff] [blame] | 523 | __be64 be_dmaa; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 524 | u64 cmdctxt; |
| 525 | u32 timo_slot; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 526 | int flush, fua; |
| 527 | |
| 528 | if (skdev->state != SKD_DRVR_STATE_ONLINE) { |
Bart Van Assche | 3d17a67 | 2017-08-17 13:13:21 -0700 | [diff] [blame] | 529 | if (skd_fail_all(q)) |
| 530 | skd_fail_all_pending(skdev); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 531 | return; |
| 532 | } |
| 533 | |
Jens Axboe | 6a5ec65 | 2013-11-01 10:38:45 -0600 | [diff] [blame] | 534 | if (blk_queue_stopped(skdev->queue)) { |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 535 | if (skdev->skmsg_free_list == NULL || |
| 536 | skdev->skreq_free_list == NULL || |
| 537 | skdev->in_flight >= skdev->queue_low_water_mark) |
| 538 | /* There is still some kind of shortage */ |
| 539 | return; |
| 540 | |
Jens Axboe | 6a5ec65 | 2013-11-01 10:38:45 -0600 | [diff] [blame] | 541 | queue_flag_clear(QUEUE_FLAG_STOPPED, skdev->queue); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 542 | } |
| 543 | |
| 544 | /* |
| 545 | * Stop conditions: |
| 546 | * - There are no more native requests |
| 547 | * - There are already the maximum number of requests in progress |
| 548 | * - There are no more skd_request_context entries |
| 549 | * - There are no more FIT msg buffers |
| 550 | */ |
| 551 | for (;; ) { |
| 552 | |
| 553 | flush = fua = 0; |
| 554 | |
Jens Axboe | fcd37eb | 2013-11-01 10:14:56 -0600 | [diff] [blame] | 555 | req = blk_peek_request(q); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 556 | |
Jens Axboe | fcd37eb | 2013-11-01 10:14:56 -0600 | [diff] [blame] | 557 | /* Are there any native requests to start? */ |
| 558 | if (req == NULL) |
| 559 | break; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 560 | |
Jens Axboe | fcd37eb | 2013-11-01 10:14:56 -0600 | [diff] [blame] | 561 | lba = (u32)blk_rq_pos(req); |
| 562 | count = blk_rq_sectors(req); |
| 563 | data_dir = rq_data_dir(req); |
| 564 | io_flags = req->cmd_flags; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 565 | |
Mike Christie | 3a5e02c | 2016-06-05 14:32:23 -0500 | [diff] [blame] | 566 | if (req_op(req) == REQ_OP_FLUSH) |
Jens Axboe | fcd37eb | 2013-11-01 10:14:56 -0600 | [diff] [blame] | 567 | flush++; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 568 | |
Jens Axboe | fcd37eb | 2013-11-01 10:14:56 -0600 | [diff] [blame] | 569 | if (io_flags & REQ_FUA) |
| 570 | fua++; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 571 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 572 | dev_dbg(&skdev->pdev->dev, |
| 573 | "new req=%p lba=%u(0x%x) count=%u(0x%x) dir=%d\n", |
| 574 | req, lba, lba, count, count, data_dir); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 575 | |
Mike Snitzer | 38d4a1b | 2013-11-01 15:05:10 -0400 | [diff] [blame] | 576 | /* At this point we know there is a request */ |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 577 | |
| 578 | /* Are too many requets already in progress? */ |
| 579 | if (skdev->in_flight >= skdev->cur_max_queue_depth) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 580 | dev_dbg(&skdev->pdev->dev, "qdepth %d, limit %d\n", |
| 581 | skdev->in_flight, skdev->cur_max_queue_depth); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 582 | break; |
| 583 | } |
| 584 | |
| 585 | /* Is a skd_request_context available? */ |
| 586 | skreq = skdev->skreq_free_list; |
| 587 | if (skreq == NULL) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 588 | dev_dbg(&skdev->pdev->dev, "Out of req=%p\n", q); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 589 | break; |
| 590 | } |
| 591 | SKD_ASSERT(skreq->state == SKD_REQ_STATE_IDLE); |
| 592 | SKD_ASSERT((skreq->id & SKD_ID_INCR) == 0); |
| 593 | |
| 594 | /* Now we check to see if we can get a fit msg */ |
| 595 | if (skmsg == NULL) { |
| 596 | if (skdev->skmsg_free_list == NULL) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 597 | dev_dbg(&skdev->pdev->dev, "Out of msg\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 598 | break; |
| 599 | } |
| 600 | } |
| 601 | |
| 602 | skreq->flush_cmd = 0; |
| 603 | skreq->n_sg = 0; |
| 604 | skreq->sg_byte_count = 0; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 605 | |
| 606 | /* |
Mike Snitzer | 38d4a1b | 2013-11-01 15:05:10 -0400 | [diff] [blame] | 607 | * OK to now dequeue request from q. |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 608 | * |
| 609 | * At this point we are comitted to either start or reject |
| 610 | * the native request. Note that skd_request_context is |
| 611 | * available but is still at the head of the free list. |
| 612 | */ |
Jens Axboe | fcd37eb | 2013-11-01 10:14:56 -0600 | [diff] [blame] | 613 | blk_start_request(req); |
| 614 | skreq->req = req; |
| 615 | skreq->fitmsg_id = 0; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 616 | |
Bart Van Assche | b1824ee | 2017-08-17 13:13:12 -0700 | [diff] [blame] | 617 | skreq->data_dir = data_dir == READ ? DMA_FROM_DEVICE : |
| 618 | DMA_TO_DEVICE; |
Bart Van Assche | 19fc85c | 2017-08-17 13:13:04 -0700 | [diff] [blame] | 619 | |
| 620 | if (req->bio && !skd_preop_sg_list(skdev, skreq)) { |
| 621 | dev_dbg(&skdev->pdev->dev, "error Out\n"); |
| 622 | skd_end_request(skdev, skreq, BLK_STS_RESOURCE); |
| 623 | continue; |
| 624 | } |
| 625 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 626 | /* Either a FIT msg is in progress or we have to start one. */ |
| 627 | if (skmsg == NULL) { |
| 628 | /* Are there any FIT msg buffers available? */ |
| 629 | skmsg = skdev->skmsg_free_list; |
| 630 | if (skmsg == NULL) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 631 | dev_dbg(&skdev->pdev->dev, |
| 632 | "Out of msg skdev=%p\n", |
| 633 | skdev); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 634 | break; |
| 635 | } |
| 636 | SKD_ASSERT(skmsg->state == SKD_MSG_STATE_IDLE); |
| 637 | SKD_ASSERT((skmsg->id & SKD_ID_INCR) == 0); |
| 638 | |
| 639 | skdev->skmsg_free_list = skmsg->next; |
| 640 | |
| 641 | skmsg->state = SKD_MSG_STATE_BUSY; |
| 642 | skmsg->id += SKD_ID_INCR; |
| 643 | |
| 644 | /* Initialize the FIT msg header */ |
Bart Van Assche | d891fe6 | 2017-08-17 13:13:07 -0700 | [diff] [blame] | 645 | fmh = &skmsg->msg_buf->fmh; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 646 | memset(fmh, 0, sizeof(*fmh)); |
| 647 | fmh->protocol_id = FIT_PROTOCOL_ID_SOFIT; |
| 648 | skmsg->length = sizeof(*fmh); |
| 649 | } |
| 650 | |
| 651 | skreq->fitmsg_id = skmsg->id; |
| 652 | |
Bart Van Assche | d891fe6 | 2017-08-17 13:13:07 -0700 | [diff] [blame] | 653 | scsi_req = |
| 654 | &skmsg->msg_buf->scsi[fmh->num_protocol_cmds_coalesced]; |
| 655 | memset(scsi_req, 0, sizeof(*scsi_req)); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 656 | |
Bart Van Assche | 4854afe | 2017-08-17 13:12:59 -0700 | [diff] [blame] | 657 | be_dmaa = cpu_to_be64(skreq->sksg_dma_address); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 658 | cmdctxt = skreq->id + SKD_ID_INCR; |
| 659 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 660 | scsi_req->hdr.tag = cmdctxt; |
| 661 | scsi_req->hdr.sg_list_dma_address = be_dmaa; |
| 662 | |
Jeff Moyer | 49bdedb | 2016-04-25 19:12:38 -0600 | [diff] [blame] | 663 | if (flush == SKD_FLUSH_ZERO_SIZE_FIRST) { |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 664 | skd_prep_zerosize_flush_cdb(scsi_req, skreq); |
| 665 | SKD_ASSERT(skreq->flush_cmd == 1); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 666 | } else { |
| 667 | skd_prep_rw_cdb(scsi_req, data_dir, lba, count); |
| 668 | } |
| 669 | |
| 670 | if (fua) |
| 671 | scsi_req->cdb[1] |= SKD_FUA_NV; |
| 672 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 673 | scsi_req->hdr.sg_list_len_bytes = |
| 674 | cpu_to_be32(skreq->sg_byte_count); |
| 675 | |
| 676 | /* Complete resource allocations. */ |
| 677 | skdev->skreq_free_list = skreq->next; |
| 678 | skreq->state = SKD_REQ_STATE_BUSY; |
| 679 | skreq->id += SKD_ID_INCR; |
| 680 | |
| 681 | skmsg->length += sizeof(struct skd_scsi_request); |
| 682 | fmh->num_protocol_cmds_coalesced++; |
| 683 | |
| 684 | /* |
| 685 | * Update the active request counts. |
| 686 | * Capture the timeout timestamp. |
| 687 | */ |
| 688 | skreq->timeout_stamp = skdev->timeout_stamp; |
| 689 | timo_slot = skreq->timeout_stamp & SKD_TIMEOUT_SLOT_MASK; |
| 690 | skdev->timeout_slot[timo_slot]++; |
| 691 | skdev->in_flight++; |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 692 | dev_dbg(&skdev->pdev->dev, "req=0x%x busy=%d\n", skreq->id, |
| 693 | skdev->in_flight); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 694 | |
| 695 | /* |
| 696 | * If the FIT msg buffer is full send it. |
| 697 | */ |
Bart Van Assche | fe4fd72 | 2017-08-17 13:13:05 -0700 | [diff] [blame] | 698 | if (fmh->num_protocol_cmds_coalesced >= skd_max_req_per_msg) { |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 699 | skd_send_fitmsg(skdev, skmsg); |
| 700 | skmsg = NULL; |
| 701 | fmh = NULL; |
| 702 | } |
| 703 | } |
| 704 | |
Bart Van Assche | fe4fd72 | 2017-08-17 13:13:05 -0700 | [diff] [blame] | 705 | /* If the FIT msg buffer is not empty send what we got. */ |
| 706 | if (skmsg) { |
| 707 | WARN_ON_ONCE(!fmh->num_protocol_cmds_coalesced); |
| 708 | skd_send_fitmsg(skdev, skmsg); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 709 | skmsg = NULL; |
| 710 | fmh = NULL; |
| 711 | } |
| 712 | |
| 713 | /* |
| 714 | * If req is non-NULL it means there is something to do but |
| 715 | * we are out of a resource. |
| 716 | */ |
Jens Axboe | fcd37eb | 2013-11-01 10:14:56 -0600 | [diff] [blame] | 717 | if (req) |
Jens Axboe | 6a5ec65 | 2013-11-01 10:38:45 -0600 | [diff] [blame] | 718 | blk_stop_queue(skdev->queue); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 719 | } |
| 720 | |
Mike Snitzer | 38d4a1b | 2013-11-01 15:05:10 -0400 | [diff] [blame] | 721 | static void skd_end_request(struct skd_device *skdev, |
Christoph Hellwig | 2a842ac | 2017-06-03 09:38:04 +0200 | [diff] [blame] | 722 | struct skd_request_context *skreq, blk_status_t error) |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 723 | { |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 724 | if (unlikely(error)) { |
| 725 | struct request *req = skreq->req; |
| 726 | char *cmd = (rq_data_dir(req) == READ) ? "read" : "write"; |
| 727 | u32 lba = (u32)blk_rq_pos(req); |
| 728 | u32 count = blk_rq_sectors(req); |
| 729 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 730 | dev_err(&skdev->pdev->dev, |
| 731 | "Error cmd=%s sect=%u count=%u id=0x%x\n", cmd, lba, |
| 732 | count, skreq->id); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 733 | } else |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 734 | dev_dbg(&skdev->pdev->dev, "id=0x%x error=%d\n", skreq->id, |
| 735 | error); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 736 | |
| 737 | __blk_end_request_all(skreq->req, error); |
| 738 | } |
| 739 | |
Christoph Hellwig | 2a842ac | 2017-06-03 09:38:04 +0200 | [diff] [blame] | 740 | static bool skd_preop_sg_list(struct skd_device *skdev, |
Mike Snitzer | 38d4a1b | 2013-11-01 15:05:10 -0400 | [diff] [blame] | 741 | struct skd_request_context *skreq) |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 742 | { |
| 743 | struct request *req = skreq->req; |
Bart Van Assche | 06f824c4 | 2017-08-17 13:13:15 -0700 | [diff] [blame] | 744 | struct scatterlist *sgl = &skreq->sg[0], *sg; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 745 | int n_sg; |
| 746 | int i; |
| 747 | |
| 748 | skreq->sg_byte_count = 0; |
| 749 | |
Bart Van Assche | b1824ee | 2017-08-17 13:13:12 -0700 | [diff] [blame] | 750 | WARN_ON_ONCE(skreq->data_dir != DMA_TO_DEVICE && |
| 751 | skreq->data_dir != DMA_FROM_DEVICE); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 752 | |
Bart Van Assche | 06f824c4 | 2017-08-17 13:13:15 -0700 | [diff] [blame] | 753 | n_sg = blk_rq_map_sg(skdev->queue, req, sgl); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 754 | if (n_sg <= 0) |
Christoph Hellwig | 2a842ac | 2017-06-03 09:38:04 +0200 | [diff] [blame] | 755 | return false; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 756 | |
| 757 | /* |
| 758 | * Map scatterlist to PCI bus addresses. |
| 759 | * Note PCI might change the number of entries. |
| 760 | */ |
Bart Van Assche | 06f824c4 | 2017-08-17 13:13:15 -0700 | [diff] [blame] | 761 | n_sg = pci_map_sg(skdev->pdev, sgl, n_sg, skreq->data_dir); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 762 | if (n_sg <= 0) |
Christoph Hellwig | 2a842ac | 2017-06-03 09:38:04 +0200 | [diff] [blame] | 763 | return false; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 764 | |
| 765 | SKD_ASSERT(n_sg <= skdev->sgs_per_request); |
| 766 | |
| 767 | skreq->n_sg = n_sg; |
| 768 | |
Bart Van Assche | 06f824c4 | 2017-08-17 13:13:15 -0700 | [diff] [blame] | 769 | for_each_sg(sgl, sg, n_sg, i) { |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 770 | struct fit_sg_descriptor *sgd = &skreq->sksg_list[i]; |
Bart Van Assche | 06f824c4 | 2017-08-17 13:13:15 -0700 | [diff] [blame] | 771 | u32 cnt = sg_dma_len(sg); |
| 772 | uint64_t dma_addr = sg_dma_address(sg); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 773 | |
| 774 | sgd->control = FIT_SGD_CONTROL_NOT_LAST; |
| 775 | sgd->byte_count = cnt; |
| 776 | skreq->sg_byte_count += cnt; |
| 777 | sgd->host_side_addr = dma_addr; |
| 778 | sgd->dev_side_addr = 0; |
| 779 | } |
| 780 | |
| 781 | skreq->sksg_list[n_sg - 1].next_desc_ptr = 0LL; |
| 782 | skreq->sksg_list[n_sg - 1].control = FIT_SGD_CONTROL_LAST; |
| 783 | |
| 784 | if (unlikely(skdev->dbg_level > 1)) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 785 | dev_dbg(&skdev->pdev->dev, |
| 786 | "skreq=%x sksg_list=%p sksg_dma=%llx\n", |
| 787 | skreq->id, skreq->sksg_list, skreq->sksg_dma_address); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 788 | for (i = 0; i < n_sg; i++) { |
| 789 | struct fit_sg_descriptor *sgd = &skreq->sksg_list[i]; |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 790 | |
| 791 | dev_dbg(&skdev->pdev->dev, |
| 792 | " sg[%d] count=%u ctrl=0x%x addr=0x%llx next=0x%llx\n", |
| 793 | i, sgd->byte_count, sgd->control, |
| 794 | sgd->host_side_addr, sgd->next_desc_ptr); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 795 | } |
| 796 | } |
| 797 | |
Christoph Hellwig | 2a842ac | 2017-06-03 09:38:04 +0200 | [diff] [blame] | 798 | return true; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 799 | } |
| 800 | |
Jens Axboe | fcd37eb | 2013-11-01 10:14:56 -0600 | [diff] [blame] | 801 | static void skd_postop_sg_list(struct skd_device *skdev, |
Mike Snitzer | 38d4a1b | 2013-11-01 15:05:10 -0400 | [diff] [blame] | 802 | struct skd_request_context *skreq) |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 803 | { |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 804 | /* |
| 805 | * restore the next ptr for next IO request so we |
| 806 | * don't have to set it every time. |
| 807 | */ |
| 808 | skreq->sksg_list[skreq->n_sg - 1].next_desc_ptr = |
| 809 | skreq->sksg_dma_address + |
| 810 | ((skreq->n_sg) * sizeof(struct fit_sg_descriptor)); |
Bart Van Assche | b1824ee | 2017-08-17 13:13:12 -0700 | [diff] [blame] | 811 | pci_unmap_sg(skdev->pdev, &skreq->sg[0], skreq->n_sg, skreq->data_dir); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 812 | } |
| 813 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 814 | /* |
| 815 | ***************************************************************************** |
| 816 | * TIMER |
| 817 | ***************************************************************************** |
| 818 | */ |
| 819 | |
| 820 | static void skd_timer_tick_not_online(struct skd_device *skdev); |
| 821 | |
| 822 | static void skd_timer_tick(ulong arg) |
| 823 | { |
| 824 | struct skd_device *skdev = (struct skd_device *)arg; |
| 825 | |
| 826 | u32 timo_slot; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 827 | unsigned long reqflags; |
| 828 | u32 state; |
| 829 | |
| 830 | if (skdev->state == SKD_DRVR_STATE_FAULT) |
| 831 | /* The driver has declared fault, and we want it to |
| 832 | * stay that way until driver is reloaded. |
| 833 | */ |
| 834 | return; |
| 835 | |
| 836 | spin_lock_irqsave(&skdev->lock, reqflags); |
| 837 | |
| 838 | state = SKD_READL(skdev, FIT_STATUS); |
| 839 | state &= FIT_SR_DRIVE_STATE_MASK; |
| 840 | if (state != skdev->drive_state) |
| 841 | skd_isr_fwstate(skdev); |
| 842 | |
| 843 | if (skdev->state != SKD_DRVR_STATE_ONLINE) { |
| 844 | skd_timer_tick_not_online(skdev); |
| 845 | goto timer_func_out; |
| 846 | } |
| 847 | skdev->timeout_stamp++; |
| 848 | timo_slot = skdev->timeout_stamp & SKD_TIMEOUT_SLOT_MASK; |
| 849 | |
| 850 | /* |
| 851 | * All requests that happened during the previous use of |
| 852 | * this slot should be done by now. The previous use was |
| 853 | * over 7 seconds ago. |
| 854 | */ |
| 855 | if (skdev->timeout_slot[timo_slot] == 0) |
| 856 | goto timer_func_out; |
| 857 | |
| 858 | /* Something is overdue */ |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 859 | dev_dbg(&skdev->pdev->dev, "found %d timeouts, draining busy=%d\n", |
| 860 | skdev->timeout_slot[timo_slot], skdev->in_flight); |
| 861 | dev_err(&skdev->pdev->dev, "Overdue IOs (%d), busy %d\n", |
| 862 | skdev->timeout_slot[timo_slot], skdev->in_flight); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 863 | |
| 864 | skdev->timer_countdown = SKD_DRAINING_TIMO; |
| 865 | skdev->state = SKD_DRVR_STATE_DRAINING_TIMEOUT; |
| 866 | skdev->timo_slot = timo_slot; |
Jens Axboe | 6a5ec65 | 2013-11-01 10:38:45 -0600 | [diff] [blame] | 867 | blk_stop_queue(skdev->queue); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 868 | |
| 869 | timer_func_out: |
| 870 | mod_timer(&skdev->timer, (jiffies + HZ)); |
| 871 | |
| 872 | spin_unlock_irqrestore(&skdev->lock, reqflags); |
| 873 | } |
| 874 | |
| 875 | static void skd_timer_tick_not_online(struct skd_device *skdev) |
| 876 | { |
| 877 | switch (skdev->state) { |
| 878 | case SKD_DRVR_STATE_IDLE: |
| 879 | case SKD_DRVR_STATE_LOAD: |
| 880 | break; |
| 881 | case SKD_DRVR_STATE_BUSY_SANITIZE: |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 882 | dev_dbg(&skdev->pdev->dev, |
| 883 | "drive busy sanitize[%x], driver[%x]\n", |
| 884 | skdev->drive_state, skdev->state); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 885 | /* If we've been in sanitize for 3 seconds, we figure we're not |
| 886 | * going to get anymore completions, so recover requests now |
| 887 | */ |
| 888 | if (skdev->timer_countdown > 0) { |
| 889 | skdev->timer_countdown--; |
| 890 | return; |
| 891 | } |
Bart Van Assche | 79ce12a | 2017-08-17 13:13:14 -0700 | [diff] [blame] | 892 | skd_recover_requests(skdev); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 893 | break; |
| 894 | |
| 895 | case SKD_DRVR_STATE_BUSY: |
| 896 | case SKD_DRVR_STATE_BUSY_IMMINENT: |
| 897 | case SKD_DRVR_STATE_BUSY_ERASE: |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 898 | dev_dbg(&skdev->pdev->dev, "busy[%x], countdown=%d\n", |
| 899 | skdev->state, skdev->timer_countdown); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 900 | if (skdev->timer_countdown > 0) { |
| 901 | skdev->timer_countdown--; |
| 902 | return; |
| 903 | } |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 904 | dev_dbg(&skdev->pdev->dev, |
| 905 | "busy[%x], timedout=%d, restarting device.", |
| 906 | skdev->state, skdev->timer_countdown); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 907 | skd_restart_device(skdev); |
| 908 | break; |
| 909 | |
| 910 | case SKD_DRVR_STATE_WAIT_BOOT: |
| 911 | case SKD_DRVR_STATE_STARTING: |
| 912 | if (skdev->timer_countdown > 0) { |
| 913 | skdev->timer_countdown--; |
| 914 | return; |
| 915 | } |
| 916 | /* For now, we fault the drive. Could attempt resets to |
| 917 | * revcover at some point. */ |
| 918 | skdev->state = SKD_DRVR_STATE_FAULT; |
| 919 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 920 | dev_err(&skdev->pdev->dev, "DriveFault Connect Timeout (%x)\n", |
| 921 | skdev->drive_state); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 922 | |
| 923 | /*start the queue so we can respond with error to requests */ |
| 924 | /* wakeup anyone waiting for startup complete */ |
Jens Axboe | 6a5ec65 | 2013-11-01 10:38:45 -0600 | [diff] [blame] | 925 | blk_start_queue(skdev->queue); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 926 | skdev->gendisk_on = -1; |
| 927 | wake_up_interruptible(&skdev->waitq); |
| 928 | break; |
| 929 | |
| 930 | case SKD_DRVR_STATE_ONLINE: |
| 931 | /* shouldn't get here. */ |
| 932 | break; |
| 933 | |
| 934 | case SKD_DRVR_STATE_PAUSING: |
| 935 | case SKD_DRVR_STATE_PAUSED: |
| 936 | break; |
| 937 | |
| 938 | case SKD_DRVR_STATE_DRAINING_TIMEOUT: |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 939 | dev_dbg(&skdev->pdev->dev, |
| 940 | "draining busy [%d] tick[%d] qdb[%d] tmls[%d]\n", |
| 941 | skdev->timo_slot, skdev->timer_countdown, |
| 942 | skdev->in_flight, |
| 943 | skdev->timeout_slot[skdev->timo_slot]); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 944 | /* if the slot has cleared we can let the I/O continue */ |
| 945 | if (skdev->timeout_slot[skdev->timo_slot] == 0) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 946 | dev_dbg(&skdev->pdev->dev, |
| 947 | "Slot drained, starting queue.\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 948 | skdev->state = SKD_DRVR_STATE_ONLINE; |
Jens Axboe | 6a5ec65 | 2013-11-01 10:38:45 -0600 | [diff] [blame] | 949 | blk_start_queue(skdev->queue); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 950 | return; |
| 951 | } |
| 952 | if (skdev->timer_countdown > 0) { |
| 953 | skdev->timer_countdown--; |
| 954 | return; |
| 955 | } |
| 956 | skd_restart_device(skdev); |
| 957 | break; |
| 958 | |
| 959 | case SKD_DRVR_STATE_RESTARTING: |
| 960 | if (skdev->timer_countdown > 0) { |
| 961 | skdev->timer_countdown--; |
| 962 | return; |
| 963 | } |
| 964 | /* For now, we fault the drive. Could attempt resets to |
| 965 | * revcover at some point. */ |
| 966 | skdev->state = SKD_DRVR_STATE_FAULT; |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 967 | dev_err(&skdev->pdev->dev, |
| 968 | "DriveFault Reconnect Timeout (%x)\n", |
| 969 | skdev->drive_state); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 970 | |
| 971 | /* |
| 972 | * Recovering does two things: |
| 973 | * 1. completes IO with error |
| 974 | * 2. reclaims dma resources |
| 975 | * When is it safe to recover requests? |
| 976 | * - if the drive state is faulted |
| 977 | * - if the state is still soft reset after out timeout |
| 978 | * - if the drive registers are dead (state = FF) |
| 979 | * If it is "unsafe", we still need to recover, so we will |
| 980 | * disable pci bus mastering and disable our interrupts. |
| 981 | */ |
| 982 | |
| 983 | if ((skdev->drive_state == FIT_SR_DRIVE_SOFT_RESET) || |
| 984 | (skdev->drive_state == FIT_SR_DRIVE_FAULT) || |
| 985 | (skdev->drive_state == FIT_SR_DRIVE_STATE_MASK)) |
| 986 | /* It never came out of soft reset. Try to |
| 987 | * recover the requests and then let them |
| 988 | * fail. This is to mitigate hung processes. */ |
Bart Van Assche | 79ce12a | 2017-08-17 13:13:14 -0700 | [diff] [blame] | 989 | skd_recover_requests(skdev); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 990 | else { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 991 | dev_err(&skdev->pdev->dev, "Disable BusMaster (%x)\n", |
| 992 | skdev->drive_state); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 993 | pci_disable_device(skdev->pdev); |
| 994 | skd_disable_interrupts(skdev); |
Bart Van Assche | 79ce12a | 2017-08-17 13:13:14 -0700 | [diff] [blame] | 995 | skd_recover_requests(skdev); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 996 | } |
| 997 | |
| 998 | /*start the queue so we can respond with error to requests */ |
| 999 | /* wakeup anyone waiting for startup complete */ |
Jens Axboe | 6a5ec65 | 2013-11-01 10:38:45 -0600 | [diff] [blame] | 1000 | blk_start_queue(skdev->queue); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1001 | skdev->gendisk_on = -1; |
| 1002 | wake_up_interruptible(&skdev->waitq); |
| 1003 | break; |
| 1004 | |
| 1005 | case SKD_DRVR_STATE_RESUMING: |
| 1006 | case SKD_DRVR_STATE_STOPPING: |
| 1007 | case SKD_DRVR_STATE_SYNCING: |
| 1008 | case SKD_DRVR_STATE_FAULT: |
| 1009 | case SKD_DRVR_STATE_DISAPPEARED: |
| 1010 | default: |
| 1011 | break; |
| 1012 | } |
| 1013 | } |
| 1014 | |
| 1015 | static int skd_start_timer(struct skd_device *skdev) |
| 1016 | { |
| 1017 | int rc; |
| 1018 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1019 | setup_timer(&skdev->timer, skd_timer_tick, (ulong)skdev); |
| 1020 | |
| 1021 | rc = mod_timer(&skdev->timer, (jiffies + HZ)); |
| 1022 | if (rc) |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1023 | dev_err(&skdev->pdev->dev, "failed to start timer %d\n", rc); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1024 | return rc; |
| 1025 | } |
| 1026 | |
| 1027 | static void skd_kill_timer(struct skd_device *skdev) |
| 1028 | { |
| 1029 | del_timer_sync(&skdev->timer); |
| 1030 | } |
| 1031 | |
| 1032 | /* |
| 1033 | ***************************************************************************** |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1034 | * INTERNAL REQUESTS -- generated by driver itself |
| 1035 | ***************************************************************************** |
| 1036 | */ |
| 1037 | |
| 1038 | static int skd_format_internal_skspcl(struct skd_device *skdev) |
| 1039 | { |
| 1040 | struct skd_special_context *skspcl = &skdev->internal_skspcl; |
| 1041 | struct fit_sg_descriptor *sgd = &skspcl->req.sksg_list[0]; |
| 1042 | struct fit_msg_hdr *fmh; |
| 1043 | uint64_t dma_address; |
| 1044 | struct skd_scsi_request *scsi; |
| 1045 | |
Bart Van Assche | d891fe6 | 2017-08-17 13:13:07 -0700 | [diff] [blame] | 1046 | fmh = &skspcl->msg_buf->fmh; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1047 | fmh->protocol_id = FIT_PROTOCOL_ID_SOFIT; |
| 1048 | fmh->num_protocol_cmds_coalesced = 1; |
| 1049 | |
Bart Van Assche | d891fe6 | 2017-08-17 13:13:07 -0700 | [diff] [blame] | 1050 | scsi = &skspcl->msg_buf->scsi[0]; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1051 | memset(scsi, 0, sizeof(*scsi)); |
| 1052 | dma_address = skspcl->req.sksg_dma_address; |
| 1053 | scsi->hdr.sg_list_dma_address = cpu_to_be64(dma_address); |
| 1054 | sgd->control = FIT_SGD_CONTROL_LAST; |
| 1055 | sgd->byte_count = 0; |
| 1056 | sgd->host_side_addr = skspcl->db_dma_address; |
| 1057 | sgd->dev_side_addr = 0; |
| 1058 | sgd->next_desc_ptr = 0LL; |
| 1059 | |
| 1060 | return 1; |
| 1061 | } |
| 1062 | |
| 1063 | #define WR_BUF_SIZE SKD_N_INTERNAL_BYTES |
| 1064 | |
| 1065 | static void skd_send_internal_skspcl(struct skd_device *skdev, |
| 1066 | struct skd_special_context *skspcl, |
| 1067 | u8 opcode) |
| 1068 | { |
| 1069 | struct fit_sg_descriptor *sgd = &skspcl->req.sksg_list[0]; |
| 1070 | struct skd_scsi_request *scsi; |
| 1071 | unsigned char *buf = skspcl->data_buf; |
| 1072 | int i; |
| 1073 | |
| 1074 | if (skspcl->req.state != SKD_REQ_STATE_IDLE) |
| 1075 | /* |
| 1076 | * A refresh is already in progress. |
| 1077 | * Just wait for it to finish. |
| 1078 | */ |
| 1079 | return; |
| 1080 | |
| 1081 | SKD_ASSERT((skspcl->req.id & SKD_ID_INCR) == 0); |
| 1082 | skspcl->req.state = SKD_REQ_STATE_BUSY; |
| 1083 | skspcl->req.id += SKD_ID_INCR; |
| 1084 | |
Bart Van Assche | d891fe6 | 2017-08-17 13:13:07 -0700 | [diff] [blame] | 1085 | scsi = &skspcl->msg_buf->scsi[0]; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1086 | scsi->hdr.tag = skspcl->req.id; |
| 1087 | |
| 1088 | memset(scsi->cdb, 0, sizeof(scsi->cdb)); |
| 1089 | |
| 1090 | switch (opcode) { |
| 1091 | case TEST_UNIT_READY: |
| 1092 | scsi->cdb[0] = TEST_UNIT_READY; |
| 1093 | sgd->byte_count = 0; |
| 1094 | scsi->hdr.sg_list_len_bytes = 0; |
| 1095 | break; |
| 1096 | |
| 1097 | case READ_CAPACITY: |
| 1098 | scsi->cdb[0] = READ_CAPACITY; |
| 1099 | sgd->byte_count = SKD_N_READ_CAP_BYTES; |
| 1100 | scsi->hdr.sg_list_len_bytes = cpu_to_be32(sgd->byte_count); |
| 1101 | break; |
| 1102 | |
| 1103 | case INQUIRY: |
| 1104 | scsi->cdb[0] = INQUIRY; |
| 1105 | scsi->cdb[1] = 0x01; /* evpd */ |
| 1106 | scsi->cdb[2] = 0x80; /* serial number page */ |
| 1107 | scsi->cdb[4] = 0x10; |
| 1108 | sgd->byte_count = 16; |
| 1109 | scsi->hdr.sg_list_len_bytes = cpu_to_be32(sgd->byte_count); |
| 1110 | break; |
| 1111 | |
| 1112 | case SYNCHRONIZE_CACHE: |
| 1113 | scsi->cdb[0] = SYNCHRONIZE_CACHE; |
| 1114 | sgd->byte_count = 0; |
| 1115 | scsi->hdr.sg_list_len_bytes = 0; |
| 1116 | break; |
| 1117 | |
| 1118 | case WRITE_BUFFER: |
| 1119 | scsi->cdb[0] = WRITE_BUFFER; |
| 1120 | scsi->cdb[1] = 0x02; |
| 1121 | scsi->cdb[7] = (WR_BUF_SIZE & 0xFF00) >> 8; |
| 1122 | scsi->cdb[8] = WR_BUF_SIZE & 0xFF; |
| 1123 | sgd->byte_count = WR_BUF_SIZE; |
| 1124 | scsi->hdr.sg_list_len_bytes = cpu_to_be32(sgd->byte_count); |
| 1125 | /* fill incrementing byte pattern */ |
| 1126 | for (i = 0; i < sgd->byte_count; i++) |
| 1127 | buf[i] = i & 0xFF; |
| 1128 | break; |
| 1129 | |
| 1130 | case READ_BUFFER: |
| 1131 | scsi->cdb[0] = READ_BUFFER; |
| 1132 | scsi->cdb[1] = 0x02; |
| 1133 | scsi->cdb[7] = (WR_BUF_SIZE & 0xFF00) >> 8; |
| 1134 | scsi->cdb[8] = WR_BUF_SIZE & 0xFF; |
| 1135 | sgd->byte_count = WR_BUF_SIZE; |
| 1136 | scsi->hdr.sg_list_len_bytes = cpu_to_be32(sgd->byte_count); |
| 1137 | memset(skspcl->data_buf, 0, sgd->byte_count); |
| 1138 | break; |
| 1139 | |
| 1140 | default: |
| 1141 | SKD_ASSERT("Don't know what to send"); |
| 1142 | return; |
| 1143 | |
| 1144 | } |
| 1145 | skd_send_special_fitmsg(skdev, skspcl); |
| 1146 | } |
| 1147 | |
| 1148 | static void skd_refresh_device_data(struct skd_device *skdev) |
| 1149 | { |
| 1150 | struct skd_special_context *skspcl = &skdev->internal_skspcl; |
| 1151 | |
| 1152 | skd_send_internal_skspcl(skdev, skspcl, TEST_UNIT_READY); |
| 1153 | } |
| 1154 | |
| 1155 | static int skd_chk_read_buf(struct skd_device *skdev, |
| 1156 | struct skd_special_context *skspcl) |
| 1157 | { |
| 1158 | unsigned char *buf = skspcl->data_buf; |
| 1159 | int i; |
| 1160 | |
| 1161 | /* check for incrementing byte pattern */ |
| 1162 | for (i = 0; i < WR_BUF_SIZE; i++) |
| 1163 | if (buf[i] != (i & 0xFF)) |
| 1164 | return 1; |
| 1165 | |
| 1166 | return 0; |
| 1167 | } |
| 1168 | |
| 1169 | static void skd_log_check_status(struct skd_device *skdev, u8 status, u8 key, |
| 1170 | u8 code, u8 qual, u8 fruc) |
| 1171 | { |
| 1172 | /* If the check condition is of special interest, log a message */ |
| 1173 | if ((status == SAM_STAT_CHECK_CONDITION) && (key == 0x02) |
| 1174 | && (code == 0x04) && (qual == 0x06)) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1175 | dev_err(&skdev->pdev->dev, |
| 1176 | "*** LOST_WRITE_DATA ERROR *** key/asc/ascq/fruc %02x/%02x/%02x/%02x\n", |
| 1177 | key, code, qual, fruc); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1178 | } |
| 1179 | } |
| 1180 | |
| 1181 | static void skd_complete_internal(struct skd_device *skdev, |
Bart Van Assche | 85e3411 | 2017-08-17 13:13:17 -0700 | [diff] [blame] | 1182 | struct fit_completion_entry_v1 *skcomp, |
| 1183 | struct fit_comp_error_info *skerr, |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1184 | struct skd_special_context *skspcl) |
| 1185 | { |
| 1186 | u8 *buf = skspcl->data_buf; |
| 1187 | u8 status; |
| 1188 | int i; |
Bart Van Assche | d891fe6 | 2017-08-17 13:13:07 -0700 | [diff] [blame] | 1189 | struct skd_scsi_request *scsi = &skspcl->msg_buf->scsi[0]; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1190 | |
Bart Van Assche | 760b48c | 2017-08-17 13:13:00 -0700 | [diff] [blame] | 1191 | lockdep_assert_held(&skdev->lock); |
| 1192 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1193 | SKD_ASSERT(skspcl == &skdev->internal_skspcl); |
| 1194 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1195 | dev_dbg(&skdev->pdev->dev, "complete internal %x\n", scsi->cdb[0]); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1196 | |
| 1197 | skspcl->req.completion = *skcomp; |
| 1198 | skspcl->req.state = SKD_REQ_STATE_IDLE; |
| 1199 | skspcl->req.id += SKD_ID_INCR; |
| 1200 | |
| 1201 | status = skspcl->req.completion.status; |
| 1202 | |
| 1203 | skd_log_check_status(skdev, status, skerr->key, skerr->code, |
| 1204 | skerr->qual, skerr->fruc); |
| 1205 | |
| 1206 | switch (scsi->cdb[0]) { |
| 1207 | case TEST_UNIT_READY: |
| 1208 | if (status == SAM_STAT_GOOD) |
| 1209 | skd_send_internal_skspcl(skdev, skspcl, WRITE_BUFFER); |
| 1210 | else if ((status == SAM_STAT_CHECK_CONDITION) && |
| 1211 | (skerr->key == MEDIUM_ERROR)) |
| 1212 | skd_send_internal_skspcl(skdev, skspcl, WRITE_BUFFER); |
| 1213 | else { |
| 1214 | if (skdev->state == SKD_DRVR_STATE_STOPPING) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1215 | dev_dbg(&skdev->pdev->dev, |
| 1216 | "TUR failed, don't send anymore state 0x%x\n", |
| 1217 | skdev->state); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1218 | return; |
| 1219 | } |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1220 | dev_dbg(&skdev->pdev->dev, |
| 1221 | "**** TUR failed, retry skerr\n"); |
Bart Van Assche | fb4844b | 2017-08-17 13:13:19 -0700 | [diff] [blame] | 1222 | skd_send_internal_skspcl(skdev, skspcl, |
| 1223 | TEST_UNIT_READY); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1224 | } |
| 1225 | break; |
| 1226 | |
| 1227 | case WRITE_BUFFER: |
| 1228 | if (status == SAM_STAT_GOOD) |
| 1229 | skd_send_internal_skspcl(skdev, skspcl, READ_BUFFER); |
| 1230 | else { |
| 1231 | if (skdev->state == SKD_DRVR_STATE_STOPPING) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1232 | dev_dbg(&skdev->pdev->dev, |
| 1233 | "write buffer failed, don't send anymore state 0x%x\n", |
| 1234 | skdev->state); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1235 | return; |
| 1236 | } |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1237 | dev_dbg(&skdev->pdev->dev, |
| 1238 | "**** write buffer failed, retry skerr\n"); |
Bart Van Assche | fb4844b | 2017-08-17 13:13:19 -0700 | [diff] [blame] | 1239 | skd_send_internal_skspcl(skdev, skspcl, |
| 1240 | TEST_UNIT_READY); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1241 | } |
| 1242 | break; |
| 1243 | |
| 1244 | case READ_BUFFER: |
| 1245 | if (status == SAM_STAT_GOOD) { |
| 1246 | if (skd_chk_read_buf(skdev, skspcl) == 0) |
| 1247 | skd_send_internal_skspcl(skdev, skspcl, |
| 1248 | READ_CAPACITY); |
| 1249 | else { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1250 | dev_err(&skdev->pdev->dev, |
| 1251 | "*** W/R Buffer mismatch %d ***\n", |
| 1252 | skdev->connect_retries); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1253 | if (skdev->connect_retries < |
| 1254 | SKD_MAX_CONNECT_RETRIES) { |
| 1255 | skdev->connect_retries++; |
| 1256 | skd_soft_reset(skdev); |
| 1257 | } else { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1258 | dev_err(&skdev->pdev->dev, |
| 1259 | "W/R Buffer Connect Error\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1260 | return; |
| 1261 | } |
| 1262 | } |
| 1263 | |
| 1264 | } else { |
| 1265 | if (skdev->state == SKD_DRVR_STATE_STOPPING) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1266 | dev_dbg(&skdev->pdev->dev, |
| 1267 | "read buffer failed, don't send anymore state 0x%x\n", |
| 1268 | skdev->state); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1269 | return; |
| 1270 | } |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1271 | dev_dbg(&skdev->pdev->dev, |
| 1272 | "**** read buffer failed, retry skerr\n"); |
Bart Van Assche | fb4844b | 2017-08-17 13:13:19 -0700 | [diff] [blame] | 1273 | skd_send_internal_skspcl(skdev, skspcl, |
| 1274 | TEST_UNIT_READY); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1275 | } |
| 1276 | break; |
| 1277 | |
| 1278 | case READ_CAPACITY: |
| 1279 | skdev->read_cap_is_valid = 0; |
| 1280 | if (status == SAM_STAT_GOOD) { |
| 1281 | skdev->read_cap_last_lba = |
| 1282 | (buf[0] << 24) | (buf[1] << 16) | |
| 1283 | (buf[2] << 8) | buf[3]; |
| 1284 | skdev->read_cap_blocksize = |
| 1285 | (buf[4] << 24) | (buf[5] << 16) | |
| 1286 | (buf[6] << 8) | buf[7]; |
| 1287 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1288 | dev_dbg(&skdev->pdev->dev, "last lba %d, bs %d\n", |
| 1289 | skdev->read_cap_last_lba, |
| 1290 | skdev->read_cap_blocksize); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1291 | |
| 1292 | set_capacity(skdev->disk, skdev->read_cap_last_lba + 1); |
| 1293 | |
| 1294 | skdev->read_cap_is_valid = 1; |
| 1295 | |
| 1296 | skd_send_internal_skspcl(skdev, skspcl, INQUIRY); |
| 1297 | } else if ((status == SAM_STAT_CHECK_CONDITION) && |
| 1298 | (skerr->key == MEDIUM_ERROR)) { |
| 1299 | skdev->read_cap_last_lba = ~0; |
| 1300 | set_capacity(skdev->disk, skdev->read_cap_last_lba + 1); |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1301 | dev_dbg(&skdev->pdev->dev, "**** MEDIUM ERROR caused READCAP to fail, ignore failure and continue to inquiry\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1302 | skd_send_internal_skspcl(skdev, skspcl, INQUIRY); |
| 1303 | } else { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1304 | dev_dbg(&skdev->pdev->dev, "**** READCAP failed, retry TUR\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1305 | skd_send_internal_skspcl(skdev, skspcl, |
| 1306 | TEST_UNIT_READY); |
| 1307 | } |
| 1308 | break; |
| 1309 | |
| 1310 | case INQUIRY: |
| 1311 | skdev->inquiry_is_valid = 0; |
| 1312 | if (status == SAM_STAT_GOOD) { |
| 1313 | skdev->inquiry_is_valid = 1; |
| 1314 | |
| 1315 | for (i = 0; i < 12; i++) |
| 1316 | skdev->inq_serial_num[i] = buf[i + 4]; |
| 1317 | skdev->inq_serial_num[12] = 0; |
| 1318 | } |
| 1319 | |
| 1320 | if (skd_unquiesce_dev(skdev) < 0) |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1321 | dev_dbg(&skdev->pdev->dev, "**** failed, to ONLINE device\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1322 | /* connection is complete */ |
| 1323 | skdev->connect_retries = 0; |
| 1324 | break; |
| 1325 | |
| 1326 | case SYNCHRONIZE_CACHE: |
| 1327 | if (status == SAM_STAT_GOOD) |
| 1328 | skdev->sync_done = 1; |
| 1329 | else |
| 1330 | skdev->sync_done = -1; |
| 1331 | wake_up_interruptible(&skdev->waitq); |
| 1332 | break; |
| 1333 | |
| 1334 | default: |
| 1335 | SKD_ASSERT("we didn't send this"); |
| 1336 | } |
| 1337 | } |
| 1338 | |
| 1339 | /* |
| 1340 | ***************************************************************************** |
| 1341 | * FIT MESSAGES |
| 1342 | ***************************************************************************** |
| 1343 | */ |
| 1344 | |
| 1345 | static void skd_send_fitmsg(struct skd_device *skdev, |
| 1346 | struct skd_fitmsg_context *skmsg) |
| 1347 | { |
| 1348 | u64 qcmd; |
| 1349 | struct fit_msg_hdr *fmh; |
| 1350 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1351 | dev_dbg(&skdev->pdev->dev, "dma address 0x%llx, busy=%d\n", |
| 1352 | skmsg->mb_dma_address, skdev->in_flight); |
Bart Van Assche | 6507f43 | 2017-08-17 13:13:06 -0700 | [diff] [blame] | 1353 | dev_dbg(&skdev->pdev->dev, "msg_buf %p\n", skmsg->msg_buf); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1354 | |
| 1355 | qcmd = skmsg->mb_dma_address; |
| 1356 | qcmd |= FIT_QCMD_QID_NORMAL; |
| 1357 | |
Bart Van Assche | d891fe6 | 2017-08-17 13:13:07 -0700 | [diff] [blame] | 1358 | fmh = &skmsg->msg_buf->fmh; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1359 | skmsg->outstanding = fmh->num_protocol_cmds_coalesced; |
| 1360 | |
| 1361 | if (unlikely(skdev->dbg_level > 1)) { |
| 1362 | u8 *bp = (u8 *)skmsg->msg_buf; |
| 1363 | int i; |
| 1364 | for (i = 0; i < skmsg->length; i += 8) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1365 | dev_dbg(&skdev->pdev->dev, "msg[%2d] %8ph\n", i, |
| 1366 | &bp[i]); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1367 | if (i == 0) |
| 1368 | i = 64 - 8; |
| 1369 | } |
| 1370 | } |
| 1371 | |
| 1372 | if (skmsg->length > 256) |
| 1373 | qcmd |= FIT_QCMD_MSGSIZE_512; |
| 1374 | else if (skmsg->length > 128) |
| 1375 | qcmd |= FIT_QCMD_MSGSIZE_256; |
| 1376 | else if (skmsg->length > 64) |
| 1377 | qcmd |= FIT_QCMD_MSGSIZE_128; |
| 1378 | else |
| 1379 | /* |
| 1380 | * This makes no sense because the FIT msg header is |
| 1381 | * 64 bytes. If the msg is only 64 bytes long it has |
| 1382 | * no payload. |
| 1383 | */ |
| 1384 | qcmd |= FIT_QCMD_MSGSIZE_64; |
| 1385 | |
Bart Van Assche | 5fbd545 | 2017-08-17 13:12:46 -0700 | [diff] [blame] | 1386 | /* Make sure skd_msg_buf is written before the doorbell is triggered. */ |
| 1387 | smp_wmb(); |
| 1388 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1389 | SKD_WRITEQ(skdev, qcmd, FIT_Q_COMMAND); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1390 | } |
| 1391 | |
| 1392 | static void skd_send_special_fitmsg(struct skd_device *skdev, |
| 1393 | struct skd_special_context *skspcl) |
| 1394 | { |
| 1395 | u64 qcmd; |
| 1396 | |
| 1397 | if (unlikely(skdev->dbg_level > 1)) { |
| 1398 | u8 *bp = (u8 *)skspcl->msg_buf; |
| 1399 | int i; |
| 1400 | |
| 1401 | for (i = 0; i < SKD_N_SPECIAL_FITMSG_BYTES; i += 8) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1402 | dev_dbg(&skdev->pdev->dev, " spcl[%2d] %8ph\n", i, |
| 1403 | &bp[i]); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1404 | if (i == 0) |
| 1405 | i = 64 - 8; |
| 1406 | } |
| 1407 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1408 | dev_dbg(&skdev->pdev->dev, |
| 1409 | "skspcl=%p id=%04x sksg_list=%p sksg_dma=%llx\n", |
| 1410 | skspcl, skspcl->req.id, skspcl->req.sksg_list, |
| 1411 | skspcl->req.sksg_dma_address); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1412 | for (i = 0; i < skspcl->req.n_sg; i++) { |
| 1413 | struct fit_sg_descriptor *sgd = |
| 1414 | &skspcl->req.sksg_list[i]; |
| 1415 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1416 | dev_dbg(&skdev->pdev->dev, |
| 1417 | " sg[%d] count=%u ctrl=0x%x addr=0x%llx next=0x%llx\n", |
| 1418 | i, sgd->byte_count, sgd->control, |
| 1419 | sgd->host_side_addr, sgd->next_desc_ptr); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1420 | } |
| 1421 | } |
| 1422 | |
| 1423 | /* |
| 1424 | * Special FIT msgs are always 128 bytes: a 64-byte FIT hdr |
| 1425 | * and one 64-byte SSDI command. |
| 1426 | */ |
| 1427 | qcmd = skspcl->mb_dma_address; |
| 1428 | qcmd |= FIT_QCMD_QID_NORMAL + FIT_QCMD_MSGSIZE_128; |
| 1429 | |
Bart Van Assche | 5fbd545 | 2017-08-17 13:12:46 -0700 | [diff] [blame] | 1430 | /* Make sure skd_msg_buf is written before the doorbell is triggered. */ |
| 1431 | smp_wmb(); |
| 1432 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1433 | SKD_WRITEQ(skdev, qcmd, FIT_Q_COMMAND); |
| 1434 | } |
| 1435 | |
| 1436 | /* |
| 1437 | ***************************************************************************** |
| 1438 | * COMPLETION QUEUE |
| 1439 | ***************************************************************************** |
| 1440 | */ |
| 1441 | |
| 1442 | static void skd_complete_other(struct skd_device *skdev, |
Bart Van Assche | 85e3411 | 2017-08-17 13:13:17 -0700 | [diff] [blame] | 1443 | struct fit_completion_entry_v1 *skcomp, |
| 1444 | struct fit_comp_error_info *skerr); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1445 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1446 | struct sns_info { |
| 1447 | u8 type; |
| 1448 | u8 stat; |
| 1449 | u8 key; |
| 1450 | u8 asc; |
| 1451 | u8 ascq; |
| 1452 | u8 mask; |
| 1453 | enum skd_check_status_action action; |
| 1454 | }; |
| 1455 | |
| 1456 | static struct sns_info skd_chkstat_table[] = { |
| 1457 | /* Good */ |
| 1458 | { 0x70, 0x02, RECOVERED_ERROR, 0, 0, 0x1c, |
| 1459 | SKD_CHECK_STATUS_REPORT_GOOD }, |
| 1460 | |
| 1461 | /* Smart alerts */ |
| 1462 | { 0x70, 0x02, NO_SENSE, 0x0B, 0x00, 0x1E, /* warnings */ |
| 1463 | SKD_CHECK_STATUS_REPORT_SMART_ALERT }, |
| 1464 | { 0x70, 0x02, NO_SENSE, 0x5D, 0x00, 0x1E, /* thresholds */ |
| 1465 | SKD_CHECK_STATUS_REPORT_SMART_ALERT }, |
| 1466 | { 0x70, 0x02, RECOVERED_ERROR, 0x0B, 0x01, 0x1F, /* temperature over trigger */ |
| 1467 | SKD_CHECK_STATUS_REPORT_SMART_ALERT }, |
| 1468 | |
| 1469 | /* Retry (with limits) */ |
| 1470 | { 0x70, 0x02, 0x0B, 0, 0, 0x1C, /* This one is for DMA ERROR */ |
| 1471 | SKD_CHECK_STATUS_REQUEUE_REQUEST }, |
| 1472 | { 0x70, 0x02, 0x06, 0x0B, 0x00, 0x1E, /* warnings */ |
| 1473 | SKD_CHECK_STATUS_REQUEUE_REQUEST }, |
| 1474 | { 0x70, 0x02, 0x06, 0x5D, 0x00, 0x1E, /* thresholds */ |
| 1475 | SKD_CHECK_STATUS_REQUEUE_REQUEST }, |
| 1476 | { 0x70, 0x02, 0x06, 0x80, 0x30, 0x1F, /* backup power */ |
| 1477 | SKD_CHECK_STATUS_REQUEUE_REQUEST }, |
| 1478 | |
| 1479 | /* Busy (or about to be) */ |
| 1480 | { 0x70, 0x02, 0x06, 0x3f, 0x01, 0x1F, /* fw changed */ |
| 1481 | SKD_CHECK_STATUS_BUSY_IMMINENT }, |
| 1482 | }; |
| 1483 | |
| 1484 | /* |
| 1485 | * Look up status and sense data to decide how to handle the error |
| 1486 | * from the device. |
| 1487 | * mask says which fields must match e.g., mask=0x18 means check |
| 1488 | * type and stat, ignore key, asc, ascq. |
| 1489 | */ |
| 1490 | |
Mike Snitzer | 38d4a1b | 2013-11-01 15:05:10 -0400 | [diff] [blame] | 1491 | static enum skd_check_status_action |
| 1492 | skd_check_status(struct skd_device *skdev, |
Bart Van Assche | 85e3411 | 2017-08-17 13:13:17 -0700 | [diff] [blame] | 1493 | u8 cmp_status, struct fit_comp_error_info *skerr) |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1494 | { |
Bart Van Assche | 0b2e0c0 | 2017-08-17 13:13:11 -0700 | [diff] [blame] | 1495 | int i; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1496 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1497 | dev_err(&skdev->pdev->dev, "key/asc/ascq/fruc %02x/%02x/%02x/%02x\n", |
| 1498 | skerr->key, skerr->code, skerr->qual, skerr->fruc); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1499 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1500 | dev_dbg(&skdev->pdev->dev, |
| 1501 | "stat: t=%02x stat=%02x k=%02x c=%02x q=%02x fruc=%02x\n", |
| 1502 | skerr->type, cmp_status, skerr->key, skerr->code, skerr->qual, |
| 1503 | skerr->fruc); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1504 | |
| 1505 | /* Does the info match an entry in the good category? */ |
Bart Van Assche | 0b2e0c0 | 2017-08-17 13:13:11 -0700 | [diff] [blame] | 1506 | for (i = 0; i < ARRAY_SIZE(skd_chkstat_table); i++) { |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1507 | struct sns_info *sns = &skd_chkstat_table[i]; |
| 1508 | |
| 1509 | if (sns->mask & 0x10) |
| 1510 | if (skerr->type != sns->type) |
| 1511 | continue; |
| 1512 | |
| 1513 | if (sns->mask & 0x08) |
| 1514 | if (cmp_status != sns->stat) |
| 1515 | continue; |
| 1516 | |
| 1517 | if (sns->mask & 0x04) |
| 1518 | if (skerr->key != sns->key) |
| 1519 | continue; |
| 1520 | |
| 1521 | if (sns->mask & 0x02) |
| 1522 | if (skerr->code != sns->asc) |
| 1523 | continue; |
| 1524 | |
| 1525 | if (sns->mask & 0x01) |
| 1526 | if (skerr->qual != sns->ascq) |
| 1527 | continue; |
| 1528 | |
| 1529 | if (sns->action == SKD_CHECK_STATUS_REPORT_SMART_ALERT) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1530 | dev_err(&skdev->pdev->dev, |
| 1531 | "SMART Alert: sense key/asc/ascq %02x/%02x/%02x\n", |
| 1532 | skerr->key, skerr->code, skerr->qual); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1533 | } |
| 1534 | return sns->action; |
| 1535 | } |
| 1536 | |
| 1537 | /* No other match, so nonzero status means error, |
| 1538 | * zero status means good |
| 1539 | */ |
| 1540 | if (cmp_status) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1541 | dev_dbg(&skdev->pdev->dev, "status check: error\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1542 | return SKD_CHECK_STATUS_REPORT_ERROR; |
| 1543 | } |
| 1544 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1545 | dev_dbg(&skdev->pdev->dev, "status check good default\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1546 | return SKD_CHECK_STATUS_REPORT_GOOD; |
| 1547 | } |
| 1548 | |
| 1549 | static void skd_resolve_req_exception(struct skd_device *skdev, |
| 1550 | struct skd_request_context *skreq) |
| 1551 | { |
| 1552 | u8 cmp_status = skreq->completion.status; |
| 1553 | |
| 1554 | switch (skd_check_status(skdev, cmp_status, &skreq->err_info)) { |
| 1555 | case SKD_CHECK_STATUS_REPORT_GOOD: |
| 1556 | case SKD_CHECK_STATUS_REPORT_SMART_ALERT: |
Christoph Hellwig | 2a842ac | 2017-06-03 09:38:04 +0200 | [diff] [blame] | 1557 | skd_end_request(skdev, skreq, BLK_STS_OK); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1558 | break; |
| 1559 | |
| 1560 | case SKD_CHECK_STATUS_BUSY_IMMINENT: |
| 1561 | skd_log_skreq(skdev, skreq, "retry(busy)"); |
Mike Snitzer | 38d4a1b | 2013-11-01 15:05:10 -0400 | [diff] [blame] | 1562 | blk_requeue_request(skdev->queue, skreq->req); |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1563 | dev_info(&skdev->pdev->dev, "drive BUSY imminent\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1564 | skdev->state = SKD_DRVR_STATE_BUSY_IMMINENT; |
| 1565 | skdev->timer_countdown = SKD_TIMER_MINUTES(20); |
| 1566 | skd_quiesce_dev(skdev); |
| 1567 | break; |
| 1568 | |
| 1569 | case SKD_CHECK_STATUS_REQUEUE_REQUEST: |
Jens Axboe | fcd37eb | 2013-11-01 10:14:56 -0600 | [diff] [blame] | 1570 | if ((unsigned long) ++skreq->req->special < SKD_MAX_RETRIES) { |
| 1571 | skd_log_skreq(skdev, skreq, "retry"); |
Mike Snitzer | 38d4a1b | 2013-11-01 15:05:10 -0400 | [diff] [blame] | 1572 | blk_requeue_request(skdev->queue, skreq->req); |
Jens Axboe | fcd37eb | 2013-11-01 10:14:56 -0600 | [diff] [blame] | 1573 | break; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1574 | } |
Bart Van Assche | ce6882b | 2017-08-17 13:12:52 -0700 | [diff] [blame] | 1575 | /* fall through */ |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1576 | |
| 1577 | case SKD_CHECK_STATUS_REPORT_ERROR: |
| 1578 | default: |
Christoph Hellwig | 2a842ac | 2017-06-03 09:38:04 +0200 | [diff] [blame] | 1579 | skd_end_request(skdev, skreq, BLK_STS_IOERR); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1580 | break; |
| 1581 | } |
| 1582 | } |
| 1583 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1584 | /* assume spinlock is already held */ |
| 1585 | static void skd_release_skreq(struct skd_device *skdev, |
| 1586 | struct skd_request_context *skreq) |
| 1587 | { |
| 1588 | u32 msg_slot; |
| 1589 | struct skd_fitmsg_context *skmsg; |
| 1590 | |
| 1591 | u32 timo_slot; |
| 1592 | |
| 1593 | /* |
| 1594 | * Reclaim the FIT msg buffer if this is |
| 1595 | * the first of the requests it carried to |
| 1596 | * be completed. The FIT msg buffer used to |
| 1597 | * send this request cannot be reused until |
| 1598 | * we are sure the s1120 card has copied |
| 1599 | * it to its memory. The FIT msg might have |
| 1600 | * contained several requests. As soon as |
| 1601 | * any of them are completed we know that |
| 1602 | * the entire FIT msg was transferred. |
| 1603 | * Only the first completed request will |
| 1604 | * match the FIT msg buffer id. The FIT |
| 1605 | * msg buffer id is immediately updated. |
| 1606 | * When subsequent requests complete the FIT |
| 1607 | * msg buffer id won't match, so we know |
| 1608 | * quite cheaply that it is already done. |
| 1609 | */ |
| 1610 | msg_slot = skreq->fitmsg_id & SKD_ID_SLOT_MASK; |
| 1611 | SKD_ASSERT(msg_slot < skdev->num_fitmsg_context); |
| 1612 | |
| 1613 | skmsg = &skdev->skmsg_table[msg_slot]; |
| 1614 | if (skmsg->id == skreq->fitmsg_id) { |
| 1615 | SKD_ASSERT(skmsg->state == SKD_MSG_STATE_BUSY); |
| 1616 | SKD_ASSERT(skmsg->outstanding > 0); |
| 1617 | skmsg->outstanding--; |
| 1618 | if (skmsg->outstanding == 0) { |
| 1619 | skmsg->state = SKD_MSG_STATE_IDLE; |
| 1620 | skmsg->id += SKD_ID_INCR; |
| 1621 | skmsg->next = skdev->skmsg_free_list; |
| 1622 | skdev->skmsg_free_list = skmsg; |
| 1623 | } |
| 1624 | } |
| 1625 | |
| 1626 | /* |
| 1627 | * Decrease the number of active requests. |
| 1628 | * Also decrements the count in the timeout slot. |
| 1629 | */ |
| 1630 | SKD_ASSERT(skdev->in_flight > 0); |
| 1631 | skdev->in_flight -= 1; |
| 1632 | |
| 1633 | timo_slot = skreq->timeout_stamp & SKD_TIMEOUT_SLOT_MASK; |
| 1634 | SKD_ASSERT(skdev->timeout_slot[timo_slot] > 0); |
| 1635 | skdev->timeout_slot[timo_slot] -= 1; |
| 1636 | |
| 1637 | /* |
| 1638 | * Reset backpointer |
| 1639 | */ |
Jens Axboe | fcd37eb | 2013-11-01 10:14:56 -0600 | [diff] [blame] | 1640 | skreq->req = NULL; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1641 | |
| 1642 | /* |
| 1643 | * Reclaim the skd_request_context |
| 1644 | */ |
| 1645 | skreq->state = SKD_REQ_STATE_IDLE; |
| 1646 | skreq->id += SKD_ID_INCR; |
| 1647 | skreq->next = skdev->skreq_free_list; |
| 1648 | skdev->skreq_free_list = skreq; |
| 1649 | } |
| 1650 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1651 | static int skd_isr_completion_posted(struct skd_device *skdev, |
| 1652 | int limit, int *enqueued) |
| 1653 | { |
Bart Van Assche | 85e3411 | 2017-08-17 13:13:17 -0700 | [diff] [blame] | 1654 | struct fit_completion_entry_v1 *skcmp; |
| 1655 | struct fit_comp_error_info *skerr; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1656 | u16 req_id; |
| 1657 | u32 req_slot; |
| 1658 | struct skd_request_context *skreq; |
Bart Van Assche | c830da8 | 2017-08-17 13:13:13 -0700 | [diff] [blame] | 1659 | u16 cmp_cntxt; |
| 1660 | u8 cmp_status; |
| 1661 | u8 cmp_cycle; |
| 1662 | u32 cmp_bytes; |
| 1663 | int rc; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1664 | int processed = 0; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1665 | |
Bart Van Assche | 760b48c | 2017-08-17 13:13:00 -0700 | [diff] [blame] | 1666 | lockdep_assert_held(&skdev->lock); |
| 1667 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1668 | for (;; ) { |
| 1669 | SKD_ASSERT(skdev->skcomp_ix < SKD_N_COMPLETION_ENTRY); |
| 1670 | |
| 1671 | skcmp = &skdev->skcomp_table[skdev->skcomp_ix]; |
| 1672 | cmp_cycle = skcmp->cycle; |
| 1673 | cmp_cntxt = skcmp->tag; |
| 1674 | cmp_status = skcmp->status; |
| 1675 | cmp_bytes = be32_to_cpu(skcmp->num_returned_bytes); |
| 1676 | |
| 1677 | skerr = &skdev->skerr_table[skdev->skcomp_ix]; |
| 1678 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1679 | dev_dbg(&skdev->pdev->dev, |
| 1680 | "cycle=%d ix=%d got cycle=%d cmdctxt=0x%x stat=%d busy=%d rbytes=0x%x proto=%d\n", |
| 1681 | skdev->skcomp_cycle, skdev->skcomp_ix, cmp_cycle, |
| 1682 | cmp_cntxt, cmp_status, skdev->in_flight, cmp_bytes, |
| 1683 | skdev->proto_ver); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1684 | |
| 1685 | if (cmp_cycle != skdev->skcomp_cycle) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1686 | dev_dbg(&skdev->pdev->dev, "end of completions\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1687 | break; |
| 1688 | } |
| 1689 | /* |
| 1690 | * Update the completion queue head index and possibly |
| 1691 | * the completion cycle count. 8-bit wrap-around. |
| 1692 | */ |
| 1693 | skdev->skcomp_ix++; |
| 1694 | if (skdev->skcomp_ix >= SKD_N_COMPLETION_ENTRY) { |
| 1695 | skdev->skcomp_ix = 0; |
| 1696 | skdev->skcomp_cycle++; |
| 1697 | } |
| 1698 | |
| 1699 | /* |
| 1700 | * The command context is a unique 32-bit ID. The low order |
| 1701 | * bits help locate the request. The request is usually a |
| 1702 | * r/w request (see skd_start() above) or a special request. |
| 1703 | */ |
| 1704 | req_id = cmp_cntxt; |
| 1705 | req_slot = req_id & SKD_ID_SLOT_AND_TABLE_MASK; |
| 1706 | |
| 1707 | /* Is this other than a r/w request? */ |
| 1708 | if (req_slot >= skdev->num_req_context) { |
| 1709 | /* |
| 1710 | * This is not a completion for a r/w request. |
| 1711 | */ |
| 1712 | skd_complete_other(skdev, skcmp, skerr); |
| 1713 | continue; |
| 1714 | } |
| 1715 | |
| 1716 | skreq = &skdev->skreq_table[req_slot]; |
| 1717 | |
| 1718 | /* |
| 1719 | * Make sure the request ID for the slot matches. |
| 1720 | */ |
| 1721 | if (skreq->id != req_id) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1722 | dev_dbg(&skdev->pdev->dev, |
| 1723 | "mismatch comp_id=0x%x req_id=0x%x\n", req_id, |
| 1724 | skreq->id); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1725 | { |
| 1726 | u16 new_id = cmp_cntxt; |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1727 | dev_err(&skdev->pdev->dev, |
| 1728 | "Completion mismatch comp_id=0x%04x skreq=0x%04x new=0x%04x\n", |
| 1729 | req_id, skreq->id, new_id); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1730 | |
| 1731 | continue; |
| 1732 | } |
| 1733 | } |
| 1734 | |
| 1735 | SKD_ASSERT(skreq->state == SKD_REQ_STATE_BUSY); |
| 1736 | |
| 1737 | if (skreq->state == SKD_REQ_STATE_ABORTED) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1738 | dev_dbg(&skdev->pdev->dev, "reclaim req %p id=%04x\n", |
| 1739 | skreq, skreq->id); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1740 | /* a previously timed out command can |
| 1741 | * now be cleaned up */ |
| 1742 | skd_release_skreq(skdev, skreq); |
| 1743 | continue; |
| 1744 | } |
| 1745 | |
| 1746 | skreq->completion = *skcmp; |
| 1747 | if (unlikely(cmp_status == SAM_STAT_CHECK_CONDITION)) { |
| 1748 | skreq->err_info = *skerr; |
| 1749 | skd_log_check_status(skdev, cmp_status, skerr->key, |
| 1750 | skerr->code, skerr->qual, |
| 1751 | skerr->fruc); |
| 1752 | } |
| 1753 | /* Release DMA resources for the request. */ |
| 1754 | if (skreq->n_sg > 0) |
| 1755 | skd_postop_sg_list(skdev, skreq); |
| 1756 | |
Jens Axboe | fcd37eb | 2013-11-01 10:14:56 -0600 | [diff] [blame] | 1757 | if (!skreq->req) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1758 | dev_dbg(&skdev->pdev->dev, |
| 1759 | "NULL backptr skdreq %p, req=0x%x req_id=0x%x\n", |
| 1760 | skreq, skreq->id, req_id); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1761 | } else { |
| 1762 | /* |
| 1763 | * Capture the outcome and post it back to the |
| 1764 | * native request. |
| 1765 | */ |
Jens Axboe | fcd37eb | 2013-11-01 10:14:56 -0600 | [diff] [blame] | 1766 | if (likely(cmp_status == SAM_STAT_GOOD)) |
Christoph Hellwig | 2a842ac | 2017-06-03 09:38:04 +0200 | [diff] [blame] | 1767 | skd_end_request(skdev, skreq, BLK_STS_OK); |
Jens Axboe | fcd37eb | 2013-11-01 10:14:56 -0600 | [diff] [blame] | 1768 | else |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1769 | skd_resolve_req_exception(skdev, skreq); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1770 | } |
| 1771 | |
| 1772 | /* |
| 1773 | * Release the skreq, its FIT msg (if one), timeout slot, |
| 1774 | * and queue depth. |
| 1775 | */ |
| 1776 | skd_release_skreq(skdev, skreq); |
| 1777 | |
| 1778 | /* skd_isr_comp_limit equal zero means no limit */ |
| 1779 | if (limit) { |
| 1780 | if (++processed >= limit) { |
| 1781 | rc = 1; |
| 1782 | break; |
| 1783 | } |
| 1784 | } |
| 1785 | } |
| 1786 | |
| 1787 | if ((skdev->state == SKD_DRVR_STATE_PAUSING) |
| 1788 | && (skdev->in_flight) == 0) { |
| 1789 | skdev->state = SKD_DRVR_STATE_PAUSED; |
| 1790 | wake_up_interruptible(&skdev->waitq); |
| 1791 | } |
| 1792 | |
| 1793 | return rc; |
| 1794 | } |
| 1795 | |
| 1796 | static void skd_complete_other(struct skd_device *skdev, |
Bart Van Assche | 85e3411 | 2017-08-17 13:13:17 -0700 | [diff] [blame] | 1797 | struct fit_completion_entry_v1 *skcomp, |
| 1798 | struct fit_comp_error_info *skerr) |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1799 | { |
| 1800 | u32 req_id = 0; |
| 1801 | u32 req_table; |
| 1802 | u32 req_slot; |
| 1803 | struct skd_special_context *skspcl; |
| 1804 | |
Bart Van Assche | 760b48c | 2017-08-17 13:13:00 -0700 | [diff] [blame] | 1805 | lockdep_assert_held(&skdev->lock); |
| 1806 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1807 | req_id = skcomp->tag; |
| 1808 | req_table = req_id & SKD_ID_TABLE_MASK; |
| 1809 | req_slot = req_id & SKD_ID_SLOT_MASK; |
| 1810 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1811 | dev_dbg(&skdev->pdev->dev, "table=0x%x id=0x%x slot=%d\n", req_table, |
| 1812 | req_id, req_slot); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1813 | |
| 1814 | /* |
| 1815 | * Based on the request id, determine how to dispatch this completion. |
| 1816 | * This swich/case is finding the good cases and forwarding the |
| 1817 | * completion entry. Errors are reported below the switch. |
| 1818 | */ |
| 1819 | switch (req_table) { |
| 1820 | case SKD_ID_RW_REQUEST: |
| 1821 | /* |
Bart Van Assche | e1d06f2 | 2017-08-17 13:12:54 -0700 | [diff] [blame] | 1822 | * The caller, skd_isr_completion_posted() above, |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1823 | * handles r/w requests. The only way we get here |
| 1824 | * is if the req_slot is out of bounds. |
| 1825 | */ |
| 1826 | break; |
| 1827 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1828 | case SKD_ID_INTERNAL: |
| 1829 | if (req_slot == 0) { |
| 1830 | skspcl = &skdev->internal_skspcl; |
| 1831 | if (skspcl->req.id == req_id && |
| 1832 | skspcl->req.state == SKD_REQ_STATE_BUSY) { |
| 1833 | skd_complete_internal(skdev, |
| 1834 | skcomp, skerr, skspcl); |
| 1835 | return; |
| 1836 | } |
| 1837 | } |
| 1838 | break; |
| 1839 | |
| 1840 | case SKD_ID_FIT_MSG: |
| 1841 | /* |
| 1842 | * These id's should never appear in a completion record. |
| 1843 | */ |
| 1844 | break; |
| 1845 | |
| 1846 | default: |
| 1847 | /* |
| 1848 | * These id's should never appear anywhere; |
| 1849 | */ |
| 1850 | break; |
| 1851 | } |
| 1852 | |
| 1853 | /* |
| 1854 | * If we get here it is a bad or stale id. |
| 1855 | */ |
| 1856 | } |
| 1857 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1858 | static void skd_reset_skcomp(struct skd_device *skdev) |
| 1859 | { |
Bart Van Assche | 6f7c767 | 2017-08-17 13:13:02 -0700 | [diff] [blame] | 1860 | memset(skdev->skcomp_table, 0, SKD_SKCOMP_SIZE); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1861 | |
| 1862 | skdev->skcomp_ix = 0; |
| 1863 | skdev->skcomp_cycle = 1; |
| 1864 | } |
| 1865 | |
| 1866 | /* |
| 1867 | ***************************************************************************** |
| 1868 | * INTERRUPTS |
| 1869 | ***************************************************************************** |
| 1870 | */ |
| 1871 | static void skd_completion_worker(struct work_struct *work) |
| 1872 | { |
| 1873 | struct skd_device *skdev = |
| 1874 | container_of(work, struct skd_device, completion_worker); |
| 1875 | unsigned long flags; |
| 1876 | int flush_enqueued = 0; |
| 1877 | |
| 1878 | spin_lock_irqsave(&skdev->lock, flags); |
| 1879 | |
| 1880 | /* |
| 1881 | * pass in limit=0, which means no limit.. |
| 1882 | * process everything in compq |
| 1883 | */ |
| 1884 | skd_isr_completion_posted(skdev, 0, &flush_enqueued); |
Bart Van Assche | 8fe7006 | 2017-08-17 13:13:22 -0700 | [diff] [blame] | 1885 | blk_run_queue_async(skdev->queue); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1886 | |
| 1887 | spin_unlock_irqrestore(&skdev->lock, flags); |
| 1888 | } |
| 1889 | |
| 1890 | static void skd_isr_msg_from_dev(struct skd_device *skdev); |
| 1891 | |
Arnd Bergmann | 41c9499 | 2016-11-09 13:55:35 +0100 | [diff] [blame] | 1892 | static irqreturn_t |
| 1893 | skd_isr(int irq, void *ptr) |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1894 | { |
Bart Van Assche | 1cd3c1a | 2017-08-17 13:13:10 -0700 | [diff] [blame] | 1895 | struct skd_device *skdev = ptr; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1896 | u32 intstat; |
| 1897 | u32 ack; |
| 1898 | int rc = 0; |
| 1899 | int deferred = 0; |
| 1900 | int flush_enqueued = 0; |
| 1901 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1902 | spin_lock(&skdev->lock); |
| 1903 | |
| 1904 | for (;; ) { |
| 1905 | intstat = SKD_READL(skdev, FIT_INT_STATUS_HOST); |
| 1906 | |
| 1907 | ack = FIT_INT_DEF_MASK; |
| 1908 | ack &= intstat; |
| 1909 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1910 | dev_dbg(&skdev->pdev->dev, "intstat=0x%x ack=0x%x\n", intstat, |
| 1911 | ack); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1912 | |
| 1913 | /* As long as there is an int pending on device, keep |
| 1914 | * running loop. When none, get out, but if we've never |
| 1915 | * done any processing, call completion handler? |
| 1916 | */ |
| 1917 | if (ack == 0) { |
| 1918 | /* No interrupts on device, but run the completion |
| 1919 | * processor anyway? |
| 1920 | */ |
| 1921 | if (rc == 0) |
| 1922 | if (likely (skdev->state |
| 1923 | == SKD_DRVR_STATE_ONLINE)) |
| 1924 | deferred = 1; |
| 1925 | break; |
| 1926 | } |
| 1927 | |
| 1928 | rc = IRQ_HANDLED; |
| 1929 | |
| 1930 | SKD_WRITEL(skdev, ack, FIT_INT_STATUS_HOST); |
| 1931 | |
| 1932 | if (likely((skdev->state != SKD_DRVR_STATE_LOAD) && |
| 1933 | (skdev->state != SKD_DRVR_STATE_STOPPING))) { |
| 1934 | if (intstat & FIT_ISH_COMPLETION_POSTED) { |
| 1935 | /* |
| 1936 | * If we have already deferred completion |
| 1937 | * processing, don't bother running it again |
| 1938 | */ |
| 1939 | if (deferred == 0) |
| 1940 | deferred = |
| 1941 | skd_isr_completion_posted(skdev, |
| 1942 | skd_isr_comp_limit, &flush_enqueued); |
| 1943 | } |
| 1944 | |
| 1945 | if (intstat & FIT_ISH_FW_STATE_CHANGE) { |
| 1946 | skd_isr_fwstate(skdev); |
| 1947 | if (skdev->state == SKD_DRVR_STATE_FAULT || |
| 1948 | skdev->state == |
| 1949 | SKD_DRVR_STATE_DISAPPEARED) { |
| 1950 | spin_unlock(&skdev->lock); |
| 1951 | return rc; |
| 1952 | } |
| 1953 | } |
| 1954 | |
| 1955 | if (intstat & FIT_ISH_MSG_FROM_DEV) |
| 1956 | skd_isr_msg_from_dev(skdev); |
| 1957 | } |
| 1958 | } |
| 1959 | |
| 1960 | if (unlikely(flush_enqueued)) |
Bart Van Assche | 8fe7006 | 2017-08-17 13:13:22 -0700 | [diff] [blame] | 1961 | blk_run_queue_async(skdev->queue); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1962 | |
| 1963 | if (deferred) |
| 1964 | schedule_work(&skdev->completion_worker); |
| 1965 | else if (!flush_enqueued) |
Bart Van Assche | 8fe7006 | 2017-08-17 13:13:22 -0700 | [diff] [blame] | 1966 | blk_run_queue_async(skdev->queue); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1967 | |
| 1968 | spin_unlock(&skdev->lock); |
| 1969 | |
| 1970 | return rc; |
| 1971 | } |
| 1972 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1973 | static void skd_drive_fault(struct skd_device *skdev) |
| 1974 | { |
| 1975 | skdev->state = SKD_DRVR_STATE_FAULT; |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1976 | dev_err(&skdev->pdev->dev, "Drive FAULT\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1977 | } |
| 1978 | |
| 1979 | static void skd_drive_disappeared(struct skd_device *skdev) |
| 1980 | { |
| 1981 | skdev->state = SKD_DRVR_STATE_DISAPPEARED; |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1982 | dev_err(&skdev->pdev->dev, "Drive DISAPPEARED\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1983 | } |
| 1984 | |
| 1985 | static void skd_isr_fwstate(struct skd_device *skdev) |
| 1986 | { |
| 1987 | u32 sense; |
| 1988 | u32 state; |
| 1989 | u32 mtd; |
| 1990 | int prev_driver_state = skdev->state; |
| 1991 | |
| 1992 | sense = SKD_READL(skdev, FIT_STATUS); |
| 1993 | state = sense & FIT_SR_DRIVE_STATE_MASK; |
| 1994 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 1995 | dev_err(&skdev->pdev->dev, "s1120 state %s(%d)=>%s(%d)\n", |
| 1996 | skd_drive_state_to_str(skdev->drive_state), skdev->drive_state, |
| 1997 | skd_drive_state_to_str(state), state); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 1998 | |
| 1999 | skdev->drive_state = state; |
| 2000 | |
| 2001 | switch (skdev->drive_state) { |
| 2002 | case FIT_SR_DRIVE_INIT: |
| 2003 | if (skdev->state == SKD_DRVR_STATE_PROTOCOL_MISMATCH) { |
| 2004 | skd_disable_interrupts(skdev); |
| 2005 | break; |
| 2006 | } |
| 2007 | if (skdev->state == SKD_DRVR_STATE_RESTARTING) |
Bart Van Assche | 79ce12a | 2017-08-17 13:13:14 -0700 | [diff] [blame] | 2008 | skd_recover_requests(skdev); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2009 | if (skdev->state == SKD_DRVR_STATE_WAIT_BOOT) { |
| 2010 | skdev->timer_countdown = SKD_STARTING_TIMO; |
| 2011 | skdev->state = SKD_DRVR_STATE_STARTING; |
| 2012 | skd_soft_reset(skdev); |
| 2013 | break; |
| 2014 | } |
| 2015 | mtd = FIT_MXD_CONS(FIT_MTD_FITFW_INIT, 0, 0); |
| 2016 | SKD_WRITEL(skdev, mtd, FIT_MSG_TO_DEVICE); |
| 2017 | skdev->last_mtd = mtd; |
| 2018 | break; |
| 2019 | |
| 2020 | case FIT_SR_DRIVE_ONLINE: |
| 2021 | skdev->cur_max_queue_depth = skd_max_queue_depth; |
| 2022 | if (skdev->cur_max_queue_depth > skdev->dev_max_queue_depth) |
| 2023 | skdev->cur_max_queue_depth = skdev->dev_max_queue_depth; |
| 2024 | |
| 2025 | skdev->queue_low_water_mark = |
| 2026 | skdev->cur_max_queue_depth * 2 / 3 + 1; |
| 2027 | if (skdev->queue_low_water_mark < 1) |
| 2028 | skdev->queue_low_water_mark = 1; |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2029 | dev_info(&skdev->pdev->dev, |
| 2030 | "Queue depth limit=%d dev=%d lowat=%d\n", |
| 2031 | skdev->cur_max_queue_depth, |
| 2032 | skdev->dev_max_queue_depth, |
| 2033 | skdev->queue_low_water_mark); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2034 | |
| 2035 | skd_refresh_device_data(skdev); |
| 2036 | break; |
| 2037 | |
| 2038 | case FIT_SR_DRIVE_BUSY: |
| 2039 | skdev->state = SKD_DRVR_STATE_BUSY; |
| 2040 | skdev->timer_countdown = SKD_BUSY_TIMO; |
| 2041 | skd_quiesce_dev(skdev); |
| 2042 | break; |
| 2043 | case FIT_SR_DRIVE_BUSY_SANITIZE: |
| 2044 | /* set timer for 3 seconds, we'll abort any unfinished |
| 2045 | * commands after that expires |
| 2046 | */ |
| 2047 | skdev->state = SKD_DRVR_STATE_BUSY_SANITIZE; |
| 2048 | skdev->timer_countdown = SKD_TIMER_SECONDS(3); |
Jens Axboe | 6a5ec65 | 2013-11-01 10:38:45 -0600 | [diff] [blame] | 2049 | blk_start_queue(skdev->queue); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2050 | break; |
| 2051 | case FIT_SR_DRIVE_BUSY_ERASE: |
| 2052 | skdev->state = SKD_DRVR_STATE_BUSY_ERASE; |
| 2053 | skdev->timer_countdown = SKD_BUSY_TIMO; |
| 2054 | break; |
| 2055 | case FIT_SR_DRIVE_OFFLINE: |
| 2056 | skdev->state = SKD_DRVR_STATE_IDLE; |
| 2057 | break; |
| 2058 | case FIT_SR_DRIVE_SOFT_RESET: |
| 2059 | switch (skdev->state) { |
| 2060 | case SKD_DRVR_STATE_STARTING: |
| 2061 | case SKD_DRVR_STATE_RESTARTING: |
| 2062 | /* Expected by a caller of skd_soft_reset() */ |
| 2063 | break; |
| 2064 | default: |
| 2065 | skdev->state = SKD_DRVR_STATE_RESTARTING; |
| 2066 | break; |
| 2067 | } |
| 2068 | break; |
| 2069 | case FIT_SR_DRIVE_FW_BOOTING: |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2070 | dev_dbg(&skdev->pdev->dev, "ISR FIT_SR_DRIVE_FW_BOOTING\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2071 | skdev->state = SKD_DRVR_STATE_WAIT_BOOT; |
| 2072 | skdev->timer_countdown = SKD_WAIT_BOOT_TIMO; |
| 2073 | break; |
| 2074 | |
| 2075 | case FIT_SR_DRIVE_DEGRADED: |
| 2076 | case FIT_SR_PCIE_LINK_DOWN: |
| 2077 | case FIT_SR_DRIVE_NEED_FW_DOWNLOAD: |
| 2078 | break; |
| 2079 | |
| 2080 | case FIT_SR_DRIVE_FAULT: |
| 2081 | skd_drive_fault(skdev); |
Bart Van Assche | 79ce12a | 2017-08-17 13:13:14 -0700 | [diff] [blame] | 2082 | skd_recover_requests(skdev); |
Jens Axboe | 6a5ec65 | 2013-11-01 10:38:45 -0600 | [diff] [blame] | 2083 | blk_start_queue(skdev->queue); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2084 | break; |
| 2085 | |
| 2086 | /* PCIe bus returned all Fs? */ |
| 2087 | case 0xFF: |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2088 | dev_info(&skdev->pdev->dev, "state=0x%x sense=0x%x\n", state, |
| 2089 | sense); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2090 | skd_drive_disappeared(skdev); |
Bart Van Assche | 79ce12a | 2017-08-17 13:13:14 -0700 | [diff] [blame] | 2091 | skd_recover_requests(skdev); |
Jens Axboe | 6a5ec65 | 2013-11-01 10:38:45 -0600 | [diff] [blame] | 2092 | blk_start_queue(skdev->queue); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2093 | break; |
| 2094 | default: |
| 2095 | /* |
| 2096 | * Uknown FW State. Wait for a state we recognize. |
| 2097 | */ |
| 2098 | break; |
| 2099 | } |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2100 | dev_err(&skdev->pdev->dev, "Driver state %s(%d)=>%s(%d)\n", |
| 2101 | skd_skdev_state_to_str(prev_driver_state), prev_driver_state, |
| 2102 | skd_skdev_state_to_str(skdev->state), skdev->state); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2103 | } |
| 2104 | |
Bart Van Assche | 79ce12a | 2017-08-17 13:13:14 -0700 | [diff] [blame] | 2105 | static void skd_recover_requests(struct skd_device *skdev) |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2106 | { |
| 2107 | int i; |
| 2108 | |
| 2109 | for (i = 0; i < skdev->num_req_context; i++) { |
| 2110 | struct skd_request_context *skreq = &skdev->skreq_table[i]; |
| 2111 | |
| 2112 | if (skreq->state == SKD_REQ_STATE_BUSY) { |
| 2113 | skd_log_skreq(skdev, skreq, "recover"); |
| 2114 | |
| 2115 | SKD_ASSERT((skreq->id & SKD_ID_INCR) != 0); |
Jens Axboe | fcd37eb | 2013-11-01 10:14:56 -0600 | [diff] [blame] | 2116 | SKD_ASSERT(skreq->req != NULL); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2117 | |
| 2118 | /* Release DMA resources for the request. */ |
| 2119 | if (skreq->n_sg > 0) |
| 2120 | skd_postop_sg_list(skdev, skreq); |
| 2121 | |
Bart Van Assche | 79ce12a | 2017-08-17 13:13:14 -0700 | [diff] [blame] | 2122 | skd_end_request(skdev, skreq, BLK_STS_IOERR); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2123 | |
Jens Axboe | fcd37eb | 2013-11-01 10:14:56 -0600 | [diff] [blame] | 2124 | skreq->req = NULL; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2125 | |
| 2126 | skreq->state = SKD_REQ_STATE_IDLE; |
| 2127 | skreq->id += SKD_ID_INCR; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2128 | } |
| 2129 | if (i > 0) |
| 2130 | skreq[-1].next = skreq; |
| 2131 | skreq->next = NULL; |
| 2132 | } |
| 2133 | skdev->skreq_free_list = skdev->skreq_table; |
| 2134 | |
| 2135 | for (i = 0; i < skdev->num_fitmsg_context; i++) { |
| 2136 | struct skd_fitmsg_context *skmsg = &skdev->skmsg_table[i]; |
| 2137 | |
| 2138 | if (skmsg->state == SKD_MSG_STATE_BUSY) { |
| 2139 | skd_log_skmsg(skdev, skmsg, "salvaged"); |
| 2140 | SKD_ASSERT((skmsg->id & SKD_ID_INCR) != 0); |
| 2141 | skmsg->state = SKD_MSG_STATE_IDLE; |
| 2142 | skmsg->id += SKD_ID_INCR; |
| 2143 | } |
| 2144 | if (i > 0) |
| 2145 | skmsg[-1].next = skmsg; |
| 2146 | skmsg->next = NULL; |
| 2147 | } |
| 2148 | skdev->skmsg_free_list = skdev->skmsg_table; |
| 2149 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2150 | for (i = 0; i < SKD_N_TIMEOUT_SLOT; i++) |
| 2151 | skdev->timeout_slot[i] = 0; |
| 2152 | |
| 2153 | skdev->in_flight = 0; |
| 2154 | } |
| 2155 | |
| 2156 | static void skd_isr_msg_from_dev(struct skd_device *skdev) |
| 2157 | { |
| 2158 | u32 mfd; |
| 2159 | u32 mtd; |
| 2160 | u32 data; |
| 2161 | |
| 2162 | mfd = SKD_READL(skdev, FIT_MSG_FROM_DEVICE); |
| 2163 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2164 | dev_dbg(&skdev->pdev->dev, "mfd=0x%x last_mtd=0x%x\n", mfd, |
| 2165 | skdev->last_mtd); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2166 | |
| 2167 | /* ignore any mtd that is an ack for something we didn't send */ |
| 2168 | if (FIT_MXD_TYPE(mfd) != FIT_MXD_TYPE(skdev->last_mtd)) |
| 2169 | return; |
| 2170 | |
| 2171 | switch (FIT_MXD_TYPE(mfd)) { |
| 2172 | case FIT_MTD_FITFW_INIT: |
| 2173 | skdev->proto_ver = FIT_PROTOCOL_MAJOR_VER(mfd); |
| 2174 | |
| 2175 | if (skdev->proto_ver != FIT_PROTOCOL_VERSION_1) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2176 | dev_err(&skdev->pdev->dev, "protocol mismatch\n"); |
| 2177 | dev_err(&skdev->pdev->dev, " got=%d support=%d\n", |
| 2178 | skdev->proto_ver, FIT_PROTOCOL_VERSION_1); |
| 2179 | dev_err(&skdev->pdev->dev, " please upgrade driver\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2180 | skdev->state = SKD_DRVR_STATE_PROTOCOL_MISMATCH; |
| 2181 | skd_soft_reset(skdev); |
| 2182 | break; |
| 2183 | } |
| 2184 | mtd = FIT_MXD_CONS(FIT_MTD_GET_CMDQ_DEPTH, 0, 0); |
| 2185 | SKD_WRITEL(skdev, mtd, FIT_MSG_TO_DEVICE); |
| 2186 | skdev->last_mtd = mtd; |
| 2187 | break; |
| 2188 | |
| 2189 | case FIT_MTD_GET_CMDQ_DEPTH: |
| 2190 | skdev->dev_max_queue_depth = FIT_MXD_DATA(mfd); |
| 2191 | mtd = FIT_MXD_CONS(FIT_MTD_SET_COMPQ_DEPTH, 0, |
| 2192 | SKD_N_COMPLETION_ENTRY); |
| 2193 | SKD_WRITEL(skdev, mtd, FIT_MSG_TO_DEVICE); |
| 2194 | skdev->last_mtd = mtd; |
| 2195 | break; |
| 2196 | |
| 2197 | case FIT_MTD_SET_COMPQ_DEPTH: |
| 2198 | SKD_WRITEQ(skdev, skdev->cq_dma_address, FIT_MSG_TO_DEVICE_ARG); |
| 2199 | mtd = FIT_MXD_CONS(FIT_MTD_SET_COMPQ_ADDR, 0, 0); |
| 2200 | SKD_WRITEL(skdev, mtd, FIT_MSG_TO_DEVICE); |
| 2201 | skdev->last_mtd = mtd; |
| 2202 | break; |
| 2203 | |
| 2204 | case FIT_MTD_SET_COMPQ_ADDR: |
| 2205 | skd_reset_skcomp(skdev); |
| 2206 | mtd = FIT_MXD_CONS(FIT_MTD_CMD_LOG_HOST_ID, 0, skdev->devno); |
| 2207 | SKD_WRITEL(skdev, mtd, FIT_MSG_TO_DEVICE); |
| 2208 | skdev->last_mtd = mtd; |
| 2209 | break; |
| 2210 | |
| 2211 | case FIT_MTD_CMD_LOG_HOST_ID: |
| 2212 | skdev->connect_time_stamp = get_seconds(); |
| 2213 | data = skdev->connect_time_stamp & 0xFFFF; |
| 2214 | mtd = FIT_MXD_CONS(FIT_MTD_CMD_LOG_TIME_STAMP_LO, 0, data); |
| 2215 | SKD_WRITEL(skdev, mtd, FIT_MSG_TO_DEVICE); |
| 2216 | skdev->last_mtd = mtd; |
| 2217 | break; |
| 2218 | |
| 2219 | case FIT_MTD_CMD_LOG_TIME_STAMP_LO: |
| 2220 | skdev->drive_jiffies = FIT_MXD_DATA(mfd); |
| 2221 | data = (skdev->connect_time_stamp >> 16) & 0xFFFF; |
| 2222 | mtd = FIT_MXD_CONS(FIT_MTD_CMD_LOG_TIME_STAMP_HI, 0, data); |
| 2223 | SKD_WRITEL(skdev, mtd, FIT_MSG_TO_DEVICE); |
| 2224 | skdev->last_mtd = mtd; |
| 2225 | break; |
| 2226 | |
| 2227 | case FIT_MTD_CMD_LOG_TIME_STAMP_HI: |
| 2228 | skdev->drive_jiffies |= (FIT_MXD_DATA(mfd) << 16); |
| 2229 | mtd = FIT_MXD_CONS(FIT_MTD_ARM_QUEUE, 0, 0); |
| 2230 | SKD_WRITEL(skdev, mtd, FIT_MSG_TO_DEVICE); |
| 2231 | skdev->last_mtd = mtd; |
| 2232 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2233 | dev_err(&skdev->pdev->dev, "Time sync driver=0x%x device=0x%x\n", |
| 2234 | skdev->connect_time_stamp, skdev->drive_jiffies); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2235 | break; |
| 2236 | |
| 2237 | case FIT_MTD_ARM_QUEUE: |
| 2238 | skdev->last_mtd = 0; |
| 2239 | /* |
| 2240 | * State should be, or soon will be, FIT_SR_DRIVE_ONLINE. |
| 2241 | */ |
| 2242 | break; |
| 2243 | |
| 2244 | default: |
| 2245 | break; |
| 2246 | } |
| 2247 | } |
| 2248 | |
| 2249 | static void skd_disable_interrupts(struct skd_device *skdev) |
| 2250 | { |
| 2251 | u32 sense; |
| 2252 | |
| 2253 | sense = SKD_READL(skdev, FIT_CONTROL); |
| 2254 | sense &= ~FIT_CR_ENABLE_INTERRUPTS; |
| 2255 | SKD_WRITEL(skdev, sense, FIT_CONTROL); |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2256 | dev_dbg(&skdev->pdev->dev, "sense 0x%x\n", sense); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2257 | |
| 2258 | /* Note that the 1s is written. A 1-bit means |
| 2259 | * disable, a 0 means enable. |
| 2260 | */ |
| 2261 | SKD_WRITEL(skdev, ~0, FIT_INT_MASK_HOST); |
| 2262 | } |
| 2263 | |
| 2264 | static void skd_enable_interrupts(struct skd_device *skdev) |
| 2265 | { |
| 2266 | u32 val; |
| 2267 | |
| 2268 | /* unmask interrupts first */ |
| 2269 | val = FIT_ISH_FW_STATE_CHANGE + |
| 2270 | FIT_ISH_COMPLETION_POSTED + FIT_ISH_MSG_FROM_DEV; |
| 2271 | |
| 2272 | /* Note that the compliment of mask is written. A 1-bit means |
| 2273 | * disable, a 0 means enable. */ |
| 2274 | SKD_WRITEL(skdev, ~val, FIT_INT_MASK_HOST); |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2275 | dev_dbg(&skdev->pdev->dev, "interrupt mask=0x%x\n", ~val); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2276 | |
| 2277 | val = SKD_READL(skdev, FIT_CONTROL); |
| 2278 | val |= FIT_CR_ENABLE_INTERRUPTS; |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2279 | dev_dbg(&skdev->pdev->dev, "control=0x%x\n", val); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2280 | SKD_WRITEL(skdev, val, FIT_CONTROL); |
| 2281 | } |
| 2282 | |
| 2283 | /* |
| 2284 | ***************************************************************************** |
| 2285 | * START, STOP, RESTART, QUIESCE, UNQUIESCE |
| 2286 | ***************************************************************************** |
| 2287 | */ |
| 2288 | |
| 2289 | static void skd_soft_reset(struct skd_device *skdev) |
| 2290 | { |
| 2291 | u32 val; |
| 2292 | |
| 2293 | val = SKD_READL(skdev, FIT_CONTROL); |
| 2294 | val |= (FIT_CR_SOFT_RESET); |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2295 | dev_dbg(&skdev->pdev->dev, "control=0x%x\n", val); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2296 | SKD_WRITEL(skdev, val, FIT_CONTROL); |
| 2297 | } |
| 2298 | |
| 2299 | static void skd_start_device(struct skd_device *skdev) |
| 2300 | { |
| 2301 | unsigned long flags; |
| 2302 | u32 sense; |
| 2303 | u32 state; |
| 2304 | |
| 2305 | spin_lock_irqsave(&skdev->lock, flags); |
| 2306 | |
| 2307 | /* ack all ghost interrupts */ |
| 2308 | SKD_WRITEL(skdev, FIT_INT_DEF_MASK, FIT_INT_STATUS_HOST); |
| 2309 | |
| 2310 | sense = SKD_READL(skdev, FIT_STATUS); |
| 2311 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2312 | dev_dbg(&skdev->pdev->dev, "initial status=0x%x\n", sense); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2313 | |
| 2314 | state = sense & FIT_SR_DRIVE_STATE_MASK; |
| 2315 | skdev->drive_state = state; |
| 2316 | skdev->last_mtd = 0; |
| 2317 | |
| 2318 | skdev->state = SKD_DRVR_STATE_STARTING; |
| 2319 | skdev->timer_countdown = SKD_STARTING_TIMO; |
| 2320 | |
| 2321 | skd_enable_interrupts(skdev); |
| 2322 | |
| 2323 | switch (skdev->drive_state) { |
| 2324 | case FIT_SR_DRIVE_OFFLINE: |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2325 | dev_err(&skdev->pdev->dev, "Drive offline...\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2326 | break; |
| 2327 | |
| 2328 | case FIT_SR_DRIVE_FW_BOOTING: |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2329 | dev_dbg(&skdev->pdev->dev, "FIT_SR_DRIVE_FW_BOOTING\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2330 | skdev->state = SKD_DRVR_STATE_WAIT_BOOT; |
| 2331 | skdev->timer_countdown = SKD_WAIT_BOOT_TIMO; |
| 2332 | break; |
| 2333 | |
| 2334 | case FIT_SR_DRIVE_BUSY_SANITIZE: |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2335 | dev_info(&skdev->pdev->dev, "Start: BUSY_SANITIZE\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2336 | skdev->state = SKD_DRVR_STATE_BUSY_SANITIZE; |
| 2337 | skdev->timer_countdown = SKD_STARTED_BUSY_TIMO; |
| 2338 | break; |
| 2339 | |
| 2340 | case FIT_SR_DRIVE_BUSY_ERASE: |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2341 | dev_info(&skdev->pdev->dev, "Start: BUSY_ERASE\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2342 | skdev->state = SKD_DRVR_STATE_BUSY_ERASE; |
| 2343 | skdev->timer_countdown = SKD_STARTED_BUSY_TIMO; |
| 2344 | break; |
| 2345 | |
| 2346 | case FIT_SR_DRIVE_INIT: |
| 2347 | case FIT_SR_DRIVE_ONLINE: |
| 2348 | skd_soft_reset(skdev); |
| 2349 | break; |
| 2350 | |
| 2351 | case FIT_SR_DRIVE_BUSY: |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2352 | dev_err(&skdev->pdev->dev, "Drive Busy...\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2353 | skdev->state = SKD_DRVR_STATE_BUSY; |
| 2354 | skdev->timer_countdown = SKD_STARTED_BUSY_TIMO; |
| 2355 | break; |
| 2356 | |
| 2357 | case FIT_SR_DRIVE_SOFT_RESET: |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2358 | dev_err(&skdev->pdev->dev, "drive soft reset in prog\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2359 | break; |
| 2360 | |
| 2361 | case FIT_SR_DRIVE_FAULT: |
| 2362 | /* Fault state is bad...soft reset won't do it... |
| 2363 | * Hard reset, maybe, but does it work on device? |
| 2364 | * For now, just fault so the system doesn't hang. |
| 2365 | */ |
| 2366 | skd_drive_fault(skdev); |
| 2367 | /*start the queue so we can respond with error to requests */ |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2368 | dev_dbg(&skdev->pdev->dev, "starting queue\n"); |
Jens Axboe | 6a5ec65 | 2013-11-01 10:38:45 -0600 | [diff] [blame] | 2369 | blk_start_queue(skdev->queue); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2370 | skdev->gendisk_on = -1; |
| 2371 | wake_up_interruptible(&skdev->waitq); |
| 2372 | break; |
| 2373 | |
| 2374 | case 0xFF: |
| 2375 | /* Most likely the device isn't there or isn't responding |
| 2376 | * to the BAR1 addresses. */ |
| 2377 | skd_drive_disappeared(skdev); |
| 2378 | /*start the queue so we can respond with error to requests */ |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2379 | dev_dbg(&skdev->pdev->dev, |
| 2380 | "starting queue to error-out reqs\n"); |
Jens Axboe | 6a5ec65 | 2013-11-01 10:38:45 -0600 | [diff] [blame] | 2381 | blk_start_queue(skdev->queue); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2382 | skdev->gendisk_on = -1; |
| 2383 | wake_up_interruptible(&skdev->waitq); |
| 2384 | break; |
| 2385 | |
| 2386 | default: |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2387 | dev_err(&skdev->pdev->dev, "Start: unknown state %x\n", |
| 2388 | skdev->drive_state); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2389 | break; |
| 2390 | } |
| 2391 | |
| 2392 | state = SKD_READL(skdev, FIT_CONTROL); |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2393 | dev_dbg(&skdev->pdev->dev, "FIT Control Status=0x%x\n", state); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2394 | |
| 2395 | state = SKD_READL(skdev, FIT_INT_STATUS_HOST); |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2396 | dev_dbg(&skdev->pdev->dev, "Intr Status=0x%x\n", state); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2397 | |
| 2398 | state = SKD_READL(skdev, FIT_INT_MASK_HOST); |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2399 | dev_dbg(&skdev->pdev->dev, "Intr Mask=0x%x\n", state); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2400 | |
| 2401 | state = SKD_READL(skdev, FIT_MSG_FROM_DEVICE); |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2402 | dev_dbg(&skdev->pdev->dev, "Msg from Dev=0x%x\n", state); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2403 | |
| 2404 | state = SKD_READL(skdev, FIT_HW_VERSION); |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2405 | dev_dbg(&skdev->pdev->dev, "HW version=0x%x\n", state); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2406 | |
| 2407 | spin_unlock_irqrestore(&skdev->lock, flags); |
| 2408 | } |
| 2409 | |
| 2410 | static void skd_stop_device(struct skd_device *skdev) |
| 2411 | { |
| 2412 | unsigned long flags; |
| 2413 | struct skd_special_context *skspcl = &skdev->internal_skspcl; |
| 2414 | u32 dev_state; |
| 2415 | int i; |
| 2416 | |
| 2417 | spin_lock_irqsave(&skdev->lock, flags); |
| 2418 | |
| 2419 | if (skdev->state != SKD_DRVR_STATE_ONLINE) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2420 | dev_err(&skdev->pdev->dev, "%s not online no sync\n", __func__); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2421 | goto stop_out; |
| 2422 | } |
| 2423 | |
| 2424 | if (skspcl->req.state != SKD_REQ_STATE_IDLE) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2425 | dev_err(&skdev->pdev->dev, "%s no special\n", __func__); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2426 | goto stop_out; |
| 2427 | } |
| 2428 | |
| 2429 | skdev->state = SKD_DRVR_STATE_SYNCING; |
| 2430 | skdev->sync_done = 0; |
| 2431 | |
| 2432 | skd_send_internal_skspcl(skdev, skspcl, SYNCHRONIZE_CACHE); |
| 2433 | |
| 2434 | spin_unlock_irqrestore(&skdev->lock, flags); |
| 2435 | |
| 2436 | wait_event_interruptible_timeout(skdev->waitq, |
| 2437 | (skdev->sync_done), (10 * HZ)); |
| 2438 | |
| 2439 | spin_lock_irqsave(&skdev->lock, flags); |
| 2440 | |
| 2441 | switch (skdev->sync_done) { |
| 2442 | case 0: |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2443 | dev_err(&skdev->pdev->dev, "%s no sync\n", __func__); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2444 | break; |
| 2445 | case 1: |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2446 | dev_err(&skdev->pdev->dev, "%s sync done\n", __func__); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2447 | break; |
| 2448 | default: |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2449 | dev_err(&skdev->pdev->dev, "%s sync error\n", __func__); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2450 | } |
| 2451 | |
| 2452 | stop_out: |
| 2453 | skdev->state = SKD_DRVR_STATE_STOPPING; |
| 2454 | spin_unlock_irqrestore(&skdev->lock, flags); |
| 2455 | |
| 2456 | skd_kill_timer(skdev); |
| 2457 | |
| 2458 | spin_lock_irqsave(&skdev->lock, flags); |
| 2459 | skd_disable_interrupts(skdev); |
| 2460 | |
| 2461 | /* ensure all ints on device are cleared */ |
| 2462 | /* soft reset the device to unload with a clean slate */ |
| 2463 | SKD_WRITEL(skdev, FIT_INT_DEF_MASK, FIT_INT_STATUS_HOST); |
| 2464 | SKD_WRITEL(skdev, FIT_CR_SOFT_RESET, FIT_CONTROL); |
| 2465 | |
| 2466 | spin_unlock_irqrestore(&skdev->lock, flags); |
| 2467 | |
| 2468 | /* poll every 100ms, 1 second timeout */ |
| 2469 | for (i = 0; i < 10; i++) { |
| 2470 | dev_state = |
| 2471 | SKD_READL(skdev, FIT_STATUS) & FIT_SR_DRIVE_STATE_MASK; |
| 2472 | if (dev_state == FIT_SR_DRIVE_INIT) |
| 2473 | break; |
| 2474 | set_current_state(TASK_INTERRUPTIBLE); |
| 2475 | schedule_timeout(msecs_to_jiffies(100)); |
| 2476 | } |
| 2477 | |
| 2478 | if (dev_state != FIT_SR_DRIVE_INIT) |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2479 | dev_err(&skdev->pdev->dev, "%s state error 0x%02x\n", __func__, |
| 2480 | dev_state); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2481 | } |
| 2482 | |
| 2483 | /* assume spinlock is held */ |
| 2484 | static void skd_restart_device(struct skd_device *skdev) |
| 2485 | { |
| 2486 | u32 state; |
| 2487 | |
| 2488 | /* ack all ghost interrupts */ |
| 2489 | SKD_WRITEL(skdev, FIT_INT_DEF_MASK, FIT_INT_STATUS_HOST); |
| 2490 | |
| 2491 | state = SKD_READL(skdev, FIT_STATUS); |
| 2492 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2493 | dev_dbg(&skdev->pdev->dev, "drive status=0x%x\n", state); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2494 | |
| 2495 | state &= FIT_SR_DRIVE_STATE_MASK; |
| 2496 | skdev->drive_state = state; |
| 2497 | skdev->last_mtd = 0; |
| 2498 | |
| 2499 | skdev->state = SKD_DRVR_STATE_RESTARTING; |
| 2500 | skdev->timer_countdown = SKD_RESTARTING_TIMO; |
| 2501 | |
| 2502 | skd_soft_reset(skdev); |
| 2503 | } |
| 2504 | |
| 2505 | /* assume spinlock is held */ |
| 2506 | static int skd_quiesce_dev(struct skd_device *skdev) |
| 2507 | { |
| 2508 | int rc = 0; |
| 2509 | |
| 2510 | switch (skdev->state) { |
| 2511 | case SKD_DRVR_STATE_BUSY: |
| 2512 | case SKD_DRVR_STATE_BUSY_IMMINENT: |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2513 | dev_dbg(&skdev->pdev->dev, "stopping queue\n"); |
Jens Axboe | 6a5ec65 | 2013-11-01 10:38:45 -0600 | [diff] [blame] | 2514 | blk_stop_queue(skdev->queue); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2515 | break; |
| 2516 | case SKD_DRVR_STATE_ONLINE: |
| 2517 | case SKD_DRVR_STATE_STOPPING: |
| 2518 | case SKD_DRVR_STATE_SYNCING: |
| 2519 | case SKD_DRVR_STATE_PAUSING: |
| 2520 | case SKD_DRVR_STATE_PAUSED: |
| 2521 | case SKD_DRVR_STATE_STARTING: |
| 2522 | case SKD_DRVR_STATE_RESTARTING: |
| 2523 | case SKD_DRVR_STATE_RESUMING: |
| 2524 | default: |
| 2525 | rc = -EINVAL; |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2526 | dev_dbg(&skdev->pdev->dev, "state [%d] not implemented\n", |
| 2527 | skdev->state); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2528 | } |
| 2529 | return rc; |
| 2530 | } |
| 2531 | |
| 2532 | /* assume spinlock is held */ |
| 2533 | static int skd_unquiesce_dev(struct skd_device *skdev) |
| 2534 | { |
| 2535 | int prev_driver_state = skdev->state; |
| 2536 | |
| 2537 | skd_log_skdev(skdev, "unquiesce"); |
| 2538 | if (skdev->state == SKD_DRVR_STATE_ONLINE) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2539 | dev_dbg(&skdev->pdev->dev, "**** device already ONLINE\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2540 | return 0; |
| 2541 | } |
| 2542 | if (skdev->drive_state != FIT_SR_DRIVE_ONLINE) { |
| 2543 | /* |
| 2544 | * If there has been an state change to other than |
| 2545 | * ONLINE, we will rely on controller state change |
| 2546 | * to come back online and restart the queue. |
| 2547 | * The BUSY state means that driver is ready to |
| 2548 | * continue normal processing but waiting for controller |
| 2549 | * to become available. |
| 2550 | */ |
| 2551 | skdev->state = SKD_DRVR_STATE_BUSY; |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2552 | dev_dbg(&skdev->pdev->dev, "drive BUSY state\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2553 | return 0; |
| 2554 | } |
| 2555 | |
| 2556 | /* |
| 2557 | * Drive has just come online, driver is either in startup, |
| 2558 | * paused performing a task, or bust waiting for hardware. |
| 2559 | */ |
| 2560 | switch (skdev->state) { |
| 2561 | case SKD_DRVR_STATE_PAUSED: |
| 2562 | case SKD_DRVR_STATE_BUSY: |
| 2563 | case SKD_DRVR_STATE_BUSY_IMMINENT: |
| 2564 | case SKD_DRVR_STATE_BUSY_ERASE: |
| 2565 | case SKD_DRVR_STATE_STARTING: |
| 2566 | case SKD_DRVR_STATE_RESTARTING: |
| 2567 | case SKD_DRVR_STATE_FAULT: |
| 2568 | case SKD_DRVR_STATE_IDLE: |
| 2569 | case SKD_DRVR_STATE_LOAD: |
| 2570 | skdev->state = SKD_DRVR_STATE_ONLINE; |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2571 | dev_err(&skdev->pdev->dev, "Driver state %s(%d)=>%s(%d)\n", |
| 2572 | skd_skdev_state_to_str(prev_driver_state), |
| 2573 | prev_driver_state, skd_skdev_state_to_str(skdev->state), |
| 2574 | skdev->state); |
| 2575 | dev_dbg(&skdev->pdev->dev, |
| 2576 | "**** device ONLINE...starting block queue\n"); |
| 2577 | dev_dbg(&skdev->pdev->dev, "starting queue\n"); |
| 2578 | dev_info(&skdev->pdev->dev, "STEC s1120 ONLINE\n"); |
Jens Axboe | 6a5ec65 | 2013-11-01 10:38:45 -0600 | [diff] [blame] | 2579 | blk_start_queue(skdev->queue); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2580 | skdev->gendisk_on = 1; |
| 2581 | wake_up_interruptible(&skdev->waitq); |
| 2582 | break; |
| 2583 | |
| 2584 | case SKD_DRVR_STATE_DISAPPEARED: |
| 2585 | default: |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2586 | dev_dbg(&skdev->pdev->dev, |
| 2587 | "**** driver state %d, not implemented\n", |
| 2588 | skdev->state); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2589 | return -EBUSY; |
| 2590 | } |
| 2591 | return 0; |
| 2592 | } |
| 2593 | |
| 2594 | /* |
| 2595 | ***************************************************************************** |
| 2596 | * PCIe MSI/MSI-X INTERRUPT HANDLERS |
| 2597 | ***************************************************************************** |
| 2598 | */ |
| 2599 | |
| 2600 | static irqreturn_t skd_reserved_isr(int irq, void *skd_host_data) |
| 2601 | { |
| 2602 | struct skd_device *skdev = skd_host_data; |
| 2603 | unsigned long flags; |
| 2604 | |
| 2605 | spin_lock_irqsave(&skdev->lock, flags); |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2606 | dev_dbg(&skdev->pdev->dev, "MSIX = 0x%x\n", |
| 2607 | SKD_READL(skdev, FIT_INT_STATUS_HOST)); |
| 2608 | dev_err(&skdev->pdev->dev, "MSIX reserved irq %d = 0x%x\n", irq, |
| 2609 | SKD_READL(skdev, FIT_INT_STATUS_HOST)); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2610 | SKD_WRITEL(skdev, FIT_INT_RESERVED_MASK, FIT_INT_STATUS_HOST); |
| 2611 | spin_unlock_irqrestore(&skdev->lock, flags); |
| 2612 | return IRQ_HANDLED; |
| 2613 | } |
| 2614 | |
| 2615 | static irqreturn_t skd_statec_isr(int irq, void *skd_host_data) |
| 2616 | { |
| 2617 | struct skd_device *skdev = skd_host_data; |
| 2618 | unsigned long flags; |
| 2619 | |
| 2620 | spin_lock_irqsave(&skdev->lock, flags); |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2621 | dev_dbg(&skdev->pdev->dev, "MSIX = 0x%x\n", |
| 2622 | SKD_READL(skdev, FIT_INT_STATUS_HOST)); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2623 | SKD_WRITEL(skdev, FIT_ISH_FW_STATE_CHANGE, FIT_INT_STATUS_HOST); |
| 2624 | skd_isr_fwstate(skdev); |
| 2625 | spin_unlock_irqrestore(&skdev->lock, flags); |
| 2626 | return IRQ_HANDLED; |
| 2627 | } |
| 2628 | |
| 2629 | static irqreturn_t skd_comp_q(int irq, void *skd_host_data) |
| 2630 | { |
| 2631 | struct skd_device *skdev = skd_host_data; |
| 2632 | unsigned long flags; |
| 2633 | int flush_enqueued = 0; |
| 2634 | int deferred; |
| 2635 | |
| 2636 | spin_lock_irqsave(&skdev->lock, flags); |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2637 | dev_dbg(&skdev->pdev->dev, "MSIX = 0x%x\n", |
| 2638 | SKD_READL(skdev, FIT_INT_STATUS_HOST)); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2639 | SKD_WRITEL(skdev, FIT_ISH_COMPLETION_POSTED, FIT_INT_STATUS_HOST); |
| 2640 | deferred = skd_isr_completion_posted(skdev, skd_isr_comp_limit, |
| 2641 | &flush_enqueued); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2642 | if (flush_enqueued) |
Bart Van Assche | 8fe7006 | 2017-08-17 13:13:22 -0700 | [diff] [blame] | 2643 | blk_run_queue_async(skdev->queue); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2644 | |
| 2645 | if (deferred) |
| 2646 | schedule_work(&skdev->completion_worker); |
| 2647 | else if (!flush_enqueued) |
Bart Van Assche | 8fe7006 | 2017-08-17 13:13:22 -0700 | [diff] [blame] | 2648 | blk_run_queue_async(skdev->queue); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2649 | |
| 2650 | spin_unlock_irqrestore(&skdev->lock, flags); |
| 2651 | |
| 2652 | return IRQ_HANDLED; |
| 2653 | } |
| 2654 | |
| 2655 | static irqreturn_t skd_msg_isr(int irq, void *skd_host_data) |
| 2656 | { |
| 2657 | struct skd_device *skdev = skd_host_data; |
| 2658 | unsigned long flags; |
| 2659 | |
| 2660 | spin_lock_irqsave(&skdev->lock, flags); |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2661 | dev_dbg(&skdev->pdev->dev, "MSIX = 0x%x\n", |
| 2662 | SKD_READL(skdev, FIT_INT_STATUS_HOST)); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2663 | SKD_WRITEL(skdev, FIT_ISH_MSG_FROM_DEV, FIT_INT_STATUS_HOST); |
| 2664 | skd_isr_msg_from_dev(skdev); |
| 2665 | spin_unlock_irqrestore(&skdev->lock, flags); |
| 2666 | return IRQ_HANDLED; |
| 2667 | } |
| 2668 | |
| 2669 | static irqreturn_t skd_qfull_isr(int irq, void *skd_host_data) |
| 2670 | { |
| 2671 | struct skd_device *skdev = skd_host_data; |
| 2672 | unsigned long flags; |
| 2673 | |
| 2674 | spin_lock_irqsave(&skdev->lock, flags); |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2675 | dev_dbg(&skdev->pdev->dev, "MSIX = 0x%x\n", |
| 2676 | SKD_READL(skdev, FIT_INT_STATUS_HOST)); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2677 | SKD_WRITEL(skdev, FIT_INT_QUEUE_FULL, FIT_INT_STATUS_HOST); |
| 2678 | spin_unlock_irqrestore(&skdev->lock, flags); |
| 2679 | return IRQ_HANDLED; |
| 2680 | } |
| 2681 | |
| 2682 | /* |
| 2683 | ***************************************************************************** |
| 2684 | * PCIe MSI/MSI-X SETUP |
| 2685 | ***************************************************************************** |
| 2686 | */ |
| 2687 | |
| 2688 | struct skd_msix_entry { |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2689 | char isr_name[30]; |
| 2690 | }; |
| 2691 | |
| 2692 | struct skd_init_msix_entry { |
| 2693 | const char *name; |
| 2694 | irq_handler_t handler; |
| 2695 | }; |
| 2696 | |
| 2697 | #define SKD_MAX_MSIX_COUNT 13 |
| 2698 | #define SKD_MIN_MSIX_COUNT 7 |
| 2699 | #define SKD_BASE_MSIX_IRQ 4 |
| 2700 | |
| 2701 | static struct skd_init_msix_entry msix_entries[SKD_MAX_MSIX_COUNT] = { |
| 2702 | { "(DMA 0)", skd_reserved_isr }, |
| 2703 | { "(DMA 1)", skd_reserved_isr }, |
| 2704 | { "(DMA 2)", skd_reserved_isr }, |
| 2705 | { "(DMA 3)", skd_reserved_isr }, |
| 2706 | { "(State Change)", skd_statec_isr }, |
| 2707 | { "(COMPL_Q)", skd_comp_q }, |
| 2708 | { "(MSG)", skd_msg_isr }, |
| 2709 | { "(Reserved)", skd_reserved_isr }, |
| 2710 | { "(Reserved)", skd_reserved_isr }, |
| 2711 | { "(Queue Full 0)", skd_qfull_isr }, |
| 2712 | { "(Queue Full 1)", skd_qfull_isr }, |
| 2713 | { "(Queue Full 2)", skd_qfull_isr }, |
| 2714 | { "(Queue Full 3)", skd_qfull_isr }, |
| 2715 | }; |
| 2716 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2717 | static int skd_acquire_msix(struct skd_device *skdev) |
| 2718 | { |
Alexander Gordeev | a9df862 | 2014-02-19 09:58:21 +0100 | [diff] [blame] | 2719 | int i, rc; |
Alexander Gordeev | 4681776 | 2014-02-19 09:58:19 +0100 | [diff] [blame] | 2720 | struct pci_dev *pdev = skdev->pdev; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2721 | |
Christoph Hellwig | 180b0ae | 2016-11-07 11:14:07 -0800 | [diff] [blame] | 2722 | rc = pci_alloc_irq_vectors(pdev, SKD_MAX_MSIX_COUNT, SKD_MAX_MSIX_COUNT, |
| 2723 | PCI_IRQ_MSIX); |
| 2724 | if (rc < 0) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2725 | dev_err(&skdev->pdev->dev, "failed to enable MSI-X %d\n", rc); |
Arnd Bergmann | 3bc8492 | 2016-11-09 13:55:34 +0100 | [diff] [blame] | 2726 | goto out; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2727 | } |
Alexander Gordeev | 4681776 | 2014-02-19 09:58:19 +0100 | [diff] [blame] | 2728 | |
Christoph Hellwig | 180b0ae | 2016-11-07 11:14:07 -0800 | [diff] [blame] | 2729 | skdev->msix_entries = kcalloc(SKD_MAX_MSIX_COUNT, |
| 2730 | sizeof(struct skd_msix_entry), GFP_KERNEL); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2731 | if (!skdev->msix_entries) { |
| 2732 | rc = -ENOMEM; |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2733 | dev_err(&skdev->pdev->dev, "msix table allocation error\n"); |
Arnd Bergmann | 3bc8492 | 2016-11-09 13:55:34 +0100 | [diff] [blame] | 2734 | goto out; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2735 | } |
| 2736 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2737 | /* Enable MSI-X vectors for the base queue */ |
Christoph Hellwig | 180b0ae | 2016-11-07 11:14:07 -0800 | [diff] [blame] | 2738 | for (i = 0; i < SKD_MAX_MSIX_COUNT; i++) { |
| 2739 | struct skd_msix_entry *qentry = &skdev->msix_entries[i]; |
| 2740 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2741 | snprintf(qentry->isr_name, sizeof(qentry->isr_name), |
| 2742 | "%s%d-msix %s", DRV_NAME, skdev->devno, |
| 2743 | msix_entries[i].name); |
Christoph Hellwig | 180b0ae | 2016-11-07 11:14:07 -0800 | [diff] [blame] | 2744 | |
| 2745 | rc = devm_request_irq(&skdev->pdev->dev, |
| 2746 | pci_irq_vector(skdev->pdev, i), |
| 2747 | msix_entries[i].handler, 0, |
| 2748 | qentry->isr_name, skdev); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2749 | if (rc) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2750 | dev_err(&skdev->pdev->dev, |
| 2751 | "Unable to register(%d) MSI-X handler %d: %s\n", |
| 2752 | rc, i, qentry->isr_name); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2753 | goto msix_out; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2754 | } |
| 2755 | } |
Christoph Hellwig | 180b0ae | 2016-11-07 11:14:07 -0800 | [diff] [blame] | 2756 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2757 | dev_dbg(&skdev->pdev->dev, "%d msix irq(s) enabled\n", |
| 2758 | SKD_MAX_MSIX_COUNT); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2759 | return 0; |
| 2760 | |
| 2761 | msix_out: |
Christoph Hellwig | 180b0ae | 2016-11-07 11:14:07 -0800 | [diff] [blame] | 2762 | while (--i >= 0) |
| 2763 | devm_free_irq(&pdev->dev, pci_irq_vector(pdev, i), skdev); |
Arnd Bergmann | 3bc8492 | 2016-11-09 13:55:34 +0100 | [diff] [blame] | 2764 | out: |
Christoph Hellwig | 180b0ae | 2016-11-07 11:14:07 -0800 | [diff] [blame] | 2765 | kfree(skdev->msix_entries); |
| 2766 | skdev->msix_entries = NULL; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2767 | return rc; |
| 2768 | } |
| 2769 | |
| 2770 | static int skd_acquire_irq(struct skd_device *skdev) |
| 2771 | { |
Christoph Hellwig | 180b0ae | 2016-11-07 11:14:07 -0800 | [diff] [blame] | 2772 | struct pci_dev *pdev = skdev->pdev; |
| 2773 | unsigned int irq_flag = PCI_IRQ_LEGACY; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2774 | int rc; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2775 | |
Christoph Hellwig | 180b0ae | 2016-11-07 11:14:07 -0800 | [diff] [blame] | 2776 | if (skd_isr_type == SKD_IRQ_MSIX) { |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2777 | rc = skd_acquire_msix(skdev); |
| 2778 | if (!rc) |
Christoph Hellwig | 180b0ae | 2016-11-07 11:14:07 -0800 | [diff] [blame] | 2779 | return 0; |
| 2780 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2781 | dev_err(&skdev->pdev->dev, |
| 2782 | "failed to enable MSI-X, re-trying with MSI %d\n", rc); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2783 | } |
Christoph Hellwig | 180b0ae | 2016-11-07 11:14:07 -0800 | [diff] [blame] | 2784 | |
| 2785 | snprintf(skdev->isr_name, sizeof(skdev->isr_name), "%s%d", DRV_NAME, |
| 2786 | skdev->devno); |
| 2787 | |
| 2788 | if (skd_isr_type != SKD_IRQ_LEGACY) |
| 2789 | irq_flag |= PCI_IRQ_MSI; |
| 2790 | rc = pci_alloc_irq_vectors(pdev, 1, 1, irq_flag); |
| 2791 | if (rc < 0) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2792 | dev_err(&skdev->pdev->dev, |
| 2793 | "failed to allocate the MSI interrupt %d\n", rc); |
Christoph Hellwig | 180b0ae | 2016-11-07 11:14:07 -0800 | [diff] [blame] | 2794 | return rc; |
| 2795 | } |
| 2796 | |
| 2797 | rc = devm_request_irq(&pdev->dev, pdev->irq, skd_isr, |
| 2798 | pdev->msi_enabled ? 0 : IRQF_SHARED, |
| 2799 | skdev->isr_name, skdev); |
| 2800 | if (rc) { |
| 2801 | pci_free_irq_vectors(pdev); |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2802 | dev_err(&skdev->pdev->dev, "failed to allocate interrupt %d\n", |
| 2803 | rc); |
Christoph Hellwig | 180b0ae | 2016-11-07 11:14:07 -0800 | [diff] [blame] | 2804 | return rc; |
| 2805 | } |
| 2806 | |
| 2807 | return 0; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2808 | } |
| 2809 | |
| 2810 | static void skd_release_irq(struct skd_device *skdev) |
| 2811 | { |
Christoph Hellwig | 180b0ae | 2016-11-07 11:14:07 -0800 | [diff] [blame] | 2812 | struct pci_dev *pdev = skdev->pdev; |
| 2813 | |
| 2814 | if (skdev->msix_entries) { |
| 2815 | int i; |
| 2816 | |
| 2817 | for (i = 0; i < SKD_MAX_MSIX_COUNT; i++) { |
| 2818 | devm_free_irq(&pdev->dev, pci_irq_vector(pdev, i), |
| 2819 | skdev); |
| 2820 | } |
| 2821 | |
| 2822 | kfree(skdev->msix_entries); |
| 2823 | skdev->msix_entries = NULL; |
| 2824 | } else { |
| 2825 | devm_free_irq(&pdev->dev, pdev->irq, skdev); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2826 | } |
Christoph Hellwig | 180b0ae | 2016-11-07 11:14:07 -0800 | [diff] [blame] | 2827 | |
| 2828 | pci_free_irq_vectors(pdev); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2829 | } |
| 2830 | |
| 2831 | /* |
| 2832 | ***************************************************************************** |
| 2833 | * CONSTRUCT |
| 2834 | ***************************************************************************** |
| 2835 | */ |
| 2836 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2837 | static int skd_cons_skcomp(struct skd_device *skdev) |
| 2838 | { |
| 2839 | int rc = 0; |
| 2840 | struct fit_completion_entry_v1 *skcomp; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2841 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2842 | dev_dbg(&skdev->pdev->dev, |
Bart Van Assche | 6f7c767 | 2017-08-17 13:13:02 -0700 | [diff] [blame] | 2843 | "comp pci_alloc, total bytes %zd entries %d\n", |
| 2844 | SKD_SKCOMP_SIZE, SKD_N_COMPLETION_ENTRY); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2845 | |
Bart Van Assche | 6f7c767 | 2017-08-17 13:13:02 -0700 | [diff] [blame] | 2846 | skcomp = pci_zalloc_consistent(skdev->pdev, SKD_SKCOMP_SIZE, |
Joe Perches | a5bbf61 | 2014-08-08 14:24:12 -0700 | [diff] [blame] | 2847 | &skdev->cq_dma_address); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2848 | |
| 2849 | if (skcomp == NULL) { |
| 2850 | rc = -ENOMEM; |
| 2851 | goto err_out; |
| 2852 | } |
| 2853 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2854 | skdev->skcomp_table = skcomp; |
| 2855 | skdev->skerr_table = (struct fit_comp_error_info *)((char *)skcomp + |
| 2856 | sizeof(*skcomp) * |
| 2857 | SKD_N_COMPLETION_ENTRY); |
| 2858 | |
| 2859 | err_out: |
| 2860 | return rc; |
| 2861 | } |
| 2862 | |
| 2863 | static int skd_cons_skmsg(struct skd_device *skdev) |
| 2864 | { |
| 2865 | int rc = 0; |
| 2866 | u32 i; |
| 2867 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2868 | dev_dbg(&skdev->pdev->dev, |
Bart Van Assche | 01433d0 | 2017-08-17 13:13:18 -0700 | [diff] [blame] | 2869 | "skmsg_table kcalloc, struct %lu, count %u total %lu\n", |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2870 | sizeof(struct skd_fitmsg_context), skdev->num_fitmsg_context, |
| 2871 | sizeof(struct skd_fitmsg_context) * skdev->num_fitmsg_context); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2872 | |
Bart Van Assche | 01433d0 | 2017-08-17 13:13:18 -0700 | [diff] [blame] | 2873 | skdev->skmsg_table = kcalloc(skdev->num_fitmsg_context, |
| 2874 | sizeof(struct skd_fitmsg_context), |
| 2875 | GFP_KERNEL); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2876 | if (skdev->skmsg_table == NULL) { |
| 2877 | rc = -ENOMEM; |
| 2878 | goto err_out; |
| 2879 | } |
| 2880 | |
| 2881 | for (i = 0; i < skdev->num_fitmsg_context; i++) { |
| 2882 | struct skd_fitmsg_context *skmsg; |
| 2883 | |
| 2884 | skmsg = &skdev->skmsg_table[i]; |
| 2885 | |
| 2886 | skmsg->id = i + SKD_ID_FIT_MSG; |
| 2887 | |
| 2888 | skmsg->state = SKD_MSG_STATE_IDLE; |
| 2889 | skmsg->msg_buf = pci_alloc_consistent(skdev->pdev, |
Bart Van Assche | 6507f43 | 2017-08-17 13:13:06 -0700 | [diff] [blame] | 2890 | SKD_N_FITMSG_BYTES, |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2891 | &skmsg->mb_dma_address); |
| 2892 | |
| 2893 | if (skmsg->msg_buf == NULL) { |
| 2894 | rc = -ENOMEM; |
| 2895 | goto err_out; |
| 2896 | } |
| 2897 | |
Bart Van Assche | 6507f43 | 2017-08-17 13:13:06 -0700 | [diff] [blame] | 2898 | WARN(((uintptr_t)skmsg->msg_buf | skmsg->mb_dma_address) & |
| 2899 | (FIT_QCMD_ALIGN - 1), |
| 2900 | "not aligned: msg_buf %p mb_dma_address %#llx\n", |
| 2901 | skmsg->msg_buf, skmsg->mb_dma_address); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2902 | memset(skmsg->msg_buf, 0, SKD_N_FITMSG_BYTES); |
| 2903 | |
| 2904 | skmsg->next = &skmsg[1]; |
| 2905 | } |
| 2906 | |
| 2907 | /* Free list is in order starting with the 0th entry. */ |
| 2908 | skdev->skmsg_table[i - 1].next = NULL; |
| 2909 | skdev->skmsg_free_list = skdev->skmsg_table; |
| 2910 | |
| 2911 | err_out: |
| 2912 | return rc; |
| 2913 | } |
| 2914 | |
Bartlomiej Zolnierkiewicz | 542d7b0 | 2013-11-05 12:37:08 +0100 | [diff] [blame] | 2915 | static struct fit_sg_descriptor *skd_cons_sg_list(struct skd_device *skdev, |
| 2916 | u32 n_sg, |
| 2917 | dma_addr_t *ret_dma_addr) |
| 2918 | { |
| 2919 | struct fit_sg_descriptor *sg_list; |
| 2920 | u32 nbytes; |
| 2921 | |
| 2922 | nbytes = sizeof(*sg_list) * n_sg; |
| 2923 | |
| 2924 | sg_list = pci_alloc_consistent(skdev->pdev, nbytes, ret_dma_addr); |
| 2925 | |
| 2926 | if (sg_list != NULL) { |
| 2927 | uint64_t dma_address = *ret_dma_addr; |
| 2928 | u32 i; |
| 2929 | |
| 2930 | memset(sg_list, 0, nbytes); |
| 2931 | |
| 2932 | for (i = 0; i < n_sg - 1; i++) { |
| 2933 | uint64_t ndp_off; |
| 2934 | ndp_off = (i + 1) * sizeof(struct fit_sg_descriptor); |
| 2935 | |
| 2936 | sg_list[i].next_desc_ptr = dma_address + ndp_off; |
| 2937 | } |
| 2938 | sg_list[i].next_desc_ptr = 0LL; |
| 2939 | } |
| 2940 | |
| 2941 | return sg_list; |
| 2942 | } |
| 2943 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2944 | static int skd_cons_skreq(struct skd_device *skdev) |
| 2945 | { |
| 2946 | int rc = 0; |
| 2947 | u32 i; |
| 2948 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2949 | dev_dbg(&skdev->pdev->dev, |
Bart Van Assche | 01433d0 | 2017-08-17 13:13:18 -0700 | [diff] [blame] | 2950 | "skreq_table kcalloc, struct %lu, count %u total %lu\n", |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2951 | sizeof(struct skd_request_context), skdev->num_req_context, |
| 2952 | sizeof(struct skd_request_context) * skdev->num_req_context); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2953 | |
Bart Van Assche | 01433d0 | 2017-08-17 13:13:18 -0700 | [diff] [blame] | 2954 | skdev->skreq_table = kcalloc(skdev->num_req_context, |
| 2955 | sizeof(struct skd_request_context), |
| 2956 | GFP_KERNEL); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2957 | if (skdev->skreq_table == NULL) { |
| 2958 | rc = -ENOMEM; |
| 2959 | goto err_out; |
| 2960 | } |
| 2961 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 2962 | dev_dbg(&skdev->pdev->dev, "alloc sg_table sg_per_req %u scatlist %lu total %lu\n", |
| 2963 | skdev->sgs_per_request, sizeof(struct scatterlist), |
| 2964 | skdev->sgs_per_request * sizeof(struct scatterlist)); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2965 | |
| 2966 | for (i = 0; i < skdev->num_req_context; i++) { |
| 2967 | struct skd_request_context *skreq; |
| 2968 | |
| 2969 | skreq = &skdev->skreq_table[i]; |
| 2970 | |
| 2971 | skreq->id = i + SKD_ID_RW_REQUEST; |
| 2972 | skreq->state = SKD_REQ_STATE_IDLE; |
| 2973 | |
Bart Van Assche | 01433d0 | 2017-08-17 13:13:18 -0700 | [diff] [blame] | 2974 | skreq->sg = kcalloc(skdev->sgs_per_request, |
| 2975 | sizeof(struct scatterlist), GFP_KERNEL); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 2976 | if (skreq->sg == NULL) { |
| 2977 | rc = -ENOMEM; |
| 2978 | goto err_out; |
| 2979 | } |
| 2980 | sg_init_table(skreq->sg, skdev->sgs_per_request); |
| 2981 | |
| 2982 | skreq->sksg_list = skd_cons_sg_list(skdev, |
| 2983 | skdev->sgs_per_request, |
| 2984 | &skreq->sksg_dma_address); |
| 2985 | |
| 2986 | if (skreq->sksg_list == NULL) { |
| 2987 | rc = -ENOMEM; |
| 2988 | goto err_out; |
| 2989 | } |
| 2990 | |
| 2991 | skreq->next = &skreq[1]; |
| 2992 | } |
| 2993 | |
| 2994 | /* Free list is in order starting with the 0th entry. */ |
| 2995 | skdev->skreq_table[i - 1].next = NULL; |
| 2996 | skdev->skreq_free_list = skdev->skreq_table; |
| 2997 | |
| 2998 | err_out: |
| 2999 | return rc; |
| 3000 | } |
| 3001 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3002 | static int skd_cons_sksb(struct skd_device *skdev) |
| 3003 | { |
| 3004 | int rc = 0; |
| 3005 | struct skd_special_context *skspcl; |
| 3006 | u32 nbytes; |
| 3007 | |
| 3008 | skspcl = &skdev->internal_skspcl; |
| 3009 | |
| 3010 | skspcl->req.id = 0 + SKD_ID_INTERNAL; |
| 3011 | skspcl->req.state = SKD_REQ_STATE_IDLE; |
| 3012 | |
| 3013 | nbytes = SKD_N_INTERNAL_BYTES; |
| 3014 | |
Joe Perches | a5bbf61 | 2014-08-08 14:24:12 -0700 | [diff] [blame] | 3015 | skspcl->data_buf = pci_zalloc_consistent(skdev->pdev, nbytes, |
| 3016 | &skspcl->db_dma_address); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3017 | if (skspcl->data_buf == NULL) { |
| 3018 | rc = -ENOMEM; |
| 3019 | goto err_out; |
| 3020 | } |
| 3021 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3022 | nbytes = SKD_N_SPECIAL_FITMSG_BYTES; |
Joe Perches | a5bbf61 | 2014-08-08 14:24:12 -0700 | [diff] [blame] | 3023 | skspcl->msg_buf = pci_zalloc_consistent(skdev->pdev, nbytes, |
| 3024 | &skspcl->mb_dma_address); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3025 | if (skspcl->msg_buf == NULL) { |
| 3026 | rc = -ENOMEM; |
| 3027 | goto err_out; |
| 3028 | } |
| 3029 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3030 | skspcl->req.sksg_list = skd_cons_sg_list(skdev, 1, |
| 3031 | &skspcl->req.sksg_dma_address); |
| 3032 | if (skspcl->req.sksg_list == NULL) { |
| 3033 | rc = -ENOMEM; |
| 3034 | goto err_out; |
| 3035 | } |
| 3036 | |
| 3037 | if (!skd_format_internal_skspcl(skdev)) { |
| 3038 | rc = -EINVAL; |
| 3039 | goto err_out; |
| 3040 | } |
| 3041 | |
| 3042 | err_out: |
| 3043 | return rc; |
| 3044 | } |
| 3045 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3046 | static int skd_cons_disk(struct skd_device *skdev) |
| 3047 | { |
| 3048 | int rc = 0; |
| 3049 | struct gendisk *disk; |
| 3050 | struct request_queue *q; |
| 3051 | unsigned long flags; |
| 3052 | |
| 3053 | disk = alloc_disk(SKD_MINORS_PER_DEVICE); |
| 3054 | if (!disk) { |
| 3055 | rc = -ENOMEM; |
| 3056 | goto err_out; |
| 3057 | } |
| 3058 | |
| 3059 | skdev->disk = disk; |
| 3060 | sprintf(disk->disk_name, DRV_NAME "%u", skdev->devno); |
| 3061 | |
| 3062 | disk->major = skdev->major; |
| 3063 | disk->first_minor = skdev->devno * SKD_MINORS_PER_DEVICE; |
| 3064 | disk->fops = &skd_blockdev_ops; |
| 3065 | disk->private_data = skdev; |
| 3066 | |
Jens Axboe | fcd37eb | 2013-11-01 10:14:56 -0600 | [diff] [blame] | 3067 | q = blk_init_queue(skd_request_fn, &skdev->lock); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3068 | if (!q) { |
| 3069 | rc = -ENOMEM; |
| 3070 | goto err_out; |
| 3071 | } |
Christoph Hellwig | 8fc4504 | 2017-06-19 09:26:26 +0200 | [diff] [blame] | 3072 | blk_queue_bounce_limit(q, BLK_BOUNCE_HIGH); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3073 | |
| 3074 | skdev->queue = q; |
| 3075 | disk->queue = q; |
| 3076 | q->queuedata = skdev; |
| 3077 | |
Jens Axboe | 6975f73 | 2016-03-30 10:11:42 -0600 | [diff] [blame] | 3078 | blk_queue_write_cache(q, true, true); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3079 | blk_queue_max_segments(q, skdev->sgs_per_request); |
| 3080 | blk_queue_max_hw_sectors(q, SKD_N_MAX_SECTORS); |
| 3081 | |
Bart Van Assche | a5c5b39 | 2017-08-17 13:12:53 -0700 | [diff] [blame] | 3082 | /* set optimal I/O size to 8KB */ |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3083 | blk_queue_io_opt(q, 8192); |
| 3084 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3085 | queue_flag_set_unlocked(QUEUE_FLAG_NONROT, q); |
Mike Snitzer | b277da0 | 2014-10-04 10:55:32 -0600 | [diff] [blame] | 3086 | queue_flag_clear_unlocked(QUEUE_FLAG_ADD_RANDOM, q); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3087 | |
| 3088 | spin_lock_irqsave(&skdev->lock, flags); |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3089 | dev_dbg(&skdev->pdev->dev, "stopping queue\n"); |
Jens Axboe | 6a5ec65 | 2013-11-01 10:38:45 -0600 | [diff] [blame] | 3090 | blk_stop_queue(skdev->queue); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3091 | spin_unlock_irqrestore(&skdev->lock, flags); |
| 3092 | |
| 3093 | err_out: |
| 3094 | return rc; |
| 3095 | } |
| 3096 | |
Bartlomiej Zolnierkiewicz | 542d7b0 | 2013-11-05 12:37:08 +0100 | [diff] [blame] | 3097 | #define SKD_N_DEV_TABLE 16u |
| 3098 | static u32 skd_next_devno; |
| 3099 | |
| 3100 | static struct skd_device *skd_construct(struct pci_dev *pdev) |
| 3101 | { |
| 3102 | struct skd_device *skdev; |
| 3103 | int blk_major = skd_major; |
| 3104 | int rc; |
| 3105 | |
| 3106 | skdev = kzalloc(sizeof(*skdev), GFP_KERNEL); |
| 3107 | |
| 3108 | if (!skdev) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3109 | dev_err(&pdev->dev, "memory alloc failure\n"); |
Bartlomiej Zolnierkiewicz | 542d7b0 | 2013-11-05 12:37:08 +0100 | [diff] [blame] | 3110 | return NULL; |
| 3111 | } |
| 3112 | |
| 3113 | skdev->state = SKD_DRVR_STATE_LOAD; |
| 3114 | skdev->pdev = pdev; |
| 3115 | skdev->devno = skd_next_devno++; |
| 3116 | skdev->major = blk_major; |
Bartlomiej Zolnierkiewicz | 542d7b0 | 2013-11-05 12:37:08 +0100 | [diff] [blame] | 3117 | skdev->dev_max_queue_depth = 0; |
| 3118 | |
| 3119 | skdev->num_req_context = skd_max_queue_depth; |
| 3120 | skdev->num_fitmsg_context = skd_max_queue_depth; |
Bartlomiej Zolnierkiewicz | 542d7b0 | 2013-11-05 12:37:08 +0100 | [diff] [blame] | 3121 | skdev->cur_max_queue_depth = 1; |
| 3122 | skdev->queue_low_water_mark = 1; |
| 3123 | skdev->proto_ver = 99; |
| 3124 | skdev->sgs_per_request = skd_sgs_per_request; |
| 3125 | skdev->dbg_level = skd_dbg_level; |
| 3126 | |
Bartlomiej Zolnierkiewicz | 542d7b0 | 2013-11-05 12:37:08 +0100 | [diff] [blame] | 3127 | spin_lock_init(&skdev->lock); |
| 3128 | |
| 3129 | INIT_WORK(&skdev->completion_worker, skd_completion_worker); |
| 3130 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3131 | dev_dbg(&skdev->pdev->dev, "skcomp\n"); |
Bartlomiej Zolnierkiewicz | 542d7b0 | 2013-11-05 12:37:08 +0100 | [diff] [blame] | 3132 | rc = skd_cons_skcomp(skdev); |
| 3133 | if (rc < 0) |
| 3134 | goto err_out; |
| 3135 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3136 | dev_dbg(&skdev->pdev->dev, "skmsg\n"); |
Bartlomiej Zolnierkiewicz | 542d7b0 | 2013-11-05 12:37:08 +0100 | [diff] [blame] | 3137 | rc = skd_cons_skmsg(skdev); |
| 3138 | if (rc < 0) |
| 3139 | goto err_out; |
| 3140 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3141 | dev_dbg(&skdev->pdev->dev, "skreq\n"); |
Bartlomiej Zolnierkiewicz | 542d7b0 | 2013-11-05 12:37:08 +0100 | [diff] [blame] | 3142 | rc = skd_cons_skreq(skdev); |
| 3143 | if (rc < 0) |
| 3144 | goto err_out; |
| 3145 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3146 | dev_dbg(&skdev->pdev->dev, "sksb\n"); |
Bartlomiej Zolnierkiewicz | 542d7b0 | 2013-11-05 12:37:08 +0100 | [diff] [blame] | 3147 | rc = skd_cons_sksb(skdev); |
| 3148 | if (rc < 0) |
| 3149 | goto err_out; |
| 3150 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3151 | dev_dbg(&skdev->pdev->dev, "disk\n"); |
Bartlomiej Zolnierkiewicz | 542d7b0 | 2013-11-05 12:37:08 +0100 | [diff] [blame] | 3152 | rc = skd_cons_disk(skdev); |
| 3153 | if (rc < 0) |
| 3154 | goto err_out; |
| 3155 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3156 | dev_dbg(&skdev->pdev->dev, "VICTORY\n"); |
Bartlomiej Zolnierkiewicz | 542d7b0 | 2013-11-05 12:37:08 +0100 | [diff] [blame] | 3157 | return skdev; |
| 3158 | |
| 3159 | err_out: |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3160 | dev_dbg(&skdev->pdev->dev, "construct failed\n"); |
Bartlomiej Zolnierkiewicz | 542d7b0 | 2013-11-05 12:37:08 +0100 | [diff] [blame] | 3161 | skd_destruct(skdev); |
| 3162 | return NULL; |
| 3163 | } |
| 3164 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3165 | /* |
| 3166 | ***************************************************************************** |
| 3167 | * DESTRUCT (FREE) |
| 3168 | ***************************************************************************** |
| 3169 | */ |
| 3170 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3171 | static void skd_free_skcomp(struct skd_device *skdev) |
| 3172 | { |
Bart Van Assche | 7f13bda | 2017-08-17 13:13:03 -0700 | [diff] [blame] | 3173 | if (skdev->skcomp_table) |
| 3174 | pci_free_consistent(skdev->pdev, SKD_SKCOMP_SIZE, |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3175 | skdev->skcomp_table, skdev->cq_dma_address); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3176 | |
| 3177 | skdev->skcomp_table = NULL; |
| 3178 | skdev->cq_dma_address = 0; |
| 3179 | } |
| 3180 | |
| 3181 | static void skd_free_skmsg(struct skd_device *skdev) |
| 3182 | { |
| 3183 | u32 i; |
| 3184 | |
| 3185 | if (skdev->skmsg_table == NULL) |
| 3186 | return; |
| 3187 | |
| 3188 | for (i = 0; i < skdev->num_fitmsg_context; i++) { |
| 3189 | struct skd_fitmsg_context *skmsg; |
| 3190 | |
| 3191 | skmsg = &skdev->skmsg_table[i]; |
| 3192 | |
| 3193 | if (skmsg->msg_buf != NULL) { |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3194 | pci_free_consistent(skdev->pdev, SKD_N_FITMSG_BYTES, |
| 3195 | skmsg->msg_buf, |
| 3196 | skmsg->mb_dma_address); |
| 3197 | } |
| 3198 | skmsg->msg_buf = NULL; |
| 3199 | skmsg->mb_dma_address = 0; |
| 3200 | } |
| 3201 | |
| 3202 | kfree(skdev->skmsg_table); |
| 3203 | skdev->skmsg_table = NULL; |
| 3204 | } |
| 3205 | |
Bartlomiej Zolnierkiewicz | 542d7b0 | 2013-11-05 12:37:08 +0100 | [diff] [blame] | 3206 | static void skd_free_sg_list(struct skd_device *skdev, |
| 3207 | struct fit_sg_descriptor *sg_list, |
| 3208 | u32 n_sg, dma_addr_t dma_addr) |
| 3209 | { |
| 3210 | if (sg_list != NULL) { |
| 3211 | u32 nbytes; |
| 3212 | |
| 3213 | nbytes = sizeof(*sg_list) * n_sg; |
| 3214 | |
| 3215 | pci_free_consistent(skdev->pdev, nbytes, sg_list, dma_addr); |
| 3216 | } |
| 3217 | } |
| 3218 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3219 | static void skd_free_skreq(struct skd_device *skdev) |
| 3220 | { |
| 3221 | u32 i; |
| 3222 | |
| 3223 | if (skdev->skreq_table == NULL) |
| 3224 | return; |
| 3225 | |
| 3226 | for (i = 0; i < skdev->num_req_context; i++) { |
| 3227 | struct skd_request_context *skreq; |
| 3228 | |
| 3229 | skreq = &skdev->skreq_table[i]; |
| 3230 | |
| 3231 | skd_free_sg_list(skdev, skreq->sksg_list, |
| 3232 | skdev->sgs_per_request, |
| 3233 | skreq->sksg_dma_address); |
| 3234 | |
| 3235 | skreq->sksg_list = NULL; |
| 3236 | skreq->sksg_dma_address = 0; |
| 3237 | |
| 3238 | kfree(skreq->sg); |
| 3239 | } |
| 3240 | |
| 3241 | kfree(skdev->skreq_table); |
| 3242 | skdev->skreq_table = NULL; |
| 3243 | } |
| 3244 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3245 | static void skd_free_sksb(struct skd_device *skdev) |
| 3246 | { |
| 3247 | struct skd_special_context *skspcl; |
| 3248 | u32 nbytes; |
| 3249 | |
| 3250 | skspcl = &skdev->internal_skspcl; |
| 3251 | |
| 3252 | if (skspcl->data_buf != NULL) { |
| 3253 | nbytes = SKD_N_INTERNAL_BYTES; |
| 3254 | |
| 3255 | pci_free_consistent(skdev->pdev, nbytes, |
| 3256 | skspcl->data_buf, skspcl->db_dma_address); |
| 3257 | } |
| 3258 | |
| 3259 | skspcl->data_buf = NULL; |
| 3260 | skspcl->db_dma_address = 0; |
| 3261 | |
| 3262 | if (skspcl->msg_buf != NULL) { |
| 3263 | nbytes = SKD_N_SPECIAL_FITMSG_BYTES; |
| 3264 | pci_free_consistent(skdev->pdev, nbytes, |
| 3265 | skspcl->msg_buf, skspcl->mb_dma_address); |
| 3266 | } |
| 3267 | |
| 3268 | skspcl->msg_buf = NULL; |
| 3269 | skspcl->mb_dma_address = 0; |
| 3270 | |
| 3271 | skd_free_sg_list(skdev, skspcl->req.sksg_list, 1, |
| 3272 | skspcl->req.sksg_dma_address); |
| 3273 | |
| 3274 | skspcl->req.sksg_list = NULL; |
| 3275 | skspcl->req.sksg_dma_address = 0; |
| 3276 | } |
| 3277 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3278 | static void skd_free_disk(struct skd_device *skdev) |
| 3279 | { |
| 3280 | struct gendisk *disk = skdev->disk; |
| 3281 | |
Bart Van Assche | 7277cc6 | 2017-08-17 13:12:45 -0700 | [diff] [blame] | 3282 | if (disk && (disk->flags & GENHD_FL_UP)) |
| 3283 | del_gendisk(disk); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3284 | |
Bart Van Assche | 7277cc6 | 2017-08-17 13:12:45 -0700 | [diff] [blame] | 3285 | if (skdev->queue) { |
| 3286 | blk_cleanup_queue(skdev->queue); |
| 3287 | skdev->queue = NULL; |
| 3288 | disk->queue = NULL; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3289 | } |
Bart Van Assche | 7277cc6 | 2017-08-17 13:12:45 -0700 | [diff] [blame] | 3290 | |
| 3291 | put_disk(disk); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3292 | skdev->disk = NULL; |
| 3293 | } |
| 3294 | |
Bartlomiej Zolnierkiewicz | 542d7b0 | 2013-11-05 12:37:08 +0100 | [diff] [blame] | 3295 | static void skd_destruct(struct skd_device *skdev) |
| 3296 | { |
| 3297 | if (skdev == NULL) |
| 3298 | return; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3299 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3300 | dev_dbg(&skdev->pdev->dev, "disk\n"); |
Bartlomiej Zolnierkiewicz | 542d7b0 | 2013-11-05 12:37:08 +0100 | [diff] [blame] | 3301 | skd_free_disk(skdev); |
| 3302 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3303 | dev_dbg(&skdev->pdev->dev, "sksb\n"); |
Bartlomiej Zolnierkiewicz | 542d7b0 | 2013-11-05 12:37:08 +0100 | [diff] [blame] | 3304 | skd_free_sksb(skdev); |
| 3305 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3306 | dev_dbg(&skdev->pdev->dev, "skreq\n"); |
Bartlomiej Zolnierkiewicz | 542d7b0 | 2013-11-05 12:37:08 +0100 | [diff] [blame] | 3307 | skd_free_skreq(skdev); |
| 3308 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3309 | dev_dbg(&skdev->pdev->dev, "skmsg\n"); |
Bartlomiej Zolnierkiewicz | 542d7b0 | 2013-11-05 12:37:08 +0100 | [diff] [blame] | 3310 | skd_free_skmsg(skdev); |
| 3311 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3312 | dev_dbg(&skdev->pdev->dev, "skcomp\n"); |
Bartlomiej Zolnierkiewicz | 542d7b0 | 2013-11-05 12:37:08 +0100 | [diff] [blame] | 3313 | skd_free_skcomp(skdev); |
| 3314 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3315 | dev_dbg(&skdev->pdev->dev, "skdev\n"); |
Bartlomiej Zolnierkiewicz | 542d7b0 | 2013-11-05 12:37:08 +0100 | [diff] [blame] | 3316 | kfree(skdev); |
| 3317 | } |
| 3318 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3319 | /* |
| 3320 | ***************************************************************************** |
| 3321 | * BLOCK DEVICE (BDEV) GLUE |
| 3322 | ***************************************************************************** |
| 3323 | */ |
| 3324 | |
| 3325 | static int skd_bdev_getgeo(struct block_device *bdev, struct hd_geometry *geo) |
| 3326 | { |
| 3327 | struct skd_device *skdev; |
| 3328 | u64 capacity; |
| 3329 | |
| 3330 | skdev = bdev->bd_disk->private_data; |
| 3331 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3332 | dev_dbg(&skdev->pdev->dev, "%s: CMD[%s] getgeo device\n", |
| 3333 | bdev->bd_disk->disk_name, current->comm); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3334 | |
| 3335 | if (skdev->read_cap_is_valid) { |
| 3336 | capacity = get_capacity(skdev->disk); |
| 3337 | geo->heads = 64; |
| 3338 | geo->sectors = 255; |
| 3339 | geo->cylinders = (capacity) / (255 * 64); |
| 3340 | |
| 3341 | return 0; |
| 3342 | } |
| 3343 | return -EIO; |
| 3344 | } |
| 3345 | |
Dan Williams | 0d52c756 | 2016-06-15 19:44:20 -0700 | [diff] [blame] | 3346 | static int skd_bdev_attach(struct device *parent, struct skd_device *skdev) |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3347 | { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3348 | dev_dbg(&skdev->pdev->dev, "add_disk\n"); |
Dan Williams | 0d52c756 | 2016-06-15 19:44:20 -0700 | [diff] [blame] | 3349 | device_add_disk(parent, skdev->disk); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3350 | return 0; |
| 3351 | } |
| 3352 | |
| 3353 | static const struct block_device_operations skd_blockdev_ops = { |
| 3354 | .owner = THIS_MODULE, |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3355 | .getgeo = skd_bdev_getgeo, |
| 3356 | }; |
| 3357 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3358 | /* |
| 3359 | ***************************************************************************** |
| 3360 | * PCIe DRIVER GLUE |
| 3361 | ***************************************************************************** |
| 3362 | */ |
| 3363 | |
Benoit Taine | 9baa3c3 | 2014-08-08 15:56:03 +0200 | [diff] [blame] | 3364 | static const struct pci_device_id skd_pci_tbl[] = { |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3365 | { PCI_VENDOR_ID_STEC, PCI_DEVICE_ID_S1120, |
| 3366 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, }, |
| 3367 | { 0 } /* terminate list */ |
| 3368 | }; |
| 3369 | |
| 3370 | MODULE_DEVICE_TABLE(pci, skd_pci_tbl); |
| 3371 | |
| 3372 | static char *skd_pci_info(struct skd_device *skdev, char *str) |
| 3373 | { |
| 3374 | int pcie_reg; |
| 3375 | |
| 3376 | strcpy(str, "PCIe ("); |
| 3377 | pcie_reg = pci_find_capability(skdev->pdev, PCI_CAP_ID_EXP); |
| 3378 | |
| 3379 | if (pcie_reg) { |
| 3380 | |
| 3381 | char lwstr[6]; |
| 3382 | uint16_t pcie_lstat, lspeed, lwidth; |
| 3383 | |
| 3384 | pcie_reg += 0x12; |
| 3385 | pci_read_config_word(skdev->pdev, pcie_reg, &pcie_lstat); |
| 3386 | lspeed = pcie_lstat & (0xF); |
| 3387 | lwidth = (pcie_lstat & 0x3F0) >> 4; |
| 3388 | |
| 3389 | if (lspeed == 1) |
| 3390 | strcat(str, "2.5GT/s "); |
| 3391 | else if (lspeed == 2) |
| 3392 | strcat(str, "5.0GT/s "); |
| 3393 | else |
| 3394 | strcat(str, "<unknown> "); |
| 3395 | snprintf(lwstr, sizeof(lwstr), "%dX)", lwidth); |
| 3396 | strcat(str, lwstr); |
| 3397 | } |
| 3398 | return str; |
| 3399 | } |
| 3400 | |
| 3401 | static int skd_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
| 3402 | { |
| 3403 | int i; |
| 3404 | int rc = 0; |
| 3405 | char pci_str[32]; |
| 3406 | struct skd_device *skdev; |
| 3407 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3408 | dev_info(&pdev->dev, "STEC s1120 Driver(%s) version %s-b%s\n", |
| 3409 | DRV_NAME, DRV_VERSION, DRV_BUILD_ID); |
| 3410 | dev_info(&pdev->dev, "vendor=%04X device=%04x\n", pdev->vendor, |
| 3411 | pdev->device); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3412 | |
| 3413 | rc = pci_enable_device(pdev); |
| 3414 | if (rc) |
| 3415 | return rc; |
| 3416 | rc = pci_request_regions(pdev, DRV_NAME); |
| 3417 | if (rc) |
| 3418 | goto err_out; |
| 3419 | rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); |
| 3420 | if (!rc) { |
| 3421 | if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3422 | dev_err(&pdev->dev, "consistent DMA mask error %d\n", |
| 3423 | rc); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3424 | } |
| 3425 | } else { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3426 | rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3427 | if (rc) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3428 | dev_err(&pdev->dev, "DMA mask error %d\n", rc); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3429 | goto err_out_regions; |
| 3430 | } |
| 3431 | } |
| 3432 | |
Bartlomiej Zolnierkiewicz | b8df664 | 2013-11-05 12:37:02 +0100 | [diff] [blame] | 3433 | if (!skd_major) { |
| 3434 | rc = register_blkdev(0, DRV_NAME); |
| 3435 | if (rc < 0) |
| 3436 | goto err_out_regions; |
| 3437 | BUG_ON(!rc); |
| 3438 | skd_major = rc; |
| 3439 | } |
| 3440 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3441 | skdev = skd_construct(pdev); |
Wei Yongjun | 1762b57 | 2013-10-30 13:23:53 +0800 | [diff] [blame] | 3442 | if (skdev == NULL) { |
| 3443 | rc = -ENOMEM; |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3444 | goto err_out_regions; |
Wei Yongjun | 1762b57 | 2013-10-30 13:23:53 +0800 | [diff] [blame] | 3445 | } |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3446 | |
| 3447 | skd_pci_info(skdev, pci_str); |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3448 | dev_info(&pdev->dev, "%s 64bit\n", pci_str); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3449 | |
| 3450 | pci_set_master(pdev); |
| 3451 | rc = pci_enable_pcie_error_reporting(pdev); |
| 3452 | if (rc) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3453 | dev_err(&pdev->dev, |
| 3454 | "bad enable of PCIe error reporting rc=%d\n", rc); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3455 | skdev->pcie_error_reporting_is_enabled = 0; |
| 3456 | } else |
| 3457 | skdev->pcie_error_reporting_is_enabled = 1; |
| 3458 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3459 | pci_set_drvdata(pdev, skdev); |
Bartlomiej Zolnierkiewicz | ebedd16 | 2013-11-05 12:37:05 +0100 | [diff] [blame] | 3460 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3461 | for (i = 0; i < SKD_MAX_BARS; i++) { |
| 3462 | skdev->mem_phys[i] = pci_resource_start(pdev, i); |
| 3463 | skdev->mem_size[i] = (u32)pci_resource_len(pdev, i); |
| 3464 | skdev->mem_map[i] = ioremap(skdev->mem_phys[i], |
| 3465 | skdev->mem_size[i]); |
| 3466 | if (!skdev->mem_map[i]) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3467 | dev_err(&pdev->dev, |
| 3468 | "Unable to map adapter memory!\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3469 | rc = -ENODEV; |
| 3470 | goto err_out_iounmap; |
| 3471 | } |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3472 | dev_dbg(&pdev->dev, "mem_map=%p, phyd=%016llx, size=%d\n", |
| 3473 | skdev->mem_map[i], (uint64_t)skdev->mem_phys[i], |
| 3474 | skdev->mem_size[i]); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3475 | } |
| 3476 | |
| 3477 | rc = skd_acquire_irq(skdev); |
| 3478 | if (rc) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3479 | dev_err(&pdev->dev, "interrupt resource error %d\n", rc); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3480 | goto err_out_iounmap; |
| 3481 | } |
| 3482 | |
| 3483 | rc = skd_start_timer(skdev); |
| 3484 | if (rc) |
| 3485 | goto err_out_timer; |
| 3486 | |
| 3487 | init_waitqueue_head(&skdev->waitq); |
| 3488 | |
| 3489 | skd_start_device(skdev); |
| 3490 | |
| 3491 | rc = wait_event_interruptible_timeout(skdev->waitq, |
| 3492 | (skdev->gendisk_on), |
| 3493 | (SKD_START_WAIT_SECONDS * HZ)); |
| 3494 | if (skdev->gendisk_on > 0) { |
| 3495 | /* device came on-line after reset */ |
Dan Williams | 0d52c756 | 2016-06-15 19:44:20 -0700 | [diff] [blame] | 3496 | skd_bdev_attach(&pdev->dev, skdev); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3497 | rc = 0; |
| 3498 | } else { |
| 3499 | /* we timed out, something is wrong with the device, |
| 3500 | don't add the disk structure */ |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3501 | dev_err(&pdev->dev, "error: waiting for s1120 timed out %d!\n", |
| 3502 | rc); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3503 | /* in case of no error; we timeout with ENXIO */ |
| 3504 | if (!rc) |
| 3505 | rc = -ENXIO; |
| 3506 | goto err_out_timer; |
| 3507 | } |
| 3508 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3509 | return rc; |
| 3510 | |
| 3511 | err_out_timer: |
| 3512 | skd_stop_device(skdev); |
| 3513 | skd_release_irq(skdev); |
| 3514 | |
| 3515 | err_out_iounmap: |
| 3516 | for (i = 0; i < SKD_MAX_BARS; i++) |
| 3517 | if (skdev->mem_map[i]) |
| 3518 | iounmap(skdev->mem_map[i]); |
| 3519 | |
| 3520 | if (skdev->pcie_error_reporting_is_enabled) |
| 3521 | pci_disable_pcie_error_reporting(pdev); |
| 3522 | |
| 3523 | skd_destruct(skdev); |
| 3524 | |
| 3525 | err_out_regions: |
| 3526 | pci_release_regions(pdev); |
| 3527 | |
| 3528 | err_out: |
| 3529 | pci_disable_device(pdev); |
| 3530 | pci_set_drvdata(pdev, NULL); |
| 3531 | return rc; |
| 3532 | } |
| 3533 | |
| 3534 | static void skd_pci_remove(struct pci_dev *pdev) |
| 3535 | { |
| 3536 | int i; |
| 3537 | struct skd_device *skdev; |
| 3538 | |
| 3539 | skdev = pci_get_drvdata(pdev); |
| 3540 | if (!skdev) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3541 | dev_err(&pdev->dev, "no device data for PCI\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3542 | return; |
| 3543 | } |
| 3544 | skd_stop_device(skdev); |
| 3545 | skd_release_irq(skdev); |
| 3546 | |
| 3547 | for (i = 0; i < SKD_MAX_BARS; i++) |
| 3548 | if (skdev->mem_map[i]) |
Bart Van Assche | 4854afe | 2017-08-17 13:12:59 -0700 | [diff] [blame] | 3549 | iounmap(skdev->mem_map[i]); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3550 | |
| 3551 | if (skdev->pcie_error_reporting_is_enabled) |
| 3552 | pci_disable_pcie_error_reporting(pdev); |
| 3553 | |
| 3554 | skd_destruct(skdev); |
| 3555 | |
| 3556 | pci_release_regions(pdev); |
| 3557 | pci_disable_device(pdev); |
| 3558 | pci_set_drvdata(pdev, NULL); |
| 3559 | |
| 3560 | return; |
| 3561 | } |
| 3562 | |
| 3563 | static int skd_pci_suspend(struct pci_dev *pdev, pm_message_t state) |
| 3564 | { |
| 3565 | int i; |
| 3566 | struct skd_device *skdev; |
| 3567 | |
| 3568 | skdev = pci_get_drvdata(pdev); |
| 3569 | if (!skdev) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3570 | dev_err(&pdev->dev, "no device data for PCI\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3571 | return -EIO; |
| 3572 | } |
| 3573 | |
| 3574 | skd_stop_device(skdev); |
| 3575 | |
| 3576 | skd_release_irq(skdev); |
| 3577 | |
| 3578 | for (i = 0; i < SKD_MAX_BARS; i++) |
| 3579 | if (skdev->mem_map[i]) |
Bart Van Assche | 4854afe | 2017-08-17 13:12:59 -0700 | [diff] [blame] | 3580 | iounmap(skdev->mem_map[i]); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3581 | |
| 3582 | if (skdev->pcie_error_reporting_is_enabled) |
| 3583 | pci_disable_pcie_error_reporting(pdev); |
| 3584 | |
| 3585 | pci_release_regions(pdev); |
| 3586 | pci_save_state(pdev); |
| 3587 | pci_disable_device(pdev); |
| 3588 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); |
| 3589 | return 0; |
| 3590 | } |
| 3591 | |
| 3592 | static int skd_pci_resume(struct pci_dev *pdev) |
| 3593 | { |
| 3594 | int i; |
| 3595 | int rc = 0; |
| 3596 | struct skd_device *skdev; |
| 3597 | |
| 3598 | skdev = pci_get_drvdata(pdev); |
| 3599 | if (!skdev) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3600 | dev_err(&pdev->dev, "no device data for PCI\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3601 | return -1; |
| 3602 | } |
| 3603 | |
| 3604 | pci_set_power_state(pdev, PCI_D0); |
| 3605 | pci_enable_wake(pdev, PCI_D0, 0); |
| 3606 | pci_restore_state(pdev); |
| 3607 | |
| 3608 | rc = pci_enable_device(pdev); |
| 3609 | if (rc) |
| 3610 | return rc; |
| 3611 | rc = pci_request_regions(pdev, DRV_NAME); |
| 3612 | if (rc) |
| 3613 | goto err_out; |
| 3614 | rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); |
| 3615 | if (!rc) { |
| 3616 | if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) { |
| 3617 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3618 | dev_err(&pdev->dev, "consistent DMA mask error %d\n", |
| 3619 | rc); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3620 | } |
| 3621 | } else { |
| 3622 | rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); |
| 3623 | if (rc) { |
| 3624 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3625 | dev_err(&pdev->dev, "DMA mask error %d\n", rc); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3626 | goto err_out_regions; |
| 3627 | } |
| 3628 | } |
| 3629 | |
| 3630 | pci_set_master(pdev); |
| 3631 | rc = pci_enable_pcie_error_reporting(pdev); |
| 3632 | if (rc) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3633 | dev_err(&pdev->dev, |
| 3634 | "bad enable of PCIe error reporting rc=%d\n", rc); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3635 | skdev->pcie_error_reporting_is_enabled = 0; |
| 3636 | } else |
| 3637 | skdev->pcie_error_reporting_is_enabled = 1; |
| 3638 | |
| 3639 | for (i = 0; i < SKD_MAX_BARS; i++) { |
| 3640 | |
| 3641 | skdev->mem_phys[i] = pci_resource_start(pdev, i); |
| 3642 | skdev->mem_size[i] = (u32)pci_resource_len(pdev, i); |
| 3643 | skdev->mem_map[i] = ioremap(skdev->mem_phys[i], |
| 3644 | skdev->mem_size[i]); |
| 3645 | if (!skdev->mem_map[i]) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3646 | dev_err(&pdev->dev, "Unable to map adapter memory!\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3647 | rc = -ENODEV; |
| 3648 | goto err_out_iounmap; |
| 3649 | } |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3650 | dev_dbg(&pdev->dev, "mem_map=%p, phyd=%016llx, size=%d\n", |
| 3651 | skdev->mem_map[i], (uint64_t)skdev->mem_phys[i], |
| 3652 | skdev->mem_size[i]); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3653 | } |
| 3654 | rc = skd_acquire_irq(skdev); |
| 3655 | if (rc) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3656 | dev_err(&pdev->dev, "interrupt resource error %d\n", rc); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3657 | goto err_out_iounmap; |
| 3658 | } |
| 3659 | |
| 3660 | rc = skd_start_timer(skdev); |
| 3661 | if (rc) |
| 3662 | goto err_out_timer; |
| 3663 | |
| 3664 | init_waitqueue_head(&skdev->waitq); |
| 3665 | |
| 3666 | skd_start_device(skdev); |
| 3667 | |
| 3668 | return rc; |
| 3669 | |
| 3670 | err_out_timer: |
| 3671 | skd_stop_device(skdev); |
| 3672 | skd_release_irq(skdev); |
| 3673 | |
| 3674 | err_out_iounmap: |
| 3675 | for (i = 0; i < SKD_MAX_BARS; i++) |
| 3676 | if (skdev->mem_map[i]) |
| 3677 | iounmap(skdev->mem_map[i]); |
| 3678 | |
| 3679 | if (skdev->pcie_error_reporting_is_enabled) |
| 3680 | pci_disable_pcie_error_reporting(pdev); |
| 3681 | |
| 3682 | err_out_regions: |
| 3683 | pci_release_regions(pdev); |
| 3684 | |
| 3685 | err_out: |
| 3686 | pci_disable_device(pdev); |
| 3687 | return rc; |
| 3688 | } |
| 3689 | |
| 3690 | static void skd_pci_shutdown(struct pci_dev *pdev) |
| 3691 | { |
| 3692 | struct skd_device *skdev; |
| 3693 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3694 | dev_err(&pdev->dev, "%s called\n", __func__); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3695 | |
| 3696 | skdev = pci_get_drvdata(pdev); |
| 3697 | if (!skdev) { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3698 | dev_err(&pdev->dev, "no device data for PCI\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3699 | return; |
| 3700 | } |
| 3701 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3702 | dev_err(&pdev->dev, "calling stop\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3703 | skd_stop_device(skdev); |
| 3704 | } |
| 3705 | |
| 3706 | static struct pci_driver skd_driver = { |
| 3707 | .name = DRV_NAME, |
| 3708 | .id_table = skd_pci_tbl, |
| 3709 | .probe = skd_pci_probe, |
| 3710 | .remove = skd_pci_remove, |
| 3711 | .suspend = skd_pci_suspend, |
| 3712 | .resume = skd_pci_resume, |
| 3713 | .shutdown = skd_pci_shutdown, |
| 3714 | }; |
| 3715 | |
| 3716 | /* |
| 3717 | ***************************************************************************** |
| 3718 | * LOGGING SUPPORT |
| 3719 | ***************************************************************************** |
| 3720 | */ |
| 3721 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3722 | const char *skd_drive_state_to_str(int state) |
| 3723 | { |
| 3724 | switch (state) { |
| 3725 | case FIT_SR_DRIVE_OFFLINE: |
| 3726 | return "OFFLINE"; |
| 3727 | case FIT_SR_DRIVE_INIT: |
| 3728 | return "INIT"; |
| 3729 | case FIT_SR_DRIVE_ONLINE: |
| 3730 | return "ONLINE"; |
| 3731 | case FIT_SR_DRIVE_BUSY: |
| 3732 | return "BUSY"; |
| 3733 | case FIT_SR_DRIVE_FAULT: |
| 3734 | return "FAULT"; |
| 3735 | case FIT_SR_DRIVE_DEGRADED: |
| 3736 | return "DEGRADED"; |
| 3737 | case FIT_SR_PCIE_LINK_DOWN: |
| 3738 | return "INK_DOWN"; |
| 3739 | case FIT_SR_DRIVE_SOFT_RESET: |
| 3740 | return "SOFT_RESET"; |
| 3741 | case FIT_SR_DRIVE_NEED_FW_DOWNLOAD: |
| 3742 | return "NEED_FW"; |
| 3743 | case FIT_SR_DRIVE_INIT_FAULT: |
| 3744 | return "INIT_FAULT"; |
| 3745 | case FIT_SR_DRIVE_BUSY_SANITIZE: |
| 3746 | return "BUSY_SANITIZE"; |
| 3747 | case FIT_SR_DRIVE_BUSY_ERASE: |
| 3748 | return "BUSY_ERASE"; |
| 3749 | case FIT_SR_DRIVE_FW_BOOTING: |
| 3750 | return "FW_BOOTING"; |
| 3751 | default: |
| 3752 | return "???"; |
| 3753 | } |
| 3754 | } |
| 3755 | |
| 3756 | const char *skd_skdev_state_to_str(enum skd_drvr_state state) |
| 3757 | { |
| 3758 | switch (state) { |
| 3759 | case SKD_DRVR_STATE_LOAD: |
| 3760 | return "LOAD"; |
| 3761 | case SKD_DRVR_STATE_IDLE: |
| 3762 | return "IDLE"; |
| 3763 | case SKD_DRVR_STATE_BUSY: |
| 3764 | return "BUSY"; |
| 3765 | case SKD_DRVR_STATE_STARTING: |
| 3766 | return "STARTING"; |
| 3767 | case SKD_DRVR_STATE_ONLINE: |
| 3768 | return "ONLINE"; |
| 3769 | case SKD_DRVR_STATE_PAUSING: |
| 3770 | return "PAUSING"; |
| 3771 | case SKD_DRVR_STATE_PAUSED: |
| 3772 | return "PAUSED"; |
| 3773 | case SKD_DRVR_STATE_DRAINING_TIMEOUT: |
| 3774 | return "DRAINING_TIMEOUT"; |
| 3775 | case SKD_DRVR_STATE_RESTARTING: |
| 3776 | return "RESTARTING"; |
| 3777 | case SKD_DRVR_STATE_RESUMING: |
| 3778 | return "RESUMING"; |
| 3779 | case SKD_DRVR_STATE_STOPPING: |
| 3780 | return "STOPPING"; |
| 3781 | case SKD_DRVR_STATE_SYNCING: |
| 3782 | return "SYNCING"; |
| 3783 | case SKD_DRVR_STATE_FAULT: |
| 3784 | return "FAULT"; |
| 3785 | case SKD_DRVR_STATE_DISAPPEARED: |
| 3786 | return "DISAPPEARED"; |
| 3787 | case SKD_DRVR_STATE_BUSY_ERASE: |
| 3788 | return "BUSY_ERASE"; |
| 3789 | case SKD_DRVR_STATE_BUSY_SANITIZE: |
| 3790 | return "BUSY_SANITIZE"; |
| 3791 | case SKD_DRVR_STATE_BUSY_IMMINENT: |
| 3792 | return "BUSY_IMMINENT"; |
| 3793 | case SKD_DRVR_STATE_WAIT_BOOT: |
| 3794 | return "WAIT_BOOT"; |
| 3795 | |
| 3796 | default: |
| 3797 | return "???"; |
| 3798 | } |
| 3799 | } |
| 3800 | |
Rashika Kheria | a26ba7f | 2013-12-19 15:02:22 +0530 | [diff] [blame] | 3801 | static const char *skd_skmsg_state_to_str(enum skd_fit_msg_state state) |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3802 | { |
| 3803 | switch (state) { |
| 3804 | case SKD_MSG_STATE_IDLE: |
| 3805 | return "IDLE"; |
| 3806 | case SKD_MSG_STATE_BUSY: |
| 3807 | return "BUSY"; |
| 3808 | default: |
| 3809 | return "???"; |
| 3810 | } |
| 3811 | } |
| 3812 | |
Rashika Kheria | a26ba7f | 2013-12-19 15:02:22 +0530 | [diff] [blame] | 3813 | static const char *skd_skreq_state_to_str(enum skd_req_state state) |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3814 | { |
| 3815 | switch (state) { |
| 3816 | case SKD_REQ_STATE_IDLE: |
| 3817 | return "IDLE"; |
| 3818 | case SKD_REQ_STATE_SETUP: |
| 3819 | return "SETUP"; |
| 3820 | case SKD_REQ_STATE_BUSY: |
| 3821 | return "BUSY"; |
| 3822 | case SKD_REQ_STATE_COMPLETED: |
| 3823 | return "COMPLETED"; |
| 3824 | case SKD_REQ_STATE_TIMEOUT: |
| 3825 | return "TIMEOUT"; |
| 3826 | case SKD_REQ_STATE_ABORTED: |
| 3827 | return "ABORTED"; |
| 3828 | default: |
| 3829 | return "???"; |
| 3830 | } |
| 3831 | } |
| 3832 | |
| 3833 | static void skd_log_skdev(struct skd_device *skdev, const char *event) |
| 3834 | { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3835 | dev_dbg(&skdev->pdev->dev, "skdev=%p event='%s'\n", skdev, event); |
| 3836 | dev_dbg(&skdev->pdev->dev, " drive_state=%s(%d) driver_state=%s(%d)\n", |
| 3837 | skd_drive_state_to_str(skdev->drive_state), skdev->drive_state, |
| 3838 | skd_skdev_state_to_str(skdev->state), skdev->state); |
| 3839 | dev_dbg(&skdev->pdev->dev, " busy=%d limit=%d dev=%d lowat=%d\n", |
| 3840 | skdev->in_flight, skdev->cur_max_queue_depth, |
| 3841 | skdev->dev_max_queue_depth, skdev->queue_low_water_mark); |
| 3842 | dev_dbg(&skdev->pdev->dev, " timestamp=0x%x cycle=%d cycle_ix=%d\n", |
| 3843 | skdev->timeout_stamp, skdev->skcomp_cycle, skdev->skcomp_ix); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3844 | } |
| 3845 | |
| 3846 | static void skd_log_skmsg(struct skd_device *skdev, |
| 3847 | struct skd_fitmsg_context *skmsg, const char *event) |
| 3848 | { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3849 | dev_dbg(&skdev->pdev->dev, "skmsg=%p event='%s'\n", skmsg, event); |
| 3850 | dev_dbg(&skdev->pdev->dev, " state=%s(%d) id=0x%04x length=%d\n", |
| 3851 | skd_skmsg_state_to_str(skmsg->state), skmsg->state, skmsg->id, |
| 3852 | skmsg->length); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3853 | } |
| 3854 | |
| 3855 | static void skd_log_skreq(struct skd_device *skdev, |
| 3856 | struct skd_request_context *skreq, const char *event) |
| 3857 | { |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3858 | dev_dbg(&skdev->pdev->dev, "skreq=%p event='%s'\n", skreq, event); |
| 3859 | dev_dbg(&skdev->pdev->dev, " state=%s(%d) id=0x%04x fitmsg=0x%04x\n", |
| 3860 | skd_skreq_state_to_str(skreq->state), skreq->state, skreq->id, |
| 3861 | skreq->fitmsg_id); |
| 3862 | dev_dbg(&skdev->pdev->dev, " timo=0x%x sg_dir=%d n_sg=%d\n", |
Bart Van Assche | b1824ee | 2017-08-17 13:13:12 -0700 | [diff] [blame] | 3863 | skreq->timeout_stamp, skreq->data_dir, skreq->n_sg); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3864 | |
Jens Axboe | fcd37eb | 2013-11-01 10:14:56 -0600 | [diff] [blame] | 3865 | if (skreq->req != NULL) { |
| 3866 | struct request *req = skreq->req; |
| 3867 | u32 lba = (u32)blk_rq_pos(req); |
| 3868 | u32 count = blk_rq_sectors(req); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3869 | |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3870 | dev_dbg(&skdev->pdev->dev, |
| 3871 | "req=%p lba=%u(0x%x) count=%u(0x%x) dir=%d\n", req, |
| 3872 | lba, lba, count, count, (int)rq_data_dir(req)); |
Jens Axboe | fcd37eb | 2013-11-01 10:14:56 -0600 | [diff] [blame] | 3873 | } else |
Bart Van Assche | f98806d | 2017-08-17 13:12:58 -0700 | [diff] [blame] | 3874 | dev_dbg(&skdev->pdev->dev, "req=NULL\n"); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3875 | } |
| 3876 | |
| 3877 | /* |
| 3878 | ***************************************************************************** |
| 3879 | * MODULE GLUE |
| 3880 | ***************************************************************************** |
| 3881 | */ |
| 3882 | |
| 3883 | static int __init skd_init(void) |
| 3884 | { |
Bart Van Assche | 16a7053 | 2017-08-17 13:13:08 -0700 | [diff] [blame] | 3885 | BUILD_BUG_ON(sizeof(struct fit_completion_entry_v1) != 8); |
| 3886 | BUILD_BUG_ON(sizeof(struct fit_comp_error_info) != 32); |
| 3887 | BUILD_BUG_ON(sizeof(struct skd_command_header) != 16); |
| 3888 | BUILD_BUG_ON(sizeof(struct skd_scsi_request) != 32); |
| 3889 | BUILD_BUG_ON(sizeof(struct driver_inquiry_data) != 44); |
Bart Van Assche | d891fe6 | 2017-08-17 13:13:07 -0700 | [diff] [blame] | 3890 | BUILD_BUG_ON(offsetof(struct skd_msg_buf, fmh) != 0); |
| 3891 | BUILD_BUG_ON(offsetof(struct skd_msg_buf, scsi) != 64); |
| 3892 | BUILD_BUG_ON(sizeof(struct skd_msg_buf) != SKD_N_FITMSG_BYTES); |
Bart Van Assche | 2da7b40 | 2017-08-17 13:13:01 -0700 | [diff] [blame] | 3893 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3894 | pr_info(PFX " v%s-b%s loaded\n", DRV_VERSION, DRV_BUILD_ID); |
| 3895 | |
| 3896 | switch (skd_isr_type) { |
| 3897 | case SKD_IRQ_LEGACY: |
| 3898 | case SKD_IRQ_MSI: |
| 3899 | case SKD_IRQ_MSIX: |
| 3900 | break; |
| 3901 | default: |
Bartlomiej Zolnierkiewicz | fbed149 | 2013-11-05 12:37:01 +0100 | [diff] [blame] | 3902 | pr_err(PFX "skd_isr_type %d invalid, re-set to %d\n", |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3903 | skd_isr_type, SKD_IRQ_DEFAULT); |
| 3904 | skd_isr_type = SKD_IRQ_DEFAULT; |
| 3905 | } |
| 3906 | |
Bartlomiej Zolnierkiewicz | fbed149 | 2013-11-05 12:37:01 +0100 | [diff] [blame] | 3907 | if (skd_max_queue_depth < 1 || |
| 3908 | skd_max_queue_depth > SKD_MAX_QUEUE_DEPTH) { |
| 3909 | pr_err(PFX "skd_max_queue_depth %d invalid, re-set to %d\n", |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3910 | skd_max_queue_depth, SKD_MAX_QUEUE_DEPTH_DEFAULT); |
| 3911 | skd_max_queue_depth = SKD_MAX_QUEUE_DEPTH_DEFAULT; |
| 3912 | } |
| 3913 | |
Bart Van Assche | 2da7b40 | 2017-08-17 13:13:01 -0700 | [diff] [blame] | 3914 | if (skd_max_req_per_msg < 1 || |
| 3915 | skd_max_req_per_msg > SKD_MAX_REQ_PER_MSG) { |
Bartlomiej Zolnierkiewicz | fbed149 | 2013-11-05 12:37:01 +0100 | [diff] [blame] | 3916 | pr_err(PFX "skd_max_req_per_msg %d invalid, re-set to %d\n", |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3917 | skd_max_req_per_msg, SKD_MAX_REQ_PER_MSG_DEFAULT); |
| 3918 | skd_max_req_per_msg = SKD_MAX_REQ_PER_MSG_DEFAULT; |
| 3919 | } |
| 3920 | |
| 3921 | if (skd_sgs_per_request < 1 || skd_sgs_per_request > 4096) { |
Bartlomiej Zolnierkiewicz | fbed149 | 2013-11-05 12:37:01 +0100 | [diff] [blame] | 3922 | pr_err(PFX "skd_sg_per_request %d invalid, re-set to %d\n", |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3923 | skd_sgs_per_request, SKD_N_SG_PER_REQ_DEFAULT); |
| 3924 | skd_sgs_per_request = SKD_N_SG_PER_REQ_DEFAULT; |
| 3925 | } |
| 3926 | |
| 3927 | if (skd_dbg_level < 0 || skd_dbg_level > 2) { |
Bartlomiej Zolnierkiewicz | fbed149 | 2013-11-05 12:37:01 +0100 | [diff] [blame] | 3928 | pr_err(PFX "skd_dbg_level %d invalid, re-set to %d\n", |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3929 | skd_dbg_level, 0); |
| 3930 | skd_dbg_level = 0; |
| 3931 | } |
| 3932 | |
| 3933 | if (skd_isr_comp_limit < 0) { |
Bartlomiej Zolnierkiewicz | fbed149 | 2013-11-05 12:37:01 +0100 | [diff] [blame] | 3934 | pr_err(PFX "skd_isr_comp_limit %d invalid, set to %d\n", |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3935 | skd_isr_comp_limit, 0); |
| 3936 | skd_isr_comp_limit = 0; |
| 3937 | } |
| 3938 | |
Bartlomiej Zolnierkiewicz | b8df664 | 2013-11-05 12:37:02 +0100 | [diff] [blame] | 3939 | return pci_register_driver(&skd_driver); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3940 | } |
| 3941 | |
| 3942 | static void __exit skd_exit(void) |
| 3943 | { |
| 3944 | pr_info(PFX " v%s-b%s unloading\n", DRV_VERSION, DRV_BUILD_ID); |
| 3945 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3946 | pci_unregister_driver(&skd_driver); |
Bartlomiej Zolnierkiewicz | b8df664 | 2013-11-05 12:37:02 +0100 | [diff] [blame] | 3947 | |
| 3948 | if (skd_major) |
| 3949 | unregister_blkdev(skd_major, DRV_NAME); |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3950 | } |
| 3951 | |
Akhil Bhansali | e67f86b | 2013-10-15 14:19:07 -0600 | [diff] [blame] | 3952 | module_init(skd_init); |
| 3953 | module_exit(skd_exit); |