Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 1 | /* |
| 2 | * driver/mfd/asic3.c |
| 3 | * |
| 4 | * Compaq ASIC3 support. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | * |
| 10 | * Copyright 2001 Compaq Computer Corporation. |
| 11 | * Copyright 2004-2005 Phil Blundell |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 12 | * Copyright 2007-2008 OpenedHand Ltd. |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 13 | * |
| 14 | * Authors: Phil Blundell <pb@handhelds.org>, |
| 15 | * Samuel Ortiz <sameo@openedhand.com> |
| 16 | * |
| 17 | */ |
| 18 | |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 19 | #include <linux/kernel.h> |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 20 | #include <linux/delay.h> |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 21 | #include <linux/irq.h> |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 22 | #include <linux/gpio.h> |
Paul Gortmaker | 5d4a357 | 2011-07-10 12:41:10 -0400 | [diff] [blame] | 23 | #include <linux/export.h> |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 24 | #include <linux/io.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 25 | #include <linux/slab.h> |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 26 | #include <linux/spinlock.h> |
| 27 | #include <linux/platform_device.h> |
| 28 | |
| 29 | #include <linux/mfd/asic3.h> |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 30 | #include <linux/mfd/core.h> |
| 31 | #include <linux/mfd/ds1wm.h> |
Philipp Zabel | 09f05ce | 2009-06-15 12:10:25 +0200 | [diff] [blame] | 32 | #include <linux/mfd/tmio.h> |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 33 | |
Philipp Zabel | e956a2a | 2009-06-05 18:31:02 +0200 | [diff] [blame] | 34 | enum { |
| 35 | ASIC3_CLOCK_SPI, |
| 36 | ASIC3_CLOCK_OWM, |
| 37 | ASIC3_CLOCK_PWM0, |
| 38 | ASIC3_CLOCK_PWM1, |
| 39 | ASIC3_CLOCK_LED0, |
| 40 | ASIC3_CLOCK_LED1, |
| 41 | ASIC3_CLOCK_LED2, |
| 42 | ASIC3_CLOCK_SD_HOST, |
| 43 | ASIC3_CLOCK_SD_BUS, |
| 44 | ASIC3_CLOCK_SMBUS, |
| 45 | ASIC3_CLOCK_EX0, |
| 46 | ASIC3_CLOCK_EX1, |
| 47 | }; |
| 48 | |
| 49 | struct asic3_clk { |
| 50 | int enabled; |
| 51 | unsigned int cdex; |
| 52 | unsigned long rate; |
| 53 | }; |
| 54 | |
| 55 | #define INIT_CDEX(_name, _rate) \ |
| 56 | [ASIC3_CLOCK_##_name] = { \ |
| 57 | .cdex = CLOCK_CDEX_##_name, \ |
| 58 | .rate = _rate, \ |
| 59 | } |
| 60 | |
Mark Brown | 59f2ad2 | 2010-12-11 12:59:35 +0000 | [diff] [blame] | 61 | static struct asic3_clk asic3_clk_init[] __initdata = { |
Philipp Zabel | e956a2a | 2009-06-05 18:31:02 +0200 | [diff] [blame] | 62 | INIT_CDEX(SPI, 0), |
| 63 | INIT_CDEX(OWM, 5000000), |
| 64 | INIT_CDEX(PWM0, 0), |
| 65 | INIT_CDEX(PWM1, 0), |
| 66 | INIT_CDEX(LED0, 0), |
| 67 | INIT_CDEX(LED1, 0), |
| 68 | INIT_CDEX(LED2, 0), |
| 69 | INIT_CDEX(SD_HOST, 24576000), |
| 70 | INIT_CDEX(SD_BUS, 12288000), |
| 71 | INIT_CDEX(SMBUS, 0), |
| 72 | INIT_CDEX(EX0, 32768), |
| 73 | INIT_CDEX(EX1, 24576000), |
| 74 | }; |
| 75 | |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 76 | struct asic3 { |
| 77 | void __iomem *mapping; |
| 78 | unsigned int bus_shift; |
| 79 | unsigned int irq_nr; |
| 80 | unsigned int irq_base; |
| 81 | spinlock_t lock; |
| 82 | u16 irq_bothedge[4]; |
| 83 | struct gpio_chip gpio; |
| 84 | struct device *dev; |
Ian Molton | 64e8867 | 2010-01-06 13:51:48 +0100 | [diff] [blame] | 85 | void __iomem *tmio_cnf; |
Philipp Zabel | e956a2a | 2009-06-05 18:31:02 +0200 | [diff] [blame] | 86 | |
| 87 | struct asic3_clk clocks[ARRAY_SIZE(asic3_clk_init)]; |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 88 | }; |
| 89 | |
| 90 | static int asic3_gpio_get(struct gpio_chip *chip, unsigned offset); |
| 91 | |
Paul Parsons | 13ca4f6 | 2011-05-13 18:53:03 +0000 | [diff] [blame] | 92 | void asic3_write_register(struct asic3 *asic, unsigned int reg, u32 value) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 93 | { |
Al Viro | b32661e | 2008-03-29 03:10:58 +0000 | [diff] [blame] | 94 | iowrite16(value, asic->mapping + |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 95 | (reg >> asic->bus_shift)); |
| 96 | } |
Paul Parsons | 13ca4f6 | 2011-05-13 18:53:03 +0000 | [diff] [blame] | 97 | EXPORT_SYMBOL_GPL(asic3_write_register); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 98 | |
Paul Parsons | 13ca4f6 | 2011-05-13 18:53:03 +0000 | [diff] [blame] | 99 | u32 asic3_read_register(struct asic3 *asic, unsigned int reg) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 100 | { |
Al Viro | b32661e | 2008-03-29 03:10:58 +0000 | [diff] [blame] | 101 | return ioread16(asic->mapping + |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 102 | (reg >> asic->bus_shift)); |
| 103 | } |
Paul Parsons | 13ca4f6 | 2011-05-13 18:53:03 +0000 | [diff] [blame] | 104 | EXPORT_SYMBOL_GPL(asic3_read_register); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 105 | |
Mark Brown | 59f2ad2 | 2010-12-11 12:59:35 +0000 | [diff] [blame] | 106 | static void asic3_set_register(struct asic3 *asic, u32 reg, u32 bits, bool set) |
Philipp Zabel | 6483c1b | 2009-06-05 18:31:01 +0200 | [diff] [blame] | 107 | { |
| 108 | unsigned long flags; |
| 109 | u32 val; |
| 110 | |
| 111 | spin_lock_irqsave(&asic->lock, flags); |
| 112 | val = asic3_read_register(asic, reg); |
| 113 | if (set) |
| 114 | val |= bits; |
| 115 | else |
| 116 | val &= ~bits; |
| 117 | asic3_write_register(asic, reg, val); |
| 118 | spin_unlock_irqrestore(&asic->lock, flags); |
| 119 | } |
| 120 | |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 121 | /* IRQs */ |
| 122 | #define MAX_ASIC_ISR_LOOPS 20 |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 123 | #define ASIC3_GPIO_BASE_INCR \ |
| 124 | (ASIC3_GPIO_B_BASE - ASIC3_GPIO_A_BASE) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 125 | |
| 126 | static void asic3_irq_flip_edge(struct asic3 *asic, |
| 127 | u32 base, int bit) |
| 128 | { |
| 129 | u16 edge; |
| 130 | unsigned long flags; |
| 131 | |
| 132 | spin_lock_irqsave(&asic->lock, flags); |
| 133 | edge = asic3_read_register(asic, |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 134 | base + ASIC3_GPIO_EDGE_TRIGGER); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 135 | edge ^= bit; |
| 136 | asic3_write_register(asic, |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 137 | base + ASIC3_GPIO_EDGE_TRIGGER, edge); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 138 | spin_unlock_irqrestore(&asic->lock, flags); |
| 139 | } |
| 140 | |
Thomas Gleixner | bd0b9ac | 2015-09-14 10:42:37 +0200 | [diff] [blame] | 141 | static void asic3_irq_demux(struct irq_desc *desc) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 142 | { |
Thomas Gleixner | 52a7d607 | 2011-03-25 11:12:26 +0000 | [diff] [blame] | 143 | struct asic3 *asic = irq_desc_get_handler_data(desc); |
| 144 | struct irq_data *data = irq_desc_get_irq_data(desc); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 145 | int iter, i; |
| 146 | unsigned long flags; |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 147 | |
Axel Lin | a09aee8 | 2011-04-14 22:43:47 +0800 | [diff] [blame] | 148 | data->chip->irq_ack(data); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 149 | |
| 150 | for (iter = 0 ; iter < MAX_ASIC_ISR_LOOPS; iter++) { |
| 151 | u32 status; |
| 152 | int bank; |
| 153 | |
| 154 | spin_lock_irqsave(&asic->lock, flags); |
| 155 | status = asic3_read_register(asic, |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 156 | ASIC3_OFFSET(INTR, P_INT_STAT)); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 157 | spin_unlock_irqrestore(&asic->lock, flags); |
| 158 | |
| 159 | /* Check all ten register bits */ |
| 160 | if ((status & 0x3ff) == 0) |
| 161 | break; |
| 162 | |
| 163 | /* Handle GPIO IRQs */ |
| 164 | for (bank = 0; bank < ASIC3_NUM_GPIO_BANKS; bank++) { |
| 165 | if (status & (1 << bank)) { |
| 166 | unsigned long base, istat; |
| 167 | |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 168 | base = ASIC3_GPIO_A_BASE |
| 169 | + bank * ASIC3_GPIO_BASE_INCR; |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 170 | spin_lock_irqsave(&asic->lock, flags); |
| 171 | istat = asic3_read_register(asic, |
| 172 | base + |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 173 | ASIC3_GPIO_INT_STATUS); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 174 | /* Clearing IntStatus */ |
| 175 | asic3_write_register(asic, |
| 176 | base + |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 177 | ASIC3_GPIO_INT_STATUS, 0); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 178 | spin_unlock_irqrestore(&asic->lock, flags); |
| 179 | |
| 180 | for (i = 0; i < ASIC3_GPIOS_PER_BANK; i++) { |
| 181 | int bit = (1 << i); |
| 182 | unsigned int irqnr; |
| 183 | |
| 184 | if (!(istat & bit)) |
| 185 | continue; |
| 186 | |
| 187 | irqnr = asic->irq_base + |
| 188 | (ASIC3_GPIOS_PER_BANK * bank) |
| 189 | + i; |
Thomas Gleixner | 52a7d607 | 2011-03-25 11:12:26 +0000 | [diff] [blame] | 190 | generic_handle_irq(irqnr); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 191 | if (asic->irq_bothedge[bank] & bit) |
| 192 | asic3_irq_flip_edge(asic, base, |
| 193 | bit); |
| 194 | } |
| 195 | } |
| 196 | } |
| 197 | |
| 198 | /* Handle remaining IRQs in the status register */ |
| 199 | for (i = ASIC3_NUM_GPIOS; i < ASIC3_NR_IRQS; i++) { |
| 200 | /* They start at bit 4 and go up */ |
Thomas Gleixner | 52a7d607 | 2011-03-25 11:12:26 +0000 | [diff] [blame] | 201 | if (status & (1 << (i - ASIC3_NUM_GPIOS + 4))) |
| 202 | generic_handle_irq(asic->irq_base + i); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 203 | } |
| 204 | } |
| 205 | |
| 206 | if (iter >= MAX_ASIC_ISR_LOOPS) |
Samuel Ortiz | 24f4f2e | 2008-06-20 11:11:19 +0200 | [diff] [blame] | 207 | dev_err(asic->dev, "interrupt processing overrun\n"); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 208 | } |
| 209 | |
| 210 | static inline int asic3_irq_to_bank(struct asic3 *asic, int irq) |
| 211 | { |
| 212 | int n; |
| 213 | |
| 214 | n = (irq - asic->irq_base) >> 4; |
| 215 | |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 216 | return (n * (ASIC3_GPIO_B_BASE - ASIC3_GPIO_A_BASE)); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 217 | } |
| 218 | |
| 219 | static inline int asic3_irq_to_index(struct asic3 *asic, int irq) |
| 220 | { |
| 221 | return (irq - asic->irq_base) & 0xf; |
| 222 | } |
| 223 | |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 224 | static void asic3_mask_gpio_irq(struct irq_data *data) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 225 | { |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 226 | struct asic3 *asic = irq_data_get_irq_chip_data(data); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 227 | u32 val, bank, index; |
| 228 | unsigned long flags; |
| 229 | |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 230 | bank = asic3_irq_to_bank(asic, data->irq); |
| 231 | index = asic3_irq_to_index(asic, data->irq); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 232 | |
| 233 | spin_lock_irqsave(&asic->lock, flags); |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 234 | val = asic3_read_register(asic, bank + ASIC3_GPIO_MASK); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 235 | val |= 1 << index; |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 236 | asic3_write_register(asic, bank + ASIC3_GPIO_MASK, val); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 237 | spin_unlock_irqrestore(&asic->lock, flags); |
| 238 | } |
| 239 | |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 240 | static void asic3_mask_irq(struct irq_data *data) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 241 | { |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 242 | struct asic3 *asic = irq_data_get_irq_chip_data(data); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 243 | int regval; |
| 244 | unsigned long flags; |
| 245 | |
| 246 | spin_lock_irqsave(&asic->lock, flags); |
| 247 | regval = asic3_read_register(asic, |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 248 | ASIC3_INTR_BASE + |
| 249 | ASIC3_INTR_INT_MASK); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 250 | |
| 251 | regval &= ~(ASIC3_INTMASK_MASK0 << |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 252 | (data->irq - (asic->irq_base + ASIC3_NUM_GPIOS))); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 253 | |
| 254 | asic3_write_register(asic, |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 255 | ASIC3_INTR_BASE + |
| 256 | ASIC3_INTR_INT_MASK, |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 257 | regval); |
| 258 | spin_unlock_irqrestore(&asic->lock, flags); |
| 259 | } |
| 260 | |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 261 | static void asic3_unmask_gpio_irq(struct irq_data *data) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 262 | { |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 263 | struct asic3 *asic = irq_data_get_irq_chip_data(data); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 264 | u32 val, bank, index; |
| 265 | unsigned long flags; |
| 266 | |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 267 | bank = asic3_irq_to_bank(asic, data->irq); |
| 268 | index = asic3_irq_to_index(asic, data->irq); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 269 | |
| 270 | spin_lock_irqsave(&asic->lock, flags); |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 271 | val = asic3_read_register(asic, bank + ASIC3_GPIO_MASK); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 272 | val &= ~(1 << index); |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 273 | asic3_write_register(asic, bank + ASIC3_GPIO_MASK, val); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 274 | spin_unlock_irqrestore(&asic->lock, flags); |
| 275 | } |
| 276 | |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 277 | static void asic3_unmask_irq(struct irq_data *data) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 278 | { |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 279 | struct asic3 *asic = irq_data_get_irq_chip_data(data); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 280 | int regval; |
| 281 | unsigned long flags; |
| 282 | |
| 283 | spin_lock_irqsave(&asic->lock, flags); |
| 284 | regval = asic3_read_register(asic, |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 285 | ASIC3_INTR_BASE + |
| 286 | ASIC3_INTR_INT_MASK); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 287 | |
| 288 | regval |= (ASIC3_INTMASK_MASK0 << |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 289 | (data->irq - (asic->irq_base + ASIC3_NUM_GPIOS))); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 290 | |
| 291 | asic3_write_register(asic, |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 292 | ASIC3_INTR_BASE + |
| 293 | ASIC3_INTR_INT_MASK, |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 294 | regval); |
| 295 | spin_unlock_irqrestore(&asic->lock, flags); |
| 296 | } |
| 297 | |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 298 | static int asic3_gpio_irq_type(struct irq_data *data, unsigned int type) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 299 | { |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 300 | struct asic3 *asic = irq_data_get_irq_chip_data(data); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 301 | u32 bank, index; |
| 302 | u16 trigger, level, edge, bit; |
| 303 | unsigned long flags; |
| 304 | |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 305 | bank = asic3_irq_to_bank(asic, data->irq); |
| 306 | index = asic3_irq_to_index(asic, data->irq); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 307 | bit = 1<<index; |
| 308 | |
| 309 | spin_lock_irqsave(&asic->lock, flags); |
| 310 | level = asic3_read_register(asic, |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 311 | bank + ASIC3_GPIO_LEVEL_TRIGGER); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 312 | edge = asic3_read_register(asic, |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 313 | bank + ASIC3_GPIO_EDGE_TRIGGER); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 314 | trigger = asic3_read_register(asic, |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 315 | bank + ASIC3_GPIO_TRIGGER_TYPE); |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 316 | asic->irq_bothedge[(data->irq - asic->irq_base) >> 4] &= ~bit; |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 317 | |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 318 | if (type == IRQ_TYPE_EDGE_RISING) { |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 319 | trigger |= bit; |
| 320 | edge |= bit; |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 321 | } else if (type == IRQ_TYPE_EDGE_FALLING) { |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 322 | trigger |= bit; |
| 323 | edge &= ~bit; |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 324 | } else if (type == IRQ_TYPE_EDGE_BOTH) { |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 325 | trigger |= bit; |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 326 | if (asic3_gpio_get(&asic->gpio, data->irq - asic->irq_base)) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 327 | edge &= ~bit; |
| 328 | else |
| 329 | edge |= bit; |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 330 | asic->irq_bothedge[(data->irq - asic->irq_base) >> 4] |= bit; |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 331 | } else if (type == IRQ_TYPE_LEVEL_LOW) { |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 332 | trigger &= ~bit; |
| 333 | level &= ~bit; |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 334 | } else if (type == IRQ_TYPE_LEVEL_HIGH) { |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 335 | trigger &= ~bit; |
| 336 | level |= bit; |
| 337 | } else { |
| 338 | /* |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 339 | * if type == IRQ_TYPE_NONE, we should mask interrupts, but |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 340 | * be careful to not unmask them if mask was also called. |
| 341 | * Probably need internal state for mask. |
| 342 | */ |
Samuel Ortiz | 24f4f2e | 2008-06-20 11:11:19 +0200 | [diff] [blame] | 343 | dev_notice(asic->dev, "irq type not changed\n"); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 344 | } |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 345 | asic3_write_register(asic, bank + ASIC3_GPIO_LEVEL_TRIGGER, |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 346 | level); |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 347 | asic3_write_register(asic, bank + ASIC3_GPIO_EDGE_TRIGGER, |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 348 | edge); |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 349 | asic3_write_register(asic, bank + ASIC3_GPIO_TRIGGER_TYPE, |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 350 | trigger); |
| 351 | spin_unlock_irqrestore(&asic->lock, flags); |
| 352 | return 0; |
| 353 | } |
| 354 | |
Paul Parsons | 2fe372f | 2012-04-11 00:35:34 +0100 | [diff] [blame] | 355 | static int asic3_gpio_irq_set_wake(struct irq_data *data, unsigned int on) |
| 356 | { |
| 357 | struct asic3 *asic = irq_data_get_irq_chip_data(data); |
| 358 | u32 bank, index; |
| 359 | u16 bit; |
| 360 | |
| 361 | bank = asic3_irq_to_bank(asic, data->irq); |
| 362 | index = asic3_irq_to_index(asic, data->irq); |
| 363 | bit = 1<<index; |
| 364 | |
| 365 | asic3_set_register(asic, bank + ASIC3_GPIO_SLEEP_MASK, bit, !on); |
| 366 | |
| 367 | return 0; |
| 368 | } |
| 369 | |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 370 | static struct irq_chip asic3_gpio_irq_chip = { |
| 371 | .name = "ASIC3-GPIO", |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 372 | .irq_ack = asic3_mask_gpio_irq, |
| 373 | .irq_mask = asic3_mask_gpio_irq, |
| 374 | .irq_unmask = asic3_unmask_gpio_irq, |
| 375 | .irq_set_type = asic3_gpio_irq_type, |
Paul Parsons | 2fe372f | 2012-04-11 00:35:34 +0100 | [diff] [blame] | 376 | .irq_set_wake = asic3_gpio_irq_set_wake, |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 377 | }; |
| 378 | |
| 379 | static struct irq_chip asic3_irq_chip = { |
| 380 | .name = "ASIC3", |
Mark Brown | 0f76aae | 2010-12-11 13:08:57 +0000 | [diff] [blame] | 381 | .irq_ack = asic3_mask_irq, |
| 382 | .irq_mask = asic3_mask_irq, |
| 383 | .irq_unmask = asic3_unmask_irq, |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 384 | }; |
| 385 | |
Philipp Zabel | 065032f | 2008-06-21 00:51:38 +0200 | [diff] [blame] | 386 | static int __init asic3_irq_probe(struct platform_device *pdev) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 387 | { |
| 388 | struct asic3 *asic = platform_get_drvdata(pdev); |
| 389 | unsigned long clksel = 0; |
| 390 | unsigned int irq, irq_base; |
Roel Kluin | c491b2f | 2008-07-25 19:44:41 -0700 | [diff] [blame] | 391 | int ret; |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 392 | |
Roel Kluin | c491b2f | 2008-07-25 19:44:41 -0700 | [diff] [blame] | 393 | ret = platform_get_irq(pdev, 0); |
| 394 | if (ret < 0) |
| 395 | return ret; |
| 396 | asic->irq_nr = ret; |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 397 | |
| 398 | /* turn on clock to IRQ controller */ |
| 399 | clksel |= CLOCK_SEL_CX; |
| 400 | asic3_write_register(asic, ASIC3_OFFSET(CLOCK, SEL), |
| 401 | clksel); |
| 402 | |
| 403 | irq_base = asic->irq_base; |
| 404 | |
| 405 | for (irq = irq_base; irq < irq_base + ASIC3_NR_IRQS; irq++) { |
| 406 | if (irq < asic->irq_base + ASIC3_NUM_GPIOS) |
Thomas Gleixner | d5bb122 | 2011-03-25 11:12:32 +0000 | [diff] [blame] | 407 | irq_set_chip(irq, &asic3_gpio_irq_chip); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 408 | else |
Thomas Gleixner | d5bb122 | 2011-03-25 11:12:32 +0000 | [diff] [blame] | 409 | irq_set_chip(irq, &asic3_irq_chip); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 410 | |
Thomas Gleixner | d5bb122 | 2011-03-25 11:12:32 +0000 | [diff] [blame] | 411 | irq_set_chip_data(irq, asic); |
| 412 | irq_set_handler(irq, handle_level_irq); |
Rob Herring | 9bd09f3 | 2015-07-27 15:55:20 -0500 | [diff] [blame] | 413 | irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 414 | } |
| 415 | |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 416 | asic3_write_register(asic, ASIC3_OFFSET(INTR, INT_MASK), |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 417 | ASIC3_INTMASK_GINTMASK); |
| 418 | |
Thomas Gleixner | c30e304 | 2015-06-21 20:16:06 +0200 | [diff] [blame] | 419 | irq_set_chained_handler_and_data(asic->irq_nr, asic3_irq_demux, asic); |
Thomas Gleixner | d5bb122 | 2011-03-25 11:12:32 +0000 | [diff] [blame] | 420 | irq_set_irq_type(asic->irq_nr, IRQ_TYPE_EDGE_RISING); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 421 | |
| 422 | return 0; |
| 423 | } |
| 424 | |
| 425 | static void asic3_irq_remove(struct platform_device *pdev) |
| 426 | { |
| 427 | struct asic3 *asic = platform_get_drvdata(pdev); |
| 428 | unsigned int irq, irq_base; |
| 429 | |
| 430 | irq_base = asic->irq_base; |
| 431 | |
| 432 | for (irq = irq_base; irq < irq_base + ASIC3_NR_IRQS; irq++) { |
Rob Herring | 9bd09f3 | 2015-07-27 15:55:20 -0500 | [diff] [blame] | 433 | irq_set_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE); |
Thomas Gleixner | d6f7ce9f | 2011-03-25 11:12:35 +0000 | [diff] [blame] | 434 | irq_set_chip_and_handler(irq, NULL, NULL); |
Thomas Gleixner | d5bb122 | 2011-03-25 11:12:32 +0000 | [diff] [blame] | 435 | irq_set_chip_data(irq, NULL); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 436 | } |
Thomas Gleixner | d5bb122 | 2011-03-25 11:12:32 +0000 | [diff] [blame] | 437 | irq_set_chained_handler(asic->irq_nr, NULL); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 438 | } |
| 439 | |
| 440 | /* GPIOs */ |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 441 | static int asic3_gpio_direction(struct gpio_chip *chip, |
| 442 | unsigned offset, int out) |
| 443 | { |
| 444 | u32 mask = ASIC3_GPIO_TO_MASK(offset), out_reg; |
| 445 | unsigned int gpio_base; |
| 446 | unsigned long flags; |
| 447 | struct asic3 *asic; |
| 448 | |
| 449 | asic = container_of(chip, struct asic3, gpio); |
| 450 | gpio_base = ASIC3_GPIO_TO_BASE(offset); |
| 451 | |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 452 | if (gpio_base > ASIC3_GPIO_D_BASE) { |
Samuel Ortiz | 24f4f2e | 2008-06-20 11:11:19 +0200 | [diff] [blame] | 453 | dev_err(asic->dev, "Invalid base (0x%x) for gpio %d\n", |
| 454 | gpio_base, offset); |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 455 | return -EINVAL; |
| 456 | } |
| 457 | |
| 458 | spin_lock_irqsave(&asic->lock, flags); |
| 459 | |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 460 | out_reg = asic3_read_register(asic, gpio_base + ASIC3_GPIO_DIRECTION); |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 461 | |
| 462 | /* Input is 0, Output is 1 */ |
| 463 | if (out) |
| 464 | out_reg |= mask; |
| 465 | else |
| 466 | out_reg &= ~mask; |
| 467 | |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 468 | asic3_write_register(asic, gpio_base + ASIC3_GPIO_DIRECTION, out_reg); |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 469 | |
| 470 | spin_unlock_irqrestore(&asic->lock, flags); |
| 471 | |
| 472 | return 0; |
| 473 | |
| 474 | } |
| 475 | |
| 476 | static int asic3_gpio_direction_input(struct gpio_chip *chip, |
| 477 | unsigned offset) |
| 478 | { |
| 479 | return asic3_gpio_direction(chip, offset, 0); |
| 480 | } |
| 481 | |
| 482 | static int asic3_gpio_direction_output(struct gpio_chip *chip, |
| 483 | unsigned offset, int value) |
| 484 | { |
| 485 | return asic3_gpio_direction(chip, offset, 1); |
| 486 | } |
| 487 | |
| 488 | static int asic3_gpio_get(struct gpio_chip *chip, |
| 489 | unsigned offset) |
| 490 | { |
| 491 | unsigned int gpio_base; |
| 492 | u32 mask = ASIC3_GPIO_TO_MASK(offset); |
| 493 | struct asic3 *asic; |
| 494 | |
| 495 | asic = container_of(chip, struct asic3, gpio); |
| 496 | gpio_base = ASIC3_GPIO_TO_BASE(offset); |
| 497 | |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 498 | if (gpio_base > ASIC3_GPIO_D_BASE) { |
Samuel Ortiz | 24f4f2e | 2008-06-20 11:11:19 +0200 | [diff] [blame] | 499 | dev_err(asic->dev, "Invalid base (0x%x) for gpio %d\n", |
| 500 | gpio_base, offset); |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 501 | return -EINVAL; |
| 502 | } |
| 503 | |
Linus Walleij | f8e3a51 | 2015-12-22 15:47:05 +0100 | [diff] [blame] | 504 | return !!(asic3_read_register(asic, |
| 505 | gpio_base + ASIC3_GPIO_STATUS) & mask); |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 506 | } |
| 507 | |
| 508 | static void asic3_gpio_set(struct gpio_chip *chip, |
| 509 | unsigned offset, int value) |
| 510 | { |
| 511 | u32 mask, out_reg; |
| 512 | unsigned int gpio_base; |
| 513 | unsigned long flags; |
| 514 | struct asic3 *asic; |
| 515 | |
| 516 | asic = container_of(chip, struct asic3, gpio); |
| 517 | gpio_base = ASIC3_GPIO_TO_BASE(offset); |
| 518 | |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 519 | if (gpio_base > ASIC3_GPIO_D_BASE) { |
Samuel Ortiz | 24f4f2e | 2008-06-20 11:11:19 +0200 | [diff] [blame] | 520 | dev_err(asic->dev, "Invalid base (0x%x) for gpio %d\n", |
| 521 | gpio_base, offset); |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 522 | return; |
| 523 | } |
| 524 | |
| 525 | mask = ASIC3_GPIO_TO_MASK(offset); |
| 526 | |
| 527 | spin_lock_irqsave(&asic->lock, flags); |
| 528 | |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 529 | out_reg = asic3_read_register(asic, gpio_base + ASIC3_GPIO_OUT); |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 530 | |
| 531 | if (value) |
| 532 | out_reg |= mask; |
| 533 | else |
| 534 | out_reg &= ~mask; |
| 535 | |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 536 | asic3_write_register(asic, gpio_base + ASIC3_GPIO_OUT, out_reg); |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 537 | |
| 538 | spin_unlock_irqrestore(&asic->lock, flags); |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 539 | } |
| 540 | |
Paul Parsons | 450b115 | 2012-01-31 01:18:35 +0000 | [diff] [blame] | 541 | static int asic3_gpio_to_irq(struct gpio_chip *chip, unsigned offset) |
| 542 | { |
Dmitry Artamonow | 02269ab | 2012-04-12 15:33:34 +0400 | [diff] [blame] | 543 | struct asic3 *asic = container_of(chip, struct asic3, gpio); |
| 544 | |
Samuel Ortiz | 12693f6 | 2012-04-16 21:28:29 +0200 | [diff] [blame] | 545 | return asic->irq_base + offset; |
Paul Parsons | 450b115 | 2012-01-31 01:18:35 +0000 | [diff] [blame] | 546 | } |
| 547 | |
Philipp Zabel | 065032f | 2008-06-21 00:51:38 +0200 | [diff] [blame] | 548 | static __init int asic3_gpio_probe(struct platform_device *pdev, |
| 549 | u16 *gpio_config, int num) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 550 | { |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 551 | struct asic3 *asic = platform_get_drvdata(pdev); |
Samuel Ortiz | 3b26bf1 | 2008-06-20 11:09:51 +0200 | [diff] [blame] | 552 | u16 alt_reg[ASIC3_NUM_GPIO_BANKS]; |
| 553 | u16 out_reg[ASIC3_NUM_GPIO_BANKS]; |
| 554 | u16 dir_reg[ASIC3_NUM_GPIO_BANKS]; |
| 555 | int i; |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 556 | |
Russell King | 59f0cb0 | 2008-10-27 11:24:09 +0000 | [diff] [blame] | 557 | memset(alt_reg, 0, ASIC3_NUM_GPIO_BANKS * sizeof(u16)); |
| 558 | memset(out_reg, 0, ASIC3_NUM_GPIO_BANKS * sizeof(u16)); |
| 559 | memset(dir_reg, 0, ASIC3_NUM_GPIO_BANKS * sizeof(u16)); |
Samuel Ortiz | 3b26bf1 | 2008-06-20 11:09:51 +0200 | [diff] [blame] | 560 | |
| 561 | /* Enable all GPIOs */ |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 562 | asic3_write_register(asic, ASIC3_GPIO_OFFSET(A, MASK), 0xffff); |
| 563 | asic3_write_register(asic, ASIC3_GPIO_OFFSET(B, MASK), 0xffff); |
| 564 | asic3_write_register(asic, ASIC3_GPIO_OFFSET(C, MASK), 0xffff); |
| 565 | asic3_write_register(asic, ASIC3_GPIO_OFFSET(D, MASK), 0xffff); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 566 | |
Samuel Ortiz | 3b26bf1 | 2008-06-20 11:09:51 +0200 | [diff] [blame] | 567 | for (i = 0; i < num; i++) { |
| 568 | u8 alt, pin, dir, init, bank_num, bit_num; |
| 569 | u16 config = gpio_config[i]; |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 570 | |
Samuel Ortiz | 3b26bf1 | 2008-06-20 11:09:51 +0200 | [diff] [blame] | 571 | pin = ASIC3_CONFIG_GPIO_PIN(config); |
| 572 | alt = ASIC3_CONFIG_GPIO_ALT(config); |
| 573 | dir = ASIC3_CONFIG_GPIO_DIR(config); |
| 574 | init = ASIC3_CONFIG_GPIO_INIT(config); |
| 575 | |
| 576 | bank_num = ASIC3_GPIO_TO_BANK(pin); |
| 577 | bit_num = ASIC3_GPIO_TO_BIT(pin); |
| 578 | |
| 579 | alt_reg[bank_num] |= (alt << bit_num); |
| 580 | out_reg[bank_num] |= (init << bit_num); |
| 581 | dir_reg[bank_num] |= (dir << bit_num); |
| 582 | } |
| 583 | |
| 584 | for (i = 0; i < ASIC3_NUM_GPIO_BANKS; i++) { |
| 585 | asic3_write_register(asic, |
| 586 | ASIC3_BANK_TO_BASE(i) + |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 587 | ASIC3_GPIO_DIRECTION, |
Samuel Ortiz | 3b26bf1 | 2008-06-20 11:09:51 +0200 | [diff] [blame] | 588 | dir_reg[i]); |
| 589 | asic3_write_register(asic, |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 590 | ASIC3_BANK_TO_BASE(i) + ASIC3_GPIO_OUT, |
Samuel Ortiz | 3b26bf1 | 2008-06-20 11:09:51 +0200 | [diff] [blame] | 591 | out_reg[i]); |
| 592 | asic3_write_register(asic, |
| 593 | ASIC3_BANK_TO_BASE(i) + |
Samuel Ortiz | 3b8139f | 2008-06-20 11:12:21 +0200 | [diff] [blame] | 594 | ASIC3_GPIO_ALT_FUNCTION, |
Samuel Ortiz | 3b26bf1 | 2008-06-20 11:09:51 +0200 | [diff] [blame] | 595 | alt_reg[i]); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 596 | } |
| 597 | |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 598 | return gpiochip_add(&asic->gpio); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 599 | } |
| 600 | |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 601 | static int asic3_gpio_remove(struct platform_device *pdev) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 602 | { |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 603 | struct asic3 *asic = platform_get_drvdata(pdev); |
| 604 | |
abdoulaye berthe | 88d5e52 | 2014-07-12 22:30:14 +0200 | [diff] [blame] | 605 | gpiochip_remove(&asic->gpio); |
| 606 | return 0; |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 607 | } |
| 608 | |
Paul Parsons | c29a812 | 2011-08-09 16:27:43 +0000 | [diff] [blame] | 609 | static void asic3_clk_enable(struct asic3 *asic, struct asic3_clk *clk) |
Philipp Zabel | e956a2a | 2009-06-05 18:31:02 +0200 | [diff] [blame] | 610 | { |
| 611 | unsigned long flags; |
| 612 | u32 cdex; |
| 613 | |
| 614 | spin_lock_irqsave(&asic->lock, flags); |
| 615 | if (clk->enabled++ == 0) { |
| 616 | cdex = asic3_read_register(asic, ASIC3_OFFSET(CLOCK, CDEX)); |
| 617 | cdex |= clk->cdex; |
| 618 | asic3_write_register(asic, ASIC3_OFFSET(CLOCK, CDEX), cdex); |
| 619 | } |
| 620 | spin_unlock_irqrestore(&asic->lock, flags); |
Philipp Zabel | e956a2a | 2009-06-05 18:31:02 +0200 | [diff] [blame] | 621 | } |
| 622 | |
| 623 | static void asic3_clk_disable(struct asic3 *asic, struct asic3_clk *clk) |
| 624 | { |
| 625 | unsigned long flags; |
| 626 | u32 cdex; |
| 627 | |
| 628 | WARN_ON(clk->enabled == 0); |
| 629 | |
| 630 | spin_lock_irqsave(&asic->lock, flags); |
| 631 | if (--clk->enabled == 0) { |
| 632 | cdex = asic3_read_register(asic, ASIC3_OFFSET(CLOCK, CDEX)); |
| 633 | cdex &= ~clk->cdex; |
| 634 | asic3_write_register(asic, ASIC3_OFFSET(CLOCK, CDEX), cdex); |
| 635 | } |
| 636 | spin_unlock_irqrestore(&asic->lock, flags); |
| 637 | } |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 638 | |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 639 | /* MFD cells (SPI, PWM, LED, DS1WM, MMC) */ |
| 640 | static struct ds1wm_driver_data ds1wm_pdata = { |
| 641 | .active_high = 1, |
Jean-François Dagenais | f607e7f | 2011-07-08 15:39:44 -0700 | [diff] [blame] | 642 | .reset_recover_delay = 1, |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 643 | }; |
| 644 | |
| 645 | static struct resource ds1wm_resources[] = { |
| 646 | { |
| 647 | .start = ASIC3_OWM_BASE, |
| 648 | .end = ASIC3_OWM_BASE + 0x13, |
| 649 | .flags = IORESOURCE_MEM, |
| 650 | }, |
| 651 | { |
| 652 | .start = ASIC3_IRQ_OWM, |
Mark Brown | fe42142 | 2010-12-11 13:00:34 +0000 | [diff] [blame] | 653 | .end = ASIC3_IRQ_OWM, |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 654 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
| 655 | }, |
| 656 | }; |
| 657 | |
| 658 | static int ds1wm_enable(struct platform_device *pdev) |
| 659 | { |
| 660 | struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); |
| 661 | |
| 662 | /* Turn on external clocks and the OWM clock */ |
| 663 | asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_EX0]); |
| 664 | asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_EX1]); |
| 665 | asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_OWM]); |
Lee Jones | d43c429 | 2015-10-28 14:11:23 +0000 | [diff] [blame] | 666 | usleep_range(1000, 5000); |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 667 | |
| 668 | /* Reset and enable DS1WM */ |
| 669 | asic3_set_register(asic, ASIC3_OFFSET(EXTCF, RESET), |
| 670 | ASIC3_EXTCF_OWM_RESET, 1); |
Lee Jones | d43c429 | 2015-10-28 14:11:23 +0000 | [diff] [blame] | 671 | usleep_range(1000, 5000); |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 672 | asic3_set_register(asic, ASIC3_OFFSET(EXTCF, RESET), |
| 673 | ASIC3_EXTCF_OWM_RESET, 0); |
Lee Jones | d43c429 | 2015-10-28 14:11:23 +0000 | [diff] [blame] | 674 | usleep_range(1000, 5000); |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 675 | asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT), |
| 676 | ASIC3_EXTCF_OWM_EN, 1); |
Lee Jones | d43c429 | 2015-10-28 14:11:23 +0000 | [diff] [blame] | 677 | usleep_range(1000, 5000); |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 678 | |
| 679 | return 0; |
| 680 | } |
| 681 | |
| 682 | static int ds1wm_disable(struct platform_device *pdev) |
| 683 | { |
| 684 | struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); |
| 685 | |
| 686 | asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT), |
| 687 | ASIC3_EXTCF_OWM_EN, 0); |
| 688 | |
| 689 | asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_OWM]); |
| 690 | asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_EX0]); |
| 691 | asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_EX1]); |
| 692 | |
| 693 | return 0; |
| 694 | } |
| 695 | |
Geert Uytterhoeven | 5ac9855 | 2013-11-18 14:33:06 +0100 | [diff] [blame] | 696 | static const struct mfd_cell asic3_cell_ds1wm = { |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 697 | .name = "ds1wm", |
| 698 | .enable = ds1wm_enable, |
| 699 | .disable = ds1wm_disable, |
Samuel Ortiz | 121ea57 | 2011-04-06 11:41:03 +0200 | [diff] [blame] | 700 | .platform_data = &ds1wm_pdata, |
| 701 | .pdata_size = sizeof(ds1wm_pdata), |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 702 | .num_resources = ARRAY_SIZE(ds1wm_resources), |
| 703 | .resources = ds1wm_resources, |
| 704 | }; |
| 705 | |
Ian Molton | 64e8867 | 2010-01-06 13:51:48 +0100 | [diff] [blame] | 706 | static void asic3_mmc_pwr(struct platform_device *pdev, int state) |
| 707 | { |
| 708 | struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); |
| 709 | |
| 710 | tmio_core_mmc_pwr(asic->tmio_cnf, 1 - asic->bus_shift, state); |
| 711 | } |
| 712 | |
| 713 | static void asic3_mmc_clk_div(struct platform_device *pdev, int state) |
| 714 | { |
| 715 | struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); |
| 716 | |
| 717 | tmio_core_mmc_clk_div(asic->tmio_cnf, 1 - asic->bus_shift, state); |
| 718 | } |
| 719 | |
Philipp Zabel | 09f05ce | 2009-06-15 12:10:25 +0200 | [diff] [blame] | 720 | static struct tmio_mmc_data asic3_mmc_data = { |
Ian Molton | 64e8867 | 2010-01-06 13:51:48 +0100 | [diff] [blame] | 721 | .hclk = 24576000, |
| 722 | .set_pwr = asic3_mmc_pwr, |
| 723 | .set_clk_div = asic3_mmc_clk_div, |
Philipp Zabel | 09f05ce | 2009-06-15 12:10:25 +0200 | [diff] [blame] | 724 | }; |
| 725 | |
| 726 | static struct resource asic3_mmc_resources[] = { |
| 727 | { |
| 728 | .start = ASIC3_SD_CTRL_BASE, |
| 729 | .end = ASIC3_SD_CTRL_BASE + 0x3ff, |
| 730 | .flags = IORESOURCE_MEM, |
| 731 | }, |
| 732 | { |
Philipp Zabel | 09f05ce | 2009-06-15 12:10:25 +0200 | [diff] [blame] | 733 | .start = 0, |
| 734 | .end = 0, |
| 735 | .flags = IORESOURCE_IRQ, |
| 736 | }, |
| 737 | }; |
| 738 | |
| 739 | static int asic3_mmc_enable(struct platform_device *pdev) |
| 740 | { |
| 741 | struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); |
| 742 | |
| 743 | /* Not sure if it must be done bit by bit, but leaving as-is */ |
| 744 | asic3_set_register(asic, ASIC3_OFFSET(SDHWCTRL, SDCONF), |
| 745 | ASIC3_SDHWCTRL_LEVCD, 1); |
| 746 | asic3_set_register(asic, ASIC3_OFFSET(SDHWCTRL, SDCONF), |
| 747 | ASIC3_SDHWCTRL_LEVWP, 1); |
| 748 | asic3_set_register(asic, ASIC3_OFFSET(SDHWCTRL, SDCONF), |
| 749 | ASIC3_SDHWCTRL_SUSPEND, 0); |
| 750 | asic3_set_register(asic, ASIC3_OFFSET(SDHWCTRL, SDCONF), |
| 751 | ASIC3_SDHWCTRL_PCLR, 0); |
| 752 | |
| 753 | asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_EX0]); |
| 754 | /* CLK32 used for card detection and for interruption detection |
| 755 | * when HCLK is stopped. |
| 756 | */ |
| 757 | asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_EX1]); |
Lee Jones | d43c429 | 2015-10-28 14:11:23 +0000 | [diff] [blame] | 758 | usleep_range(1000, 5000); |
Philipp Zabel | 09f05ce | 2009-06-15 12:10:25 +0200 | [diff] [blame] | 759 | |
| 760 | /* HCLK 24.576 MHz, BCLK 12.288 MHz: */ |
| 761 | asic3_write_register(asic, ASIC3_OFFSET(CLOCK, SEL), |
| 762 | CLOCK_SEL_CX | CLOCK_SEL_SD_HCLK_SEL); |
| 763 | |
| 764 | asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_SD_HOST]); |
| 765 | asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_SD_BUS]); |
Lee Jones | d43c429 | 2015-10-28 14:11:23 +0000 | [diff] [blame] | 766 | usleep_range(1000, 5000); |
Philipp Zabel | 09f05ce | 2009-06-15 12:10:25 +0200 | [diff] [blame] | 767 | |
| 768 | asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT), |
| 769 | ASIC3_EXTCF_SD_MEM_ENABLE, 1); |
| 770 | |
| 771 | /* Enable SD card slot 3.3V power supply */ |
| 772 | asic3_set_register(asic, ASIC3_OFFSET(SDHWCTRL, SDCONF), |
| 773 | ASIC3_SDHWCTRL_SDPWR, 1); |
| 774 | |
Ian Molton | 64e8867 | 2010-01-06 13:51:48 +0100 | [diff] [blame] | 775 | /* ASIC3_SD_CTRL_BASE assumes 32-bit addressing, TMIO is 16-bit */ |
| 776 | tmio_core_mmc_enable(asic->tmio_cnf, 1 - asic->bus_shift, |
| 777 | ASIC3_SD_CTRL_BASE >> 1); |
| 778 | |
Philipp Zabel | 09f05ce | 2009-06-15 12:10:25 +0200 | [diff] [blame] | 779 | return 0; |
| 780 | } |
| 781 | |
| 782 | static int asic3_mmc_disable(struct platform_device *pdev) |
| 783 | { |
| 784 | struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); |
| 785 | |
| 786 | /* Put in suspend mode */ |
| 787 | asic3_set_register(asic, ASIC3_OFFSET(SDHWCTRL, SDCONF), |
| 788 | ASIC3_SDHWCTRL_SUSPEND, 1); |
| 789 | |
| 790 | /* Disable clocks */ |
| 791 | asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_SD_HOST]); |
| 792 | asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_SD_BUS]); |
| 793 | asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_EX0]); |
| 794 | asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_EX1]); |
| 795 | return 0; |
| 796 | } |
| 797 | |
Geert Uytterhoeven | 5ac9855 | 2013-11-18 14:33:06 +0100 | [diff] [blame] | 798 | static const struct mfd_cell asic3_cell_mmc = { |
Philipp Zabel | 09f05ce | 2009-06-15 12:10:25 +0200 | [diff] [blame] | 799 | .name = "tmio-mmc", |
| 800 | .enable = asic3_mmc_enable, |
| 801 | .disable = asic3_mmc_disable, |
Paul Parsons | 3c6e365 | 2011-08-09 16:27:24 +0000 | [diff] [blame] | 802 | .suspend = asic3_mmc_disable, |
| 803 | .resume = asic3_mmc_enable, |
Samuel Ortiz | ec71974 | 2011-04-06 11:38:14 +0200 | [diff] [blame] | 804 | .platform_data = &asic3_mmc_data, |
| 805 | .pdata_size = sizeof(asic3_mmc_data), |
Philipp Zabel | 09f05ce | 2009-06-15 12:10:25 +0200 | [diff] [blame] | 806 | .num_resources = ARRAY_SIZE(asic3_mmc_resources), |
| 807 | .resources = asic3_mmc_resources, |
| 808 | }; |
| 809 | |
Paul Parsons | 13ca4f6 | 2011-05-13 18:53:03 +0000 | [diff] [blame] | 810 | static const int clock_ledn[ASIC3_NUM_LEDS] = { |
| 811 | [0] = ASIC3_CLOCK_LED0, |
| 812 | [1] = ASIC3_CLOCK_LED1, |
| 813 | [2] = ASIC3_CLOCK_LED2, |
| 814 | }; |
| 815 | |
| 816 | static int asic3_leds_enable(struct platform_device *pdev) |
| 817 | { |
| 818 | const struct mfd_cell *cell = mfd_get_cell(pdev); |
| 819 | struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); |
| 820 | |
| 821 | asic3_clk_enable(asic, &asic->clocks[clock_ledn[cell->id]]); |
| 822 | |
| 823 | return 0; |
| 824 | } |
| 825 | |
| 826 | static int asic3_leds_disable(struct platform_device *pdev) |
| 827 | { |
| 828 | const struct mfd_cell *cell = mfd_get_cell(pdev); |
| 829 | struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); |
| 830 | |
| 831 | asic3_clk_disable(asic, &asic->clocks[clock_ledn[cell->id]]); |
| 832 | |
| 833 | return 0; |
| 834 | } |
| 835 | |
Paul Parsons | e0b13b5 | 2011-08-09 16:27:33 +0000 | [diff] [blame] | 836 | static int asic3_leds_suspend(struct platform_device *pdev) |
| 837 | { |
| 838 | const struct mfd_cell *cell = mfd_get_cell(pdev); |
| 839 | struct asic3 *asic = dev_get_drvdata(pdev->dev.parent); |
| 840 | |
| 841 | while (asic3_gpio_get(&asic->gpio, ASIC3_GPIO(C, cell->id)) != 0) |
Lee Jones | d43c429 | 2015-10-28 14:11:23 +0000 | [diff] [blame] | 842 | usleep_range(1000, 5000); |
Paul Parsons | e0b13b5 | 2011-08-09 16:27:33 +0000 | [diff] [blame] | 843 | |
| 844 | asic3_clk_disable(asic, &asic->clocks[clock_ledn[cell->id]]); |
| 845 | |
| 846 | return 0; |
| 847 | } |
| 848 | |
Paul Parsons | 13ca4f6 | 2011-05-13 18:53:03 +0000 | [diff] [blame] | 849 | static struct mfd_cell asic3_cell_leds[ASIC3_NUM_LEDS] = { |
| 850 | [0] = { |
| 851 | .name = "leds-asic3", |
| 852 | .id = 0, |
| 853 | .enable = asic3_leds_enable, |
| 854 | .disable = asic3_leds_disable, |
Paul Parsons | e0b13b5 | 2011-08-09 16:27:33 +0000 | [diff] [blame] | 855 | .suspend = asic3_leds_suspend, |
| 856 | .resume = asic3_leds_enable, |
Paul Parsons | 13ca4f6 | 2011-05-13 18:53:03 +0000 | [diff] [blame] | 857 | }, |
| 858 | [1] = { |
| 859 | .name = "leds-asic3", |
| 860 | .id = 1, |
| 861 | .enable = asic3_leds_enable, |
| 862 | .disable = asic3_leds_disable, |
Paul Parsons | e0b13b5 | 2011-08-09 16:27:33 +0000 | [diff] [blame] | 863 | .suspend = asic3_leds_suspend, |
| 864 | .resume = asic3_leds_enable, |
Paul Parsons | 13ca4f6 | 2011-05-13 18:53:03 +0000 | [diff] [blame] | 865 | }, |
| 866 | [2] = { |
| 867 | .name = "leds-asic3", |
| 868 | .id = 2, |
| 869 | .enable = asic3_leds_enable, |
| 870 | .disable = asic3_leds_disable, |
Paul Parsons | e0b13b5 | 2011-08-09 16:27:33 +0000 | [diff] [blame] | 871 | .suspend = asic3_leds_suspend, |
| 872 | .resume = asic3_leds_enable, |
Paul Parsons | 13ca4f6 | 2011-05-13 18:53:03 +0000 | [diff] [blame] | 873 | }, |
| 874 | }; |
| 875 | |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 876 | static int __init asic3_mfd_probe(struct platform_device *pdev, |
Paul Parsons | 13ca4f6 | 2011-05-13 18:53:03 +0000 | [diff] [blame] | 877 | struct asic3_platform_data *pdata, |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 878 | struct resource *mem) |
| 879 | { |
| 880 | struct asic3 *asic = platform_get_drvdata(pdev); |
Philipp Zabel | 09f05ce | 2009-06-15 12:10:25 +0200 | [diff] [blame] | 881 | struct resource *mem_sdio; |
| 882 | int irq, ret; |
| 883 | |
| 884 | mem_sdio = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
| 885 | if (!mem_sdio) |
| 886 | dev_dbg(asic->dev, "no SDIO MEM resource\n"); |
| 887 | |
| 888 | irq = platform_get_irq(pdev, 1); |
| 889 | if (irq < 0) |
| 890 | dev_dbg(asic->dev, "no SDIO IRQ resource\n"); |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 891 | |
| 892 | /* DS1WM */ |
| 893 | asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT), |
| 894 | ASIC3_EXTCF_OWM_SMB, 0); |
| 895 | |
| 896 | ds1wm_resources[0].start >>= asic->bus_shift; |
| 897 | ds1wm_resources[0].end >>= asic->bus_shift; |
| 898 | |
Philipp Zabel | 09f05ce | 2009-06-15 12:10:25 +0200 | [diff] [blame] | 899 | /* MMC */ |
Sachin Kamat | 44b61a9 | 2014-06-10 15:30:34 +0530 | [diff] [blame] | 900 | if (mem_sdio) { |
Lee Jones | d43c429 | 2015-10-28 14:11:23 +0000 | [diff] [blame] | 901 | asic->tmio_cnf = ioremap((ASIC3_SD_CONFIG_BASE >> |
| 902 | asic->bus_shift) + mem_sdio->start, |
Paul Parsons | 74e32d1 | 2011-05-15 14:13:11 +0000 | [diff] [blame] | 903 | ASIC3_SD_CONFIG_SIZE >> asic->bus_shift); |
Sachin Kamat | 44b61a9 | 2014-06-10 15:30:34 +0530 | [diff] [blame] | 904 | if (!asic->tmio_cnf) { |
| 905 | ret = -ENOMEM; |
| 906 | dev_dbg(asic->dev, "Couldn't ioremap SD_CONFIG\n"); |
| 907 | goto out; |
| 908 | } |
Ian Molton | 64e8867 | 2010-01-06 13:51:48 +0100 | [diff] [blame] | 909 | } |
Philipp Zabel | 09f05ce | 2009-06-15 12:10:25 +0200 | [diff] [blame] | 910 | asic3_mmc_resources[0].start >>= asic->bus_shift; |
| 911 | asic3_mmc_resources[0].end >>= asic->bus_shift; |
Philipp Zabel | 09f05ce | 2009-06-15 12:10:25 +0200 | [diff] [blame] | 912 | |
Paul Parsons | 4f30424 | 2012-04-09 13:18:31 +0100 | [diff] [blame] | 913 | if (pdata->clock_rate) { |
| 914 | ds1wm_pdata.clock_rate = pdata->clock_rate; |
| 915 | ret = mfd_add_devices(&pdev->dev, pdev->id, |
Mark Brown | 0848c94 | 2012-09-11 15:16:36 +0800 | [diff] [blame] | 916 | &asic3_cell_ds1wm, 1, mem, asic->irq_base, NULL); |
Paul Parsons | 4f30424 | 2012-04-09 13:18:31 +0100 | [diff] [blame] | 917 | if (ret < 0) |
| 918 | goto out; |
| 919 | } |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 920 | |
Paul Parsons | 13ca4f6 | 2011-05-13 18:53:03 +0000 | [diff] [blame] | 921 | if (mem_sdio && (irq >= 0)) { |
Philipp Zabel | 09f05ce | 2009-06-15 12:10:25 +0200 | [diff] [blame] | 922 | ret = mfd_add_devices(&pdev->dev, pdev->id, |
Mark Brown | 0848c94 | 2012-09-11 15:16:36 +0800 | [diff] [blame] | 923 | &asic3_cell_mmc, 1, mem_sdio, irq, NULL); |
Paul Parsons | 13ca4f6 | 2011-05-13 18:53:03 +0000 | [diff] [blame] | 924 | if (ret < 0) |
| 925 | goto out; |
| 926 | } |
| 927 | |
Arnd Bergmann | b2f0fa8 | 2012-08-04 06:20:49 +0000 | [diff] [blame] | 928 | ret = 0; |
Paul Parsons | 13ca4f6 | 2011-05-13 18:53:03 +0000 | [diff] [blame] | 929 | if (pdata->leds) { |
| 930 | int i; |
| 931 | |
| 932 | for (i = 0; i < ASIC3_NUM_LEDS; ++i) { |
| 933 | asic3_cell_leds[i].platform_data = &pdata->leds[i]; |
| 934 | asic3_cell_leds[i].pdata_size = sizeof(pdata->leds[i]); |
| 935 | } |
| 936 | ret = mfd_add_devices(&pdev->dev, 0, |
Mark Brown | 0848c94 | 2012-09-11 15:16:36 +0800 | [diff] [blame] | 937 | asic3_cell_leds, ASIC3_NUM_LEDS, NULL, 0, NULL); |
Paul Parsons | 13ca4f6 | 2011-05-13 18:53:03 +0000 | [diff] [blame] | 938 | } |
Philipp Zabel | 09f05ce | 2009-06-15 12:10:25 +0200 | [diff] [blame] | 939 | |
| 940 | out: |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 941 | return ret; |
| 942 | } |
| 943 | |
| 944 | static void asic3_mfd_remove(struct platform_device *pdev) |
| 945 | { |
Ian Molton | 64e8867 | 2010-01-06 13:51:48 +0100 | [diff] [blame] | 946 | struct asic3 *asic = platform_get_drvdata(pdev); |
| 947 | |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 948 | mfd_remove_devices(&pdev->dev); |
Ian Molton | 64e8867 | 2010-01-06 13:51:48 +0100 | [diff] [blame] | 949 | iounmap(asic->tmio_cnf); |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 950 | } |
| 951 | |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 952 | /* Core */ |
Philipp Zabel | 065032f | 2008-06-21 00:51:38 +0200 | [diff] [blame] | 953 | static int __init asic3_probe(struct platform_device *pdev) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 954 | { |
Jingoo Han | 334a41c | 2013-07-30 17:10:05 +0900 | [diff] [blame] | 955 | struct asic3_platform_data *pdata = dev_get_platdata(&pdev->dev); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 956 | struct asic3 *asic; |
| 957 | struct resource *mem; |
| 958 | unsigned long clksel; |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 959 | int ret = 0; |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 960 | |
Lee Jones | 1cee87f | 2013-05-23 16:25:09 +0100 | [diff] [blame] | 961 | asic = devm_kzalloc(&pdev->dev, |
| 962 | sizeof(struct asic3), GFP_KERNEL); |
Lee Jones | d43c429 | 2015-10-28 14:11:23 +0000 | [diff] [blame] | 963 | if (!asic) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 964 | return -ENOMEM; |
| 965 | |
| 966 | spin_lock_init(&asic->lock); |
| 967 | platform_set_drvdata(pdev, asic); |
| 968 | asic->dev = &pdev->dev; |
| 969 | |
| 970 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 971 | if (!mem) { |
Samuel Ortiz | 24f4f2e | 2008-06-20 11:11:19 +0200 | [diff] [blame] | 972 | dev_err(asic->dev, "no MEM resource\n"); |
Lee Jones | 1cee87f | 2013-05-23 16:25:09 +0100 | [diff] [blame] | 973 | return -ENOMEM; |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 974 | } |
| 975 | |
Philipp Zabel | be584bd | 2009-06-05 18:31:04 +0200 | [diff] [blame] | 976 | asic->mapping = ioremap(mem->start, resource_size(mem)); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 977 | if (!asic->mapping) { |
Samuel Ortiz | 24f4f2e | 2008-06-20 11:11:19 +0200 | [diff] [blame] | 978 | dev_err(asic->dev, "Couldn't ioremap\n"); |
Lee Jones | 1cee87f | 2013-05-23 16:25:09 +0100 | [diff] [blame] | 979 | return -ENOMEM; |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 980 | } |
| 981 | |
| 982 | asic->irq_base = pdata->irq_base; |
| 983 | |
Philipp Zabel | 99cdb0c | 2008-07-10 02:17:02 +0200 | [diff] [blame] | 984 | /* calculate bus shift from mem resource */ |
Philipp Zabel | be584bd | 2009-06-05 18:31:04 +0200 | [diff] [blame] | 985 | asic->bus_shift = 2 - (resource_size(mem) >> 12); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 986 | |
| 987 | clksel = 0; |
| 988 | asic3_write_register(asic, ASIC3_OFFSET(CLOCK, SEL), clksel); |
| 989 | |
| 990 | ret = asic3_irq_probe(pdev); |
| 991 | if (ret < 0) { |
Samuel Ortiz | 24f4f2e | 2008-06-20 11:11:19 +0200 | [diff] [blame] | 992 | dev_err(asic->dev, "Couldn't probe IRQs\n"); |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 993 | goto out_unmap; |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 994 | } |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 995 | |
Paul Parsons | d8e4a88 | 2011-08-09 16:27:50 +0000 | [diff] [blame] | 996 | asic->gpio.label = "asic3"; |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 997 | asic->gpio.base = pdata->gpio_base; |
| 998 | asic->gpio.ngpio = ASIC3_NUM_GPIOS; |
| 999 | asic->gpio.get = asic3_gpio_get; |
| 1000 | asic->gpio.set = asic3_gpio_set; |
| 1001 | asic->gpio.direction_input = asic3_gpio_direction_input; |
| 1002 | asic->gpio.direction_output = asic3_gpio_direction_output; |
Paul Parsons | 450b115 | 2012-01-31 01:18:35 +0000 | [diff] [blame] | 1003 | asic->gpio.to_irq = asic3_gpio_to_irq; |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 1004 | |
Samuel Ortiz | 3b26bf1 | 2008-06-20 11:09:51 +0200 | [diff] [blame] | 1005 | ret = asic3_gpio_probe(pdev, |
| 1006 | pdata->gpio_config, |
| 1007 | pdata->gpio_config_num); |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 1008 | if (ret < 0) { |
Samuel Ortiz | 24f4f2e | 2008-06-20 11:11:19 +0200 | [diff] [blame] | 1009 | dev_err(asic->dev, "GPIO probe failed\n"); |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 1010 | goto out_irq; |
| 1011 | } |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 1012 | |
Philipp Zabel | e956a2a | 2009-06-05 18:31:02 +0200 | [diff] [blame] | 1013 | /* Making a per-device copy is only needed for the |
| 1014 | * theoretical case of multiple ASIC3s on one board: |
| 1015 | */ |
| 1016 | memcpy(asic->clocks, asic3_clk_init, sizeof(asic3_clk_init)); |
| 1017 | |
Paul Parsons | 13ca4f6 | 2011-05-13 18:53:03 +0000 | [diff] [blame] | 1018 | asic3_mfd_probe(pdev, pdata, mem); |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 1019 | |
Paul Parsons | f22a9c6 | 2012-04-05 17:45:04 +0100 | [diff] [blame] | 1020 | asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT), |
| 1021 | (ASIC3_EXTCF_CF0_BUF_EN|ASIC3_EXTCF_CF0_PWAIT_EN), 1); |
| 1022 | |
Samuel Ortiz | 24f4f2e | 2008-06-20 11:11:19 +0200 | [diff] [blame] | 1023 | dev_info(asic->dev, "ASIC3 Core driver\n"); |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 1024 | |
| 1025 | return 0; |
| 1026 | |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 1027 | out_irq: |
| 1028 | asic3_irq_remove(pdev); |
| 1029 | |
| 1030 | out_unmap: |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 1031 | iounmap(asic->mapping); |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 1032 | |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 1033 | return ret; |
| 1034 | } |
| 1035 | |
Bill Pemberton | 4740f73 | 2012-11-19 13:26:01 -0500 | [diff] [blame] | 1036 | static int asic3_remove(struct platform_device *pdev) |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 1037 | { |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 1038 | int ret; |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 1039 | struct asic3 *asic = platform_get_drvdata(pdev); |
| 1040 | |
Paul Parsons | f22a9c6 | 2012-04-05 17:45:04 +0100 | [diff] [blame] | 1041 | asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT), |
| 1042 | (ASIC3_EXTCF_CF0_BUF_EN|ASIC3_EXTCF_CF0_PWAIT_EN), 0); |
| 1043 | |
Philipp Zabel | 9461f65 | 2009-06-15 12:10:24 +0200 | [diff] [blame] | 1044 | asic3_mfd_remove(pdev); |
| 1045 | |
Samuel Ortiz | 6f2384c | 2008-06-20 11:02:19 +0200 | [diff] [blame] | 1046 | ret = asic3_gpio_remove(pdev); |
| 1047 | if (ret < 0) |
| 1048 | return ret; |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 1049 | asic3_irq_remove(pdev); |
| 1050 | |
| 1051 | asic3_write_register(asic, ASIC3_OFFSET(CLOCK, SEL), 0); |
| 1052 | |
| 1053 | iounmap(asic->mapping); |
| 1054 | |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 1055 | return 0; |
| 1056 | } |
| 1057 | |
| 1058 | static void asic3_shutdown(struct platform_device *pdev) |
| 1059 | { |
| 1060 | } |
| 1061 | |
| 1062 | static struct platform_driver asic3_device_driver = { |
| 1063 | .driver = { |
| 1064 | .name = "asic3", |
| 1065 | }, |
Bill Pemberton | 8444921 | 2012-11-19 13:20:24 -0500 | [diff] [blame] | 1066 | .remove = asic3_remove, |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 1067 | .shutdown = asic3_shutdown, |
| 1068 | }; |
| 1069 | |
| 1070 | static int __init asic3_init(void) |
| 1071 | { |
| 1072 | int retval = 0; |
Lee Jones | d43c429 | 2015-10-28 14:11:23 +0000 | [diff] [blame] | 1073 | |
Philipp Zabel | 065032f | 2008-06-21 00:51:38 +0200 | [diff] [blame] | 1074 | retval = platform_driver_probe(&asic3_device_driver, asic3_probe); |
Lee Jones | d43c429 | 2015-10-28 14:11:23 +0000 | [diff] [blame] | 1075 | |
Samuel Ortiz | fa9ff4b | 2008-02-07 00:14:49 -0800 | [diff] [blame] | 1076 | return retval; |
| 1077 | } |
| 1078 | |
| 1079 | subsys_initcall(asic3_init); |