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Maxime Ripard9026e0d2015-10-29 09:36:23 +01001/*
2 * Copyright (C) 2015 Free Electrons
3 * Copyright (C) 2015 NextThing Co
4 *
5 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 */
12
13#include <drm/drmP.h>
14#include <drm/drm_atomic_helper.h>
15#include <drm/drm_crtc.h>
16#include <drm/drm_crtc_helper.h>
17#include <drm/drm_modes.h>
18
19#include <linux/clk-provider.h>
20#include <linux/ioport.h>
21#include <linux/of_address.h>
Chen-Yu Tsai75448602017-02-23 16:05:34 +080022#include <linux/of_graph.h>
Maxime Ripard9026e0d2015-10-29 09:36:23 +010023#include <linux/of_irq.h>
24#include <linux/regmap.h>
25
26#include <video/videomode.h>
27
Maxime Ripard9026e0d2015-10-29 09:36:23 +010028#include "sun4i_crtc.h"
29#include "sun4i_drv.h"
Icenowy Zheng87969332017-05-17 22:47:17 +080030#include "sunxi_engine.h"
Maxime Ripard9026e0d2015-10-29 09:36:23 +010031#include "sun4i_tcon.h"
32
Maxime Ripard45e88f92017-10-17 11:06:12 +020033/*
34 * While this isn't really working in the DRM theory, in practice we
35 * can only ever have one encoder per TCON since we have a mux in our
36 * TCON.
37 */
38static struct drm_encoder *sun4i_crtc_get_encoder(struct drm_crtc *crtc)
39{
40 struct drm_encoder *encoder;
41
42 drm_for_each_encoder(encoder, crtc->dev)
43 if (encoder->crtc == crtc)
44 return encoder;
45
46 return NULL;
47}
48
Maxime Ripard656e5f62018-01-22 10:25:19 +010049static int sun4i_crtc_atomic_check(struct drm_crtc *crtc,
50 struct drm_crtc_state *state)
51{
52 struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
53 struct sunxi_engine *engine = scrtc->engine;
54 int ret = 0;
55
56 if (engine && engine->ops && engine->ops->atomic_check)
57 ret = engine->ops->atomic_check(engine, state);
58
59 return ret;
60}
61
Maxime Ripard9026e0d2015-10-29 09:36:23 +010062static void sun4i_crtc_atomic_begin(struct drm_crtc *crtc,
63 struct drm_crtc_state *old_state)
64{
65 struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
66 struct drm_device *dev = crtc->dev;
67 unsigned long flags;
68
69 if (crtc->state->event) {
70 WARN_ON(drm_crtc_vblank_get(crtc) != 0);
71
72 spin_lock_irqsave(&dev->event_lock, flags);
73 scrtc->event = crtc->state->event;
74 spin_unlock_irqrestore(&dev->event_lock, flags);
75 crtc->state->event = NULL;
76 }
77}
78
79static void sun4i_crtc_atomic_flush(struct drm_crtc *crtc,
80 struct drm_crtc_state *old_state)
81{
82 struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
Daniel Vettera33e93d2016-06-08 14:18:58 +020083 struct drm_pending_vblank_event *event = crtc->state->event;
Maxime Ripard9026e0d2015-10-29 09:36:23 +010084
85 DRM_DEBUG_DRIVER("Committing plane changes\n");
86
Icenowy Zheng87969332017-05-17 22:47:17 +080087 sunxi_engine_commit(scrtc->engine);
Daniel Vettera33e93d2016-06-08 14:18:58 +020088
89 if (event) {
90 crtc->state->event = NULL;
91
92 spin_lock_irq(&crtc->dev->event_lock);
93 if (drm_crtc_vblank_get(crtc) == 0)
94 drm_crtc_arm_vblank_event(crtc, event);
95 else
96 drm_crtc_send_vblank_event(crtc, event);
97 spin_unlock_irq(&crtc->dev->event_lock);
98 }
Maxime Ripard9026e0d2015-10-29 09:36:23 +010099}
100
Laurent Pinchart64581712017-06-30 12:36:45 +0300101static void sun4i_crtc_atomic_disable(struct drm_crtc *crtc,
102 struct drm_crtc_state *old_state)
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100103{
Maxime Ripard45e88f92017-10-17 11:06:12 +0200104 struct drm_encoder *encoder = sun4i_crtc_get_encoder(crtc);
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100105 struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100106
107 DRM_DEBUG_DRIVER("Disabling the CRTC\n");
108
Maxime Ripard45e88f92017-10-17 11:06:12 +0200109 sun4i_tcon_set_status(scrtc->tcon, encoder, false);
Maxime Ripard2cd36832016-06-20 12:20:59 +0200110
111 if (crtc->state->event && !crtc->state->active) {
112 spin_lock_irq(&crtc->dev->event_lock);
113 drm_crtc_send_vblank_event(crtc, crtc->state->event);
114 spin_unlock_irq(&crtc->dev->event_lock);
115
116 crtc->state->event = NULL;
117 }
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100118}
119
Laurent Pinchart0b20a0f2017-06-30 12:36:44 +0300120static void sun4i_crtc_atomic_enable(struct drm_crtc *crtc,
121 struct drm_crtc_state *old_state)
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100122{
Maxime Ripard45e88f92017-10-17 11:06:12 +0200123 struct drm_encoder *encoder = sun4i_crtc_get_encoder(crtc);
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100124 struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100125
126 DRM_DEBUG_DRIVER("Enabling the CRTC\n");
127
Maxime Ripard45e88f92017-10-17 11:06:12 +0200128 sun4i_tcon_set_status(scrtc->tcon, encoder, true);
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100129}
130
Maxime Ripard5b8f0912017-10-17 11:06:13 +0200131static void sun4i_crtc_mode_set_nofb(struct drm_crtc *crtc)
132{
133 struct drm_display_mode *mode = &crtc->state->adjusted_mode;
134 struct drm_encoder *encoder = sun4i_crtc_get_encoder(crtc);
135 struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
136
137 sun4i_tcon_mode_set(scrtc->tcon, encoder, mode);
138}
139
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100140static const struct drm_crtc_helper_funcs sun4i_crtc_helper_funcs = {
Maxime Ripard656e5f62018-01-22 10:25:19 +0100141 .atomic_check = sun4i_crtc_atomic_check,
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100142 .atomic_begin = sun4i_crtc_atomic_begin,
143 .atomic_flush = sun4i_crtc_atomic_flush,
Laurent Pinchart0b20a0f2017-06-30 12:36:44 +0300144 .atomic_enable = sun4i_crtc_atomic_enable,
Laurent Pinchart64581712017-06-30 12:36:45 +0300145 .atomic_disable = sun4i_crtc_atomic_disable,
Maxime Ripard5b8f0912017-10-17 11:06:13 +0200146 .mode_set_nofb = sun4i_crtc_mode_set_nofb,
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100147};
148
Shawn Guo50480a72017-02-07 17:16:31 +0800149static int sun4i_crtc_enable_vblank(struct drm_crtc *crtc)
150{
151 struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
Shawn Guo50480a72017-02-07 17:16:31 +0800152
153 DRM_DEBUG_DRIVER("Enabling VBLANK on crtc %p\n", crtc);
154
Chen-Yu Tsai3c64fb32017-02-23 16:05:43 +0800155 sun4i_tcon_enable_vblank(scrtc->tcon, true);
Shawn Guo50480a72017-02-07 17:16:31 +0800156
157 return 0;
158}
159
160static void sun4i_crtc_disable_vblank(struct drm_crtc *crtc)
161{
162 struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
Shawn Guo50480a72017-02-07 17:16:31 +0800163
164 DRM_DEBUG_DRIVER("Disabling VBLANK on crtc %p\n", crtc);
165
Chen-Yu Tsai3c64fb32017-02-23 16:05:43 +0800166 sun4i_tcon_enable_vblank(scrtc->tcon, false);
Shawn Guo50480a72017-02-07 17:16:31 +0800167}
168
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100169static const struct drm_crtc_funcs sun4i_crtc_funcs = {
170 .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
171 .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
172 .destroy = drm_crtc_cleanup,
173 .page_flip = drm_atomic_helper_page_flip,
174 .reset = drm_atomic_helper_crtc_reset,
175 .set_config = drm_atomic_helper_set_config,
Shawn Guo50480a72017-02-07 17:16:31 +0800176 .enable_vblank = sun4i_crtc_enable_vblank,
177 .disable_vblank = sun4i_crtc_disable_vblank,
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100178};
179
Chen-Yu Tsai18c3b302017-03-09 18:05:28 +0800180struct sun4i_crtc *sun4i_crtc_init(struct drm_device *drm,
Icenowy Zheng87969332017-05-17 22:47:17 +0800181 struct sunxi_engine *engine,
Chen-Yu Tsai18c3b302017-03-09 18:05:28 +0800182 struct sun4i_tcon *tcon)
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100183{
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100184 struct sun4i_crtc *scrtc;
Icenowy Zheng7921e142017-05-15 00:30:36 +0800185 struct drm_plane **planes;
Chen-Yu Tsaidcd21582017-02-23 16:05:38 +0800186 struct drm_plane *primary = NULL, *cursor = NULL;
187 int ret, i;
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100188
189 scrtc = devm_kzalloc(drm->dev, sizeof(*scrtc), GFP_KERNEL);
190 if (!scrtc)
Chen-Yu Tsaiea411fd2017-02-17 11:13:30 +0800191 return ERR_PTR(-ENOMEM);
Icenowy Zheng87969332017-05-17 22:47:17 +0800192 scrtc->engine = engine;
Chen-Yu Tsai18c3b302017-03-09 18:05:28 +0800193 scrtc->tcon = tcon;
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100194
Chen-Yu Tsaib3f266e2017-02-23 16:05:36 +0800195 /* Create our layers */
Icenowy Zheng87969332017-05-17 22:47:17 +0800196 planes = sunxi_engine_layers_init(drm, engine);
Icenowy Zheng7921e142017-05-15 00:30:36 +0800197 if (IS_ERR(planes)) {
Chen-Yu Tsaib3f266e2017-02-23 16:05:36 +0800198 dev_err(drm->dev, "Couldn't create the planes\n");
Chen-Yu Tsaidcd21582017-02-23 16:05:38 +0800199 return NULL;
200 }
201
202 /* find primary and cursor planes for drm_crtc_init_with_planes */
Icenowy Zheng7921e142017-05-15 00:30:36 +0800203 for (i = 0; planes[i]; i++) {
204 struct drm_plane *plane = planes[i];
Chen-Yu Tsaidcd21582017-02-23 16:05:38 +0800205
Icenowy Zheng7921e142017-05-15 00:30:36 +0800206 switch (plane->type) {
Chen-Yu Tsaidcd21582017-02-23 16:05:38 +0800207 case DRM_PLANE_TYPE_PRIMARY:
Icenowy Zheng7921e142017-05-15 00:30:36 +0800208 primary = plane;
Chen-Yu Tsaidcd21582017-02-23 16:05:38 +0800209 break;
210 case DRM_PLANE_TYPE_CURSOR:
Icenowy Zheng7921e142017-05-15 00:30:36 +0800211 cursor = plane;
Chen-Yu Tsaidcd21582017-02-23 16:05:38 +0800212 break;
213 default:
214 break;
215 }
Chen-Yu Tsaib3f266e2017-02-23 16:05:36 +0800216 }
217
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100218 ret = drm_crtc_init_with_planes(drm, &scrtc->crtc,
Chen-Yu Tsaidcd21582017-02-23 16:05:38 +0800219 primary,
220 cursor,
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100221 &sun4i_crtc_funcs,
222 NULL);
223 if (ret) {
224 dev_err(drm->dev, "Couldn't init DRM CRTC\n");
Chen-Yu Tsaiea411fd2017-02-17 11:13:30 +0800225 return ERR_PTR(ret);
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100226 }
227
228 drm_crtc_helper_add(&scrtc->crtc, &sun4i_crtc_helper_funcs);
229
Chen-Yu Tsai75448602017-02-23 16:05:34 +0800230 /* Set crtc.port to output port node of the tcon */
Chen-Yu Tsaie4cdcb72017-03-09 18:05:26 +0800231 scrtc->crtc.port = of_graph_get_port_by_id(scrtc->tcon->dev->of_node,
Chen-Yu Tsai75448602017-02-23 16:05:34 +0800232 1);
233
Chen-Yu Tsaia5154a42017-02-23 16:05:39 +0800234 /* Set possible_crtcs to this crtc for overlay planes */
Icenowy Zheng7921e142017-05-15 00:30:36 +0800235 for (i = 0; planes[i]; i++) {
Chen-Yu Tsaia5154a42017-02-23 16:05:39 +0800236 uint32_t possible_crtcs = BIT(drm_crtc_index(&scrtc->crtc));
Icenowy Zheng7921e142017-05-15 00:30:36 +0800237 struct drm_plane *plane = planes[i];
Chen-Yu Tsaia5154a42017-02-23 16:05:39 +0800238
Icenowy Zheng7921e142017-05-15 00:30:36 +0800239 if (plane->type == DRM_PLANE_TYPE_OVERLAY)
240 plane->possible_crtcs = possible_crtcs;
Chen-Yu Tsaia5154a42017-02-23 16:05:39 +0800241 }
242
Maxime Ripard9026e0d2015-10-29 09:36:23 +0100243 return scrtc;
244}