Tarek Dakhran | 107e6aa | 2014-05-27 06:54:13 +0900 | [diff] [blame] | 1 | /* |
| 2 | * SAMSUNG SMDK5410 board device tree source |
| 3 | * |
| 4 | * Copyright (c) 2013 Samsung Electronics Co., Ltd. |
| 5 | * http://www.samsung.com |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | |
| 12 | /dts-v1/; |
| 13 | #include "exynos5410.dtsi" |
| 14 | / { |
| 15 | model = "Samsung SMDK5410 board based on EXYNOS5410"; |
| 16 | compatible = "samsung,smdk5410", "samsung,exynos5410", "samsung,exynos5"; |
| 17 | |
| 18 | memory { |
| 19 | reg = <0x40000000 0x80000000>; |
| 20 | }; |
| 21 | |
| 22 | chosen { |
| 23 | bootargs = "console=ttySAC2,115200"; |
| 24 | }; |
| 25 | |
| 26 | fin_pll: xxti { |
| 27 | compatible = "fixed-clock"; |
| 28 | clock-frequency = <24000000>; |
| 29 | clock-output-names = "fin_pll"; |
| 30 | #clock-cells = <0>; |
| 31 | }; |
| 32 | |
| 33 | firmware@02037000 { |
| 34 | compatible = "samsung,secure-firmware"; |
| 35 | reg = <0x02037000 0x1000>; |
| 36 | }; |
| 37 | |
| 38 | }; |
| 39 | |
| 40 | &mmc_0 { |
| 41 | status = "okay"; |
| 42 | num-slots = <1>; |
| 43 | supports-highspeed; |
| 44 | broken-cd; |
| 45 | card-detect-delay = <200>; |
| 46 | samsung,dw-mshc-ciu-div = <3>; |
| 47 | samsung,dw-mshc-sdr-timing = <2 3>; |
| 48 | samsung,dw-mshc-ddr-timing = <1 2>; |
| 49 | |
| 50 | slot@0 { |
| 51 | reg = <0>; |
| 52 | bus-width = <8>; |
| 53 | }; |
| 54 | }; |
| 55 | |
| 56 | &mmc_2 { |
| 57 | status = "okay"; |
| 58 | num-slots = <1>; |
| 59 | supports-highspeed; |
| 60 | card-detect-delay = <200>; |
| 61 | samsung,dw-mshc-ciu-div = <3>; |
| 62 | samsung,dw-mshc-sdr-timing = <2 3>; |
| 63 | samsung,dw-mshc-ddr-timing = <1 2>; |
| 64 | |
| 65 | slot@0 { |
| 66 | reg = <0>; |
| 67 | bus-width = <4>; |
| 68 | disable-wp; |
| 69 | }; |
| 70 | }; |
| 71 | |
| 72 | &uart0 { |
| 73 | status = "okay"; |
| 74 | }; |
| 75 | |
| 76 | &uart1 { |
| 77 | status = "okay"; |
| 78 | }; |
| 79 | |
| 80 | &uart2 { |
| 81 | status = "okay"; |
| 82 | }; |