Marc Zyngier | 4d9be47 | 2010-04-10 21:32:38 +0100 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/mach-ixp4xx/vulcan-setup.c |
| 3 | * |
| 4 | * Arcom/Eurotech Vulcan board-setup |
| 5 | * |
| 6 | * Copyright (C) 2010 Marc Zyngier <maz@misterjones.org> |
| 7 | * |
| 8 | * based on fsg-setup.c: |
| 9 | * Copyright (C) 2008 Rod Whitby <rod@whitby.id.au> |
| 10 | */ |
| 11 | |
| 12 | #include <linux/if_ether.h> |
| 13 | #include <linux/irq.h> |
| 14 | #include <linux/serial.h> |
| 15 | #include <linux/serial_8250.h> |
| 16 | #include <linux/io.h> |
| 17 | #include <linux/w1-gpio.h> |
| 18 | #include <linux/mtd/plat-ram.h> |
| 19 | #include <asm/mach-types.h> |
| 20 | #include <asm/mach/arch.h> |
| 21 | #include <asm/mach/flash.h> |
| 22 | |
| 23 | static struct flash_platform_data vulcan_flash_data = { |
| 24 | .map_name = "cfi_probe", |
| 25 | .width = 2, |
| 26 | }; |
| 27 | |
| 28 | static struct resource vulcan_flash_resource = { |
| 29 | .flags = IORESOURCE_MEM, |
| 30 | }; |
| 31 | |
| 32 | static struct platform_device vulcan_flash = { |
| 33 | .name = "IXP4XX-Flash", |
| 34 | .id = 0, |
| 35 | .dev = { |
| 36 | .platform_data = &vulcan_flash_data, |
| 37 | }, |
| 38 | .resource = &vulcan_flash_resource, |
| 39 | .num_resources = 1, |
| 40 | }; |
| 41 | |
| 42 | static struct platdata_mtd_ram vulcan_sram_data = { |
| 43 | .mapname = "Vulcan SRAM", |
| 44 | .bankwidth = 1, |
| 45 | }; |
| 46 | |
| 47 | static struct resource vulcan_sram_resource = { |
| 48 | .flags = IORESOURCE_MEM, |
| 49 | }; |
| 50 | |
| 51 | static struct platform_device vulcan_sram = { |
| 52 | .name = "mtd-ram", |
| 53 | .id = 0, |
| 54 | .dev = { |
| 55 | .platform_data = &vulcan_sram_data, |
| 56 | }, |
| 57 | .resource = &vulcan_sram_resource, |
| 58 | .num_resources = 1, |
| 59 | }; |
| 60 | |
| 61 | static struct resource vulcan_uart_resources[] = { |
| 62 | [0] = { |
| 63 | .start = IXP4XX_UART1_BASE_PHYS, |
| 64 | .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, |
| 65 | .flags = IORESOURCE_MEM, |
| 66 | }, |
| 67 | [1] = { |
| 68 | .start = IXP4XX_UART2_BASE_PHYS, |
| 69 | .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, |
| 70 | .flags = IORESOURCE_MEM, |
| 71 | }, |
| 72 | [2] = { |
| 73 | .flags = IORESOURCE_MEM, |
| 74 | }, |
| 75 | }; |
| 76 | |
| 77 | static struct plat_serial8250_port vulcan_uart_data[] = { |
| 78 | [0] = { |
| 79 | .mapbase = IXP4XX_UART1_BASE_PHYS, |
| 80 | .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, |
| 81 | .irq = IRQ_IXP4XX_UART1, |
| 82 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, |
| 83 | .iotype = UPIO_MEM, |
| 84 | .regshift = 2, |
| 85 | .uartclk = IXP4XX_UART_XTAL, |
| 86 | }, |
| 87 | [1] = { |
| 88 | .mapbase = IXP4XX_UART2_BASE_PHYS, |
| 89 | .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, |
| 90 | .irq = IRQ_IXP4XX_UART2, |
| 91 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, |
| 92 | .iotype = UPIO_MEM, |
| 93 | .regshift = 2, |
| 94 | .uartclk = IXP4XX_UART_XTAL, |
| 95 | }, |
| 96 | [2] = { |
| 97 | .irq = IXP4XX_GPIO_IRQ(4), |
| 98 | .irqflags = IRQF_TRIGGER_LOW, |
| 99 | .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, |
| 100 | .iotype = UPIO_MEM, |
| 101 | .uartclk = 1843200, |
| 102 | }, |
| 103 | [3] = { |
| 104 | .irq = IXP4XX_GPIO_IRQ(4), |
| 105 | .irqflags = IRQF_TRIGGER_LOW, |
| 106 | .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, |
| 107 | .iotype = UPIO_MEM, |
| 108 | .uartclk = 1843200, |
| 109 | }, |
| 110 | { } |
| 111 | }; |
| 112 | |
| 113 | static struct platform_device vulcan_uart = { |
| 114 | .name = "serial8250", |
| 115 | .id = PLAT8250_DEV_PLATFORM, |
| 116 | .dev = { |
| 117 | .platform_data = vulcan_uart_data, |
| 118 | }, |
| 119 | .resource = vulcan_uart_resources, |
| 120 | .num_resources = ARRAY_SIZE(vulcan_uart_resources), |
| 121 | }; |
| 122 | |
| 123 | static struct eth_plat_info vulcan_plat_eth[] = { |
| 124 | [0] = { |
| 125 | .phy = 0, |
| 126 | .rxq = 3, |
| 127 | .txreadyq = 20, |
| 128 | }, |
| 129 | [1] = { |
| 130 | .phy = 1, |
| 131 | .rxq = 4, |
| 132 | .txreadyq = 21, |
| 133 | }, |
| 134 | }; |
| 135 | |
| 136 | static struct platform_device vulcan_eth[] = { |
| 137 | [0] = { |
| 138 | .name = "ixp4xx_eth", |
| 139 | .id = IXP4XX_ETH_NPEB, |
| 140 | .dev = { |
| 141 | .platform_data = &vulcan_plat_eth[0], |
| 142 | }, |
| 143 | }, |
| 144 | [1] = { |
| 145 | .name = "ixp4xx_eth", |
| 146 | .id = IXP4XX_ETH_NPEC, |
| 147 | .dev = { |
| 148 | .platform_data = &vulcan_plat_eth[1], |
| 149 | }, |
| 150 | }, |
| 151 | }; |
| 152 | |
| 153 | static struct resource vulcan_max6369_resource = { |
| 154 | .flags = IORESOURCE_MEM, |
| 155 | }; |
| 156 | |
| 157 | static struct platform_device vulcan_max6369 = { |
| 158 | .name = "max6369_wdt", |
| 159 | .id = -1, |
| 160 | .resource = &vulcan_max6369_resource, |
| 161 | .num_resources = 1, |
| 162 | }; |
| 163 | |
| 164 | static struct w1_gpio_platform_data vulcan_w1_gpio_pdata = { |
| 165 | .pin = 14, |
| 166 | }; |
| 167 | |
| 168 | static struct platform_device vulcan_w1_gpio = { |
| 169 | .name = "w1-gpio", |
| 170 | .id = 0, |
| 171 | .dev = { |
| 172 | .platform_data = &vulcan_w1_gpio_pdata, |
| 173 | }, |
| 174 | }; |
| 175 | |
| 176 | static struct platform_device *vulcan_devices[] __initdata = { |
| 177 | &vulcan_uart, |
| 178 | &vulcan_flash, |
| 179 | &vulcan_sram, |
| 180 | &vulcan_max6369, |
| 181 | &vulcan_eth[0], |
| 182 | &vulcan_eth[1], |
| 183 | &vulcan_w1_gpio, |
| 184 | }; |
| 185 | |
| 186 | static void __init vulcan_init(void) |
| 187 | { |
| 188 | ixp4xx_sys_init(); |
| 189 | |
| 190 | /* Flash is spread over both CS0 and CS1 */ |
| 191 | vulcan_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); |
| 192 | vulcan_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1; |
| 193 | *IXP4XX_EXP_CS0 = IXP4XX_EXP_BUS_CS_EN | |
| 194 | IXP4XX_EXP_BUS_STROBE_T(3) | |
| 195 | IXP4XX_EXP_BUS_SIZE(0xF) | |
| 196 | IXP4XX_EXP_BUS_BYTE_RD16 | |
| 197 | IXP4XX_EXP_BUS_WR_EN; |
| 198 | *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0; |
| 199 | |
| 200 | /* SRAM on CS2, (256kB, 8bit, writable) */ |
| 201 | vulcan_sram_resource.start = IXP4XX_EXP_BUS_BASE(2); |
| 202 | vulcan_sram_resource.end = IXP4XX_EXP_BUS_BASE(2) + SZ_256K - 1; |
| 203 | *IXP4XX_EXP_CS2 = IXP4XX_EXP_BUS_CS_EN | |
| 204 | IXP4XX_EXP_BUS_STROBE_T(1) | |
| 205 | IXP4XX_EXP_BUS_HOLD_T(2) | |
| 206 | IXP4XX_EXP_BUS_SIZE(9) | |
| 207 | IXP4XX_EXP_BUS_SPLT_EN | |
| 208 | IXP4XX_EXP_BUS_WR_EN | |
| 209 | IXP4XX_EXP_BUS_BYTE_EN; |
| 210 | |
| 211 | /* XR16L2551 on CS3 (Moto style, 512 bytes, 8bits, writable) */ |
| 212 | vulcan_uart_resources[2].start = IXP4XX_EXP_BUS_BASE(3); |
| 213 | vulcan_uart_resources[2].end = IXP4XX_EXP_BUS_BASE(3) + 16 - 1; |
| 214 | vulcan_uart_data[2].mapbase = vulcan_uart_resources[2].start; |
| 215 | vulcan_uart_data[3].mapbase = vulcan_uart_data[2].mapbase + 8; |
| 216 | *IXP4XX_EXP_CS3 = IXP4XX_EXP_BUS_CS_EN | |
| 217 | IXP4XX_EXP_BUS_STROBE_T(3) | |
| 218 | IXP4XX_EXP_BUS_CYCLES(IXP4XX_EXP_BUS_CYCLES_MOTOROLA)| |
| 219 | IXP4XX_EXP_BUS_WR_EN | |
| 220 | IXP4XX_EXP_BUS_BYTE_EN; |
| 221 | |
| 222 | /* GPIOS on CS4 (512 bytes, 8bits, writable) */ |
| 223 | *IXP4XX_EXP_CS4 = IXP4XX_EXP_BUS_CS_EN | |
| 224 | IXP4XX_EXP_BUS_WR_EN | |
| 225 | IXP4XX_EXP_BUS_BYTE_EN; |
| 226 | |
| 227 | /* max6369 on CS5 (512 bytes, 8bits, writable) */ |
| 228 | vulcan_max6369_resource.start = IXP4XX_EXP_BUS_BASE(5); |
| 229 | vulcan_max6369_resource.end = IXP4XX_EXP_BUS_BASE(5); |
| 230 | *IXP4XX_EXP_CS5 = IXP4XX_EXP_BUS_CS_EN | |
| 231 | IXP4XX_EXP_BUS_WR_EN | |
| 232 | IXP4XX_EXP_BUS_BYTE_EN; |
| 233 | |
| 234 | platform_add_devices(vulcan_devices, ARRAY_SIZE(vulcan_devices)); |
| 235 | } |
| 236 | |
| 237 | MACHINE_START(ARCOM_VULCAN, "Arcom/Eurotech Vulcan") |
| 238 | /* Maintainer: Marc Zyngier <maz@misterjones.org> */ |
Marc Zyngier | 4d9be47 | 2010-04-10 21:32:38 +0100 | [diff] [blame] | 239 | .map_io = ixp4xx_map_io, |
| 240 | .init_irq = ixp4xx_init_irq, |
| 241 | .timer = &ixp4xx_timer, |
| 242 | .boot_params = 0x0100, |
| 243 | .init_machine = vulcan_init, |
| 244 | MACHINE_END |