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gerrit-public.fairphone.software / kernel / msm-4.19 / 687b13e98addc99644002703944ec89e94287cb6 / . / include / net / caif / caif_hsi.h
blob: 17dff451efe31120f8cc2da0e5dcf74cf63ecfe2 [file] [log] [blame]
Dmitry.Tarnyagin40d69042011-06-01 03:29:18 +0000[diff] [blame]1/*
2 * Copyright (C) ST-Ericsson AB 2010
3 * Contact: Sjur Brendeland / sjur.brandeland@stericsson.com
4 * Author: Daniel Martensson / daniel.martensson@stericsson.com
5 * Dmitry.Tarnyagin / dmitry.tarnyagin@stericsson.com
6 * License terms: GNU General Public License (GPL) version 2
7 */
8
9#ifndef CAIF_HSI_H_
10#define CAIF_HSI_H_
11
12#include <net/caif/caif_layer.h>
13#include <net/caif/caif_device.h>
14#include <linux/atomic.h>
15
16/*
17 * Maximum number of CAIF frames that can reside in the same HSI frame.
18 */
19#define CFHSI_MAX_PKTS 15
20
21/*
22 * Maximum number of bytes used for the frame that can be embedded in the
23 * HSI descriptor.
24 */
25#define CFHSI_MAX_EMB_FRM_SZ 96
26
27/*
28 * Decides if HSI buffers should be prefilled with 0xFF pattern for easier
29 * debugging. Both TX and RX buffers will be filled before the transfer.
30 */
31#define CFHSI_DBG_PREFILL 0
32
33/* Structure describing a HSI packet descriptor. */
34#pragma pack(1) /* Byte alignment. */
35struct cfhsi_desc {
36 u8 header;
37 u8 offset;
38 u16 cffrm_len[CFHSI_MAX_PKTS];
39 u8 emb_frm[CFHSI_MAX_EMB_FRM_SZ];
40};
41#pragma pack() /* Default alignment. */
42
43/* Size of the complete HSI packet descriptor. */
44#define CFHSI_DESC_SZ (sizeof(struct cfhsi_desc))
45
46/*
47 * Size of the complete HSI packet descriptor excluding the optional embedded
48 * CAIF frame.
49 */
50#define CFHSI_DESC_SHORT_SZ (CFHSI_DESC_SZ - CFHSI_MAX_EMB_FRM_SZ)
51
52/*
53 * Maximum bytes transferred in one transfer.
54 */
55/* TODO: 4096 is temporary... */
56#define CFHSI_MAX_PAYLOAD_SZ (CFHSI_MAX_PKTS * 4096)
57
58/* Size of the complete HSI TX buffer. */
59#define CFHSI_BUF_SZ_TX (CFHSI_DESC_SZ + CFHSI_MAX_PAYLOAD_SZ)
60
61/* Size of the complete HSI RX buffer. */
62#define CFHSI_BUF_SZ_RX ((2 * CFHSI_DESC_SZ) + CFHSI_MAX_PAYLOAD_SZ)
63
64/* Bitmasks for the HSI descriptor. */
65#define CFHSI_PIGGY_DESC (0x01 << 7)
66
67#define CFHSI_TX_STATE_IDLE 0
68#define CFHSI_TX_STATE_XFER 1
69
70#define CFHSI_RX_STATE_DESC 0
71#define CFHSI_RX_STATE_PAYLOAD 1
72
73/* Bitmasks for power management. */
74#define CFHSI_WAKE_UP 0
75#define CFHSI_WAKE_UP_ACK 1
76#define CFHSI_WAKE_DOWN_ACK 2
77#define CFHSI_AWAKE 3
Daniel Martensson687b13e2011-10-13 11:29:25 +0000[diff] [blame^]78#define CFHSI_WAKELOCK_HELD 4
79#define CFHSI_SHUTDOWN 5
80#define CFHSI_FLUSH_FIFO 6
Dmitry.Tarnyagin40d69042011-06-01 03:29:18 +0000[diff] [blame]81
82#ifndef CFHSI_INACTIVITY_TOUT
83#define CFHSI_INACTIVITY_TOUT (1 * HZ)
84#endif /* CFHSI_INACTIVITY_TOUT */
85
Daniel Martensson687b13e2011-10-13 11:29:25 +0000[diff] [blame^]86#ifndef CFHSI_WAKE_TOUT
87#define CFHSI_WAKE_TOUT (3 * HZ)
88#endif /* CFHSI_WAKE_TOUT */
Dmitry.Tarnyagin40d69042011-06-01 03:29:18 +0000[diff] [blame]89
Daniel Martensson687b13e2011-10-13 11:29:25 +0000[diff] [blame^]90#ifndef CFHSI_MAX_RX_RETRIES
91#define CFHSI_MAX_RX_RETRIES (10 * HZ)
92#endif
Dmitry.Tarnyagin40d69042011-06-01 03:29:18 +0000[diff] [blame]93
94/* Structure implemented by the CAIF HSI driver. */
95struct cfhsi_drv {
96 void (*tx_done_cb) (struct cfhsi_drv *drv);
97 void (*rx_done_cb) (struct cfhsi_drv *drv);
98 void (*wake_up_cb) (struct cfhsi_drv *drv);
99 void (*wake_down_cb) (struct cfhsi_drv *drv);
100};
101
102/* Structure implemented by HSI device. */
103struct cfhsi_dev {
104 int (*cfhsi_up) (struct cfhsi_dev *dev);
105 int (*cfhsi_down) (struct cfhsi_dev *dev);
106 int (*cfhsi_tx) (u8 *ptr, int len, struct cfhsi_dev *dev);
107 int (*cfhsi_rx) (u8 *ptr, int len, struct cfhsi_dev *dev);
108 int (*cfhsi_wake_up) (struct cfhsi_dev *dev);
109 int (*cfhsi_wake_down) (struct cfhsi_dev *dev);
110 int (*cfhsi_fifo_occupancy)(struct cfhsi_dev *dev, size_t *occupancy);
111 int (*cfhsi_rx_cancel)(struct cfhsi_dev *dev);
112 struct cfhsi_drv *drv;
113};
114
Daniel Martensson687b13e2011-10-13 11:29:25 +0000[diff] [blame^]115/* Structure holds status of received CAIF frames processing */
116struct cfhsi_rx_state {
117 int state;
118 int nfrms;
119 int pld_len;
120 int retries;
121 bool piggy_desc;
122};
123
Dmitry.Tarnyagin40d69042011-06-01 03:29:18 +0000[diff] [blame]124/* Structure implemented by CAIF HSI drivers. */
125struct cfhsi {
126 struct caif_dev_common cfdev;
127 struct net_device *ndev;
128 struct platform_device *pdev;
129 struct sk_buff_head qhead;
130 struct cfhsi_drv drv;
131 struct cfhsi_dev *dev;
132 int tx_state;
Daniel Martensson687b13e2011-10-13 11:29:25 +0000[diff] [blame^]133 struct cfhsi_rx_state rx_state;
Dmitry.Tarnyagin40d69042011-06-01 03:29:18 +0000[diff] [blame]134 int rx_len;
135 u8 *rx_ptr;
136 u8 *tx_buf;
137 u8 *rx_buf;
138 spinlock_t lock;
139 int flow_off_sent;
140 u32 q_low_mark;
141 u32 q_high_mark;
142 struct list_head list;
143 struct work_struct wake_up_work;
144 struct work_struct wake_down_work;
Dmitry.Tarnyagin40d69042011-06-01 03:29:18 +0000[diff] [blame]145 struct workqueue_struct *wq;
146 wait_queue_head_t wake_up_wait;
147 wait_queue_head_t wake_down_wait;
148 wait_queue_head_t flush_fifo_wait;
149 struct timer_list timer;
Daniel Martensson687b13e2011-10-13 11:29:25 +0000[diff] [blame^]150 struct timer_list rx_slowpath_timer;
Dmitry.Tarnyagin40d69042011-06-01 03:29:18 +0000[diff] [blame]151 unsigned long bits;
152};
153
154extern struct platform_driver cfhsi_driver;
155
156#endif /* CAIF_HSI_H_ */