David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 1 | /* |
| 2 | * "RTT as Real Time Clock" driver for AT91SAM9 SoC family |
| 3 | * |
| 4 | * (C) 2007 Michel Benoit |
| 5 | * |
| 6 | * Based on rtc-at91rm9200.c by Rick Bronson |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License |
| 10 | * as published by the Free Software Foundation; either version |
| 11 | * 2 of the License, or (at your option) any later version. |
| 12 | */ |
| 13 | |
Alexandre Belloni | 6932ff5 | 2015-07-28 21:49:24 +0200 | [diff] [blame^] | 14 | #include <linux/clk.h> |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 15 | #include <linux/interrupt.h> |
| 16 | #include <linux/ioctl.h> |
Jingoo Han | 9d42e46 | 2013-04-29 16:20:35 -0700 | [diff] [blame] | 17 | #include <linux/io.h> |
Alexandre Belloni | 6932ff5 | 2015-07-28 21:49:24 +0200 | [diff] [blame^] | 18 | #include <linux/kernel.h> |
Boris BREZILLON | 43e112b | 2014-09-23 13:14:44 +0200 | [diff] [blame] | 19 | #include <linux/mfd/syscon.h> |
Alexandre Belloni | 6932ff5 | 2015-07-28 21:49:24 +0200 | [diff] [blame^] | 20 | #include <linux/module.h> |
| 21 | #include <linux/platform_data/atmel.h> |
| 22 | #include <linux/platform_device.h> |
Boris BREZILLON | 43e112b | 2014-09-23 13:14:44 +0200 | [diff] [blame] | 23 | #include <linux/regmap.h> |
Alexandre Belloni | 6932ff5 | 2015-07-28 21:49:24 +0200 | [diff] [blame^] | 24 | #include <linux/rtc.h> |
| 25 | #include <linux/slab.h> |
Boris BREZILLON | 603b1a2 | 2015-03-02 10:18:14 +0100 | [diff] [blame] | 26 | #include <linux/suspend.h> |
Alexandre Belloni | 6932ff5 | 2015-07-28 21:49:24 +0200 | [diff] [blame^] | 27 | #include <linux/time.h> |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 28 | |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 29 | /* |
| 30 | * This driver uses two configurable hardware resources that live in the |
| 31 | * AT91SAM9 backup power domain (intended to be powered at all times) |
| 32 | * to implement the Real Time Clock interfaces |
| 33 | * |
| 34 | * - A "Real-time Timer" (RTT) counts up in seconds from a base time. |
| 35 | * We can't assign the counter value (CRTV) ... but we can reset it. |
| 36 | * |
| 37 | * - One of the "General Purpose Backup Registers" (GPBRs) holds the |
| 38 | * base time, normally an offset from the beginning of the POSIX |
| 39 | * epoch (1970-Jan-1 00:00:00 UTC). Some systems also include the |
| 40 | * local timezone's offset. |
| 41 | * |
| 42 | * The RTC's value is the RTT counter plus that offset. The RTC's alarm |
| 43 | * is likewise a base (ALMV) plus that offset. |
| 44 | * |
| 45 | * Not all RTTs will be used as RTCs; some systems have multiple RTTs to |
| 46 | * choose from, or a "real" RTC module. All systems have multiple GPBR |
| 47 | * registers available, likewise usable for more than "RTC" support. |
| 48 | */ |
| 49 | |
Boris BREZILLON | 6575bd7 | 2014-09-23 13:13:29 +0200 | [diff] [blame] | 50 | #define AT91_RTT_MR 0x00 /* Real-time Mode Register */ |
| 51 | #define AT91_RTT_RTPRES (0xffff << 0) /* Real-time Timer Prescaler Value */ |
| 52 | #define AT91_RTT_ALMIEN (1 << 16) /* Alarm Interrupt Enable */ |
| 53 | #define AT91_RTT_RTTINCIEN (1 << 17) /* Real Time Timer Increment Interrupt Enable */ |
| 54 | #define AT91_RTT_RTTRST (1 << 18) /* Real Time Timer Restart */ |
| 55 | |
| 56 | #define AT91_RTT_AR 0x04 /* Real-time Alarm Register */ |
| 57 | #define AT91_RTT_ALMV (0xffffffff) /* Alarm Value */ |
| 58 | |
| 59 | #define AT91_RTT_VR 0x08 /* Real-time Value Register */ |
| 60 | #define AT91_RTT_CRTV (0xffffffff) /* Current Real-time Value */ |
| 61 | |
| 62 | #define AT91_RTT_SR 0x0c /* Real-time Status Register */ |
| 63 | #define AT91_RTT_ALMS (1 << 0) /* Real-time Alarm Status */ |
| 64 | #define AT91_RTT_RTTINC (1 << 1) /* Real-time Timer Increment */ |
| 65 | |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 66 | /* |
| 67 | * We store ALARM_DISABLED in ALMV to record that no alarm is set. |
| 68 | * It's also the reset value for that field. |
| 69 | */ |
| 70 | #define ALARM_DISABLED ((u32)~0) |
| 71 | |
| 72 | |
| 73 | struct sam9_rtc { |
| 74 | void __iomem *rtt; |
| 75 | struct rtc_device *rtcdev; |
| 76 | u32 imr; |
Boris BREZILLON | 43e112b | 2014-09-23 13:14:44 +0200 | [diff] [blame] | 77 | struct regmap *gpbr; |
| 78 | unsigned int gpbr_offset; |
Ludovic Desroches | e402af6 | 2012-08-14 11:19:22 +0200 | [diff] [blame] | 79 | int irq; |
Boris BREZILLON | a975f47 | 2014-09-23 16:41:07 +0200 | [diff] [blame] | 80 | struct clk *sclk; |
Boris BREZILLON | 603b1a2 | 2015-03-02 10:18:14 +0100 | [diff] [blame] | 81 | bool suspended; |
| 82 | unsigned long events; |
| 83 | spinlock_t lock; |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 84 | }; |
| 85 | |
| 86 | #define rtt_readl(rtc, field) \ |
Boris BREZILLON | 272f1df | 2014-09-23 13:13:52 +0200 | [diff] [blame] | 87 | readl((rtc)->rtt + AT91_RTT_ ## field) |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 88 | #define rtt_writel(rtc, field, val) \ |
Boris BREZILLON | 272f1df | 2014-09-23 13:13:52 +0200 | [diff] [blame] | 89 | writel((val), (rtc)->rtt + AT91_RTT_ ## field) |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 90 | |
Boris BREZILLON | 43e112b | 2014-09-23 13:14:44 +0200 | [diff] [blame] | 91 | static inline unsigned int gpbr_readl(struct sam9_rtc *rtc) |
| 92 | { |
| 93 | unsigned int val; |
| 94 | |
| 95 | regmap_read(rtc->gpbr, rtc->gpbr_offset, &val); |
| 96 | |
| 97 | return val; |
| 98 | } |
| 99 | |
| 100 | static inline void gpbr_writel(struct sam9_rtc *rtc, unsigned int val) |
| 101 | { |
| 102 | regmap_write(rtc->gpbr, rtc->gpbr_offset, val); |
| 103 | } |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 104 | |
| 105 | /* |
| 106 | * Read current time and date in RTC |
| 107 | */ |
| 108 | static int at91_rtc_readtime(struct device *dev, struct rtc_time *tm) |
| 109 | { |
| 110 | struct sam9_rtc *rtc = dev_get_drvdata(dev); |
| 111 | u32 secs, secs2; |
| 112 | u32 offset; |
| 113 | |
| 114 | /* read current time offset */ |
| 115 | offset = gpbr_readl(rtc); |
| 116 | if (offset == 0) |
| 117 | return -EILSEQ; |
| 118 | |
| 119 | /* reread the counter to help sync the two clock domains */ |
| 120 | secs = rtt_readl(rtc, VR); |
| 121 | secs2 = rtt_readl(rtc, VR); |
| 122 | if (secs != secs2) |
| 123 | secs = rtt_readl(rtc, VR); |
| 124 | |
| 125 | rtc_time_to_tm(offset + secs, tm); |
| 126 | |
| 127 | dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "readtime", |
| 128 | 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday, |
| 129 | tm->tm_hour, tm->tm_min, tm->tm_sec); |
| 130 | |
| 131 | return 0; |
| 132 | } |
| 133 | |
| 134 | /* |
| 135 | * Set current time and date in RTC |
| 136 | */ |
| 137 | static int at91_rtc_settime(struct device *dev, struct rtc_time *tm) |
| 138 | { |
| 139 | struct sam9_rtc *rtc = dev_get_drvdata(dev); |
| 140 | int err; |
| 141 | u32 offset, alarm, mr; |
| 142 | unsigned long secs; |
| 143 | |
| 144 | dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "settime", |
| 145 | 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday, |
| 146 | tm->tm_hour, tm->tm_min, tm->tm_sec); |
| 147 | |
| 148 | err = rtc_tm_to_time(tm, &secs); |
| 149 | if (err != 0) |
| 150 | return err; |
| 151 | |
| 152 | mr = rtt_readl(rtc, MR); |
| 153 | |
| 154 | /* disable interrupts */ |
| 155 | rtt_writel(rtc, MR, mr & ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN)); |
| 156 | |
| 157 | /* read current time offset */ |
| 158 | offset = gpbr_readl(rtc); |
| 159 | |
| 160 | /* store the new base time in a battery backup register */ |
| 161 | secs += 1; |
| 162 | gpbr_writel(rtc, secs); |
| 163 | |
| 164 | /* adjust the alarm time for the new base */ |
| 165 | alarm = rtt_readl(rtc, AR); |
| 166 | if (alarm != ALARM_DISABLED) { |
| 167 | if (offset > secs) { |
| 168 | /* time jumped backwards, increase time until alarm */ |
| 169 | alarm += (offset - secs); |
| 170 | } else if ((alarm + offset) > secs) { |
| 171 | /* time jumped forwards, decrease time until alarm */ |
| 172 | alarm -= (secs - offset); |
| 173 | } else { |
| 174 | /* time jumped past the alarm, disable alarm */ |
| 175 | alarm = ALARM_DISABLED; |
| 176 | mr &= ~AT91_RTT_ALMIEN; |
| 177 | } |
| 178 | rtt_writel(rtc, AR, alarm); |
| 179 | } |
| 180 | |
| 181 | /* reset the timer, and re-enable interrupts */ |
| 182 | rtt_writel(rtc, MR, mr | AT91_RTT_RTTRST); |
| 183 | |
| 184 | return 0; |
| 185 | } |
| 186 | |
| 187 | static int at91_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm) |
| 188 | { |
| 189 | struct sam9_rtc *rtc = dev_get_drvdata(dev); |
| 190 | struct rtc_time *tm = &alrm->time; |
| 191 | u32 alarm = rtt_readl(rtc, AR); |
| 192 | u32 offset; |
| 193 | |
| 194 | offset = gpbr_readl(rtc); |
| 195 | if (offset == 0) |
| 196 | return -EILSEQ; |
| 197 | |
Julia Lawall | 870a276 | 2010-03-05 13:44:23 -0800 | [diff] [blame] | 198 | memset(alrm, 0, sizeof(*alrm)); |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 199 | if (alarm != ALARM_DISABLED && offset != 0) { |
| 200 | rtc_time_to_tm(offset + alarm, tm); |
| 201 | |
| 202 | dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "readalarm", |
| 203 | 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday, |
| 204 | tm->tm_hour, tm->tm_min, tm->tm_sec); |
| 205 | |
| 206 | if (rtt_readl(rtc, MR) & AT91_RTT_ALMIEN) |
| 207 | alrm->enabled = 1; |
| 208 | } |
| 209 | |
| 210 | return 0; |
| 211 | } |
| 212 | |
| 213 | static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) |
| 214 | { |
| 215 | struct sam9_rtc *rtc = dev_get_drvdata(dev); |
| 216 | struct rtc_time *tm = &alrm->time; |
| 217 | unsigned long secs; |
| 218 | u32 offset; |
| 219 | u32 mr; |
| 220 | int err; |
| 221 | |
| 222 | err = rtc_tm_to_time(tm, &secs); |
| 223 | if (err != 0) |
| 224 | return err; |
| 225 | |
| 226 | offset = gpbr_readl(rtc); |
| 227 | if (offset == 0) { |
| 228 | /* time is not set */ |
| 229 | return -EILSEQ; |
| 230 | } |
| 231 | mr = rtt_readl(rtc, MR); |
| 232 | rtt_writel(rtc, MR, mr & ~AT91_RTT_ALMIEN); |
| 233 | |
| 234 | /* alarm in the past? finish and leave disabled */ |
| 235 | if (secs <= offset) { |
| 236 | rtt_writel(rtc, AR, ALARM_DISABLED); |
| 237 | return 0; |
| 238 | } |
| 239 | |
| 240 | /* else set alarm and maybe enable it */ |
| 241 | rtt_writel(rtc, AR, secs - offset); |
| 242 | if (alrm->enabled) |
| 243 | rtt_writel(rtc, MR, mr | AT91_RTT_ALMIEN); |
| 244 | |
| 245 | dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "setalarm", |
| 246 | tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_hour, |
| 247 | tm->tm_min, tm->tm_sec); |
| 248 | |
| 249 | return 0; |
| 250 | } |
| 251 | |
John Stultz | 16380c1 | 2011-02-02 17:02:41 -0800 | [diff] [blame] | 252 | static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) |
| 253 | { |
| 254 | struct sam9_rtc *rtc = dev_get_drvdata(dev); |
| 255 | u32 mr = rtt_readl(rtc, MR); |
| 256 | |
| 257 | dev_dbg(dev, "alarm_irq_enable: enabled=%08x, mr %08x\n", enabled, mr); |
| 258 | if (enabled) |
| 259 | rtt_writel(rtc, MR, mr | AT91_RTT_ALMIEN); |
| 260 | else |
| 261 | rtt_writel(rtc, MR, mr & ~AT91_RTT_ALMIEN); |
| 262 | return 0; |
| 263 | } |
| 264 | |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 265 | /* |
| 266 | * Provide additional RTC information in /proc/driver/rtc |
| 267 | */ |
| 268 | static int at91_rtc_proc(struct device *dev, struct seq_file *seq) |
| 269 | { |
| 270 | struct sam9_rtc *rtc = dev_get_drvdata(dev); |
| 271 | u32 mr = mr = rtt_readl(rtc, MR); |
| 272 | |
| 273 | seq_printf(seq, "update_IRQ\t: %s\n", |
| 274 | (mr & AT91_RTT_RTTINCIEN) ? "yes" : "no"); |
| 275 | return 0; |
| 276 | } |
| 277 | |
Boris BREZILLON | 603b1a2 | 2015-03-02 10:18:14 +0100 | [diff] [blame] | 278 | static irqreturn_t at91_rtc_cache_events(struct sam9_rtc *rtc) |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 279 | { |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 280 | u32 sr, mr; |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 281 | |
| 282 | /* Shared interrupt may be for another device. Note: reading |
| 283 | * SR clears it, so we must only read it in this irq handler! |
| 284 | */ |
| 285 | mr = rtt_readl(rtc, MR) & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN); |
David Brownell | 9fedc9f | 2008-03-19 17:01:09 -0700 | [diff] [blame] | 286 | sr = rtt_readl(rtc, SR) & (mr >> 16); |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 287 | if (!sr) |
| 288 | return IRQ_NONE; |
| 289 | |
| 290 | /* alarm status */ |
| 291 | if (sr & AT91_RTT_ALMS) |
Boris BREZILLON | 603b1a2 | 2015-03-02 10:18:14 +0100 | [diff] [blame] | 292 | rtc->events |= (RTC_AF | RTC_IRQF); |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 293 | |
| 294 | /* timer update/increment */ |
| 295 | if (sr & AT91_RTT_RTTINC) |
Boris BREZILLON | 603b1a2 | 2015-03-02 10:18:14 +0100 | [diff] [blame] | 296 | rtc->events |= (RTC_UF | RTC_IRQF); |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 297 | |
| 298 | return IRQ_HANDLED; |
| 299 | } |
| 300 | |
Boris BREZILLON | 603b1a2 | 2015-03-02 10:18:14 +0100 | [diff] [blame] | 301 | static void at91_rtc_flush_events(struct sam9_rtc *rtc) |
| 302 | { |
| 303 | if (!rtc->events) |
| 304 | return; |
| 305 | |
| 306 | rtc_update_irq(rtc->rtcdev, 1, rtc->events); |
| 307 | rtc->events = 0; |
| 308 | |
| 309 | pr_debug("%s: num=%ld, events=0x%02lx\n", __func__, |
| 310 | rtc->events >> 8, rtc->events & 0x000000FF); |
| 311 | } |
| 312 | |
| 313 | /* |
| 314 | * IRQ handler for the RTC |
| 315 | */ |
| 316 | static irqreturn_t at91_rtc_interrupt(int irq, void *_rtc) |
| 317 | { |
| 318 | struct sam9_rtc *rtc = _rtc; |
| 319 | int ret; |
| 320 | |
| 321 | spin_lock(&rtc->lock); |
| 322 | |
| 323 | ret = at91_rtc_cache_events(rtc); |
| 324 | |
| 325 | /* We're called in suspended state */ |
| 326 | if (rtc->suspended) { |
| 327 | /* Mask irqs coming from this peripheral */ |
| 328 | rtt_writel(rtc, MR, |
| 329 | rtt_readl(rtc, MR) & |
| 330 | ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN)); |
| 331 | /* Trigger a system wakeup */ |
| 332 | pm_system_wakeup(); |
| 333 | } else { |
| 334 | at91_rtc_flush_events(rtc); |
| 335 | } |
| 336 | |
| 337 | spin_unlock(&rtc->lock); |
| 338 | |
| 339 | return ret; |
| 340 | } |
| 341 | |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 342 | static const struct rtc_class_ops at91_rtc_ops = { |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 343 | .read_time = at91_rtc_readtime, |
| 344 | .set_time = at91_rtc_settime, |
| 345 | .read_alarm = at91_rtc_readalarm, |
| 346 | .set_alarm = at91_rtc_setalarm, |
| 347 | .proc = at91_rtc_proc, |
Jelle Martijn Kok | d403585 | 2011-02-25 11:13:55 -0800 | [diff] [blame] | 348 | .alarm_irq_enable = at91_rtc_alarm_irq_enable, |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 349 | }; |
| 350 | |
Krzysztof Kozlowski | bddd8dd | 2015-02-13 14:40:48 -0800 | [diff] [blame] | 351 | static const struct regmap_config gpbr_regmap_config = { |
Boris BREZILLON | 43e112b | 2014-09-23 13:14:44 +0200 | [diff] [blame] | 352 | .reg_bits = 32, |
| 353 | .val_bits = 32, |
| 354 | .reg_stride = 4, |
| 355 | }; |
| 356 | |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 357 | /* |
| 358 | * Initialize and install RTC driver |
| 359 | */ |
Greg Kroah-Hartman | 5a167f4 | 2012-12-21 13:09:38 -0800 | [diff] [blame] | 360 | static int at91_rtc_probe(struct platform_device *pdev) |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 361 | { |
Boris BREZILLON | d41da3e | 2014-09-23 13:14:09 +0200 | [diff] [blame] | 362 | struct resource *r; |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 363 | struct sam9_rtc *rtc; |
Ludovic Desroches | e402af6 | 2012-08-14 11:19:22 +0200 | [diff] [blame] | 364 | int ret, irq; |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 365 | u32 mr; |
Boris BREZILLON | a975f47 | 2014-09-23 16:41:07 +0200 | [diff] [blame] | 366 | unsigned int sclk_rate; |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 367 | |
Ludovic Desroches | e402af6 | 2012-08-14 11:19:22 +0200 | [diff] [blame] | 368 | irq = platform_get_irq(pdev, 0); |
| 369 | if (irq < 0) { |
| 370 | dev_err(&pdev->dev, "failed to get interrupt resource\n"); |
| 371 | return irq; |
| 372 | } |
| 373 | |
Jingoo Han | 9d42e46 | 2013-04-29 16:20:35 -0700 | [diff] [blame] | 374 | rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL); |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 375 | if (!rtc) |
| 376 | return -ENOMEM; |
| 377 | |
Ludovic Desroches | e402af6 | 2012-08-14 11:19:22 +0200 | [diff] [blame] | 378 | rtc->irq = irq; |
| 379 | |
David Brownell | 9fedc9f | 2008-03-19 17:01:09 -0700 | [diff] [blame] | 380 | /* platform setup code should have handled this; sigh */ |
| 381 | if (!device_can_wakeup(&pdev->dev)) |
| 382 | device_init_wakeup(&pdev->dev, 1); |
| 383 | |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 384 | platform_set_drvdata(pdev, rtc); |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 385 | |
Boris BREZILLON | d41da3e | 2014-09-23 13:14:09 +0200 | [diff] [blame] | 386 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 387 | rtc->rtt = devm_ioremap_resource(&pdev->dev, r); |
| 388 | if (IS_ERR(rtc->rtt)) |
| 389 | return PTR_ERR(rtc->rtt); |
| 390 | |
Boris BREZILLON | 43e112b | 2014-09-23 13:14:44 +0200 | [diff] [blame] | 391 | if (!pdev->dev.of_node) { |
| 392 | /* |
| 393 | * TODO: Remove this code chunk when removing non DT board |
| 394 | * support. Remember to remove the gpbr_regmap_config |
| 395 | * variable too. |
| 396 | */ |
| 397 | void __iomem *gpbr; |
| 398 | |
| 399 | r = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
| 400 | gpbr = devm_ioremap_resource(&pdev->dev, r); |
| 401 | if (IS_ERR(gpbr)) |
| 402 | return PTR_ERR(gpbr); |
| 403 | |
| 404 | rtc->gpbr = regmap_init_mmio(NULL, gpbr, |
| 405 | &gpbr_regmap_config); |
| 406 | } else { |
| 407 | struct of_phandle_args args; |
| 408 | |
| 409 | ret = of_parse_phandle_with_fixed_args(pdev->dev.of_node, |
| 410 | "atmel,rtt-rtc-time-reg", 1, 0, |
| 411 | &args); |
| 412 | if (ret) |
| 413 | return ret; |
| 414 | |
| 415 | rtc->gpbr = syscon_node_to_regmap(args.np); |
| 416 | rtc->gpbr_offset = args.args[0]; |
| 417 | } |
| 418 | |
| 419 | if (IS_ERR(rtc->gpbr)) { |
| 420 | dev_err(&pdev->dev, "failed to retrieve gpbr regmap, aborting.\n"); |
| 421 | return -ENOMEM; |
| 422 | } |
Jean-Christophe PLAGNIOL-VILLARD | b3af8b4 | 2012-02-15 21:24:46 +0800 | [diff] [blame] | 423 | |
Boris BREZILLON | a975f47 | 2014-09-23 16:41:07 +0200 | [diff] [blame] | 424 | rtc->sclk = devm_clk_get(&pdev->dev, NULL); |
| 425 | if (IS_ERR(rtc->sclk)) |
| 426 | return PTR_ERR(rtc->sclk); |
| 427 | |
| 428 | sclk_rate = clk_get_rate(rtc->sclk); |
| 429 | if (!sclk_rate || sclk_rate > AT91_RTT_RTPRES) { |
| 430 | dev_err(&pdev->dev, "Invalid slow clock rate\n"); |
| 431 | return -EINVAL; |
| 432 | } |
| 433 | |
| 434 | ret = clk_prepare_enable(rtc->sclk); |
| 435 | if (ret) { |
| 436 | dev_err(&pdev->dev, "Could not enable slow clock\n"); |
| 437 | return ret; |
| 438 | } |
| 439 | |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 440 | mr = rtt_readl(rtc, MR); |
| 441 | |
| 442 | /* unless RTT is counting at 1 Hz, re-initialize it */ |
Boris BREZILLON | a975f47 | 2014-09-23 16:41:07 +0200 | [diff] [blame] | 443 | if ((mr & AT91_RTT_RTPRES) != sclk_rate) { |
| 444 | mr = AT91_RTT_RTTRST | (sclk_rate & AT91_RTT_RTPRES); |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 445 | gpbr_writel(rtc, 0); |
| 446 | } |
| 447 | |
| 448 | /* disable all interrupts (same as on shutdown path) */ |
| 449 | mr &= ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN); |
| 450 | rtt_writel(rtc, MR, mr); |
| 451 | |
Jingoo Han | 9d42e46 | 2013-04-29 16:20:35 -0700 | [diff] [blame] | 452 | rtc->rtcdev = devm_rtc_device_register(&pdev->dev, pdev->name, |
| 453 | &at91_rtc_ops, THIS_MODULE); |
Alexandre Belloni | ffe60fc | 2015-07-28 21:46:15 +0200 | [diff] [blame] | 454 | if (IS_ERR(rtc->rtcdev)) { |
| 455 | ret = PTR_ERR(rtc->rtcdev); |
| 456 | goto err_clk; |
| 457 | } |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 458 | |
| 459 | /* register irq handler after we know what name we'll use */ |
Jingoo Han | 9d42e46 | 2013-04-29 16:20:35 -0700 | [diff] [blame] | 460 | ret = devm_request_irq(&pdev->dev, rtc->irq, at91_rtc_interrupt, |
Boris BREZILLON | 603b1a2 | 2015-03-02 10:18:14 +0100 | [diff] [blame] | 461 | IRQF_SHARED | IRQF_COND_SUSPEND, |
| 462 | dev_name(&rtc->rtcdev->dev), rtc); |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 463 | if (ret) { |
Ludovic Desroches | e402af6 | 2012-08-14 11:19:22 +0200 | [diff] [blame] | 464 | dev_dbg(&pdev->dev, "can't share IRQ %d?\n", rtc->irq); |
Alexandre Belloni | ffe60fc | 2015-07-28 21:46:15 +0200 | [diff] [blame] | 465 | goto err_clk; |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 466 | } |
| 467 | |
| 468 | /* NOTE: sam9260 rev A silicon has a ROM bug which resets the |
| 469 | * RTT on at least some reboots. If you have that chip, you must |
| 470 | * initialize the time from some external source like a GPS, wall |
| 471 | * clock, discrete RTC, etc |
| 472 | */ |
| 473 | |
| 474 | if (gpbr_readl(rtc) == 0) |
| 475 | dev_warn(&pdev->dev, "%s: SET TIME!\n", |
Kay Sievers | 744bcb1 | 2009-03-24 16:38:22 -0700 | [diff] [blame] | 476 | dev_name(&rtc->rtcdev->dev)); |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 477 | |
| 478 | return 0; |
Alexandre Belloni | ffe60fc | 2015-07-28 21:46:15 +0200 | [diff] [blame] | 479 | |
| 480 | err_clk: |
| 481 | clk_disable_unprepare(rtc->sclk); |
| 482 | |
| 483 | return ret; |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 484 | } |
| 485 | |
| 486 | /* |
| 487 | * Disable and remove the RTC driver |
| 488 | */ |
Greg Kroah-Hartman | 5a167f4 | 2012-12-21 13:09:38 -0800 | [diff] [blame] | 489 | static int at91_rtc_remove(struct platform_device *pdev) |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 490 | { |
| 491 | struct sam9_rtc *rtc = platform_get_drvdata(pdev); |
| 492 | u32 mr = rtt_readl(rtc, MR); |
| 493 | |
| 494 | /* disable all interrupts */ |
| 495 | rtt_writel(rtc, MR, mr & ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN)); |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 496 | |
Alexandre Belloni | 73ab31c | 2015-07-28 21:47:57 +0200 | [diff] [blame] | 497 | clk_disable_unprepare(rtc->sclk); |
Boris BREZILLON | a975f47 | 2014-09-23 16:41:07 +0200 | [diff] [blame] | 498 | |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 499 | return 0; |
| 500 | } |
| 501 | |
| 502 | static void at91_rtc_shutdown(struct platform_device *pdev) |
| 503 | { |
| 504 | struct sam9_rtc *rtc = platform_get_drvdata(pdev); |
| 505 | u32 mr = rtt_readl(rtc, MR); |
| 506 | |
| 507 | rtc->imr = mr & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN); |
| 508 | rtt_writel(rtc, MR, mr & ~rtc->imr); |
| 509 | } |
| 510 | |
Jingoo Han | 4dc8eb1 | 2013-04-29 16:20:58 -0700 | [diff] [blame] | 511 | #ifdef CONFIG_PM_SLEEP |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 512 | |
| 513 | /* AT91SAM9 RTC Power management control */ |
| 514 | |
Jingoo Han | 4dc8eb1 | 2013-04-29 16:20:58 -0700 | [diff] [blame] | 515 | static int at91_rtc_suspend(struct device *dev) |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 516 | { |
Jingoo Han | 4dc8eb1 | 2013-04-29 16:20:58 -0700 | [diff] [blame] | 517 | struct sam9_rtc *rtc = dev_get_drvdata(dev); |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 518 | u32 mr = rtt_readl(rtc, MR); |
| 519 | |
| 520 | /* |
| 521 | * This IRQ is shared with DBGU and other hardware which isn't |
| 522 | * necessarily a wakeup event source. |
| 523 | */ |
| 524 | rtc->imr = mr & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN); |
| 525 | if (rtc->imr) { |
Jingoo Han | 4dc8eb1 | 2013-04-29 16:20:58 -0700 | [diff] [blame] | 526 | if (device_may_wakeup(dev) && (mr & AT91_RTT_ALMIEN)) { |
Boris BREZILLON | 603b1a2 | 2015-03-02 10:18:14 +0100 | [diff] [blame] | 527 | unsigned long flags; |
| 528 | |
Ludovic Desroches | e402af6 | 2012-08-14 11:19:22 +0200 | [diff] [blame] | 529 | enable_irq_wake(rtc->irq); |
Boris BREZILLON | 603b1a2 | 2015-03-02 10:18:14 +0100 | [diff] [blame] | 530 | spin_lock_irqsave(&rtc->lock, flags); |
| 531 | rtc->suspended = true; |
| 532 | spin_unlock_irqrestore(&rtc->lock, flags); |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 533 | /* don't let RTTINC cause wakeups */ |
| 534 | if (mr & AT91_RTT_RTTINCIEN) |
| 535 | rtt_writel(rtc, MR, mr & ~AT91_RTT_RTTINCIEN); |
| 536 | } else |
| 537 | rtt_writel(rtc, MR, mr & ~rtc->imr); |
| 538 | } |
| 539 | |
| 540 | return 0; |
| 541 | } |
| 542 | |
Jingoo Han | 4dc8eb1 | 2013-04-29 16:20:58 -0700 | [diff] [blame] | 543 | static int at91_rtc_resume(struct device *dev) |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 544 | { |
Jingoo Han | 4dc8eb1 | 2013-04-29 16:20:58 -0700 | [diff] [blame] | 545 | struct sam9_rtc *rtc = dev_get_drvdata(dev); |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 546 | u32 mr; |
| 547 | |
| 548 | if (rtc->imr) { |
Boris BREZILLON | 603b1a2 | 2015-03-02 10:18:14 +0100 | [diff] [blame] | 549 | unsigned long flags; |
| 550 | |
Jingoo Han | 4dc8eb1 | 2013-04-29 16:20:58 -0700 | [diff] [blame] | 551 | if (device_may_wakeup(dev)) |
Ludovic Desroches | e402af6 | 2012-08-14 11:19:22 +0200 | [diff] [blame] | 552 | disable_irq_wake(rtc->irq); |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 553 | mr = rtt_readl(rtc, MR); |
| 554 | rtt_writel(rtc, MR, mr | rtc->imr); |
Boris BREZILLON | 603b1a2 | 2015-03-02 10:18:14 +0100 | [diff] [blame] | 555 | |
| 556 | spin_lock_irqsave(&rtc->lock, flags); |
| 557 | rtc->suspended = false; |
| 558 | at91_rtc_cache_events(rtc); |
| 559 | at91_rtc_flush_events(rtc); |
| 560 | spin_unlock_irqrestore(&rtc->lock, flags); |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 561 | } |
| 562 | |
| 563 | return 0; |
| 564 | } |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 565 | #endif |
| 566 | |
Jingoo Han | 4dc8eb1 | 2013-04-29 16:20:58 -0700 | [diff] [blame] | 567 | static SIMPLE_DEV_PM_OPS(at91_rtc_pm_ops, at91_rtc_suspend, at91_rtc_resume); |
| 568 | |
Boris BREZILLON | 07d4d72 | 2014-09-23 13:14:24 +0200 | [diff] [blame] | 569 | #ifdef CONFIG_OF |
| 570 | static const struct of_device_id at91_rtc_dt_ids[] = { |
| 571 | { .compatible = "atmel,at91sam9260-rtt" }, |
| 572 | { /* sentinel */ } |
| 573 | }; |
| 574 | MODULE_DEVICE_TABLE(of, at91_rtc_dt_ids); |
| 575 | #endif |
| 576 | |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 577 | static struct platform_driver at91_rtc_driver = { |
Jean-Christophe PLAGNIOL-VILLARD | 205056a | 2012-02-15 20:51:37 +0800 | [diff] [blame] | 578 | .probe = at91_rtc_probe, |
Greg Kroah-Hartman | 5a167f4 | 2012-12-21 13:09:38 -0800 | [diff] [blame] | 579 | .remove = at91_rtc_remove, |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 580 | .shutdown = at91_rtc_shutdown, |
Jean-Christophe PLAGNIOL-VILLARD | 205056a | 2012-02-15 20:51:37 +0800 | [diff] [blame] | 581 | .driver = { |
| 582 | .name = "rtc-at91sam9", |
Jingoo Han | 4dc8eb1 | 2013-04-29 16:20:58 -0700 | [diff] [blame] | 583 | .pm = &at91_rtc_pm_ops, |
Boris BREZILLON | 07d4d72 | 2014-09-23 13:14:24 +0200 | [diff] [blame] | 584 | .of_match_table = of_match_ptr(at91_rtc_dt_ids), |
Jean-Christophe PLAGNIOL-VILLARD | 205056a | 2012-02-15 20:51:37 +0800 | [diff] [blame] | 585 | }, |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 586 | }; |
| 587 | |
Devendra Naga | 477d30d | 2012-10-04 17:13:54 -0700 | [diff] [blame] | 588 | module_platform_driver(at91_rtc_driver); |
David Brownell | 4cdf854 | 2008-02-06 01:38:59 -0800 | [diff] [blame] | 589 | |
| 590 | MODULE_AUTHOR("Michel Benoit"); |
| 591 | MODULE_DESCRIPTION("RTC driver for Atmel AT91SAM9x"); |
| 592 | MODULE_LICENSE("GPL"); |