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Thomas Gleixner6eda5832009-05-01 18:29:57 +02001#ifndef _PERF_PERF_H
2#define _PERF_PERF_H
3
David Howellsd2709c72012-11-19 22:21:03 +00004#include <asm/unistd.h>
5
Vince Weaver11d15782009-07-08 17:46:14 -04006#if defined(__i386__)
Peter Zijlstraa94d3422013-10-30 11:42:46 +01007#define mb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
8#define wmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
Vince Weaver11d15782009-07-08 17:46:14 -04009#define rmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
10#define cpu_relax() asm volatile("rep; nop" ::: "memory");
Stephane Eranianfbe96f22011-09-30 15:40:40 +020011#define CPUINFO_PROC "model name"
Ingo Molnareae7a752012-03-14 12:42:34 -030012#ifndef __NR_perf_event_open
13# define __NR_perf_event_open 336
14#endif
Vince Weaver11d15782009-07-08 17:46:14 -040015#endif
16
17#if defined(__x86_64__)
Peter Zijlstraa94d3422013-10-30 11:42:46 +010018#define mb() asm volatile("mfence" ::: "memory")
19#define wmb() asm volatile("sfence" ::: "memory")
Peter Zijlstra1a482f32009-05-23 18:28:58 +020020#define rmb() asm volatile("lfence" ::: "memory")
21#define cpu_relax() asm volatile("rep; nop" ::: "memory");
Stephane Eranianfbe96f22011-09-30 15:40:40 +020022#define CPUINFO_PROC "model name"
Ingo Molnareae7a752012-03-14 12:42:34 -030023#ifndef __NR_perf_event_open
24# define __NR_perf_event_open 298
25#endif
Peter Zijlstra1a482f32009-05-23 18:28:58 +020026#endif
27
28#ifdef __powerpc__
Sukadev Bhattiprolu1483c2a2012-10-31 11:21:28 -070029#include "../../arch/powerpc/include/uapi/asm/unistd.h"
Peter Zijlstraa94d3422013-10-30 11:42:46 +010030#define mb() asm volatile ("sync" ::: "memory")
31#define wmb() asm volatile ("sync" ::: "memory")
Peter Zijlstra1a482f32009-05-23 18:28:58 +020032#define rmb() asm volatile ("sync" ::: "memory")
Stephane Eranianfbe96f22011-09-30 15:40:40 +020033#define CPUINFO_PROC "cpu"
Peter Zijlstra1a482f32009-05-23 18:28:58 +020034#endif
35
Martin Schwidefsky12310e92009-06-22 12:08:22 +020036#ifdef __s390__
Peter Zijlstraa94d3422013-10-30 11:42:46 +010037#define mb() asm volatile("bcr 15,0" ::: "memory")
38#define wmb() asm volatile("bcr 15,0" ::: "memory")
Martin Schwidefsky12310e92009-06-22 12:08:22 +020039#define rmb() asm volatile("bcr 15,0" ::: "memory")
Martin Schwidefsky12310e92009-06-22 12:08:22 +020040#endif
41
Paul Mundtfebe8342009-06-25 14:41:57 +090042#ifdef __sh__
Paul Mundtfebe8342009-06-25 14:41:57 +090043#if defined(__SH4A__) || defined(__SH5__)
Peter Zijlstraa94d3422013-10-30 11:42:46 +010044# define mb() asm volatile("synco" ::: "memory")
45# define wmb() asm volatile("synco" ::: "memory")
Paul Mundtfebe8342009-06-25 14:41:57 +090046# define rmb() asm volatile("synco" ::: "memory")
47#else
Peter Zijlstraa94d3422013-10-30 11:42:46 +010048# define mb() asm volatile("" ::: "memory")
49# define wmb() asm volatile("" ::: "memory")
Paul Mundtfebe8342009-06-25 14:41:57 +090050# define rmb() asm volatile("" ::: "memory")
51#endif
Stephane Eranianfbe96f22011-09-30 15:40:40 +020052#define CPUINFO_PROC "cpu type"
Paul Mundtfebe8342009-06-25 14:41:57 +090053#endif
54
Kyle McMartin2d4618d2009-06-23 21:38:49 -040055#ifdef __hppa__
Peter Zijlstraa94d3422013-10-30 11:42:46 +010056#define mb() asm volatile("" ::: "memory")
57#define wmb() asm volatile("" ::: "memory")
Kyle McMartin2d4618d2009-06-23 21:38:49 -040058#define rmb() asm volatile("" ::: "memory")
Stephane Eranianfbe96f22011-09-30 15:40:40 +020059#define CPUINFO_PROC "cpu"
Kyle McMartin2d4618d2009-06-23 21:38:49 -040060#endif
61
Jens Axboe825c9fb2009-09-04 02:56:22 -070062#ifdef __sparc__
Peter Zijlstraa94d3422013-10-30 11:42:46 +010063#ifdef __LP64__
64#define mb() asm volatile("ba,pt %%xcc, 1f\n" \
65 "membar #StoreLoad\n" \
66 "1:\n":::"memory")
67#else
68#define mb() asm volatile("":::"memory")
69#endif
70#define wmb() asm volatile("":::"memory")
Jens Axboe825c9fb2009-09-04 02:56:22 -070071#define rmb() asm volatile("":::"memory")
Stephane Eranianfbe96f22011-09-30 15:40:40 +020072#define CPUINFO_PROC "cpu"
Jens Axboe825c9fb2009-09-04 02:56:22 -070073#endif
74
Michael Creefcd14b32009-10-26 21:32:06 +130075#ifdef __alpha__
Peter Zijlstraa94d3422013-10-30 11:42:46 +010076#define mb() asm volatile("mb" ::: "memory")
77#define wmb() asm volatile("wmb" ::: "memory")
Michael Creefcd14b32009-10-26 21:32:06 +130078#define rmb() asm volatile("mb" ::: "memory")
Stephane Eranianfbe96f22011-09-30 15:40:40 +020079#define CPUINFO_PROC "cpu model"
Michael Creefcd14b32009-10-26 21:32:06 +130080#endif
81
Luck, Tony11ada262009-11-17 09:05:56 -080082#ifdef __ia64__
Peter Zijlstraa94d3422013-10-30 11:42:46 +010083#define mb() asm volatile ("mf" ::: "memory")
84#define wmb() asm volatile ("mf" ::: "memory")
Luck, Tony11ada262009-11-17 09:05:56 -080085#define rmb() asm volatile ("mf" ::: "memory")
86#define cpu_relax() asm volatile ("hint @pause" ::: "memory")
Stephane Eranianfbe96f22011-09-30 15:40:40 +020087#define CPUINFO_PROC "model name"
Luck, Tony11ada262009-11-17 09:05:56 -080088#endif
89
Jamie Iles58e9f942009-12-11 12:20:09 +000090#ifdef __arm__
Jamie Iles58e9f942009-12-11 12:20:09 +000091/*
92 * Use the __kuser_memory_barrier helper in the CPU helper page. See
93 * arch/arm/kernel/entry-armv.S in the kernel source for details.
94 */
Peter Zijlstraa94d3422013-10-30 11:42:46 +010095#define mb() ((void(*)(void))0xffff0fa0)()
96#define wmb() ((void(*)(void))0xffff0fa0)()
Will Deaconda7196e2010-03-03 11:47:58 +000097#define rmb() ((void(*)(void))0xffff0fa0)()
Stephane Eranianfbe96f22011-09-30 15:40:40 +020098#define CPUINFO_PROC "Processor"
Jamie Iles58e9f942009-12-11 12:20:09 +000099#endif
100
Will Deacon03089682012-03-05 11:49:32 +0000101#ifdef __aarch64__
Peter Zijlstraa94d3422013-10-30 11:42:46 +0100102#define mb() asm volatile("dmb ish" ::: "memory")
103#define wmb() asm volatile("dmb ishld" ::: "memory")
104#define rmb() asm volatile("dmb ishst" ::: "memory")
Will Deacon03089682012-03-05 11:49:32 +0000105#define cpu_relax() asm volatile("yield" ::: "memory")
106#endif
107
Deng-Cheng Zhuc1e028e2010-10-12 19:33:33 +0800108#ifdef __mips__
Peter Zijlstraa94d3422013-10-30 11:42:46 +0100109#define mb() asm volatile( \
Deng-Cheng Zhuc1e028e2010-10-12 19:33:33 +0800110 ".set mips2\n\t" \
111 "sync\n\t" \
112 ".set mips0" \
113 : /* no output */ \
114 : /* no input */ \
115 : "memory")
Peter Zijlstraa94d3422013-10-30 11:42:46 +0100116#define wmb() mb()
117#define rmb() mb()
Stephane Eranianfbe96f22011-09-30 15:40:40 +0200118#define CPUINFO_PROC "cpu model"
Deng-Cheng Zhuc1e028e2010-10-12 19:33:33 +0800119#endif
120
Vineet Gupta98547832013-01-18 15:12:24 +0530121#ifdef __arc__
Peter Zijlstraa94d3422013-10-30 11:42:46 +0100122#define mb() asm volatile("" ::: "memory")
123#define wmb() asm volatile("" ::: "memory")
Vineet Gupta98547832013-01-18 15:12:24 +0530124#define rmb() asm volatile("" ::: "memory")
Vineet Gupta98547832013-01-18 15:12:24 +0530125#define CPUINFO_PROC "Processor"
126#endif
127
James Hogan1bea5b82013-01-31 12:22:37 +0000128#ifdef __metag__
Peter Zijlstraa94d3422013-10-30 11:42:46 +0100129#define mb() asm volatile("" ::: "memory")
130#define wmb() asm volatile("" ::: "memory")
James Hogan1bea5b82013-01-31 12:22:37 +0000131#define rmb() asm volatile("" ::: "memory")
James Hogan1bea5b82013-01-31 12:22:37 +0000132#define CPUINFO_PROC "CPU"
133#endif
134
Peter Zijlstraa94d3422013-10-30 11:42:46 +0100135#define barrier() asm volatile ("" ::: "memory")
136
137#ifndef cpu_relax
138#define cpu_relax() barrier()
139#endif
140
141#define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x))
142
143
Peter Zijlstra1a482f32009-05-23 18:28:58 +0200144#include <time.h>
145#include <unistd.h>
146#include <sys/types.h>
147#include <sys/syscall.h>
148
David Howellsd2709c72012-11-19 22:21:03 +0000149#include <linux/perf_event.h>
Peter Zijlstra7c6a1c62009-06-25 17:05:54 +0200150#include "util/types.h"
Arnaldo Carvalho de Melo80354582010-05-17 15:51:10 -0300151#include <stdbool.h>
Peter Zijlstra1a482f32009-05-23 18:28:58 +0200152
Thomas Gleixner6eda5832009-05-01 18:29:57 +0200153/*
Ingo Molnarcdd6c482009-09-21 12:02:48 +0200154 * prctl(PR_TASK_PERF_EVENTS_DISABLE) will (cheaply) disable all
Thomas Gleixner6eda5832009-05-01 18:29:57 +0200155 * counters in the current task.
156 */
Ingo Molnarcdd6c482009-09-21 12:02:48 +0200157#define PR_TASK_PERF_EVENTS_DISABLE 31
158#define PR_TASK_PERF_EVENTS_ENABLE 32
Thomas Gleixner6eda5832009-05-01 18:29:57 +0200159
Thomas Gleixnera92e702372009-05-01 18:39:47 +0200160#ifndef NSEC_PER_SEC
161# define NSEC_PER_SEC 1000000000ULL
162#endif
David Ahern70f7b4a2013-08-07 21:56:38 -0400163#ifndef NSEC_PER_USEC
164# define NSEC_PER_USEC 1000ULL
165#endif
Thomas Gleixnera92e702372009-05-01 18:39:47 +0200166
167static inline unsigned long long rdclock(void)
168{
169 struct timespec ts;
170
171 clock_gettime(CLOCK_MONOTONIC, &ts);
172 return ts.tv_sec * 1000000000ULL + ts.tv_nsec;
173}
Thomas Gleixner6eda5832009-05-01 18:29:57 +0200174
175/*
176 * Pick up some kernel type conventions:
177 */
178#define __user
179#define asmlinkage
180
Thomas Gleixner6eda5832009-05-01 18:29:57 +0200181#define unlikely(x) __builtin_expect(!!(x), 0)
182#define min(x, y) ({ \
183 typeof(x) _min1 = (x); \
184 typeof(y) _min2 = (y); \
185 (void) (&_min1 == &_min2); \
186 _min1 < _min2 ? _min1 : _min2; })
187
Jiri Olsa52502bf2012-10-31 15:52:47 +0100188extern bool test_attr__enabled;
189void test_attr__init(void);
190void test_attr__open(struct perf_event_attr *attr, pid_t pid, int cpu,
191 int fd, int group_fd, unsigned long flags);
192
Thomas Gleixner6eda5832009-05-01 18:29:57 +0200193static inline int
Ingo Molnarcdd6c482009-09-21 12:02:48 +0200194sys_perf_event_open(struct perf_event_attr *attr,
Thomas Gleixner6eda5832009-05-01 18:29:57 +0200195 pid_t pid, int cpu, int group_fd,
196 unsigned long flags)
197{
Jiri Olsa52502bf2012-10-31 15:52:47 +0100198 int fd;
199
200 fd = syscall(__NR_perf_event_open, attr, pid, cpu,
201 group_fd, flags);
202
203 if (unlikely(test_attr__enabled))
204 test_attr__open(attr, pid, cpu, fd, group_fd, flags);
205
206 return fd;
Thomas Gleixner6eda5832009-05-01 18:29:57 +0200207}
208
Ingo Molnar85a9f922009-05-25 09:59:50 +0200209#define MAX_COUNTERS 256
210#define MAX_NR_CPUS 256
Thomas Gleixner6eda5832009-05-01 18:29:57 +0200211
Frederic Weisbecker8cb76d92009-06-26 16:28:00 +0200212struct ip_callchain {
213 u64 nr;
214 u64 ips[0];
Peter Zijlstraf5970552009-06-18 23:22:55 +0200215};
216
Roberto Agostino Vitillob5387522012-02-09 23:21:01 +0100217struct branch_flags {
218 u64 mispred:1;
219 u64 predicted:1;
Andi Kleenf5d05bc2013-09-20 07:40:41 -0700220 u64 in_tx:1;
221 u64 abort:1;
222 u64 reserved:60;
Roberto Agostino Vitillob5387522012-02-09 23:21:01 +0100223};
224
225struct branch_entry {
226 u64 from;
227 u64 to;
228 struct branch_flags flags;
229};
230
231struct branch_stack {
232 u64 nr;
233 struct branch_entry entries[0];
234};
235
Feng Tang70cb4e92012-10-30 11:56:02 +0800236extern const char *input_name;
Arnaldo Carvalho de Melo80354582010-05-17 15:51:10 -0300237extern bool perf_host, perf_guest;
Stephane Eranianfbe96f22011-09-30 15:40:40 +0200238extern const char perf_version_string[];
Zhang, Yanmina1645ce2010-04-19 13:32:50 +0800239
Arnaldo Carvalho de Melo3af6e332011-10-13 08:52:46 -0300240void pthread__unblock_sigwinch(void);
241
Namhyung Kim12864b32012-04-26 14:15:22 +0900242#include "util/target.h"
Namhyung Kimbea03402012-04-26 14:15:15 +0900243
Jiri Olsa26d33022012-08-07 15:20:47 +0200244enum perf_call_graph_mode {
245 CALLCHAIN_NONE,
246 CALLCHAIN_FP,
247 CALLCHAIN_DWARF
248};
249
Namhyung Kimbea03402012-04-26 14:15:15 +0900250struct perf_record_opts {
Arnaldo Carvalho de Melo602ad872013-11-12 16:46:16 -0300251 struct target target;
Jiri Olsa26d33022012-08-07 15:20:47 +0200252 int call_graph;
Arnaldo Carvalho de Meloed80f582011-11-11 15:12:56 -0200253 bool group;
Arnaldo Carvalho de Melo0f82ebc2011-11-08 14:41:57 -0200254 bool inherit_stat;
255 bool no_delay;
256 bool no_inherit;
Adrian Hunter69e7e5b2013-11-18 11:55:57 +0200257 bool no_inherit_set;
Arnaldo Carvalho de Melo0f82ebc2011-11-08 14:41:57 -0200258 bool no_samples;
259 bool raw_samples;
260 bool sample_address;
Andi Kleen05484292013-01-24 16:10:29 +0100261 bool sample_weight;
Arnaldo Carvalho de Melo0f82ebc2011-11-08 14:41:57 -0200262 bool sample_time;
Andrew Vagin3e76ac72011-12-20 17:32:45 +0300263 bool period;
Arnaldo Carvalho de Melo0f82ebc2011-11-08 14:41:57 -0200264 unsigned int freq;
Arnaldo Carvalho de Melo01c2d992011-11-09 09:16:26 -0200265 unsigned int mmap_pages;
Arnaldo Carvalho de Melo0f82ebc2011-11-08 14:41:57 -0200266 unsigned int user_freq;
Stephane Eraniana00dc312012-05-25 23:13:44 +0200267 u64 branch_stack;
Arnaldo Carvalho de Melo0f82ebc2011-11-08 14:41:57 -0200268 u64 default_interval;
269 u64 user_interval;
Jiri Olsa26d33022012-08-07 15:20:47 +0200270 u16 stack_dump_size;
Andi Kleen475eeab2013-09-20 07:40:43 -0700271 bool sample_transaction;
Arnaldo Carvalho de Melo0f82ebc2011-11-08 14:41:57 -0200272};
273
Thomas Gleixner6eda5832009-05-01 18:29:57 +0200274#endif