Dave Airlie | 0d6aa60 | 2006-01-02 20:14:23 +1100 | [diff] [blame] | 1 | /* |
Dave Airlie | bc54fd1 | 2005-06-23 22:46:46 +1000 | [diff] [blame] | 2 | * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. |
| 3 | * All Rights Reserved. |
| 4 | * |
| 5 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 6 | * copy of this software and associated documentation files (the |
| 7 | * "Software"), to deal in the Software without restriction, including |
| 8 | * without limitation the rights to use, copy, modify, merge, publish, |
| 9 | * distribute, sub license, and/or sell copies of the Software, and to |
| 10 | * permit persons to whom the Software is furnished to do so, subject to |
| 11 | * the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice (including the |
| 14 | * next paragraph) shall be included in all copies or substantial portions |
| 15 | * of the Software. |
| 16 | * |
| 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
| 18 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 19 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. |
| 20 | * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR |
| 21 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
| 22 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
| 23 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 24 | * |
Dave Airlie | 0d6aa60 | 2006-01-02 20:14:23 +1100 | [diff] [blame] | 25 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 26 | #ifndef _I915_DRM_H_ |
| 27 | #define _I915_DRM_H_ |
| 28 | |
Jesse Barnes | a0a1807 | 2013-07-26 13:32:51 -0700 | [diff] [blame] | 29 | #include <drm/i915_pciids.h> |
David Howells | 718dced | 2012-10-04 18:21:50 +0100 | [diff] [blame] | 30 | #include <uapi/drm/i915_drm.h> |
Kristian Høgsberg | 1a95916 | 2009-12-02 12:13:48 -0500 | [diff] [blame] | 31 | |
Jesse Barnes | aa7ffc0 | 2010-05-14 15:41:14 -0700 | [diff] [blame] | 32 | /* For use by IPS driver */ |
| 33 | extern unsigned long i915_read_mch_val(void); |
| 34 | extern bool i915_gpu_raise(void); |
| 35 | extern bool i915_gpu_lower(void); |
| 36 | extern bool i915_gpu_busy(void); |
| 37 | extern bool i915_gpu_turbo_disable(void); |
Jesse Barnes | a0a1807 | 2013-07-26 13:32:51 -0700 | [diff] [blame] | 38 | |
Jesse Barnes | 814c5f1 | 2013-07-26 13:32:52 -0700 | [diff] [blame] | 39 | /* |
| 40 | * The Bridge device's PCI config space has information about the |
| 41 | * fb aperture size and the amount of pre-reserved memory. |
| 42 | * This is all handled in the intel-gtt.ko module. i915.ko only |
| 43 | * cares about the vga bit for the vga rbiter. |
| 44 | */ |
| 45 | #define INTEL_GMCH_CTRL 0x52 |
| 46 | #define INTEL_GMCH_VGA_DISABLE (1 << 1) |
| 47 | #define SNB_GMCH_CTRL 0x50 |
| 48 | #define SNB_GMCH_GGMS_SHIFT 8 /* GTT Graphics Memory Size */ |
| 49 | #define SNB_GMCH_GGMS_MASK 0x3 |
| 50 | #define SNB_GMCH_GMS_SHIFT 3 /* Graphics Mode Select */ |
| 51 | #define SNB_GMCH_GMS_MASK 0x1f |
Ben Widawsky | 9459d25 | 2013-11-03 16:53:55 -0800 | [diff] [blame] | 52 | #define BDW_GMCH_GGMS_SHIFT 6 |
| 53 | #define BDW_GMCH_GGMS_MASK 0x3 |
| 54 | #define BDW_GMCH_GMS_SHIFT 8 |
| 55 | #define BDW_GMCH_GMS_MASK 0xff |
Jesse Barnes | 814c5f1 | 2013-07-26 13:32:52 -0700 | [diff] [blame] | 56 | |
| 57 | #define I830_GMCH_CTRL 0x52 |
| 58 | |
Ville Syrjälä | a4dff76 | 2014-02-05 21:28:59 +0200 | [diff] [blame] | 59 | #define I830_GMCH_GMS_MASK 0x70 |
| 60 | #define I830_GMCH_GMS_LOCAL 0x10 |
| 61 | #define I830_GMCH_GMS_STOLEN_512 0x20 |
| 62 | #define I830_GMCH_GMS_STOLEN_1024 0x30 |
| 63 | #define I830_GMCH_GMS_STOLEN_8192 0x40 |
| 64 | |
Jesse Barnes | 814c5f1 | 2013-07-26 13:32:52 -0700 | [diff] [blame] | 65 | #define I855_GMCH_GMS_MASK 0xF0 |
| 66 | #define I855_GMCH_GMS_STOLEN_0M 0x0 |
| 67 | #define I855_GMCH_GMS_STOLEN_1M (0x1 << 4) |
| 68 | #define I855_GMCH_GMS_STOLEN_4M (0x2 << 4) |
| 69 | #define I855_GMCH_GMS_STOLEN_8M (0x3 << 4) |
| 70 | #define I855_GMCH_GMS_STOLEN_16M (0x4 << 4) |
| 71 | #define I855_GMCH_GMS_STOLEN_32M (0x5 << 4) |
| 72 | #define I915_GMCH_GMS_STOLEN_48M (0x6 << 4) |
| 73 | #define I915_GMCH_GMS_STOLEN_64M (0x7 << 4) |
| 74 | #define G33_GMCH_GMS_STOLEN_128M (0x8 << 4) |
| 75 | #define G33_GMCH_GMS_STOLEN_256M (0x9 << 4) |
| 76 | #define INTEL_GMCH_GMS_STOLEN_96M (0xa << 4) |
| 77 | #define INTEL_GMCH_GMS_STOLEN_160M (0xb << 4) |
| 78 | #define INTEL_GMCH_GMS_STOLEN_224M (0xc << 4) |
| 79 | #define INTEL_GMCH_GMS_STOLEN_352M (0xd << 4) |
| 80 | |
Ville Syrjälä | a4dff76 | 2014-02-05 21:28:59 +0200 | [diff] [blame] | 81 | #define I830_DRB3 0x63 |
| 82 | #define I85X_DRB3 0x43 |
| 83 | #define I865_TOUD 0xc4 |
| 84 | |
| 85 | #define I830_ESMRAMC 0x91 |
| 86 | #define I845_ESMRAMC 0x9e |
| 87 | #define I85X_ESMRAMC 0x61 |
| 88 | #define TSEG_ENABLE (1 << 0) |
| 89 | #define I830_TSEG_SIZE_512K (0 << 1) |
| 90 | #define I830_TSEG_SIZE_1M (1 << 1) |
| 91 | #define I845_TSEG_SIZE_MASK (3 << 1) |
| 92 | #define I845_TSEG_SIZE_512K (2 << 1) |
| 93 | #define I845_TSEG_SIZE_1M (3 << 1) |
| 94 | |
Joonas Lahtinen | c0dd346 | 2016-04-22 13:29:26 +0300 | [diff] [blame] | 95 | #define INTEL_BSM 0x5c |
Dave Gordon | aac440f | 2016-08-09 18:35:10 +0100 | [diff] [blame] | 96 | #define INTEL_BSM_MASK (-(1u << 20)) |
Joonas Lahtinen | c0dd346 | 2016-04-22 13:29:26 +0300 | [diff] [blame] | 97 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 98 | #endif /* _I915_DRM_H_ */ |