blob: acaf7056efa57be734cd5e447b5bae6d744b5b68 [file] [log] [blame]
Frank Li022d0712015-07-10 02:09:41 +08001/*
2 * Copyright (C) 2015 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#include <linux/irqchip.h>
Fugang Duan709bc062015-07-28 15:30:40 +08009#include <linux/mfd/syscon.h>
10#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
11#include <linux/micrel_phy.h>
Frank Li022d0712015-07-10 02:09:41 +080012#include <linux/of_platform.h>
Fugang Duan709bc062015-07-28 15:30:40 +080013#include <linux/phy.h>
14#include <linux/regmap.h>
Frank Li022d0712015-07-10 02:09:41 +080015#include <asm/mach/arch.h>
16#include <asm/mach/map.h>
17
18#include "common.h"
19
Fugang Duan709bc062015-07-28 15:30:40 +080020static void __init imx6ul_enet_clk_init(void)
21{
22 struct regmap *gpr;
23
24 gpr = syscon_regmap_lookup_by_compatible("fsl,imx6ul-iomuxc-gpr");
25 if (!IS_ERR(gpr))
26 regmap_update_bits(gpr, IOMUXC_GPR1, IMX6UL_GPR1_ENET_CLK_DIR,
27 IMX6UL_GPR1_ENET_CLK_OUTPUT);
28 else
29 pr_err("failed to find fsl,imx6ul-iomux-gpr regmap\n");
30
31}
32
33static int ksz8081_phy_fixup(struct phy_device *dev)
34{
35 if (dev && dev->interface == PHY_INTERFACE_MODE_MII) {
36 phy_write(dev, 0x1f, 0x8110);
37 phy_write(dev, 0x16, 0x201);
38 } else if (dev && dev->interface == PHY_INTERFACE_MODE_RMII) {
39 phy_write(dev, 0x1f, 0x8190);
40 phy_write(dev, 0x16, 0x202);
41 }
42
43 return 0;
44}
45
46static void __init imx6ul_enet_phy_init(void)
47{
Fabio Estevam6be4b0d2015-08-19 15:31:30 -030048 if (IS_BUILTIN(CONFIG_PHYLIB))
49 phy_register_fixup_for_uid(PHY_ID_KSZ8081, 0xffffffff,
50 ksz8081_phy_fixup);
Fugang Duan709bc062015-07-28 15:30:40 +080051}
52
53static inline void imx6ul_enet_init(void)
54{
55 imx6ul_enet_clk_init();
56 imx6ul_enet_phy_init();
57}
58
Frank Li022d0712015-07-10 02:09:41 +080059static void __init imx6ul_init_machine(void)
60{
61 struct device *parent;
62
63 parent = imx_soc_device_init();
64 if (parent == NULL)
65 pr_warn("failed to initialize soc device\n");
66
67 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
Fugang Duan709bc062015-07-28 15:30:40 +080068 imx6ul_enet_init();
Frank Li022d0712015-07-10 02:09:41 +080069 imx_anatop_init();
Anson Huangee4a5f82015-08-05 01:48:37 +080070 imx6ul_pm_init();
Frank Li022d0712015-07-10 02:09:41 +080071}
72
73static void __init imx6ul_init_irq(void)
74{
75 imx_init_revision_from_anatop();
76 imx_src_init();
77 irqchip_init();
Anson Huangee4a5f82015-08-05 01:48:37 +080078 imx6_pm_ccm_init("fsl,imx6ul-ccm");
Frank Li022d0712015-07-10 02:09:41 +080079}
80
Bai Ping7f730812015-10-09 23:35:30 +080081static void __init imx6ul_init_late(void)
82{
83 if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ))
84 platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0);
85}
86
Frank Li022d0712015-07-10 02:09:41 +080087static const char *imx6ul_dt_compat[] __initconst = {
88 "fsl,imx6ul",
89 NULL,
90};
91
92DT_MACHINE_START(IMX6UL, "Freescale i.MX6 Ultralite (Device Tree)")
93 .init_irq = imx6ul_init_irq,
94 .init_machine = imx6ul_init_machine,
Bai Ping7f730812015-10-09 23:35:30 +080095 .init_late = imx6ul_init_late,
Frank Li022d0712015-07-10 02:09:41 +080096 .dt_compat = imx6ul_dt_compat,
97MACHINE_END