blob: 8610ba29399133187e49f0a68292d74c27413bb5 [file] [log] [blame]
Hartley Sweeten1cb17e22011-10-08 23:04:34 +01001/*
2 * arch/arm/mach-ep93xx/vision_ep9307.c
3 * Vision Engraving Systems EP9307 SoM support.
4 *
5 * Copyright (C) 2008-2011 Vision Engraving Systems
6 * H Hartley Sweeten <hsweeten@visionengravers.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or (at
11 * your option) any later version.
12 */
13
14#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/platform_device.h>
19#include <linux/irq.h>
20#include <linux/gpio.h>
21#include <linux/fb.h>
22#include <linux/io.h>
23#include <linux/mtd/partitions.h>
24#include <linux/i2c.h>
25#include <linux/i2c-gpio.h>
26#include <linux/i2c/pca953x.h>
27#include <linux/spi/spi.h>
28#include <linux/spi/flash.h>
29#include <linux/spi/mmc_spi.h>
30#include <linux/mmc/host.h>
31
32#include <mach/hardware.h>
Arnd Bergmanna3b292452012-08-24 15:12:11 +020033#include <linux/platform_data/video-ep93xx.h>
34#include <linux/platform_data/spi-ep93xx.h>
H Hartley Sweetene9c6c5d2012-02-08 09:53:44 -070035#include <mach/gpio-ep93xx.h>
Hartley Sweeten1cb17e22011-10-08 23:04:34 +010036
H Hartley Sweeten1dbd02e2012-03-01 17:13:59 -070037#include <asm/hardware/vic.h>
Hartley Sweeten1cb17e22011-10-08 23:04:34 +010038#include <asm/mach-types.h>
39#include <asm/mach/map.h>
40#include <asm/mach/arch.h>
41
Ryan Mallon258249e2012-01-11 09:06:08 +110042#include "soc.h"
43
Hartley Sweeten1cb17e22011-10-08 23:04:34 +010044/*************************************************************************
45 * Static I/O mappings for the FPGA
46 *************************************************************************/
47#define VISION_PHYS_BASE EP93XX_CS7_PHYS_BASE
48#define VISION_VIRT_BASE 0xfebff000
49
50static struct map_desc vision_io_desc[] __initdata = {
51 {
52 .virtual = VISION_VIRT_BASE,
53 .pfn = __phys_to_pfn(VISION_PHYS_BASE),
54 .length = SZ_4K,
55 .type = MT_DEVICE,
56 },
57};
58
59static void __init vision_map_io(void)
60{
61 ep93xx_map_io();
62
63 iotable_init(vision_io_desc, ARRAY_SIZE(vision_io_desc));
64}
65
66/*************************************************************************
67 * Ethernet
68 *************************************************************************/
69static struct ep93xx_eth_data vision_eth_data __initdata = {
70 .phy_id = 1,
71};
72
73/*************************************************************************
74 * Framebuffer
75 *************************************************************************/
76#define VISION_LCD_ENABLE EP93XX_GPIO_LINE_EGPIO1
77
78static int vision_lcd_setup(struct platform_device *pdev)
79{
80 int err;
81
82 err = gpio_request_one(VISION_LCD_ENABLE, GPIOF_INIT_HIGH,
83 dev_name(&pdev->dev));
84 if (err)
85 return err;
86
87 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_RAS |
88 EP93XX_SYSCON_DEVCFG_RASONP3 |
89 EP93XX_SYSCON_DEVCFG_EXVC);
90
91 return 0;
92}
93
94static void vision_lcd_teardown(struct platform_device *pdev)
95{
96 gpio_free(VISION_LCD_ENABLE);
97}
98
99static void vision_lcd_blank(int blank_mode, struct fb_info *info)
100{
101 if (blank_mode)
102 gpio_set_value(VISION_LCD_ENABLE, 0);
103 else
104 gpio_set_value(VISION_LCD_ENABLE, 1);
105}
106
107static struct ep93xxfb_mach_info ep93xxfb_info __initdata = {
108 .num_modes = EP93XXFB_USE_MODEDB,
109 .bpp = 16,
110 .flags = EP93XXFB_USE_SDCSN0 | EP93XXFB_PCLK_FALLING,
111 .setup = vision_lcd_setup,
112 .teardown = vision_lcd_teardown,
113 .blank = vision_lcd_blank,
114};
115
116
117/*************************************************************************
118 * GPIO Expanders
119 *************************************************************************/
120#define PCA9539_74_GPIO_BASE (EP93XX_GPIO_LINE_MAX + 1)
121#define PCA9539_75_GPIO_BASE (PCA9539_74_GPIO_BASE + 16)
122#define PCA9539_76_GPIO_BASE (PCA9539_75_GPIO_BASE + 16)
123#define PCA9539_77_GPIO_BASE (PCA9539_76_GPIO_BASE + 16)
124
125static struct pca953x_platform_data pca953x_74_gpio_data = {
126 .gpio_base = PCA9539_74_GPIO_BASE,
127 .irq_base = EP93XX_BOARD_IRQ(0),
128};
129
130static struct pca953x_platform_data pca953x_75_gpio_data = {
131 .gpio_base = PCA9539_75_GPIO_BASE,
132 .irq_base = -1,
133};
134
135static struct pca953x_platform_data pca953x_76_gpio_data = {
136 .gpio_base = PCA9539_76_GPIO_BASE,
137 .irq_base = -1,
138};
139
140static struct pca953x_platform_data pca953x_77_gpio_data = {
141 .gpio_base = PCA9539_77_GPIO_BASE,
142 .irq_base = -1,
143};
144
145/*************************************************************************
146 * I2C Bus
147 *************************************************************************/
148static struct i2c_gpio_platform_data vision_i2c_gpio_data __initdata = {
149 .sda_pin = EP93XX_GPIO_LINE_EEDAT,
150 .scl_pin = EP93XX_GPIO_LINE_EECLK,
151};
152
153static struct i2c_board_info vision_i2c_info[] __initdata = {
154 {
155 I2C_BOARD_INFO("isl1208", 0x6f),
156 .irq = IRQ_EP93XX_EXT1,
157 }, {
158 I2C_BOARD_INFO("pca9539", 0x74),
159 .platform_data = &pca953x_74_gpio_data,
Hartley Sweeten1cb17e22011-10-08 23:04:34 +0100160 }, {
161 I2C_BOARD_INFO("pca9539", 0x75),
162 .platform_data = &pca953x_75_gpio_data,
163 }, {
164 I2C_BOARD_INFO("pca9539", 0x76),
165 .platform_data = &pca953x_76_gpio_data,
166 }, {
167 I2C_BOARD_INFO("pca9539", 0x77),
168 .platform_data = &pca953x_77_gpio_data,
169 },
170};
171
172/*************************************************************************
173 * SPI Flash
174 *************************************************************************/
175#define VISION_SPI_FLASH_CS EP93XX_GPIO_LINE_EGPIO7
176
177static struct mtd_partition vision_spi_flash_partitions[] = {
178 {
179 .name = "SPI bootstrap",
180 .offset = 0,
181 .size = SZ_4K,
182 }, {
183 .name = "Bootstrap config",
184 .offset = MTDPART_OFS_APPEND,
185 .size = SZ_4K,
186 }, {
187 .name = "System config",
188 .offset = MTDPART_OFS_APPEND,
189 .size = MTDPART_SIZ_FULL,
190 },
191};
192
193static struct flash_platform_data vision_spi_flash_data = {
194 .name = "SPI Flash",
195 .parts = vision_spi_flash_partitions,
196 .nr_parts = ARRAY_SIZE(vision_spi_flash_partitions),
197};
198
199static int vision_spi_flash_hw_setup(struct spi_device *spi)
200{
201 return gpio_request_one(VISION_SPI_FLASH_CS, GPIOF_INIT_HIGH,
202 spi->modalias);
203}
204
205static void vision_spi_flash_hw_cleanup(struct spi_device *spi)
206{
207 gpio_free(VISION_SPI_FLASH_CS);
208}
209
210static void vision_spi_flash_hw_cs_control(struct spi_device *spi, int value)
211{
212 gpio_set_value(VISION_SPI_FLASH_CS, value);
213}
214
215static struct ep93xx_spi_chip_ops vision_spi_flash_hw = {
216 .setup = vision_spi_flash_hw_setup,
217 .cleanup = vision_spi_flash_hw_cleanup,
218 .cs_control = vision_spi_flash_hw_cs_control,
219};
220
221/*************************************************************************
222 * SPI SD/MMC host
223 *************************************************************************/
224#define VISION_SPI_MMC_CS EP93XX_GPIO_LINE_G(2)
225#define VISION_SPI_MMC_WP EP93XX_GPIO_LINE_F(0)
226#define VISION_SPI_MMC_CD EP93XX_GPIO_LINE_EGPIO15
227
228static struct gpio vision_spi_mmc_gpios[] = {
229 { VISION_SPI_MMC_WP, GPIOF_DIR_IN, "mmc_spi:wp" },
230 { VISION_SPI_MMC_CD, GPIOF_DIR_IN, "mmc_spi:cd" },
231};
232
233static int vision_spi_mmc_init(struct device *pdev,
234 irqreturn_t (*func)(int, void *), void *pdata)
235{
236 int err;
237
238 err = gpio_request_array(vision_spi_mmc_gpios,
239 ARRAY_SIZE(vision_spi_mmc_gpios));
240 if (err)
241 return err;
242
243 err = gpio_set_debounce(VISION_SPI_MMC_CD, 1);
244 if (err)
245 goto exit_err;
246
247 err = request_irq(gpio_to_irq(VISION_SPI_MMC_CD), func,
248 IRQ_TYPE_EDGE_BOTH, "mmc_spi:cd", pdata);
249 if (err)
250 goto exit_err;
251
252 return 0;
253
254exit_err:
255 gpio_free_array(vision_spi_mmc_gpios, ARRAY_SIZE(vision_spi_mmc_gpios));
256 return err;
257
258}
259
260static void vision_spi_mmc_exit(struct device *pdev, void *pdata)
261{
262 free_irq(gpio_to_irq(VISION_SPI_MMC_CD), pdata);
263 gpio_free_array(vision_spi_mmc_gpios, ARRAY_SIZE(vision_spi_mmc_gpios));
264}
265
266static int vision_spi_mmc_get_ro(struct device *pdev)
267{
268 return !!gpio_get_value(VISION_SPI_MMC_WP);
269}
270
271static int vision_spi_mmc_get_cd(struct device *pdev)
272{
273 return !gpio_get_value(VISION_SPI_MMC_CD);
274}
275
276static struct mmc_spi_platform_data vision_spi_mmc_data = {
277 .init = vision_spi_mmc_init,
278 .exit = vision_spi_mmc_exit,
279 .get_ro = vision_spi_mmc_get_ro,
280 .get_cd = vision_spi_mmc_get_cd,
281 .detect_delay = 100,
282 .powerup_msecs = 100,
283 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
284};
285
286static int vision_spi_mmc_hw_setup(struct spi_device *spi)
287{
288 return gpio_request_one(VISION_SPI_MMC_CS, GPIOF_INIT_HIGH,
289 spi->modalias);
290}
291
292static void vision_spi_mmc_hw_cleanup(struct spi_device *spi)
293{
294 gpio_free(VISION_SPI_MMC_CS);
295}
296
297static void vision_spi_mmc_hw_cs_control(struct spi_device *spi, int value)
298{
299 gpio_set_value(VISION_SPI_MMC_CS, value);
300}
301
302static struct ep93xx_spi_chip_ops vision_spi_mmc_hw = {
303 .setup = vision_spi_mmc_hw_setup,
304 .cleanup = vision_spi_mmc_hw_cleanup,
305 .cs_control = vision_spi_mmc_hw_cs_control,
306};
307
308/*************************************************************************
309 * SPI Bus
310 *************************************************************************/
311static struct spi_board_info vision_spi_board_info[] __initdata = {
312 {
313 .modalias = "sst25l",
314 .platform_data = &vision_spi_flash_data,
315 .controller_data = &vision_spi_flash_hw,
316 .max_speed_hz = 20000000,
317 .bus_num = 0,
318 .chip_select = 0,
319 .mode = SPI_MODE_3,
320 }, {
321 .modalias = "mmc_spi",
322 .platform_data = &vision_spi_mmc_data,
323 .controller_data = &vision_spi_mmc_hw,
324 .max_speed_hz = 20000000,
325 .bus_num = 0,
326 .chip_select = 1,
327 .mode = SPI_MODE_3,
328 },
329};
330
331static struct ep93xx_spi_info vision_spi_master __initdata = {
332 .num_chipselect = ARRAY_SIZE(vision_spi_board_info),
333};
334
335/*************************************************************************
336 * Machine Initialization
337 *************************************************************************/
338static void __init vision_init_machine(void)
339{
340 ep93xx_init_devices();
341 ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_64M);
342 ep93xx_register_eth(&vision_eth_data, 1);
343 ep93xx_register_fb(&ep93xxfb_info);
344 ep93xx_register_pwm(1, 0);
345
346 /*
347 * Request the gpio expander's interrupt gpio line now to prevent
348 * the kernel from doing a WARN in gpiolib:gpio_ensure_requested().
349 */
350 if (gpio_request_one(EP93XX_GPIO_LINE_F(7), GPIOF_DIR_IN,
351 "pca9539:74"))
352 pr_warn("cannot request interrupt gpio for pca9539:74\n");
353
H Hartley Sweetene9c6c5d2012-02-08 09:53:44 -0700354 vision_i2c_info[1].irq = gpio_to_irq(EP93XX_GPIO_LINE_F(7));
355
Hartley Sweeten1cb17e22011-10-08 23:04:34 +0100356 ep93xx_register_i2c(&vision_i2c_gpio_data, vision_i2c_info,
357 ARRAY_SIZE(vision_i2c_info));
358 ep93xx_register_spi(&vision_spi_master, vision_spi_board_info,
359 ARRAY_SIZE(vision_spi_board_info));
360}
361
362MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307")
363 /* Maintainer: H Hartley Sweeten <hsweeten@visionengravers.com> */
Arnd Bergmanna7fadac2011-10-31 23:58:06 +0100364 .atag_offset = 0x100,
Hartley Sweeten1cb17e22011-10-08 23:04:34 +0100365 .map_io = vision_map_io,
366 .init_irq = ep93xx_init_irq,
H Hartley Sweeten1dbd02e2012-03-01 17:13:59 -0700367 .handle_irq = vic_handle_irq,
Stephen Warren6bb27d72012-11-08 12:40:59 -0700368 .init_time = ep93xx_timer_init,
Hartley Sweeten1cb17e22011-10-08 23:04:34 +0100369 .init_machine = vision_init_machine,
Shawn Guoc9142832012-04-26 10:05:15 +0800370 .init_late = ep93xx_init_late,
Russell King32751662011-11-05 09:54:14 +0000371 .restart = ep93xx_restart,
Hartley Sweeten1cb17e22011-10-08 23:04:34 +0100372MACHINE_END