blob: 77f264851e988ec0c5dedbba5f31e1cd98fba183 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Universal Host Controller Interface driver for USB.
3 *
4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
5 *
6 * (C) Copyright 1999 Linus Torvalds
7 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
8 * (C) Copyright 1999 Randy Dunlap
9 * (C) Copyright 1999 Georg Acher, acher@in.tum.de
10 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
11 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
12 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
13 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
14 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
15 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
16 * (C) Copyright 2004 Alan Stern, stern@rowland.harvard.edu
17 */
18
19static int uhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb);
20static void uhci_unlink_generic(struct uhci_hcd *uhci, struct urb *urb);
21static void uhci_remove_pending_urbps(struct uhci_hcd *uhci);
22static void uhci_free_pending_qhs(struct uhci_hcd *uhci);
23static void uhci_free_pending_tds(struct uhci_hcd *uhci);
24
25/*
26 * Technically, updating td->status here is a race, but it's not really a
27 * problem. The worst that can happen is that we set the IOC bit again
28 * generating a spurious interrupt. We could fix this by creating another
29 * QH and leaving the IOC bit always set, but then we would have to play
30 * games with the FSBR code to make sure we get the correct order in all
31 * the cases. I don't think it's worth the effort
32 */
33static inline void uhci_set_next_interrupt(struct uhci_hcd *uhci)
34{
Alan Stern6c1b4452005-04-21 16:04:58 -040035 if (uhci->is_stopped)
36 mod_timer(&uhci->stall_timer, jiffies);
Linus Torvalds1da177e2005-04-16 15:20:36 -070037 uhci->term_td->status |= cpu_to_le32(TD_CTRL_IOC);
38}
39
40static inline void uhci_clear_next_interrupt(struct uhci_hcd *uhci)
41{
42 uhci->term_td->status &= ~cpu_to_le32(TD_CTRL_IOC);
43}
44
45static inline void uhci_moveto_complete(struct uhci_hcd *uhci,
46 struct urb_priv *urbp)
47{
48 list_move_tail(&urbp->urb_list, &uhci->complete_list);
49}
50
51static struct uhci_td *uhci_alloc_td(struct uhci_hcd *uhci, struct usb_device *dev)
52{
53 dma_addr_t dma_handle;
54 struct uhci_td *td;
55
56 td = dma_pool_alloc(uhci->td_pool, GFP_ATOMIC, &dma_handle);
57 if (!td)
58 return NULL;
59
60 td->dma_handle = dma_handle;
61
62 td->link = UHCI_PTR_TERM;
63 td->buffer = 0;
64
65 td->frame = -1;
66 td->dev = dev;
67
68 INIT_LIST_HEAD(&td->list);
69 INIT_LIST_HEAD(&td->remove_list);
70 INIT_LIST_HEAD(&td->fl_list);
71
72 usb_get_dev(dev);
73
74 return td;
75}
76
77static inline void uhci_fill_td(struct uhci_td *td, u32 status,
78 u32 token, u32 buffer)
79{
80 td->status = cpu_to_le32(status);
81 td->token = cpu_to_le32(token);
82 td->buffer = cpu_to_le32(buffer);
83}
84
85/*
86 * We insert Isochronous URB's directly into the frame list at the beginning
87 */
88static void uhci_insert_td_frame_list(struct uhci_hcd *uhci, struct uhci_td *td, unsigned framenum)
89{
90 framenum &= (UHCI_NUMFRAMES - 1);
91
92 td->frame = framenum;
93
94 /* Is there a TD already mapped there? */
95 if (uhci->fl->frame_cpu[framenum]) {
96 struct uhci_td *ftd, *ltd;
97
98 ftd = uhci->fl->frame_cpu[framenum];
99 ltd = list_entry(ftd->fl_list.prev, struct uhci_td, fl_list);
100
101 list_add_tail(&td->fl_list, &ftd->fl_list);
102
103 td->link = ltd->link;
104 wmb();
105 ltd->link = cpu_to_le32(td->dma_handle);
106 } else {
107 td->link = uhci->fl->frame[framenum];
108 wmb();
109 uhci->fl->frame[framenum] = cpu_to_le32(td->dma_handle);
110 uhci->fl->frame_cpu[framenum] = td;
111 }
112}
113
114static void uhci_remove_td(struct uhci_hcd *uhci, struct uhci_td *td)
115{
116 /* If it's not inserted, don't remove it */
117 if (td->frame == -1 && list_empty(&td->fl_list))
118 return;
119
120 if (td->frame != -1 && uhci->fl->frame_cpu[td->frame] == td) {
121 if (list_empty(&td->fl_list)) {
122 uhci->fl->frame[td->frame] = td->link;
123 uhci->fl->frame_cpu[td->frame] = NULL;
124 } else {
125 struct uhci_td *ntd;
126
127 ntd = list_entry(td->fl_list.next, struct uhci_td, fl_list);
128 uhci->fl->frame[td->frame] = cpu_to_le32(ntd->dma_handle);
129 uhci->fl->frame_cpu[td->frame] = ntd;
130 }
131 } else {
132 struct uhci_td *ptd;
133
134 ptd = list_entry(td->fl_list.prev, struct uhci_td, fl_list);
135 ptd->link = td->link;
136 }
137
138 wmb();
139 td->link = UHCI_PTR_TERM;
140
141 list_del_init(&td->fl_list);
142 td->frame = -1;
143}
144
145/*
146 * Inserts a td list into qh.
147 */
148static void uhci_insert_tds_in_qh(struct uhci_qh *qh, struct urb *urb, __le32 breadth)
149{
150 struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
151 struct uhci_td *td;
152 __le32 *plink;
153
154 /* Ordering isn't important here yet since the QH hasn't been */
155 /* inserted into the schedule yet */
156 plink = &qh->element;
157 list_for_each_entry(td, &urbp->td_list, list) {
158 *plink = cpu_to_le32(td->dma_handle) | breadth;
159 plink = &td->link;
160 }
161 *plink = UHCI_PTR_TERM;
162}
163
164static void uhci_free_td(struct uhci_hcd *uhci, struct uhci_td *td)
165{
166 if (!list_empty(&td->list))
167 dev_warn(uhci_dev(uhci), "td %p still in list!\n", td);
168 if (!list_empty(&td->remove_list))
169 dev_warn(uhci_dev(uhci), "td %p still in remove_list!\n", td);
170 if (!list_empty(&td->fl_list))
171 dev_warn(uhci_dev(uhci), "td %p still in fl_list!\n", td);
172
173 if (td->dev)
174 usb_put_dev(td->dev);
175
176 dma_pool_free(uhci->td_pool, td, td->dma_handle);
177}
178
179static struct uhci_qh *uhci_alloc_qh(struct uhci_hcd *uhci, struct usb_device *dev)
180{
181 dma_addr_t dma_handle;
182 struct uhci_qh *qh;
183
184 qh = dma_pool_alloc(uhci->qh_pool, GFP_ATOMIC, &dma_handle);
185 if (!qh)
186 return NULL;
187
188 qh->dma_handle = dma_handle;
189
190 qh->element = UHCI_PTR_TERM;
191 qh->link = UHCI_PTR_TERM;
192
193 qh->dev = dev;
194 qh->urbp = NULL;
195
196 INIT_LIST_HEAD(&qh->list);
197 INIT_LIST_HEAD(&qh->remove_list);
198
199 usb_get_dev(dev);
200
201 return qh;
202}
203
204static void uhci_free_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
205{
206 if (!list_empty(&qh->list))
207 dev_warn(uhci_dev(uhci), "qh %p list not empty!\n", qh);
208 if (!list_empty(&qh->remove_list))
209 dev_warn(uhci_dev(uhci), "qh %p still in remove_list!\n", qh);
210
211 if (qh->dev)
212 usb_put_dev(qh->dev);
213
214 dma_pool_free(uhci->qh_pool, qh, qh->dma_handle);
215}
216
217/*
218 * Append this urb's qh after the last qh in skelqh->list
219 *
220 * Note that urb_priv.queue_list doesn't have a separate queue head;
221 * it's a ring with every element "live".
222 */
223static void uhci_insert_qh(struct uhci_hcd *uhci, struct uhci_qh *skelqh, struct urb *urb)
224{
225 struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
226 struct urb_priv *turbp;
227 struct uhci_qh *lqh;
228
229 /* Grab the last QH */
230 lqh = list_entry(skelqh->list.prev, struct uhci_qh, list);
231
232 /* Point to the next skelqh */
233 urbp->qh->link = lqh->link;
234 wmb(); /* Ordering is important */
235
236 /*
237 * Patch QHs for previous endpoint's queued URBs? HC goes
238 * here next, not to the next skelqh it now points to.
239 *
240 * lqh --> td ... --> qh ... --> td --> qh ... --> td
241 * | | |
242 * v v v
243 * +<----------------+-----------------+
244 * v
245 * newqh --> td ... --> td
246 * |
247 * v
248 * ...
249 *
250 * The HC could see (and use!) any of these as we write them.
251 */
252 lqh->link = cpu_to_le32(urbp->qh->dma_handle) | UHCI_PTR_QH;
253 if (lqh->urbp) {
254 list_for_each_entry(turbp, &lqh->urbp->queue_list, queue_list)
255 turbp->qh->link = lqh->link;
256 }
257
258 list_add_tail(&urbp->qh->list, &skelqh->list);
259}
260
261/*
262 * Start removal of QH from schedule; it finishes next frame.
263 * TDs should be unlinked before this is called.
264 */
265static void uhci_remove_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
266{
267 struct uhci_qh *pqh;
268 __le32 newlink;
269
270 if (!qh)
271 return;
272
273 /*
274 * Only go through the hoops if it's actually linked in
275 */
276 if (!list_empty(&qh->list)) {
277
278 /* If our queue is nonempty, make the next URB the head */
279 if (!list_empty(&qh->urbp->queue_list)) {
280 struct urb_priv *nurbp;
281
282 nurbp = list_entry(qh->urbp->queue_list.next,
283 struct urb_priv, queue_list);
284 nurbp->queued = 0;
285 list_add(&nurbp->qh->list, &qh->list);
286 newlink = cpu_to_le32(nurbp->qh->dma_handle) | UHCI_PTR_QH;
287 } else
288 newlink = qh->link;
289
290 /* Fix up the previous QH's queue to link to either
291 * the new head of this queue or the start of the
292 * next endpoint's queue. */
293 pqh = list_entry(qh->list.prev, struct uhci_qh, list);
294 pqh->link = newlink;
295 if (pqh->urbp) {
296 struct urb_priv *turbp;
297
298 list_for_each_entry(turbp, &pqh->urbp->queue_list,
299 queue_list)
300 turbp->qh->link = newlink;
301 }
302 wmb();
303
304 /* Leave qh->link in case the HC is on the QH now, it will */
305 /* continue the rest of the schedule */
306 qh->element = UHCI_PTR_TERM;
307
308 list_del_init(&qh->list);
309 }
310
311 list_del_init(&qh->urbp->queue_list);
312 qh->urbp = NULL;
313
314 uhci_get_current_frame_number(uhci);
315 if (uhci->frame_number + uhci->is_stopped != uhci->qh_remove_age) {
316 uhci_free_pending_qhs(uhci);
317 uhci->qh_remove_age = uhci->frame_number;
318 }
319
320 /* Check to see if the remove list is empty. Set the IOC bit */
321 /* to force an interrupt so we can remove the QH */
322 if (list_empty(&uhci->qh_remove_list))
323 uhci_set_next_interrupt(uhci);
324
325 list_add(&qh->remove_list, &uhci->qh_remove_list);
326}
327
328static int uhci_fixup_toggle(struct urb *urb, unsigned int toggle)
329{
330 struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
331 struct uhci_td *td;
332
333 list_for_each_entry(td, &urbp->td_list, list) {
334 if (toggle)
335 td->token |= cpu_to_le32(TD_TOKEN_TOGGLE);
336 else
337 td->token &= ~cpu_to_le32(TD_TOKEN_TOGGLE);
338
339 toggle ^= 1;
340 }
341
342 return toggle;
343}
344
345/* This function will append one URB's QH to another URB's QH. This is for */
346/* queuing interrupt, control or bulk transfers */
347static void uhci_append_queued_urb(struct uhci_hcd *uhci, struct urb *eurb, struct urb *urb)
348{
349 struct urb_priv *eurbp, *urbp, *furbp, *lurbp;
350 struct uhci_td *lltd;
351
352 eurbp = eurb->hcpriv;
353 urbp = urb->hcpriv;
354
355 /* Find the first URB in the queue */
356 furbp = eurbp;
357 if (eurbp->queued) {
358 list_for_each_entry(furbp, &eurbp->queue_list, queue_list)
359 if (!furbp->queued)
360 break;
361 }
362
363 lurbp = list_entry(furbp->queue_list.prev, struct urb_priv, queue_list);
364
365 lltd = list_entry(lurbp->td_list.prev, struct uhci_td, list);
366
367 /* Control transfers always start with toggle 0 */
368 if (!usb_pipecontrol(urb->pipe))
369 usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
370 usb_pipeout(urb->pipe),
371 uhci_fixup_toggle(urb,
372 uhci_toggle(td_token(lltd)) ^ 1));
373
374 /* All qh's in the queue need to link to the next queue */
375 urbp->qh->link = eurbp->qh->link;
376
377 wmb(); /* Make sure we flush everything */
378
379 lltd->link = cpu_to_le32(urbp->qh->dma_handle) | UHCI_PTR_QH;
380
381 list_add_tail(&urbp->queue_list, &furbp->queue_list);
382
383 urbp->queued = 1;
384}
385
386static void uhci_delete_queued_urb(struct uhci_hcd *uhci, struct urb *urb)
387{
388 struct urb_priv *urbp, *nurbp, *purbp, *turbp;
389 struct uhci_td *pltd;
390 unsigned int toggle;
391
392 urbp = urb->hcpriv;
393
394 if (list_empty(&urbp->queue_list))
395 return;
396
397 nurbp = list_entry(urbp->queue_list.next, struct urb_priv, queue_list);
398
399 /*
400 * Fix up the toggle for the following URBs in the queue.
401 * Only needed for bulk and interrupt: control and isochronous
402 * endpoints don't propagate toggles between messages.
403 */
404 if (usb_pipebulk(urb->pipe) || usb_pipeint(urb->pipe)) {
405 if (!urbp->queued)
406 /* We just set the toggle in uhci_unlink_generic */
407 toggle = usb_gettoggle(urb->dev,
408 usb_pipeendpoint(urb->pipe),
409 usb_pipeout(urb->pipe));
410 else {
411 /* If we're in the middle of the queue, grab the */
412 /* toggle from the TD previous to us */
413 purbp = list_entry(urbp->queue_list.prev,
414 struct urb_priv, queue_list);
415 pltd = list_entry(purbp->td_list.prev,
416 struct uhci_td, list);
417 toggle = uhci_toggle(td_token(pltd)) ^ 1;
418 }
419
420 list_for_each_entry(turbp, &urbp->queue_list, queue_list) {
421 if (!turbp->queued)
422 break;
423 toggle = uhci_fixup_toggle(turbp->urb, toggle);
424 }
425
426 usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
427 usb_pipeout(urb->pipe), toggle);
428 }
429
430 if (urbp->queued) {
431 /* We're somewhere in the middle (or end). The case where
432 * we're at the head is handled in uhci_remove_qh(). */
433 purbp = list_entry(urbp->queue_list.prev, struct urb_priv,
434 queue_list);
435
436 pltd = list_entry(purbp->td_list.prev, struct uhci_td, list);
437 if (nurbp->queued)
438 pltd->link = cpu_to_le32(nurbp->qh->dma_handle) | UHCI_PTR_QH;
439 else
440 /* The next URB happens to be the beginning, so */
441 /* we're the last, end the chain */
442 pltd->link = UHCI_PTR_TERM;
443 }
444
445 /* urbp->queue_list is handled in uhci_remove_qh() */
446}
447
448static struct urb_priv *uhci_alloc_urb_priv(struct uhci_hcd *uhci, struct urb *urb)
449{
450 struct urb_priv *urbp;
451
452 urbp = kmem_cache_alloc(uhci_up_cachep, SLAB_ATOMIC);
453 if (!urbp)
454 return NULL;
455
456 memset((void *)urbp, 0, sizeof(*urbp));
457
458 urbp->inserttime = jiffies;
459 urbp->fsbrtime = jiffies;
460 urbp->urb = urb;
461
462 INIT_LIST_HEAD(&urbp->td_list);
463 INIT_LIST_HEAD(&urbp->queue_list);
464 INIT_LIST_HEAD(&urbp->urb_list);
465
466 list_add_tail(&urbp->urb_list, &uhci->urb_list);
467
468 urb->hcpriv = urbp;
469
470 return urbp;
471}
472
473static void uhci_add_td_to_urb(struct urb *urb, struct uhci_td *td)
474{
475 struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
476
477 td->urb = urb;
478
479 list_add_tail(&td->list, &urbp->td_list);
480}
481
482static void uhci_remove_td_from_urb(struct uhci_td *td)
483{
484 if (list_empty(&td->list))
485 return;
486
487 list_del_init(&td->list);
488
489 td->urb = NULL;
490}
491
492static void uhci_destroy_urb_priv(struct uhci_hcd *uhci, struct urb *urb)
493{
494 struct uhci_td *td, *tmp;
495 struct urb_priv *urbp;
496
497 urbp = (struct urb_priv *)urb->hcpriv;
498 if (!urbp)
499 return;
500
501 if (!list_empty(&urbp->urb_list))
502 dev_warn(uhci_dev(uhci), "urb %p still on uhci->urb_list "
503 "or uhci->remove_list!\n", urb);
504
505 uhci_get_current_frame_number(uhci);
506 if (uhci->frame_number + uhci->is_stopped != uhci->td_remove_age) {
507 uhci_free_pending_tds(uhci);
508 uhci->td_remove_age = uhci->frame_number;
509 }
510
511 /* Check to see if the remove list is empty. Set the IOC bit */
512 /* to force an interrupt so we can remove the TD's*/
513 if (list_empty(&uhci->td_remove_list))
514 uhci_set_next_interrupt(uhci);
515
516 list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
517 uhci_remove_td_from_urb(td);
518 uhci_remove_td(uhci, td);
519 list_add(&td->remove_list, &uhci->td_remove_list);
520 }
521
522 urb->hcpriv = NULL;
523 kmem_cache_free(uhci_up_cachep, urbp);
524}
525
526static void uhci_inc_fsbr(struct uhci_hcd *uhci, struct urb *urb)
527{
528 struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
529
530 if ((!(urb->transfer_flags & URB_NO_FSBR)) && !urbp->fsbr) {
531 urbp->fsbr = 1;
532 if (!uhci->fsbr++ && !uhci->fsbrtimeout)
533 uhci->skel_term_qh->link = cpu_to_le32(uhci->skel_fs_control_qh->dma_handle) | UHCI_PTR_QH;
534 }
535}
536
537static void uhci_dec_fsbr(struct uhci_hcd *uhci, struct urb *urb)
538{
539 struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
540
541 if ((!(urb->transfer_flags & URB_NO_FSBR)) && urbp->fsbr) {
542 urbp->fsbr = 0;
543 if (!--uhci->fsbr)
544 uhci->fsbrtimeout = jiffies + FSBR_DELAY;
545 }
546}
547
548/*
549 * Map status to standard result codes
550 *
551 * <status> is (td_status(td) & 0xF60000), a.k.a.
552 * uhci_status_bits(td_status(td)).
553 * Note: <status> does not include the TD_CTRL_NAK bit.
554 * <dir_out> is True for output TDs and False for input TDs.
555 */
556static int uhci_map_status(int status, int dir_out)
557{
558 if (!status)
559 return 0;
560 if (status & TD_CTRL_BITSTUFF) /* Bitstuff error */
561 return -EPROTO;
562 if (status & TD_CTRL_CRCTIMEO) { /* CRC/Timeout */
563 if (dir_out)
564 return -EPROTO;
565 else
566 return -EILSEQ;
567 }
568 if (status & TD_CTRL_BABBLE) /* Babble */
569 return -EOVERFLOW;
570 if (status & TD_CTRL_DBUFERR) /* Buffer error */
571 return -ENOSR;
572 if (status & TD_CTRL_STALLED) /* Stalled */
573 return -EPIPE;
574 WARN_ON(status & TD_CTRL_ACTIVE); /* Active */
575 return 0;
576}
577
578/*
579 * Control transfers
580 */
581static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb, struct urb *eurb)
582{
583 struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
584 struct uhci_td *td;
585 struct uhci_qh *qh, *skelqh;
586 unsigned long destination, status;
587 int maxsze = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
588 int len = urb->transfer_buffer_length;
589 dma_addr_t data = urb->transfer_dma;
590
591 /* The "pipe" thing contains the destination in bits 8--18 */
592 destination = (urb->pipe & PIPE_DEVEP_MASK) | USB_PID_SETUP;
593
594 /* 3 errors */
595 status = TD_CTRL_ACTIVE | uhci_maxerr(3);
596 if (urb->dev->speed == USB_SPEED_LOW)
597 status |= TD_CTRL_LS;
598
599 /*
600 * Build the TD for the control request setup packet
601 */
602 td = uhci_alloc_td(uhci, urb->dev);
603 if (!td)
604 return -ENOMEM;
605
606 uhci_add_td_to_urb(urb, td);
607 uhci_fill_td(td, status, destination | uhci_explen(7),
608 urb->setup_dma);
609
610 /*
611 * If direction is "send", change the packet ID from SETUP (0x2D)
612 * to OUT (0xE1). Else change it from SETUP to IN (0x69) and
613 * set Short Packet Detect (SPD) for all data packets.
614 */
615 if (usb_pipeout(urb->pipe))
616 destination ^= (USB_PID_SETUP ^ USB_PID_OUT);
617 else {
618 destination ^= (USB_PID_SETUP ^ USB_PID_IN);
619 status |= TD_CTRL_SPD;
620 }
621
622 /*
623 * Build the DATA TD's
624 */
625 while (len > 0) {
626 int pktsze = len;
627
628 if (pktsze > maxsze)
629 pktsze = maxsze;
630
631 td = uhci_alloc_td(uhci, urb->dev);
632 if (!td)
633 return -ENOMEM;
634
635 /* Alternate Data0/1 (start with Data1) */
636 destination ^= TD_TOKEN_TOGGLE;
637
638 uhci_add_td_to_urb(urb, td);
639 uhci_fill_td(td, status, destination | uhci_explen(pktsze - 1),
640 data);
641
642 data += pktsze;
643 len -= pktsze;
644 }
645
646 /*
647 * Build the final TD for control status
648 */
649 td = uhci_alloc_td(uhci, urb->dev);
650 if (!td)
651 return -ENOMEM;
652
653 /*
654 * It's IN if the pipe is an output pipe or we're not expecting
655 * data back.
656 */
657 destination &= ~TD_TOKEN_PID_MASK;
658 if (usb_pipeout(urb->pipe) || !urb->transfer_buffer_length)
659 destination |= USB_PID_IN;
660 else
661 destination |= USB_PID_OUT;
662
663 destination |= TD_TOKEN_TOGGLE; /* End in Data1 */
664
665 status &= ~TD_CTRL_SPD;
666
667 uhci_add_td_to_urb(urb, td);
668 uhci_fill_td(td, status | TD_CTRL_IOC,
669 destination | uhci_explen(UHCI_NULL_DATA_SIZE), 0);
670
671 qh = uhci_alloc_qh(uhci, urb->dev);
672 if (!qh)
673 return -ENOMEM;
674
675 urbp->qh = qh;
676 qh->urbp = urbp;
677
678 uhci_insert_tds_in_qh(qh, urb, UHCI_PTR_BREADTH);
679
680 /* Low-speed transfers get a different queue, and won't hog the bus.
681 * Also, some devices enumerate better without FSBR; the easiest way
682 * to do that is to put URBs on the low-speed queue while the device
683 * is in the DEFAULT state. */
684 if (urb->dev->speed == USB_SPEED_LOW ||
685 urb->dev->state == USB_STATE_DEFAULT)
686 skelqh = uhci->skel_ls_control_qh;
687 else {
688 skelqh = uhci->skel_fs_control_qh;
689 uhci_inc_fsbr(uhci, urb);
690 }
691
692 if (eurb)
693 uhci_append_queued_urb(uhci, eurb, urb);
694 else
695 uhci_insert_qh(uhci, skelqh, urb);
696
697 return -EINPROGRESS;
698}
699
700/*
701 * If control-IN transfer was short, the status packet wasn't sent.
702 * This routine changes the element pointer in the QH to point at the
703 * status TD. It's safe to do this even while the QH is live, because
704 * the hardware only updates the element pointer following a successful
705 * transfer. The inactive TD for the short packet won't cause an update,
706 * so the pointer won't get overwritten. The next time the controller
707 * sees this QH, it will send the status packet.
708 */
709static int usb_control_retrigger_status(struct uhci_hcd *uhci, struct urb *urb)
710{
711 struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
712 struct uhci_td *td;
713
714 urbp->short_control_packet = 1;
715
716 td = list_entry(urbp->td_list.prev, struct uhci_td, list);
717 urbp->qh->element = cpu_to_le32(td->dma_handle);
718
719 return -EINPROGRESS;
720}
721
722
723static int uhci_result_control(struct uhci_hcd *uhci, struct urb *urb)
724{
725 struct list_head *tmp, *head;
726 struct urb_priv *urbp = urb->hcpriv;
727 struct uhci_td *td;
728 unsigned int status;
729 int ret = 0;
730
731 if (list_empty(&urbp->td_list))
732 return -EINVAL;
733
734 head = &urbp->td_list;
735
736 if (urbp->short_control_packet) {
737 tmp = head->prev;
738 goto status_stage;
739 }
740
741 tmp = head->next;
742 td = list_entry(tmp, struct uhci_td, list);
743
744 /* The first TD is the SETUP stage, check the status, but skip */
745 /* the count */
746 status = uhci_status_bits(td_status(td));
747 if (status & TD_CTRL_ACTIVE)
748 return -EINPROGRESS;
749
750 if (status)
751 goto td_error;
752
753 urb->actual_length = 0;
754
755 /* The rest of the TD's (but the last) are data */
756 tmp = tmp->next;
757 while (tmp != head && tmp->next != head) {
758 unsigned int ctrlstat;
759
760 td = list_entry(tmp, struct uhci_td, list);
761 tmp = tmp->next;
762
763 ctrlstat = td_status(td);
764 status = uhci_status_bits(ctrlstat);
765 if (status & TD_CTRL_ACTIVE)
766 return -EINPROGRESS;
767
768 urb->actual_length += uhci_actual_length(ctrlstat);
769
770 if (status)
771 goto td_error;
772
773 /* Check to see if we received a short packet */
774 if (uhci_actual_length(ctrlstat) <
775 uhci_expected_length(td_token(td))) {
776 if (urb->transfer_flags & URB_SHORT_NOT_OK) {
777 ret = -EREMOTEIO;
778 goto err;
779 }
780
781 if (uhci_packetid(td_token(td)) == USB_PID_IN)
782 return usb_control_retrigger_status(uhci, urb);
783 else
784 return 0;
785 }
786 }
787
788status_stage:
789 td = list_entry(tmp, struct uhci_td, list);
790
791 /* Control status stage */
792 status = td_status(td);
793
794#ifdef I_HAVE_BUGGY_APC_BACKUPS
795 /* APC BackUPS Pro kludge */
796 /* It tries to send all of the descriptor instead of the amount */
797 /* we requested */
798 if (status & TD_CTRL_IOC && /* IOC is masked out by uhci_status_bits */
799 status & TD_CTRL_ACTIVE &&
800 status & TD_CTRL_NAK)
801 return 0;
802#endif
803
804 status = uhci_status_bits(status);
805 if (status & TD_CTRL_ACTIVE)
806 return -EINPROGRESS;
807
808 if (status)
809 goto td_error;
810
811 return 0;
812
813td_error:
814 ret = uhci_map_status(status, uhci_packetout(td_token(td)));
815
816err:
817 if ((debug == 1 && ret != -EPIPE) || debug > 1) {
818 /* Some debugging code */
819 dev_dbg(uhci_dev(uhci), "%s: failed with status %x\n",
820 __FUNCTION__, status);
821
822 if (errbuf) {
823 /* Print the chain for debugging purposes */
824 uhci_show_qh(urbp->qh, errbuf, ERRBUF_LEN, 0);
825
826 lprintk(errbuf);
827 }
828 }
829
830 return ret;
831}
832
833/*
834 * Common submit for bulk and interrupt
835 */
836static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb, struct urb *eurb, struct uhci_qh *skelqh)
837{
838 struct uhci_td *td;
839 struct uhci_qh *qh;
840 unsigned long destination, status;
841 int maxsze = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
842 int len = urb->transfer_buffer_length;
843 struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
844 dma_addr_t data = urb->transfer_dma;
845
846 if (len < 0)
847 return -EINVAL;
848
849 /* The "pipe" thing contains the destination in bits 8--18 */
850 destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe);
851
852 status = uhci_maxerr(3) | TD_CTRL_ACTIVE;
853 if (urb->dev->speed == USB_SPEED_LOW)
854 status |= TD_CTRL_LS;
855 if (usb_pipein(urb->pipe))
856 status |= TD_CTRL_SPD;
857
858 /*
859 * Build the DATA TD's
860 */
861 do { /* Allow zero length packets */
862 int pktsze = maxsze;
863
864 if (pktsze >= len) {
865 pktsze = len;
866 if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
867 status &= ~TD_CTRL_SPD;
868 }
869
870 td = uhci_alloc_td(uhci, urb->dev);
871 if (!td)
872 return -ENOMEM;
873
874 uhci_add_td_to_urb(urb, td);
875 uhci_fill_td(td, status, destination | uhci_explen(pktsze - 1) |
876 (usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),
877 usb_pipeout(urb->pipe)) << TD_TOKEN_TOGGLE_SHIFT),
878 data);
879
880 data += pktsze;
881 len -= maxsze;
882
883 usb_dotoggle(urb->dev, usb_pipeendpoint(urb->pipe),
884 usb_pipeout(urb->pipe));
885 } while (len > 0);
886
887 /*
888 * URB_ZERO_PACKET means adding a 0-length packet, if direction
889 * is OUT and the transfer_length was an exact multiple of maxsze,
890 * hence (len = transfer_length - N * maxsze) == 0
891 * however, if transfer_length == 0, the zero packet was already
892 * prepared above.
893 */
894 if (usb_pipeout(urb->pipe) && (urb->transfer_flags & URB_ZERO_PACKET) &&
895 !len && urb->transfer_buffer_length) {
896 td = uhci_alloc_td(uhci, urb->dev);
897 if (!td)
898 return -ENOMEM;
899
900 uhci_add_td_to_urb(urb, td);
901 uhci_fill_td(td, status, destination | uhci_explen(UHCI_NULL_DATA_SIZE) |
902 (usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),
903 usb_pipeout(urb->pipe)) << TD_TOKEN_TOGGLE_SHIFT),
904 data);
905
906 usb_dotoggle(urb->dev, usb_pipeendpoint(urb->pipe),
907 usb_pipeout(urb->pipe));
908 }
909
910 /* Set the interrupt-on-completion flag on the last packet.
911 * A more-or-less typical 4 KB URB (= size of one memory page)
912 * will require about 3 ms to transfer; that's a little on the
913 * fast side but not enough to justify delaying an interrupt
914 * more than 2 or 3 URBs, so we will ignore the URB_NO_INTERRUPT
915 * flag setting. */
916 td->status |= cpu_to_le32(TD_CTRL_IOC);
917
918 qh = uhci_alloc_qh(uhci, urb->dev);
919 if (!qh)
920 return -ENOMEM;
921
922 urbp->qh = qh;
923 qh->urbp = urbp;
924
925 /* Always breadth first */
926 uhci_insert_tds_in_qh(qh, urb, UHCI_PTR_BREADTH);
927
928 if (eurb)
929 uhci_append_queued_urb(uhci, eurb, urb);
930 else
931 uhci_insert_qh(uhci, skelqh, urb);
932
933 return -EINPROGRESS;
934}
935
936/*
937 * Common result for bulk and interrupt
938 */
939static int uhci_result_common(struct uhci_hcd *uhci, struct urb *urb)
940{
941 struct urb_priv *urbp = urb->hcpriv;
942 struct uhci_td *td;
943 unsigned int status = 0;
944 int ret = 0;
945
946 urb->actual_length = 0;
947
948 list_for_each_entry(td, &urbp->td_list, list) {
949 unsigned int ctrlstat = td_status(td);
950
951 status = uhci_status_bits(ctrlstat);
952 if (status & TD_CTRL_ACTIVE)
953 return -EINPROGRESS;
954
955 urb->actual_length += uhci_actual_length(ctrlstat);
956
957 if (status)
958 goto td_error;
959
960 if (uhci_actual_length(ctrlstat) <
961 uhci_expected_length(td_token(td))) {
962 if (urb->transfer_flags & URB_SHORT_NOT_OK) {
963 ret = -EREMOTEIO;
964 goto err;
965 } else
966 return 0;
967 }
968 }
969
970 return 0;
971
972td_error:
973 ret = uhci_map_status(status, uhci_packetout(td_token(td)));
974
975err:
976 /*
977 * Enable this chunk of code if you want to see some more debugging.
978 * But be careful, it has the tendancy to starve out khubd and prevent
979 * disconnects from happening successfully if you have a slow debug
980 * log interface (like a serial console.
981 */
982#if 0
983 if ((debug == 1 && ret != -EPIPE) || debug > 1) {
984 /* Some debugging code */
985 dev_dbg(uhci_dev(uhci), "%s: failed with status %x\n",
986 __FUNCTION__, status);
987
988 if (errbuf) {
989 /* Print the chain for debugging purposes */
990 uhci_show_qh(urbp->qh, errbuf, ERRBUF_LEN, 0);
991
992 lprintk(errbuf);
993 }
994 }
995#endif
996 return ret;
997}
998
999static inline int uhci_submit_bulk(struct uhci_hcd *uhci, struct urb *urb, struct urb *eurb)
1000{
1001 int ret;
1002
1003 /* Can't have low-speed bulk transfers */
1004 if (urb->dev->speed == USB_SPEED_LOW)
1005 return -EINVAL;
1006
1007 ret = uhci_submit_common(uhci, urb, eurb, uhci->skel_bulk_qh);
1008 if (ret == -EINPROGRESS)
1009 uhci_inc_fsbr(uhci, urb);
1010
1011 return ret;
1012}
1013
1014static inline int uhci_submit_interrupt(struct uhci_hcd *uhci, struct urb *urb, struct urb *eurb)
1015{
1016 /* USB 1.1 interrupt transfers only involve one packet per interval;
1017 * that's the uhci_submit_common() "breadth first" policy. Drivers
1018 * can submit urbs of any length, but longer ones might need many
1019 * intervals to complete.
1020 */
1021 return uhci_submit_common(uhci, urb, eurb, uhci->skelqh[__interval_to_skel(urb->interval)]);
1022}
1023
1024/*
1025 * Isochronous transfers
1026 */
1027static int isochronous_find_limits(struct uhci_hcd *uhci, struct urb *urb, unsigned int *start, unsigned int *end)
1028{
1029 struct urb *last_urb = NULL;
1030 struct urb_priv *up;
1031 int ret = 0;
1032
1033 list_for_each_entry(up, &uhci->urb_list, urb_list) {
1034 struct urb *u = up->urb;
1035
1036 /* look for pending URB's with identical pipe handle */
1037 if ((urb->pipe == u->pipe) && (urb->dev == u->dev) &&
1038 (u->status == -EINPROGRESS) && (u != urb)) {
1039 if (!last_urb)
1040 *start = u->start_frame;
1041 last_urb = u;
1042 }
1043 }
1044
1045 if (last_urb) {
1046 *end = (last_urb->start_frame + last_urb->number_of_packets *
1047 last_urb->interval) & (UHCI_NUMFRAMES-1);
1048 ret = 0;
1049 } else
1050 ret = -1; /* no previous urb found */
1051
1052 return ret;
1053}
1054
1055static int isochronous_find_start(struct uhci_hcd *uhci, struct urb *urb)
1056{
1057 int limits;
1058 unsigned int start = 0, end = 0;
1059
1060 if (urb->number_of_packets > 900) /* 900? Why? */
1061 return -EFBIG;
1062
1063 limits = isochronous_find_limits(uhci, urb, &start, &end);
1064
1065 if (urb->transfer_flags & URB_ISO_ASAP) {
1066 if (limits) {
1067 uhci_get_current_frame_number(uhci);
1068 urb->start_frame = (uhci->frame_number + 10)
1069 & (UHCI_NUMFRAMES - 1);
1070 } else
1071 urb->start_frame = end;
1072 } else {
1073 urb->start_frame &= (UHCI_NUMFRAMES - 1);
1074 /* FIXME: Sanity check */
1075 }
1076
1077 return 0;
1078}
1079
1080/*
1081 * Isochronous transfers
1082 */
1083static int uhci_submit_isochronous(struct uhci_hcd *uhci, struct urb *urb)
1084{
1085 struct uhci_td *td;
1086 int i, ret, frame;
1087 int status, destination;
1088
1089 status = TD_CTRL_ACTIVE | TD_CTRL_IOS;
1090 destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe);
1091
1092 ret = isochronous_find_start(uhci, urb);
1093 if (ret)
1094 return ret;
1095
1096 frame = urb->start_frame;
1097 for (i = 0; i < urb->number_of_packets; i++, frame += urb->interval) {
1098 if (!urb->iso_frame_desc[i].length)
1099 continue;
1100
1101 td = uhci_alloc_td(uhci, urb->dev);
1102 if (!td)
1103 return -ENOMEM;
1104
1105 uhci_add_td_to_urb(urb, td);
1106 uhci_fill_td(td, status, destination | uhci_explen(urb->iso_frame_desc[i].length - 1),
1107 urb->transfer_dma + urb->iso_frame_desc[i].offset);
1108
1109 if (i + 1 >= urb->number_of_packets)
1110 td->status |= cpu_to_le32(TD_CTRL_IOC);
1111
1112 uhci_insert_td_frame_list(uhci, td, frame);
1113 }
1114
1115 return -EINPROGRESS;
1116}
1117
1118static int uhci_result_isochronous(struct uhci_hcd *uhci, struct urb *urb)
1119{
1120 struct uhci_td *td;
1121 struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
1122 int status;
1123 int i, ret = 0;
1124
1125 urb->actual_length = 0;
1126
1127 i = 0;
1128 list_for_each_entry(td, &urbp->td_list, list) {
1129 int actlength;
1130 unsigned int ctrlstat = td_status(td);
1131
1132 if (ctrlstat & TD_CTRL_ACTIVE)
1133 return -EINPROGRESS;
1134
1135 actlength = uhci_actual_length(ctrlstat);
1136 urb->iso_frame_desc[i].actual_length = actlength;
1137 urb->actual_length += actlength;
1138
1139 status = uhci_map_status(uhci_status_bits(ctrlstat),
1140 usb_pipeout(urb->pipe));
1141 urb->iso_frame_desc[i].status = status;
1142 if (status) {
1143 urb->error_count++;
1144 ret = status;
1145 }
1146
1147 i++;
1148 }
1149
1150 return ret;
1151}
1152
1153static struct urb *uhci_find_urb_ep(struct uhci_hcd *uhci, struct urb *urb)
1154{
1155 struct urb_priv *up;
1156
1157 /* We don't match Isoc transfers since they are special */
1158 if (usb_pipeisoc(urb->pipe))
1159 return NULL;
1160
1161 list_for_each_entry(up, &uhci->urb_list, urb_list) {
1162 struct urb *u = up->urb;
1163
1164 if (u->dev == urb->dev && u->status == -EINPROGRESS) {
1165 /* For control, ignore the direction */
1166 if (usb_pipecontrol(urb->pipe) &&
1167 (u->pipe & ~USB_DIR_IN) == (urb->pipe & ~USB_DIR_IN))
1168 return u;
1169 else if (u->pipe == urb->pipe)
1170 return u;
1171 }
1172 }
1173
1174 return NULL;
1175}
1176
1177static int uhci_urb_enqueue(struct usb_hcd *hcd,
1178 struct usb_host_endpoint *ep,
1179 struct urb *urb, int mem_flags)
1180{
1181 int ret;
1182 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
1183 unsigned long flags;
1184 struct urb *eurb;
1185 int bustime;
1186
1187 spin_lock_irqsave(&uhci->lock, flags);
1188
1189 ret = urb->status;
1190 if (ret != -EINPROGRESS) /* URB already unlinked! */
1191 goto out;
1192
1193 eurb = uhci_find_urb_ep(uhci, urb);
1194
1195 if (!uhci_alloc_urb_priv(uhci, urb)) {
1196 ret = -ENOMEM;
1197 goto out;
1198 }
1199
1200 switch (usb_pipetype(urb->pipe)) {
1201 case PIPE_CONTROL:
1202 ret = uhci_submit_control(uhci, urb, eurb);
1203 break;
1204 case PIPE_INTERRUPT:
1205 if (!eurb) {
1206 bustime = usb_check_bandwidth(urb->dev, urb);
1207 if (bustime < 0)
1208 ret = bustime;
1209 else {
1210 ret = uhci_submit_interrupt(uhci, urb, eurb);
1211 if (ret == -EINPROGRESS)
1212 usb_claim_bandwidth(urb->dev, urb, bustime, 0);
1213 }
1214 } else { /* inherit from parent */
1215 urb->bandwidth = eurb->bandwidth;
1216 ret = uhci_submit_interrupt(uhci, urb, eurb);
1217 }
1218 break;
1219 case PIPE_BULK:
1220 ret = uhci_submit_bulk(uhci, urb, eurb);
1221 break;
1222 case PIPE_ISOCHRONOUS:
1223 bustime = usb_check_bandwidth(urb->dev, urb);
1224 if (bustime < 0) {
1225 ret = bustime;
1226 break;
1227 }
1228
1229 ret = uhci_submit_isochronous(uhci, urb);
1230 if (ret == -EINPROGRESS)
1231 usb_claim_bandwidth(urb->dev, urb, bustime, 1);
1232 break;
1233 }
1234
1235 if (ret != -EINPROGRESS) {
1236 /* Submit failed, so delete it from the urb_list */
1237 struct urb_priv *urbp = urb->hcpriv;
1238
1239 list_del_init(&urbp->urb_list);
1240 uhci_destroy_urb_priv(uhci, urb);
1241 } else
1242 ret = 0;
1243
1244out:
1245 spin_unlock_irqrestore(&uhci->lock, flags);
1246 return ret;
1247}
1248
1249/*
1250 * Return the result of a transfer
1251 */
1252static void uhci_transfer_result(struct uhci_hcd *uhci, struct urb *urb)
1253{
1254 int ret = -EINPROGRESS;
1255 struct urb_priv *urbp;
1256
1257 spin_lock(&urb->lock);
1258
1259 urbp = (struct urb_priv *)urb->hcpriv;
1260
1261 if (urb->status != -EINPROGRESS) /* URB already dequeued */
1262 goto out;
1263
1264 switch (usb_pipetype(urb->pipe)) {
1265 case PIPE_CONTROL:
1266 ret = uhci_result_control(uhci, urb);
1267 break;
1268 case PIPE_BULK:
1269 case PIPE_INTERRUPT:
1270 ret = uhci_result_common(uhci, urb);
1271 break;
1272 case PIPE_ISOCHRONOUS:
1273 ret = uhci_result_isochronous(uhci, urb);
1274 break;
1275 }
1276
1277 if (ret == -EINPROGRESS)
1278 goto out;
1279 urb->status = ret;
1280
1281 switch (usb_pipetype(urb->pipe)) {
1282 case PIPE_CONTROL:
1283 case PIPE_BULK:
1284 case PIPE_ISOCHRONOUS:
1285 /* Release bandwidth for Interrupt or Isoc. transfers */
1286 if (urb->bandwidth)
1287 usb_release_bandwidth(urb->dev, urb, 1);
1288 uhci_unlink_generic(uhci, urb);
1289 break;
1290 case PIPE_INTERRUPT:
1291 /* Release bandwidth for Interrupt or Isoc. transfers */
1292 /* Make sure we don't release if we have a queued URB */
1293 if (list_empty(&urbp->queue_list) && urb->bandwidth)
1294 usb_release_bandwidth(urb->dev, urb, 0);
1295 else
1296 /* bandwidth was passed on to queued URB, */
1297 /* so don't let usb_unlink_urb() release it */
1298 urb->bandwidth = 0;
1299 uhci_unlink_generic(uhci, urb);
1300 break;
1301 default:
1302 dev_info(uhci_dev(uhci), "%s: unknown pipe type %d "
1303 "for urb %p\n",
1304 __FUNCTION__, usb_pipetype(urb->pipe), urb);
1305 }
1306
1307 /* Move it from uhci->urb_list to uhci->complete_list */
1308 uhci_moveto_complete(uhci, urbp);
1309
1310out:
1311 spin_unlock(&urb->lock);
1312}
1313
1314static void uhci_unlink_generic(struct uhci_hcd *uhci, struct urb *urb)
1315{
1316 struct list_head *head;
1317 struct uhci_td *td;
1318 struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
1319 int prevactive = 0;
1320
1321 uhci_dec_fsbr(uhci, urb); /* Safe since it checks */
1322
1323 /*
1324 * Now we need to find out what the last successful toggle was
1325 * so we can update the local data toggle for the next transfer
1326 *
1327 * There are 2 ways the last successful completed TD is found:
1328 *
1329 * 1) The TD is NOT active and the actual length < expected length
1330 * 2) The TD is NOT active and it's the last TD in the chain
1331 *
1332 * and a third way the first uncompleted TD is found:
1333 *
1334 * 3) The TD is active and the previous TD is NOT active
1335 *
1336 * Control and Isochronous ignore the toggle, so this is safe
1337 * for all types
1338 *
1339 * FIXME: The toggle fixups won't be 100% reliable until we
1340 * change over to using a single queue for each endpoint and
1341 * stop the queue before unlinking.
1342 */
1343 head = &urbp->td_list;
1344 list_for_each_entry(td, head, list) {
1345 unsigned int ctrlstat = td_status(td);
1346
1347 if (!(ctrlstat & TD_CTRL_ACTIVE) &&
1348 (uhci_actual_length(ctrlstat) <
1349 uhci_expected_length(td_token(td)) ||
1350 td->list.next == head))
1351 usb_settoggle(urb->dev, uhci_endpoint(td_token(td)),
1352 uhci_packetout(td_token(td)),
1353 uhci_toggle(td_token(td)) ^ 1);
1354 else if ((ctrlstat & TD_CTRL_ACTIVE) && !prevactive)
1355 usb_settoggle(urb->dev, uhci_endpoint(td_token(td)),
1356 uhci_packetout(td_token(td)),
1357 uhci_toggle(td_token(td)));
1358
1359 prevactive = ctrlstat & TD_CTRL_ACTIVE;
1360 }
1361
1362 uhci_delete_queued_urb(uhci, urb);
1363
1364 /* The interrupt loop will reclaim the QH's */
1365 uhci_remove_qh(uhci, urbp->qh);
1366 urbp->qh = NULL;
1367}
1368
1369static int uhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb)
1370{
1371 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
1372 unsigned long flags;
1373 struct urb_priv *urbp;
1374
1375 spin_lock_irqsave(&uhci->lock, flags);
1376 urbp = urb->hcpriv;
1377 if (!urbp) /* URB was never linked! */
1378 goto done;
1379 list_del_init(&urbp->urb_list);
1380
1381 uhci_unlink_generic(uhci, urb);
1382
1383 uhci_get_current_frame_number(uhci);
1384 if (uhci->frame_number + uhci->is_stopped != uhci->urb_remove_age) {
1385 uhci_remove_pending_urbps(uhci);
1386 uhci->urb_remove_age = uhci->frame_number;
1387 }
1388
1389 /* If we're the first, set the next interrupt bit */
1390 if (list_empty(&uhci->urb_remove_list))
1391 uhci_set_next_interrupt(uhci);
1392 list_add_tail(&urbp->urb_list, &uhci->urb_remove_list);
1393
1394done:
1395 spin_unlock_irqrestore(&uhci->lock, flags);
1396 return 0;
1397}
1398
1399static int uhci_fsbr_timeout(struct uhci_hcd *uhci, struct urb *urb)
1400{
1401 struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
1402 struct list_head *head;
1403 struct uhci_td *td;
1404 int count = 0;
1405
1406 uhci_dec_fsbr(uhci, urb);
1407
1408 urbp->fsbr_timeout = 1;
1409
1410 /*
1411 * Ideally we would want to fix qh->element as well, but it's
1412 * read/write by the HC, so that can introduce a race. It's not
1413 * really worth the hassle
1414 */
1415
1416 head = &urbp->td_list;
1417 list_for_each_entry(td, head, list) {
1418 /*
1419 * Make sure we don't do the last one (since it'll have the
1420 * TERM bit set) as well as we skip every so many TD's to
1421 * make sure it doesn't hog the bandwidth
1422 */
1423 if (td->list.next != head && (count % DEPTH_INTERVAL) ==
1424 (DEPTH_INTERVAL - 1))
1425 td->link |= UHCI_PTR_DEPTH;
1426
1427 count++;
1428 }
1429
1430 return 0;
1431}
1432
1433static void uhci_free_pending_qhs(struct uhci_hcd *uhci)
1434{
1435 struct uhci_qh *qh, *tmp;
1436
1437 list_for_each_entry_safe(qh, tmp, &uhci->qh_remove_list, remove_list) {
1438 list_del_init(&qh->remove_list);
1439
1440 uhci_free_qh(uhci, qh);
1441 }
1442}
1443
1444static void uhci_free_pending_tds(struct uhci_hcd *uhci)
1445{
1446 struct uhci_td *td, *tmp;
1447
1448 list_for_each_entry_safe(td, tmp, &uhci->td_remove_list, remove_list) {
1449 list_del_init(&td->remove_list);
1450
1451 uhci_free_td(uhci, td);
1452 }
1453}
1454
1455static void
1456uhci_finish_urb(struct usb_hcd *hcd, struct urb *urb, struct pt_regs *regs)
1457__releases(uhci->lock)
1458__acquires(uhci->lock)
1459{
1460 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
1461
1462 uhci_destroy_urb_priv(uhci, urb);
1463
1464 spin_unlock(&uhci->lock);
1465 usb_hcd_giveback_urb(hcd, urb, regs);
1466 spin_lock(&uhci->lock);
1467}
1468
1469static void uhci_finish_completion(struct uhci_hcd *uhci, struct pt_regs *regs)
1470{
1471 struct urb_priv *urbp, *tmp;
1472
1473 list_for_each_entry_safe(urbp, tmp, &uhci->complete_list, urb_list) {
1474 struct urb *urb = urbp->urb;
1475
1476 list_del_init(&urbp->urb_list);
1477 uhci_finish_urb(uhci_to_hcd(uhci), urb, regs);
1478 }
1479}
1480
1481static void uhci_remove_pending_urbps(struct uhci_hcd *uhci)
1482{
1483
1484 /* Splice the urb_remove_list onto the end of the complete_list */
1485 list_splice_init(&uhci->urb_remove_list, uhci->complete_list.prev);
1486}
1487
1488/* Process events in the schedule, but only in one thread at a time */
1489static void uhci_scan_schedule(struct uhci_hcd *uhci, struct pt_regs *regs)
1490{
1491 struct urb_priv *urbp, *tmp;
1492
1493 /* Don't allow re-entrant calls */
1494 if (uhci->scan_in_progress) {
1495 uhci->need_rescan = 1;
1496 return;
1497 }
1498 uhci->scan_in_progress = 1;
1499 rescan:
1500 uhci->need_rescan = 0;
1501
Alan Stern6c1b4452005-04-21 16:04:58 -04001502 uhci_clear_next_interrupt(uhci);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001503 uhci_get_current_frame_number(uhci);
1504
1505 if (uhci->frame_number + uhci->is_stopped != uhci->qh_remove_age)
1506 uhci_free_pending_qhs(uhci);
1507 if (uhci->frame_number + uhci->is_stopped != uhci->td_remove_age)
1508 uhci_free_pending_tds(uhci);
1509 if (uhci->frame_number + uhci->is_stopped != uhci->urb_remove_age)
1510 uhci_remove_pending_urbps(uhci);
1511
1512 /* Walk the list of pending URBs to see which ones completed
1513 * (must be _safe because uhci_transfer_result() dequeues URBs) */
1514 list_for_each_entry_safe(urbp, tmp, &uhci->urb_list, urb_list) {
1515 struct urb *urb = urbp->urb;
1516
1517 /* Checks the status and does all of the magic necessary */
1518 uhci_transfer_result(uhci, urb);
1519 }
1520 uhci_finish_completion(uhci, regs);
1521
1522 /* If the controller is stopped, we can finish these off right now */
1523 if (uhci->is_stopped) {
1524 uhci_free_pending_qhs(uhci);
1525 uhci_free_pending_tds(uhci);
1526 uhci_remove_pending_urbps(uhci);
1527 }
1528
1529 if (uhci->need_rescan)
1530 goto rescan;
1531 uhci->scan_in_progress = 0;
1532
1533 if (list_empty(&uhci->urb_remove_list) &&
1534 list_empty(&uhci->td_remove_list) &&
1535 list_empty(&uhci->qh_remove_list))
1536 uhci_clear_next_interrupt(uhci);
1537 else
1538 uhci_set_next_interrupt(uhci);
1539
1540 /* Wake up anyone waiting for an URB to complete */
1541 wake_up_all(&uhci->waitqh);
1542}
Alan Sternf5946f82005-04-09 17:26:00 -04001543
1544static void check_fsbr(struct uhci_hcd *uhci)
1545{
1546 struct urb_priv *up;
1547
1548 list_for_each_entry(up, &uhci->urb_list, urb_list) {
1549 struct urb *u = up->urb;
1550
1551 spin_lock(&u->lock);
1552
1553 /* Check if the FSBR timed out */
1554 if (up->fsbr && !up->fsbr_timeout && time_after_eq(jiffies, up->fsbrtime + IDLE_TIMEOUT))
1555 uhci_fsbr_timeout(uhci, u);
1556
1557 spin_unlock(&u->lock);
1558 }
1559
1560 /* Really disable FSBR */
1561 if (!uhci->fsbr && uhci->fsbrtimeout && time_after_eq(jiffies, uhci->fsbrtimeout)) {
1562 uhci->fsbrtimeout = 0;
1563 uhci->skel_term_qh->link = UHCI_PTR_TERM;
1564 }
1565}