blob: b63e51c3c3ee2fdb959b13f5e0fd9511bc344d09 [file] [log] [blame]
Sam Ravnborgf5e706a2008-07-17 21:55:51 -07001#ifndef __SPARC64_PCI_H
2#define __SPARC64_PCI_H
3
4#ifdef __KERNEL__
5
6#include <linux/dma-mapping.h>
7
8/* Can be used to override the logic in pci_scan_bus for skipping
9 * already-configured bus numbers - to be used for buggy BIOSes
10 * or architectures with incomplete PCI setup by the loader.
11 */
12#define pcibios_assign_all_busses() 0
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070013
14#define PCIBIOS_MIN_IO 0UL
15#define PCIBIOS_MIN_MEM 0UL
16
17#define PCI_IRQ_NONE 0xffffffff
18
19#define PCI_CACHE_LINE_BYTES 64
20
21static inline void pcibios_set_master(struct pci_dev *dev)
22{
23 /* No special bus mastering setup handling */
24}
25
26static inline void pcibios_penalize_isa_irq(int irq, int active)
27{
28 /* We don't do dynamic PCI IRQ allocation */
29}
30
31/* The PCI address space does not equal the physical memory
32 * address space. The networking and block device layers use
33 * this boolean for bounce buffer decisions.
34 */
35#define PCI_DMA_BUS_IS_PHYS (0)
36
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070037/* pci_unmap_{single,page} is not a nop, thus... */
38#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
39 dma_addr_t ADDR_NAME;
40#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
41 __u32 LEN_NAME;
42#define pci_unmap_addr(PTR, ADDR_NAME) \
43 ((PTR)->ADDR_NAME)
44#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
45 (((PTR)->ADDR_NAME) = (VAL))
46#define pci_unmap_len(PTR, LEN_NAME) \
47 ((PTR)->LEN_NAME)
48#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
49 (((PTR)->LEN_NAME) = (VAL))
50
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070051/* PCI IOMMU mapping bypass support. */
52
53/* PCI 64-bit addressing works for all slots on all controller
54 * types on sparc64. However, it requires that the device
55 * can drive enough of the 64 bits.
56 */
57#define PCI64_REQUIRED_MASK (~(dma64_addr_t)0)
58#define PCI64_ADDR_BASE 0xfffc000000000000UL
59
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070060#ifdef CONFIG_PCI
61static inline void pci_dma_burst_advice(struct pci_dev *pdev,
62 enum pci_dma_burst_strategy *strat,
63 unsigned long *strategy_parameter)
64{
65 unsigned long cacheline_size;
66 u8 byte;
67
68 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
69 if (byte == 0)
70 cacheline_size = 1024;
71 else
72 cacheline_size = (int) byte * 4;
73
74 *strat = PCI_DMA_BURST_BOUNDARY;
75 *strategy_parameter = cacheline_size;
76}
77#endif
78
79/* Return the index of the PCI controller for device PDEV. */
80
81extern int pci_domain_nr(struct pci_bus *bus);
82static inline int pci_proc_domain(struct pci_bus *bus)
83{
84 return 1;
85}
86
87/* Platform support for /proc/bus/pci/X/Y mmap()s. */
88
89#define HAVE_PCI_MMAP
90#define HAVE_ARCH_PCI_GET_UNMAPPED_AREA
91#define get_pci_unmapped_area get_fb_unmapped_area
92
93extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
94 enum pci_mmap_state mmap_state,
95 int write_combine);
96
97extern void
98pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
99 struct resource *res);
100
101extern void
102pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
103 struct pci_bus_region *region);
104
Sam Ravnborgf5e706a2008-07-17 21:55:51 -0700105static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
106{
107 return PCI_IRQ_NONE;
108}
109
110struct device_node;
111extern struct device_node *pci_device_to_OF_node(struct pci_dev *pdev);
112
113#define HAVE_ARCH_PCI_RESOURCE_TO_USER
114extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
115 const struct resource *rsrc,
116 resource_size_t *start, resource_size_t *end);
117#endif /* __KERNEL__ */
118
119#endif /* __SPARC64_PCI_H */