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Andrei Konovalovae918c02007-07-17 04:04:11 -07001/*
Andrei Konovalovae918c02007-07-17 04:04:11 -07002 * Xilinx SPI controller driver (master mode only)
3 *
4 * Author: MontaVista Software, Inc.
5 * source@mvista.com
6 *
Grant Likely8fd88212010-10-14 09:04:29 -06007 * Copyright (c) 2010 Secret Lab Technologies, Ltd.
8 * Copyright (c) 2009 Intel Corporation
9 * 2002-2007 (c) MontaVista Software, Inc.
10
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
Andrei Konovalovae918c02007-07-17 04:04:11 -070014 */
15
16#include <linux/module.h>
17#include <linux/init.h>
18#include <linux/interrupt.h>
Grant Likelyeae6cb32010-10-14 09:32:53 -060019#include <linux/of.h>
Grant Likely8fd88212010-10-14 09:04:29 -060020#include <linux/platform_device.h>
Andres Salomone46dccf2011-02-17 19:07:15 -080021#include <linux/mfd/core.h>
Andrei Konovalovae918c02007-07-17 04:04:11 -070022#include <linux/spi/spi.h>
23#include <linux/spi/spi_bitbang.h>
Richard Röjforsd5af91a2009-11-13 12:28:39 +010024#include <linux/spi/xilinx_spi.h>
Grant Likelyeae6cb32010-10-14 09:32:53 -060025#include <linux/io.h>
Richard Röjforsd5af91a2009-11-13 12:28:39 +010026
David Brownellfc3ba952007-08-30 23:56:24 -070027#define XILINX_SPI_NAME "xilinx_spi"
Andrei Konovalovae918c02007-07-17 04:04:11 -070028
29/* Register definitions as per "OPB Serial Peripheral Interface (SPI) (v1.00e)
30 * Product Specification", DS464
31 */
Richard Röjforsc9da2e12009-11-13 12:28:55 +010032#define XSPI_CR_OFFSET 0x60 /* Control Register */
Andrei Konovalovae918c02007-07-17 04:04:11 -070033
34#define XSPI_CR_ENABLE 0x02
35#define XSPI_CR_MASTER_MODE 0x04
36#define XSPI_CR_CPOL 0x08
37#define XSPI_CR_CPHA 0x10
38#define XSPI_CR_MODE_MASK (XSPI_CR_CPHA | XSPI_CR_CPOL)
39#define XSPI_CR_TXFIFO_RESET 0x20
40#define XSPI_CR_RXFIFO_RESET 0x40
41#define XSPI_CR_MANUAL_SSELECT 0x80
42#define XSPI_CR_TRANS_INHIBIT 0x100
Richard Röjforsc9da2e12009-11-13 12:28:55 +010043#define XSPI_CR_LSB_FIRST 0x200
Andrei Konovalovae918c02007-07-17 04:04:11 -070044
Richard Röjforsc9da2e12009-11-13 12:28:55 +010045#define XSPI_SR_OFFSET 0x64 /* Status Register */
Andrei Konovalovae918c02007-07-17 04:04:11 -070046
47#define XSPI_SR_RX_EMPTY_MASK 0x01 /* Receive FIFO is empty */
48#define XSPI_SR_RX_FULL_MASK 0x02 /* Receive FIFO is full */
49#define XSPI_SR_TX_EMPTY_MASK 0x04 /* Transmit FIFO is empty */
50#define XSPI_SR_TX_FULL_MASK 0x08 /* Transmit FIFO is full */
51#define XSPI_SR_MODE_FAULT_MASK 0x10 /* Mode fault error */
52
Richard Röjforsc9da2e12009-11-13 12:28:55 +010053#define XSPI_TXD_OFFSET 0x68 /* Data Transmit Register */
54#define XSPI_RXD_OFFSET 0x6c /* Data Receive Register */
Andrei Konovalovae918c02007-07-17 04:04:11 -070055
56#define XSPI_SSR_OFFSET 0x70 /* 32-bit Slave Select Register */
57
58/* Register definitions as per "OPB IPIF (v3.01c) Product Specification", DS414
59 * IPIF registers are 32 bit
60 */
61#define XIPIF_V123B_DGIER_OFFSET 0x1c /* IPIF global int enable reg */
62#define XIPIF_V123B_GINTR_ENABLE 0x80000000
63
64#define XIPIF_V123B_IISR_OFFSET 0x20 /* IPIF interrupt status reg */
65#define XIPIF_V123B_IIER_OFFSET 0x28 /* IPIF interrupt enable reg */
66
67#define XSPI_INTR_MODE_FAULT 0x01 /* Mode fault error */
68#define XSPI_INTR_SLAVE_MODE_FAULT 0x02 /* Selected as slave while
69 * disabled */
70#define XSPI_INTR_TX_EMPTY 0x04 /* TxFIFO is empty */
71#define XSPI_INTR_TX_UNDERRUN 0x08 /* TxFIFO was underrun */
72#define XSPI_INTR_RX_FULL 0x10 /* RxFIFO is full */
73#define XSPI_INTR_RX_OVERRUN 0x20 /* RxFIFO was overrun */
Richard Röjforsc9da2e12009-11-13 12:28:55 +010074#define XSPI_INTR_TX_HALF_EMPTY 0x40 /* TxFIFO is half empty */
Andrei Konovalovae918c02007-07-17 04:04:11 -070075
76#define XIPIF_V123B_RESETR_OFFSET 0x40 /* IPIF reset register */
77#define XIPIF_V123B_RESET_MASK 0x0a /* the value to write */
78
79struct xilinx_spi {
80 /* bitbang has to be first */
81 struct spi_bitbang bitbang;
82 struct completion done;
Richard Röjforsd5af91a2009-11-13 12:28:39 +010083 struct resource mem; /* phys mem */
Andrei Konovalovae918c02007-07-17 04:04:11 -070084 void __iomem *regs; /* virt. address of the control registers */
85
86 u32 irq;
87
Andrei Konovalovae918c02007-07-17 04:04:11 -070088 u8 *rx_ptr; /* pointer in the Tx buffer */
89 const u8 *tx_ptr; /* pointer in the Rx buffer */
90 int remaining_bytes; /* the number of bytes left to transfer */
Richard Röjforsc9da2e12009-11-13 12:28:55 +010091 u8 bits_per_word;
Richard Röjfors86fc5932009-11-13 12:28:49 +010092 unsigned int (*read_fn) (void __iomem *);
93 void (*write_fn) (u32, void __iomem *);
Richard Röjforsc9da2e12009-11-13 12:28:55 +010094 void (*tx_fn) (struct xilinx_spi *);
95 void (*rx_fn) (struct xilinx_spi *);
Andrei Konovalovae918c02007-07-17 04:04:11 -070096};
97
Paul Mundt97782142010-01-20 13:49:45 -070098static void xspi_write32(u32 val, void __iomem *addr)
99{
100 iowrite32(val, addr);
101}
102
103static unsigned int xspi_read32(void __iomem *addr)
104{
105 return ioread32(addr);
106}
107
108static void xspi_write32_be(u32 val, void __iomem *addr)
109{
110 iowrite32be(val, addr);
111}
112
113static unsigned int xspi_read32_be(void __iomem *addr)
114{
115 return ioread32be(addr);
116}
117
Richard Röjforsc9da2e12009-11-13 12:28:55 +0100118static void xspi_tx8(struct xilinx_spi *xspi)
119{
120 xspi->write_fn(*xspi->tx_ptr, xspi->regs + XSPI_TXD_OFFSET);
121 xspi->tx_ptr++;
122}
123
124static void xspi_tx16(struct xilinx_spi *xspi)
125{
126 xspi->write_fn(*(u16 *)(xspi->tx_ptr), xspi->regs + XSPI_TXD_OFFSET);
127 xspi->tx_ptr += 2;
128}
129
130static void xspi_tx32(struct xilinx_spi *xspi)
131{
132 xspi->write_fn(*(u32 *)(xspi->tx_ptr), xspi->regs + XSPI_TXD_OFFSET);
133 xspi->tx_ptr += 4;
134}
135
136static void xspi_rx8(struct xilinx_spi *xspi)
137{
138 u32 data = xspi->read_fn(xspi->regs + XSPI_RXD_OFFSET);
139 if (xspi->rx_ptr) {
140 *xspi->rx_ptr = data & 0xff;
141 xspi->rx_ptr++;
142 }
143}
144
145static void xspi_rx16(struct xilinx_spi *xspi)
146{
147 u32 data = xspi->read_fn(xspi->regs + XSPI_RXD_OFFSET);
148 if (xspi->rx_ptr) {
149 *(u16 *)(xspi->rx_ptr) = data & 0xffff;
150 xspi->rx_ptr += 2;
151 }
152}
153
154static void xspi_rx32(struct xilinx_spi *xspi)
155{
156 u32 data = xspi->read_fn(xspi->regs + XSPI_RXD_OFFSET);
157 if (xspi->rx_ptr) {
158 *(u32 *)(xspi->rx_ptr) = data;
159 xspi->rx_ptr += 4;
160 }
161}
162
Richard Röjfors86fc5932009-11-13 12:28:49 +0100163static void xspi_init_hw(struct xilinx_spi *xspi)
Andrei Konovalovae918c02007-07-17 04:04:11 -0700164{
Richard Röjfors86fc5932009-11-13 12:28:49 +0100165 void __iomem *regs_base = xspi->regs;
166
Andrei Konovalovae918c02007-07-17 04:04:11 -0700167 /* Reset the SPI device */
Richard Röjfors86fc5932009-11-13 12:28:49 +0100168 xspi->write_fn(XIPIF_V123B_RESET_MASK,
169 regs_base + XIPIF_V123B_RESETR_OFFSET);
Andrei Konovalovae918c02007-07-17 04:04:11 -0700170 /* Disable all the interrupts just in case */
Richard Röjfors86fc5932009-11-13 12:28:49 +0100171 xspi->write_fn(0, regs_base + XIPIF_V123B_IIER_OFFSET);
Andrei Konovalovae918c02007-07-17 04:04:11 -0700172 /* Enable the global IPIF interrupt */
Richard Röjfors86fc5932009-11-13 12:28:49 +0100173 xspi->write_fn(XIPIF_V123B_GINTR_ENABLE,
174 regs_base + XIPIF_V123B_DGIER_OFFSET);
Andrei Konovalovae918c02007-07-17 04:04:11 -0700175 /* Deselect the slave on the SPI bus */
Richard Röjfors86fc5932009-11-13 12:28:49 +0100176 xspi->write_fn(0xffff, regs_base + XSPI_SSR_OFFSET);
Andrei Konovalovae918c02007-07-17 04:04:11 -0700177 /* Disable the transmitter, enable Manual Slave Select Assertion,
178 * put SPI controller into master mode, and enable it */
Richard Röjfors86fc5932009-11-13 12:28:49 +0100179 xspi->write_fn(XSPI_CR_TRANS_INHIBIT | XSPI_CR_MANUAL_SSELECT |
Richard Röjforsc9da2e12009-11-13 12:28:55 +0100180 XSPI_CR_MASTER_MODE | XSPI_CR_ENABLE | XSPI_CR_TXFIFO_RESET |
181 XSPI_CR_RXFIFO_RESET, regs_base + XSPI_CR_OFFSET);
Andrei Konovalovae918c02007-07-17 04:04:11 -0700182}
183
184static void xilinx_spi_chipselect(struct spi_device *spi, int is_on)
185{
186 struct xilinx_spi *xspi = spi_master_get_devdata(spi->master);
187
188 if (is_on == BITBANG_CS_INACTIVE) {
189 /* Deselect the slave on the SPI bus */
Richard Röjfors86fc5932009-11-13 12:28:49 +0100190 xspi->write_fn(0xffff, xspi->regs + XSPI_SSR_OFFSET);
Andrei Konovalovae918c02007-07-17 04:04:11 -0700191 } else if (is_on == BITBANG_CS_ACTIVE) {
192 /* Set the SPI clock phase and polarity */
Richard Röjfors86fc5932009-11-13 12:28:49 +0100193 u16 cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET)
Andrei Konovalovae918c02007-07-17 04:04:11 -0700194 & ~XSPI_CR_MODE_MASK;
195 if (spi->mode & SPI_CPHA)
196 cr |= XSPI_CR_CPHA;
197 if (spi->mode & SPI_CPOL)
198 cr |= XSPI_CR_CPOL;
Richard Röjfors86fc5932009-11-13 12:28:49 +0100199 xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET);
Andrei Konovalovae918c02007-07-17 04:04:11 -0700200
201 /* We do not check spi->max_speed_hz here as the SPI clock
202 * frequency is not software programmable (the IP block design
203 * parameter)
204 */
205
206 /* Activate the chip select */
Richard Röjfors86fc5932009-11-13 12:28:49 +0100207 xspi->write_fn(~(0x0001 << spi->chip_select),
208 xspi->regs + XSPI_SSR_OFFSET);
Andrei Konovalovae918c02007-07-17 04:04:11 -0700209 }
210}
211
212/* spi_bitbang requires custom setup_transfer() to be defined if there is a
213 * custom txrx_bufs(). We have nothing to setup here as the SPI IP block
Richard Röjforsc9da2e12009-11-13 12:28:55 +0100214 * supports 8 or 16 bits per word which cannot be changed in software.
215 * SPI clock can't be changed in software either.
216 * Check for correct bits per word. Chip select delay calculations could be
Andrei Konovalovae918c02007-07-17 04:04:11 -0700217 * added here as soon as bitbang_work() can be made aware of the delay value.
218 */
219static int xilinx_spi_setup_transfer(struct spi_device *spi,
220 struct spi_transfer *t)
221{
Richard Röjforsc9da2e12009-11-13 12:28:55 +0100222 struct xilinx_spi *xspi = spi_master_get_devdata(spi->master);
Andrei Konovalovae918c02007-07-17 04:04:11 -0700223 u8 bits_per_word;
Andrei Konovalovae918c02007-07-17 04:04:11 -0700224
John Linn1a8d3b72009-09-14 08:17:05 +0000225 bits_per_word = (t && t->bits_per_word)
226 ? t->bits_per_word : spi->bits_per_word;
Richard Röjforsc9da2e12009-11-13 12:28:55 +0100227 if (bits_per_word != xspi->bits_per_word) {
Andrei Konovalovae918c02007-07-17 04:04:11 -0700228 dev_err(&spi->dev, "%s, unsupported bits_per_word=%d\n",
Harvey Harrisonb687d2a2008-04-28 02:14:19 -0700229 __func__, bits_per_word);
Andrei Konovalovae918c02007-07-17 04:04:11 -0700230 return -EINVAL;
231 }
232
Andrei Konovalovae918c02007-07-17 04:04:11 -0700233 return 0;
234}
235
Andrei Konovalovae918c02007-07-17 04:04:11 -0700236static int xilinx_spi_setup(struct spi_device *spi)
237{
Richard Röjforsc9da2e12009-11-13 12:28:55 +0100238 /* always return 0, we can not check the number of bits.
239 * There are cases when SPI setup is called before any driver is
240 * there, in that case the SPI core defaults to 8 bits, which we
241 * do not support in some cases. But if we return an error, the
242 * SPI device would not be registered and no driver can get hold of it
243 * When the driver is there, it will call SPI setup again with the
244 * correct number of bits per transfer.
245 * If a driver setups with the wrong bit number, it will fail when
246 * it tries to do a transfer
247 */
Andrei Konovalovae918c02007-07-17 04:04:11 -0700248 return 0;
249}
250
251static void xilinx_spi_fill_tx_fifo(struct xilinx_spi *xspi)
252{
253 u8 sr;
254
255 /* Fill the Tx FIFO with as many bytes as possible */
Richard Röjfors86fc5932009-11-13 12:28:49 +0100256 sr = xspi->read_fn(xspi->regs + XSPI_SR_OFFSET);
Andrei Konovalovae918c02007-07-17 04:04:11 -0700257 while ((sr & XSPI_SR_TX_FULL_MASK) == 0 && xspi->remaining_bytes > 0) {
Richard Röjfors86fc5932009-11-13 12:28:49 +0100258 if (xspi->tx_ptr)
Richard Röjforsc9da2e12009-11-13 12:28:55 +0100259 xspi->tx_fn(xspi);
Richard Röjfors86fc5932009-11-13 12:28:49 +0100260 else
261 xspi->write_fn(0, xspi->regs + XSPI_TXD_OFFSET);
Richard Röjforsc9da2e12009-11-13 12:28:55 +0100262 xspi->remaining_bytes -= xspi->bits_per_word / 8;
Richard Röjfors86fc5932009-11-13 12:28:49 +0100263 sr = xspi->read_fn(xspi->regs + XSPI_SR_OFFSET);
Andrei Konovalovae918c02007-07-17 04:04:11 -0700264 }
265}
266
267static int xilinx_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t)
268{
269 struct xilinx_spi *xspi = spi_master_get_devdata(spi->master);
270 u32 ipif_ier;
271 u16 cr;
272
273 /* We get here with transmitter inhibited */
274
275 xspi->tx_ptr = t->tx_buf;
276 xspi->rx_ptr = t->rx_buf;
277 xspi->remaining_bytes = t->len;
278 INIT_COMPLETION(xspi->done);
279
280 xilinx_spi_fill_tx_fifo(xspi);
281
282 /* Enable the transmit empty interrupt, which we use to determine
283 * progress on the transmission.
284 */
Richard Röjfors86fc5932009-11-13 12:28:49 +0100285 ipif_ier = xspi->read_fn(xspi->regs + XIPIF_V123B_IIER_OFFSET);
286 xspi->write_fn(ipif_ier | XSPI_INTR_TX_EMPTY,
287 xspi->regs + XIPIF_V123B_IIER_OFFSET);
Andrei Konovalovae918c02007-07-17 04:04:11 -0700288
289 /* Start the transfer by not inhibiting the transmitter any longer */
Richard Röjfors86fc5932009-11-13 12:28:49 +0100290 cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET) &
291 ~XSPI_CR_TRANS_INHIBIT;
292 xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET);
Andrei Konovalovae918c02007-07-17 04:04:11 -0700293
294 wait_for_completion(&xspi->done);
295
296 /* Disable the transmit empty interrupt */
Richard Röjfors86fc5932009-11-13 12:28:49 +0100297 xspi->write_fn(ipif_ier, xspi->regs + XIPIF_V123B_IIER_OFFSET);
Andrei Konovalovae918c02007-07-17 04:04:11 -0700298
299 return t->len - xspi->remaining_bytes;
300}
301
302
303/* This driver supports single master mode only. Hence Tx FIFO Empty
304 * is the only interrupt we care about.
305 * Receive FIFO Overrun, Transmit FIFO Underrun, Mode Fault, and Slave Mode
306 * Fault are not to happen.
307 */
308static irqreturn_t xilinx_spi_irq(int irq, void *dev_id)
309{
310 struct xilinx_spi *xspi = dev_id;
311 u32 ipif_isr;
312
313 /* Get the IPIF interrupts, and clear them immediately */
Richard Röjfors86fc5932009-11-13 12:28:49 +0100314 ipif_isr = xspi->read_fn(xspi->regs + XIPIF_V123B_IISR_OFFSET);
315 xspi->write_fn(ipif_isr, xspi->regs + XIPIF_V123B_IISR_OFFSET);
Andrei Konovalovae918c02007-07-17 04:04:11 -0700316
317 if (ipif_isr & XSPI_INTR_TX_EMPTY) { /* Transmission completed */
318 u16 cr;
319 u8 sr;
320
321 /* A transmit has just completed. Process received data and
322 * check for more data to transmit. Always inhibit the
323 * transmitter while the Isr refills the transmit register/FIFO,
324 * or make sure it is stopped if we're done.
325 */
Richard Röjfors86fc5932009-11-13 12:28:49 +0100326 cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET);
327 xspi->write_fn(cr | XSPI_CR_TRANS_INHIBIT,
328 xspi->regs + XSPI_CR_OFFSET);
Andrei Konovalovae918c02007-07-17 04:04:11 -0700329
330 /* Read out all the data from the Rx FIFO */
Richard Röjfors86fc5932009-11-13 12:28:49 +0100331 sr = xspi->read_fn(xspi->regs + XSPI_SR_OFFSET);
Andrei Konovalovae918c02007-07-17 04:04:11 -0700332 while ((sr & XSPI_SR_RX_EMPTY_MASK) == 0) {
Richard Röjforsc9da2e12009-11-13 12:28:55 +0100333 xspi->rx_fn(xspi);
Richard Röjfors86fc5932009-11-13 12:28:49 +0100334 sr = xspi->read_fn(xspi->regs + XSPI_SR_OFFSET);
Andrei Konovalovae918c02007-07-17 04:04:11 -0700335 }
336
337 /* See if there is more data to send */
338 if (xspi->remaining_bytes > 0) {
339 xilinx_spi_fill_tx_fifo(xspi);
340 /* Start the transfer by not inhibiting the
341 * transmitter any longer
342 */
Richard Röjfors86fc5932009-11-13 12:28:49 +0100343 xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET);
Andrei Konovalovae918c02007-07-17 04:04:11 -0700344 } else {
345 /* No more data to send.
346 * Indicate the transfer is completed.
347 */
348 complete(&xspi->done);
349 }
350 }
351
352 return IRQ_HANDLED;
353}
354
Grant Likelyeae6cb32010-10-14 09:32:53 -0600355static const struct of_device_id xilinx_spi_of_match[] = {
356 { .compatible = "xlnx,xps-spi-2.00.a", },
357 { .compatible = "xlnx,xps-spi-2.00.b", },
358 {}
359};
360MODULE_DEVICE_TABLE(of, xilinx_spi_of_match);
Grant Likelyeae6cb32010-10-14 09:32:53 -0600361
Richard Röjforsd5af91a2009-11-13 12:28:39 +0100362struct spi_master *xilinx_spi_init(struct device *dev, struct resource *mem,
Grant Likely91565c42010-10-14 08:54:55 -0600363 u32 irq, s16 bus_num, int num_cs, int little_endian, int bits_per_word)
Andrei Konovalovae918c02007-07-17 04:04:11 -0700364{
Andrei Konovalovae918c02007-07-17 04:04:11 -0700365 struct spi_master *master;
366 struct xilinx_spi *xspi;
Richard Röjforsd5af91a2009-11-13 12:28:39 +0100367 int ret;
John Linnff82c582009-01-09 16:01:53 -0700368
Richard Röjforsd5af91a2009-11-13 12:28:39 +0100369 master = spi_alloc_master(dev, sizeof(struct xilinx_spi));
370 if (!master)
371 return NULL;
Andrei Konovalovae918c02007-07-17 04:04:11 -0700372
David Brownelle7db06b2009-06-17 16:26:04 -0700373 /* the spi->mode bits understood by this driver: */
374 master->mode_bits = SPI_CPOL | SPI_CPHA;
375
Andrei Konovalovae918c02007-07-17 04:04:11 -0700376 xspi = spi_master_get_devdata(master);
377 xspi->bitbang.master = spi_master_get(master);
378 xspi->bitbang.chipselect = xilinx_spi_chipselect;
379 xspi->bitbang.setup_transfer = xilinx_spi_setup_transfer;
380 xspi->bitbang.txrx_bufs = xilinx_spi_txrx_bufs;
381 xspi->bitbang.master->setup = xilinx_spi_setup;
382 init_completion(&xspi->done);
383
Richard Röjforsd5af91a2009-11-13 12:28:39 +0100384 if (!request_mem_region(mem->start, resource_size(mem),
385 XILINX_SPI_NAME))
Andrei Konovalovae918c02007-07-17 04:04:11 -0700386 goto put_master;
Andrei Konovalovae918c02007-07-17 04:04:11 -0700387
Richard Röjforsd5af91a2009-11-13 12:28:39 +0100388 xspi->regs = ioremap(mem->start, resource_size(mem));
Andrei Konovalovae918c02007-07-17 04:04:11 -0700389 if (xspi->regs == NULL) {
Richard Röjforsd5af91a2009-11-13 12:28:39 +0100390 dev_warn(dev, "ioremap failure\n");
391 goto map_failed;
Andrei Konovalovae918c02007-07-17 04:04:11 -0700392 }
393
Richard Röjforsd5af91a2009-11-13 12:28:39 +0100394 master->bus_num = bus_num;
Grant Likely91565c42010-10-14 08:54:55 -0600395 master->num_chipselect = num_cs;
Anatolij Gustschin12b15e82010-07-27 22:35:58 +0200396 master->dev.of_node = dev->of_node;
John Linnff82c582009-01-09 16:01:53 -0700397
Richard Röjforsd5af91a2009-11-13 12:28:39 +0100398 xspi->mem = *mem;
399 xspi->irq = irq;
Grant Likely91565c42010-10-14 08:54:55 -0600400 if (little_endian) {
Paul Mundt97782142010-01-20 13:49:45 -0700401 xspi->read_fn = xspi_read32;
402 xspi->write_fn = xspi_write32;
Richard Röjfors86fc5932009-11-13 12:28:49 +0100403 } else {
Paul Mundt97782142010-01-20 13:49:45 -0700404 xspi->read_fn = xspi_read32_be;
405 xspi->write_fn = xspi_write32_be;
Richard Röjfors86fc5932009-11-13 12:28:49 +0100406 }
Grant Likely91565c42010-10-14 08:54:55 -0600407 xspi->bits_per_word = bits_per_word;
Richard Röjforsc9da2e12009-11-13 12:28:55 +0100408 if (xspi->bits_per_word == 8) {
409 xspi->tx_fn = xspi_tx8;
410 xspi->rx_fn = xspi_rx8;
411 } else if (xspi->bits_per_word == 16) {
412 xspi->tx_fn = xspi_tx16;
413 xspi->rx_fn = xspi_rx16;
414 } else if (xspi->bits_per_word == 32) {
415 xspi->tx_fn = xspi_tx32;
416 xspi->rx_fn = xspi_rx32;
417 } else
418 goto unmap_io;
419
Andrei Konovalovae918c02007-07-17 04:04:11 -0700420
421 /* SPI controller initializations */
Richard Röjfors86fc5932009-11-13 12:28:49 +0100422 xspi_init_hw(xspi);
Andrei Konovalovae918c02007-07-17 04:04:11 -0700423
424 /* Register for SPI Interrupt */
Richard Röjforsd5af91a2009-11-13 12:28:39 +0100425 ret = request_irq(xspi->irq, xilinx_spi_irq, 0, XILINX_SPI_NAME, xspi);
426 if (ret)
Andrei Konovalovae918c02007-07-17 04:04:11 -0700427 goto unmap_io;
428
Richard Röjforsd5af91a2009-11-13 12:28:39 +0100429 ret = spi_bitbang_start(&xspi->bitbang);
430 if (ret) {
431 dev_err(dev, "spi_bitbang_start FAILED\n");
Andrei Konovalovae918c02007-07-17 04:04:11 -0700432 goto free_irq;
433 }
434
Grant Likely920712a2009-11-25 07:23:35 -0700435 dev_info(dev, "at 0x%08llX mapped to 0x%p, irq=%d\n",
436 (unsigned long long)mem->start, xspi->regs, xspi->irq);
Richard Röjforsd5af91a2009-11-13 12:28:39 +0100437 return master;
Andrei Konovalovae918c02007-07-17 04:04:11 -0700438
439free_irq:
440 free_irq(xspi->irq, xspi);
441unmap_io:
442 iounmap(xspi->regs);
Richard Röjforsd5af91a2009-11-13 12:28:39 +0100443map_failed:
444 release_mem_region(mem->start, resource_size(mem));
Andrei Konovalovae918c02007-07-17 04:04:11 -0700445put_master:
446 spi_master_put(master);
Richard Röjforsd5af91a2009-11-13 12:28:39 +0100447 return NULL;
Andrei Konovalovae918c02007-07-17 04:04:11 -0700448}
Richard Röjforsd5af91a2009-11-13 12:28:39 +0100449EXPORT_SYMBOL(xilinx_spi_init);
Andrei Konovalovae918c02007-07-17 04:04:11 -0700450
Richard Röjforsd5af91a2009-11-13 12:28:39 +0100451void xilinx_spi_deinit(struct spi_master *master)
Andrei Konovalovae918c02007-07-17 04:04:11 -0700452{
453 struct xilinx_spi *xspi;
Andrei Konovalovae918c02007-07-17 04:04:11 -0700454
Andrei Konovalovae918c02007-07-17 04:04:11 -0700455 xspi = spi_master_get_devdata(master);
456
457 spi_bitbang_stop(&xspi->bitbang);
458 free_irq(xspi->irq, xspi);
459 iounmap(xspi->regs);
Richard Röjforsd5af91a2009-11-13 12:28:39 +0100460
461 release_mem_region(xspi->mem.start, resource_size(&xspi->mem));
Andrei Konovalovae918c02007-07-17 04:04:11 -0700462 spi_master_put(xspi->bitbang.master);
Andrei Konovalovae918c02007-07-17 04:04:11 -0700463}
Richard Röjforsd5af91a2009-11-13 12:28:39 +0100464EXPORT_SYMBOL(xilinx_spi_deinit);
Andrei Konovalovae918c02007-07-17 04:04:11 -0700465
Grant Likely8fd88212010-10-14 09:04:29 -0600466static int __devinit xilinx_spi_probe(struct platform_device *dev)
467{
468 struct xspi_platform_data *pdata;
469 struct resource *r;
Grant Likelyeae6cb32010-10-14 09:32:53 -0600470 int irq, num_cs = 0, little_endian = 0, bits_per_word = 8;
Grant Likely8fd88212010-10-14 09:04:29 -0600471 struct spi_master *master;
472 u8 i;
473
Andres Salomone46dccf2011-02-17 19:07:15 -0800474 pdata = mfd_get_data(dev);
Grant Likelyeae6cb32010-10-14 09:32:53 -0600475 if (pdata) {
476 num_cs = pdata->num_chipselect;
477 little_endian = pdata->little_endian;
478 bits_per_word = pdata->bits_per_word;
479 }
480
481#ifdef CONFIG_OF
482 if (dev->dev.of_node) {
483 const __be32 *prop;
484 int len;
485
486 /* number of slave select bits is required */
487 prop = of_get_property(dev->dev.of_node, "xlnx,num-ss-bits",
488 &len);
489 if (prop && len >= sizeof(*prop))
490 num_cs = __be32_to_cpup(prop);
491 }
492#endif
493
494 if (!num_cs) {
495 dev_err(&dev->dev, "Missing slave select configuration data\n");
496 return -EINVAL;
497 }
498
Grant Likely8fd88212010-10-14 09:04:29 -0600499
500 r = platform_get_resource(dev, IORESOURCE_MEM, 0);
501 if (!r)
502 return -ENODEV;
503
504 irq = platform_get_irq(dev, 0);
505 if (irq < 0)
506 return -ENXIO;
507
Grant Likelyeae6cb32010-10-14 09:32:53 -0600508 master = xilinx_spi_init(&dev->dev, r, irq, dev->id, num_cs,
509 little_endian, bits_per_word);
Grant Likely8fd88212010-10-14 09:04:29 -0600510 if (!master)
511 return -ENODEV;
512
Grant Likelyeae6cb32010-10-14 09:32:53 -0600513 if (pdata) {
514 for (i = 0; i < pdata->num_devices; i++)
515 spi_new_device(master, pdata->devices + i);
516 }
Grant Likely8fd88212010-10-14 09:04:29 -0600517
518 platform_set_drvdata(dev, master);
519 return 0;
520}
521
522static int __devexit xilinx_spi_remove(struct platform_device *dev)
523{
524 xilinx_spi_deinit(platform_get_drvdata(dev));
525 platform_set_drvdata(dev, 0);
526
527 return 0;
528}
529
530/* work with hotplug and coldplug */
531MODULE_ALIAS("platform:" XILINX_SPI_NAME);
532
533static struct platform_driver xilinx_spi_driver = {
534 .probe = xilinx_spi_probe,
535 .remove = __devexit_p(xilinx_spi_remove),
536 .driver = {
537 .name = XILINX_SPI_NAME,
538 .owner = THIS_MODULE,
Grant Likelyeae6cb32010-10-14 09:32:53 -0600539 .of_match_table = xilinx_spi_of_match,
Grant Likely8fd88212010-10-14 09:04:29 -0600540 },
541};
542
543static int __init xilinx_spi_pltfm_init(void)
544{
545 return platform_driver_register(&xilinx_spi_driver);
546}
547module_init(xilinx_spi_pltfm_init);
548
549static void __exit xilinx_spi_pltfm_exit(void)
550{
551 platform_driver_unregister(&xilinx_spi_driver);
552}
553module_exit(xilinx_spi_pltfm_exit);
554
Andrei Konovalovae918c02007-07-17 04:04:11 -0700555MODULE_AUTHOR("MontaVista Software, Inc. <source@mvista.com>");
556MODULE_DESCRIPTION("Xilinx SPI driver");
557MODULE_LICENSE("GPL");