Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/mach-realview/realview_eb.c |
| 3 | * |
| 4 | * Copyright (C) 2004 ARM Limited |
| 5 | * Copyright (C) 2000 Deep Blue Solutions Ltd |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 20 | */ |
| 21 | |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 22 | #include <linux/init.h> |
Russell King | 1be7228 | 2005-10-31 16:57:06 +0000 | [diff] [blame] | 23 | #include <linux/platform_device.h> |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 24 | #include <linux/sysdev.h> |
Russell King | a62c80e | 2006-01-07 13:52:45 +0000 | [diff] [blame] | 25 | #include <linux/amba/bus.h> |
Russell King | fced80c | 2008-09-06 12:10:45 +0100 | [diff] [blame] | 26 | #include <linux/io.h> |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 27 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 28 | #include <mach/hardware.h> |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 29 | #include <asm/irq.h> |
| 30 | #include <asm/leds.h> |
| 31 | #include <asm/mach-types.h> |
| 32 | #include <asm/hardware/gic.h> |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 33 | #include <asm/hardware/icst307.h> |
Catalin Marinas | 7770bdd | 2007-02-05 14:48:24 +0100 | [diff] [blame] | 34 | #include <asm/hardware/cache-l2x0.h> |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 35 | |
| 36 | #include <asm/mach/arch.h> |
| 37 | #include <asm/mach/map.h> |
| 38 | #include <asm/mach/mmc.h> |
Catalin Marinas | 8cc4c54 | 2008-02-04 17:43:02 +0100 | [diff] [blame] | 39 | #include <asm/mach/time.h> |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 40 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 41 | #include <mach/board-eb.h> |
| 42 | #include <mach/irqs.h> |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 43 | |
| 44 | #include "core.h" |
| 45 | #include "clock.h" |
| 46 | |
| 47 | static struct map_desc realview_eb_io_desc[] __initdata = { |
Russell King | 1ffedce | 2005-11-02 14:14:37 +0000 | [diff] [blame] | 48 | { |
| 49 | .virtual = IO_ADDRESS(REALVIEW_SYS_BASE), |
| 50 | .pfn = __phys_to_pfn(REALVIEW_SYS_BASE), |
| 51 | .length = SZ_4K, |
| 52 | .type = MT_DEVICE, |
| 53 | }, { |
Catalin Marinas | 073b6ff | 2008-04-18 22:43:09 +0100 | [diff] [blame] | 54 | .virtual = IO_ADDRESS(REALVIEW_EB_GIC_CPU_BASE), |
| 55 | .pfn = __phys_to_pfn(REALVIEW_EB_GIC_CPU_BASE), |
Russell King | 1ffedce | 2005-11-02 14:14:37 +0000 | [diff] [blame] | 56 | .length = SZ_4K, |
| 57 | .type = MT_DEVICE, |
| 58 | }, { |
Catalin Marinas | 073b6ff | 2008-04-18 22:43:09 +0100 | [diff] [blame] | 59 | .virtual = IO_ADDRESS(REALVIEW_EB_GIC_DIST_BASE), |
| 60 | .pfn = __phys_to_pfn(REALVIEW_EB_GIC_DIST_BASE), |
Russell King | 1ffedce | 2005-11-02 14:14:37 +0000 | [diff] [blame] | 61 | .length = SZ_4K, |
| 62 | .type = MT_DEVICE, |
| 63 | }, { |
| 64 | .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE), |
| 65 | .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE), |
| 66 | .length = SZ_4K, |
| 67 | .type = MT_DEVICE, |
| 68 | }, { |
Catalin Marinas | 8019273 | 2008-04-18 22:43:11 +0100 | [diff] [blame] | 69 | .virtual = IO_ADDRESS(REALVIEW_EB_TIMER0_1_BASE), |
| 70 | .pfn = __phys_to_pfn(REALVIEW_EB_TIMER0_1_BASE), |
Russell King | 1ffedce | 2005-11-02 14:14:37 +0000 | [diff] [blame] | 71 | .length = SZ_4K, |
| 72 | .type = MT_DEVICE, |
| 73 | }, { |
Catalin Marinas | 8019273 | 2008-04-18 22:43:11 +0100 | [diff] [blame] | 74 | .virtual = IO_ADDRESS(REALVIEW_EB_TIMER2_3_BASE), |
| 75 | .pfn = __phys_to_pfn(REALVIEW_EB_TIMER2_3_BASE), |
Russell King | 1ffedce | 2005-11-02 14:14:37 +0000 | [diff] [blame] | 76 | .length = SZ_4K, |
| 77 | .type = MT_DEVICE, |
| 78 | }, |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 79 | #ifdef CONFIG_DEBUG_LL |
Russell King | 1ffedce | 2005-11-02 14:14:37 +0000 | [diff] [blame] | 80 | { |
Catalin Marinas | 9a386f0 | 2008-04-18 22:43:11 +0100 | [diff] [blame] | 81 | .virtual = IO_ADDRESS(REALVIEW_EB_UART0_BASE), |
| 82 | .pfn = __phys_to_pfn(REALVIEW_EB_UART0_BASE), |
Russell King | 1ffedce | 2005-11-02 14:14:37 +0000 | [diff] [blame] | 83 | .length = SZ_4K, |
| 84 | .type = MT_DEVICE, |
| 85 | } |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 86 | #endif |
| 87 | }; |
| 88 | |
Catalin Marinas | 7dd19e7 | 2008-02-04 17:39:00 +0100 | [diff] [blame] | 89 | static struct map_desc realview_eb11mp_io_desc[] __initdata = { |
| 90 | { |
| 91 | .virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_CPU_BASE), |
| 92 | .pfn = __phys_to_pfn(REALVIEW_EB11MP_GIC_CPU_BASE), |
| 93 | .length = SZ_4K, |
| 94 | .type = MT_DEVICE, |
| 95 | }, { |
| 96 | .virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_DIST_BASE), |
| 97 | .pfn = __phys_to_pfn(REALVIEW_EB11MP_GIC_DIST_BASE), |
| 98 | .length = SZ_4K, |
| 99 | .type = MT_DEVICE, |
| 100 | }, { |
| 101 | .virtual = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE), |
| 102 | .pfn = __phys_to_pfn(REALVIEW_EB11MP_L220_BASE), |
| 103 | .length = SZ_8K, |
| 104 | .type = MT_DEVICE, |
| 105 | } |
| 106 | }; |
| 107 | |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 108 | static void __init realview_eb_map_io(void) |
| 109 | { |
| 110 | iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc)); |
Catalin Marinas | 7dd19e7 | 2008-02-04 17:39:00 +0100 | [diff] [blame] | 111 | if (core_tile_eb11mp()) |
| 112 | iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc)); |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 113 | } |
| 114 | |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 115 | /* |
| 116 | * RealView EB AMBA devices |
| 117 | */ |
| 118 | |
| 119 | /* |
| 120 | * These devices are connected via the core APB bridge |
| 121 | */ |
| 122 | #define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ } |
| 123 | #define GPIO2_DMA { 0, 0 } |
| 124 | #define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ } |
| 125 | #define GPIO3_DMA { 0, 0 } |
| 126 | |
| 127 | #define AACI_IRQ { IRQ_EB_AACI, NO_IRQ } |
| 128 | #define AACI_DMA { 0x80, 0x81 } |
| 129 | #define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B } |
| 130 | #define MMCI0_DMA { 0x84, 0 } |
| 131 | #define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ } |
| 132 | #define KMI0_DMA { 0, 0 } |
| 133 | #define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ } |
| 134 | #define KMI1_DMA { 0, 0 } |
| 135 | |
| 136 | /* |
| 137 | * These devices are connected directly to the multi-layer AHB switch |
| 138 | */ |
Catalin Marinas | 393538e | 2008-04-18 22:43:11 +0100 | [diff] [blame] | 139 | #define EB_SMC_IRQ { NO_IRQ, NO_IRQ } |
| 140 | #define EB_SMC_DMA { 0, 0 } |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 141 | #define MPMC_IRQ { NO_IRQ, NO_IRQ } |
| 142 | #define MPMC_DMA { 0, 0 } |
Catalin Marinas | 393538e | 2008-04-18 22:43:11 +0100 | [diff] [blame] | 143 | #define EB_CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ } |
| 144 | #define EB_CLCD_DMA { 0, 0 } |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 145 | #define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ } |
| 146 | #define DMAC_DMA { 0, 0 } |
| 147 | |
| 148 | /* |
| 149 | * These devices are connected via the core APB bridge |
| 150 | */ |
| 151 | #define SCTL_IRQ { NO_IRQ, NO_IRQ } |
| 152 | #define SCTL_DMA { 0, 0 } |
Catalin Marinas | 393538e | 2008-04-18 22:43:11 +0100 | [diff] [blame] | 153 | #define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ } |
| 154 | #define EB_WATCHDOG_DMA { 0, 0 } |
| 155 | #define EB_GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ } |
| 156 | #define EB_GPIO0_DMA { 0, 0 } |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 157 | #define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ } |
| 158 | #define GPIO1_DMA { 0, 0 } |
Catalin Marinas | 393538e | 2008-04-18 22:43:11 +0100 | [diff] [blame] | 159 | #define EB_RTC_IRQ { IRQ_EB_RTC, NO_IRQ } |
| 160 | #define EB_RTC_DMA { 0, 0 } |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 161 | |
| 162 | /* |
| 163 | * These devices are connected via the DMA APB bridge |
| 164 | */ |
| 165 | #define SCI_IRQ { IRQ_EB_SCI, NO_IRQ } |
| 166 | #define SCI_DMA { 7, 6 } |
Catalin Marinas | 9a386f0 | 2008-04-18 22:43:11 +0100 | [diff] [blame] | 167 | #define EB_UART0_IRQ { IRQ_EB_UART0, NO_IRQ } |
| 168 | #define EB_UART0_DMA { 15, 14 } |
| 169 | #define EB_UART1_IRQ { IRQ_EB_UART1, NO_IRQ } |
| 170 | #define EB_UART1_DMA { 13, 12 } |
| 171 | #define EB_UART2_IRQ { IRQ_EB_UART2, NO_IRQ } |
| 172 | #define EB_UART2_DMA { 11, 10 } |
| 173 | #define EB_UART3_IRQ { IRQ_EB_UART3, NO_IRQ } |
| 174 | #define EB_UART3_DMA { 0x86, 0x87 } |
Catalin Marinas | 393538e | 2008-04-18 22:43:11 +0100 | [diff] [blame] | 175 | #define EB_SSP_IRQ { IRQ_EB_SSP, NO_IRQ } |
| 176 | #define EB_SSP_DMA { 9, 8 } |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 177 | |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 178 | /* FPGA Primecells */ |
| 179 | AMBA_DEVICE(aaci, "fpga:04", AACI, NULL); |
| 180 | AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &realview_mmc0_plat_data); |
| 181 | AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL); |
| 182 | AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL); |
Catalin Marinas | 9a386f0 | 2008-04-18 22:43:11 +0100 | [diff] [blame] | 183 | AMBA_DEVICE(uart3, "fpga:09", EB_UART3, NULL); |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 184 | |
| 185 | /* DevChip Primecells */ |
Catalin Marinas | 393538e | 2008-04-18 22:43:11 +0100 | [diff] [blame] | 186 | AMBA_DEVICE(smc, "dev:00", EB_SMC, NULL); |
| 187 | AMBA_DEVICE(clcd, "dev:20", EB_CLCD, &clcd_plat_data); |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 188 | AMBA_DEVICE(dmac, "dev:30", DMAC, NULL); |
| 189 | AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL); |
Catalin Marinas | 393538e | 2008-04-18 22:43:11 +0100 | [diff] [blame] | 190 | AMBA_DEVICE(wdog, "dev:e1", EB_WATCHDOG, NULL); |
| 191 | AMBA_DEVICE(gpio0, "dev:e4", EB_GPIO0, NULL); |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 192 | AMBA_DEVICE(gpio1, "dev:e5", GPIO1, NULL); |
| 193 | AMBA_DEVICE(gpio2, "dev:e6", GPIO2, NULL); |
Catalin Marinas | 393538e | 2008-04-18 22:43:11 +0100 | [diff] [blame] | 194 | AMBA_DEVICE(rtc, "dev:e8", EB_RTC, NULL); |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 195 | AMBA_DEVICE(sci0, "dev:f0", SCI, NULL); |
Catalin Marinas | 9a386f0 | 2008-04-18 22:43:11 +0100 | [diff] [blame] | 196 | AMBA_DEVICE(uart0, "dev:f1", EB_UART0, NULL); |
| 197 | AMBA_DEVICE(uart1, "dev:f2", EB_UART1, NULL); |
| 198 | AMBA_DEVICE(uart2, "dev:f3", EB_UART2, NULL); |
Catalin Marinas | 393538e | 2008-04-18 22:43:11 +0100 | [diff] [blame] | 199 | AMBA_DEVICE(ssp0, "dev:f4", EB_SSP, NULL); |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 200 | |
| 201 | static struct amba_device *amba_devs[] __initdata = { |
| 202 | &dmac_device, |
| 203 | &uart0_device, |
| 204 | &uart1_device, |
| 205 | &uart2_device, |
| 206 | &uart3_device, |
| 207 | &smc_device, |
| 208 | &clcd_device, |
| 209 | &sctl_device, |
| 210 | &wdog_device, |
| 211 | &gpio0_device, |
| 212 | &gpio1_device, |
| 213 | &gpio2_device, |
| 214 | &rtc_device, |
| 215 | &sci0_device, |
| 216 | &ssp0_device, |
| 217 | &aaci_device, |
| 218 | &mmc0_device, |
| 219 | &kmi0_device, |
| 220 | &kmi1_device, |
| 221 | }; |
| 222 | |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 223 | /* |
| 224 | * RealView EB platform devices |
| 225 | */ |
Catalin Marinas | a44ddfd | 2008-04-18 22:43:10 +0100 | [diff] [blame] | 226 | static struct resource realview_eb_flash_resource = { |
| 227 | .start = REALVIEW_EB_FLASH_BASE, |
| 228 | .end = REALVIEW_EB_FLASH_BASE + REALVIEW_EB_FLASH_SIZE - 1, |
| 229 | .flags = IORESOURCE_MEM, |
| 230 | }; |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 231 | |
Catalin Marinas | be4f3c8 | 2008-04-18 22:43:09 +0100 | [diff] [blame] | 232 | static struct resource realview_eb_eth_resources[] = { |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 233 | [0] = { |
Catalin Marinas | 393538e | 2008-04-18 22:43:11 +0100 | [diff] [blame] | 234 | .start = REALVIEW_EB_ETH_BASE, |
| 235 | .end = REALVIEW_EB_ETH_BASE + SZ_64K - 1, |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 236 | .flags = IORESOURCE_MEM, |
| 237 | }, |
| 238 | [1] = { |
| 239 | .start = IRQ_EB_ETH, |
| 240 | .end = IRQ_EB_ETH, |
| 241 | .flags = IORESOURCE_IRQ, |
| 242 | }, |
| 243 | }; |
| 244 | |
Catalin Marinas | be4f3c8 | 2008-04-18 22:43:09 +0100 | [diff] [blame] | 245 | static struct platform_device realview_eb_eth_device = { |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 246 | .id = 0, |
Catalin Marinas | be4f3c8 | 2008-04-18 22:43:09 +0100 | [diff] [blame] | 247 | .num_resources = ARRAY_SIZE(realview_eb_eth_resources), |
| 248 | .resource = realview_eb_eth_resources, |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 249 | }; |
| 250 | |
Catalin Marinas | be4f3c8 | 2008-04-18 22:43:09 +0100 | [diff] [blame] | 251 | /* |
| 252 | * Detect and register the correct Ethernet device. RealView/EB rev D |
| 253 | * platforms use the newer SMSC LAN9118 Ethernet chip |
| 254 | */ |
| 255 | static int eth_device_register(void) |
| 256 | { |
Catalin Marinas | 393538e | 2008-04-18 22:43:11 +0100 | [diff] [blame] | 257 | void __iomem *eth_addr = ioremap(REALVIEW_EB_ETH_BASE, SZ_4K); |
Catalin Marinas | be4f3c8 | 2008-04-18 22:43:09 +0100 | [diff] [blame] | 258 | u32 idrev; |
| 259 | |
| 260 | if (!eth_addr) |
| 261 | return -ENOMEM; |
| 262 | |
| 263 | idrev = readl(eth_addr + 0x50); |
| 264 | if ((idrev & 0xFFFF0000) == 0x01180000) |
| 265 | /* SMSC LAN9118 chip present */ |
| 266 | realview_eb_eth_device.name = "smc911x"; |
| 267 | else |
| 268 | /* SMSC 91C111 chip present */ |
| 269 | realview_eb_eth_device.name = "smc91x"; |
| 270 | |
| 271 | iounmap(eth_addr); |
| 272 | return platform_device_register(&realview_eb_eth_device); |
| 273 | } |
| 274 | |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 275 | static void __init gic_init_irq(void) |
| 276 | { |
Catalin Marinas | 7dd19e7 | 2008-02-04 17:39:00 +0100 | [diff] [blame] | 277 | if (core_tile_eb11mp()) { |
| 278 | unsigned int pldctrl; |
| 279 | |
| 280 | /* new irq mode */ |
| 281 | writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK)); |
| 282 | pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1); |
| 283 | pldctrl |= 0x00800000; |
| 284 | writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1); |
| 285 | writel(0x00000000, __io_address(REALVIEW_SYS_LOCK)); |
| 286 | |
| 287 | /* core tile GIC, primary */ |
Catalin Marinas | c4057f5 | 2008-02-04 17:41:01 +0100 | [diff] [blame] | 288 | gic_cpu_base_addr = __io_address(REALVIEW_EB11MP_GIC_CPU_BASE); |
Catalin Marinas | 7dd19e7 | 2008-02-04 17:39:00 +0100 | [diff] [blame] | 289 | gic_dist_init(0, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), 29); |
Catalin Marinas | c4057f5 | 2008-02-04 17:41:01 +0100 | [diff] [blame] | 290 | gic_cpu_init(0, gic_cpu_base_addr); |
Catalin Marinas | 7dd19e7 | 2008-02-04 17:39:00 +0100 | [diff] [blame] | 291 | |
Catalin Marinas | 41579f4 | 2008-02-04 17:47:04 +0100 | [diff] [blame] | 292 | #ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB |
Catalin Marinas | 7dd19e7 | 2008-02-04 17:39:00 +0100 | [diff] [blame] | 293 | /* board GIC, secondary */ |
Catalin Marinas | 073b6ff | 2008-04-18 22:43:09 +0100 | [diff] [blame] | 294 | gic_dist_init(1, __io_address(REALVIEW_EB_GIC_DIST_BASE), 64); |
| 295 | gic_cpu_init(1, __io_address(REALVIEW_EB_GIC_CPU_BASE)); |
Catalin Marinas | 7dd19e7 | 2008-02-04 17:39:00 +0100 | [diff] [blame] | 296 | gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1); |
Russell King | 9b1283b | 2005-11-07 21:01:06 +0000 | [diff] [blame] | 297 | #endif |
Catalin Marinas | 7dd19e7 | 2008-02-04 17:39:00 +0100 | [diff] [blame] | 298 | } else { |
| 299 | /* board GIC, primary */ |
Catalin Marinas | 073b6ff | 2008-04-18 22:43:09 +0100 | [diff] [blame] | 300 | gic_cpu_base_addr = __io_address(REALVIEW_EB_GIC_CPU_BASE); |
| 301 | gic_dist_init(0, __io_address(REALVIEW_EB_GIC_DIST_BASE), 29); |
Catalin Marinas | c4057f5 | 2008-02-04 17:41:01 +0100 | [diff] [blame] | 302 | gic_cpu_init(0, gic_cpu_base_addr); |
Catalin Marinas | 7dd19e7 | 2008-02-04 17:39:00 +0100 | [diff] [blame] | 303 | } |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 304 | } |
| 305 | |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 306 | /* |
| 307 | * Fix up the IRQ numbers for the RealView EB/ARM11MPCore tile |
| 308 | */ |
| 309 | static void realview_eb11mp_fixup(void) |
| 310 | { |
| 311 | /* AMBA devices */ |
| 312 | dmac_device.irq[0] = IRQ_EB11MP_DMA; |
| 313 | uart0_device.irq[0] = IRQ_EB11MP_UART0; |
| 314 | uart1_device.irq[0] = IRQ_EB11MP_UART1; |
| 315 | uart2_device.irq[0] = IRQ_EB11MP_UART2; |
| 316 | uart3_device.irq[0] = IRQ_EB11MP_UART3; |
| 317 | clcd_device.irq[0] = IRQ_EB11MP_CLCD; |
| 318 | wdog_device.irq[0] = IRQ_EB11MP_WDOG; |
| 319 | gpio0_device.irq[0] = IRQ_EB11MP_GPIO0; |
| 320 | gpio1_device.irq[0] = IRQ_EB11MP_GPIO1; |
| 321 | gpio2_device.irq[0] = IRQ_EB11MP_GPIO2; |
| 322 | rtc_device.irq[0] = IRQ_EB11MP_RTC; |
| 323 | sci0_device.irq[0] = IRQ_EB11MP_SCI; |
| 324 | ssp0_device.irq[0] = IRQ_EB11MP_SSP; |
| 325 | aaci_device.irq[0] = IRQ_EB11MP_AACI; |
| 326 | mmc0_device.irq[0] = IRQ_EB11MP_MMCI0A; |
| 327 | mmc0_device.irq[1] = IRQ_EB11MP_MMCI0B; |
| 328 | kmi0_device.irq[0] = IRQ_EB11MP_KMI0; |
| 329 | kmi1_device.irq[0] = IRQ_EB11MP_KMI1; |
| 330 | |
| 331 | /* platform devices */ |
Catalin Marinas | be4f3c8 | 2008-04-18 22:43:09 +0100 | [diff] [blame] | 332 | realview_eb_eth_resources[1].start = IRQ_EB11MP_ETH; |
| 333 | realview_eb_eth_resources[1].end = IRQ_EB11MP_ETH; |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 334 | } |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 335 | |
Catalin Marinas | 8cc4c54 | 2008-02-04 17:43:02 +0100 | [diff] [blame] | 336 | static void __init realview_eb_timer_init(void) |
| 337 | { |
| 338 | unsigned int timer_irq; |
| 339 | |
Catalin Marinas | 8019273 | 2008-04-18 22:43:11 +0100 | [diff] [blame] | 340 | timer0_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE); |
| 341 | timer1_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE) + 0x20; |
| 342 | timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE); |
| 343 | timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20; |
| 344 | |
Catalin Marinas | 39e823e | 2008-02-04 17:45:03 +0100 | [diff] [blame] | 345 | if (core_tile_eb11mp()) { |
| 346 | #ifdef CONFIG_LOCAL_TIMERS |
| 347 | twd_base_addr = __io_address(REALVIEW_EB11MP_TWD_BASE); |
| 348 | twd_size = REALVIEW_EB11MP_TWD_SIZE; |
| 349 | #endif |
Catalin Marinas | 8cc4c54 | 2008-02-04 17:43:02 +0100 | [diff] [blame] | 350 | timer_irq = IRQ_EB11MP_TIMER0_1; |
Catalin Marinas | 39e823e | 2008-02-04 17:45:03 +0100 | [diff] [blame] | 351 | } else |
Catalin Marinas | 8cc4c54 | 2008-02-04 17:43:02 +0100 | [diff] [blame] | 352 | timer_irq = IRQ_EB_TIMER0_1; |
| 353 | |
| 354 | realview_timer_init(timer_irq); |
| 355 | } |
| 356 | |
| 357 | static struct sys_timer realview_eb_timer = { |
| 358 | .init = realview_eb_timer_init, |
| 359 | }; |
| 360 | |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 361 | static void __init realview_eb_init(void) |
| 362 | { |
| 363 | int i; |
| 364 | |
Catalin Marinas | 7dd19e7 | 2008-02-04 17:39:00 +0100 | [diff] [blame] | 365 | if (core_tile_eb11mp()) { |
| 366 | realview_eb11mp_fixup(); |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 367 | |
Catalin Marinas | ba92795 | 2008-04-18 22:43:17 +0100 | [diff] [blame] | 368 | #ifdef CONFIG_CACHE_L2X0 |
Catalin Marinas | 7dd19e7 | 2008-02-04 17:39:00 +0100 | [diff] [blame] | 369 | /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled |
| 370 | * Bits: .... ...0 0111 1001 0000 .... .... .... */ |
| 371 | l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff); |
Catalin Marinas | ba92795 | 2008-04-18 22:43:17 +0100 | [diff] [blame] | 372 | #endif |
Catalin Marinas | 7dd19e7 | 2008-02-04 17:39:00 +0100 | [diff] [blame] | 373 | } |
| 374 | |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 375 | clk_register(&realview_clcd_clk); |
| 376 | |
Catalin Marinas | a44ddfd | 2008-04-18 22:43:10 +0100 | [diff] [blame] | 377 | realview_flash_register(&realview_eb_flash_resource, 1); |
Russell King | 6b65cd7 | 2006-12-10 21:21:32 +0100 | [diff] [blame] | 378 | platform_device_register(&realview_i2c_device); |
Catalin Marinas | be4f3c8 | 2008-04-18 22:43:09 +0100 | [diff] [blame] | 379 | eth_device_register(); |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 380 | |
| 381 | for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { |
| 382 | struct amba_device *d = amba_devs[i]; |
| 383 | amba_device_register(d, &iomem_resource); |
| 384 | } |
| 385 | |
| 386 | #ifdef CONFIG_LEDS |
| 387 | leds_event = realview_leds_event; |
| 388 | #endif |
| 389 | } |
| 390 | |
| 391 | MACHINE_START(REALVIEW_EB, "ARM-RealView EB") |
| 392 | /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ |
Catalin Marinas | 9a386f0 | 2008-04-18 22:43:11 +0100 | [diff] [blame] | 393 | .phys_io = REALVIEW_EB_UART0_BASE, |
| 394 | .io_pg_offst = (IO_ADDRESS(REALVIEW_EB_UART0_BASE) >> 18) & 0xfffc, |
Catalin Marinas | 70bb62f | 2008-12-01 14:54:55 +0000 | [diff] [blame^] | 395 | .boot_params = PHYS_OFFSET + 0x00000100, |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 396 | .map_io = realview_eb_map_io, |
| 397 | .init_irq = gic_init_irq, |
Catalin Marinas | 8cc4c54 | 2008-02-04 17:43:02 +0100 | [diff] [blame] | 398 | .timer = &realview_eb_timer, |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 399 | .init_machine = realview_eb_init, |
| 400 | MACHINE_END |