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Paul Mackerras047ea782005-11-19 20:17:32 +11001#ifndef _ASM_POWERPC_MMU_H_
2#define _ASM_POWERPC_MMU_H_
Arnd Bergmann88ced032005-12-16 22:43:46 +01003#ifdef __KERNEL__
Paul Mackerras047ea782005-11-19 20:17:32 +11004
Benjamin Herrenschmidt7c03d652008-12-18 19:13:32 +00005#include <asm/asm-compat.h>
6#include <asm/feature-fixups.h>
7
8/*
9 * MMU features bit definitions
10 */
11
12/*
13 * First half is MMU families
14 */
15#define MMU_FTR_HPTE_TABLE ASM_CONST(0x00000001)
16#define MMU_FTR_TYPE_8xx ASM_CONST(0x00000002)
17#define MMU_FTR_TYPE_40x ASM_CONST(0x00000004)
18#define MMU_FTR_TYPE_44x ASM_CONST(0x00000008)
19#define MMU_FTR_TYPE_FSL_E ASM_CONST(0x00000010)
20
21/*
22 * This is individual features
23 */
24
25/* Enable use of high BAT registers */
26#define MMU_FTR_USE_HIGH_BATS ASM_CONST(0x00010000)
27
28/* Enable >32-bit physical addresses on 32-bit processor, only used
29 * by CONFIG_6xx currently as BookE supports that from day 1
30 */
31#define MMU_FTR_BIG_PHYS ASM_CONST(0x00020000)
32
Benjamin Herrenschmidtf048aac2008-12-18 19:13:38 +000033/* Enable use of broadcast TLB invalidations. We don't always set it
34 * on processors that support it due to other constraints with the
35 * use of such invalidations
36 */
37#define MMU_FTR_USE_TLBIVAX_BCAST ASM_CONST(0x00040000)
38
39/* Enable use of tlbilx invalidate-by-PID variant.
40 */
41#define MMU_FTR_USE_TLBILX_PID ASM_CONST(0x00080000)
42
43/* This indicates that the processor cannot handle multiple outstanding
44 * broadcast tlbivax or tlbsync. This makes the code use a spinlock
45 * around such invalidate forms.
46 */
47#define MMU_FTR_LOCK_BCAST_INVAL ASM_CONST(0x00100000)
48
Benjamin Herrenschmidt7c03d652008-12-18 19:13:32 +000049#ifndef __ASSEMBLY__
50#include <asm/cputable.h>
51
52static inline int mmu_has_feature(unsigned long feature)
53{
54 return (cur_cpu_spec->mmu_features & feature);
55}
56
57extern unsigned int __start___mmu_ftr_fixup, __stop___mmu_ftr_fixup;
58
59#endif /* !__ASSEMBLY__ */
60
61
David Gibson8d2169e2007-04-27 11:53:52 +100062#ifdef CONFIG_PPC64
63/* 64-bit classic hash table MMU */
64# include <asm/mmu-hash64.h>
David Gibson4db68bf2007-06-13 14:52:54 +100065#elif defined(CONFIG_PPC_STD_MMU)
66/* 32-bit classic hash table MMU */
67# include <asm/mmu-hash32.h>
Josh Boyer4d922c82007-08-20 07:28:48 -050068#elif defined(CONFIG_40x)
69/* 40x-style software loaded TLB */
70# include <asm/mmu-40x.h>
David Gibson57d79092007-04-30 14:06:25 +100071#elif defined(CONFIG_44x)
72/* 44x-style software loaded TLB */
73# include <asm/mmu-44x.h>
Kumar Gala70fe3af2009-02-12 16:12:40 -060074#elif defined(CONFIG_PPC_BOOK3E_MMU)
75/* Freescale Book-E software loaded TLB or Book-3e (ISA 2.06+) MMU */
76# include <asm/mmu-book3e.h>
David Gibson31202342007-06-22 14:58:55 +100077#elif defined (CONFIG_PPC_8xx)
78/* Motorola/Freescale 8xx software loaded TLB */
79# include <asm/mmu-8xx.h>
David Gibson1f8d4192005-05-05 16:15:13 -070080#endif
David Gibson1f8d4192005-05-05 16:15:13 -070081
Arnd Bergmann88ced032005-12-16 22:43:46 +010082#endif /* __KERNEL__ */
Paul Mackerras047ea782005-11-19 20:17:32 +110083#endif /* _ASM_POWERPC_MMU_H_ */