blob: 27b8af8bc68e3a1ca0a060c3eb02883dfaa5dea1 [file] [log] [blame]
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001/*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2013 QLogic Corporation
4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7#include "qla_def.h"
8#include <linux/delay.h>
9#include <linux/pci.h>
10#include <linux/ratelimit.h>
11#include <linux/vmalloc.h>
12#include <scsi/scsi_tcq.h>
13#include <linux/utsname.h>
14
15
16/* QLAFX00 specific Mailbox implementation functions */
17
18/*
19 * qlafx00_mailbox_command
20 * Issue mailbox command and waits for completion.
21 *
22 * Input:
23 * ha = adapter block pointer.
24 * mcp = driver internal mbx struct pointer.
25 *
26 * Output:
27 * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
28 *
29 * Returns:
30 * 0 : QLA_SUCCESS = cmd performed success
31 * 1 : QLA_FUNCTION_FAILED (error encountered)
32 * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
33 *
34 * Context:
35 * Kernel context.
36 */
37static int
38qlafx00_mailbox_command(scsi_qla_host_t *vha, struct mbx_cmd_32 *mcp)
39
40{
41 int rval;
42 unsigned long flags = 0;
43 device_reg_t __iomem *reg;
44 uint8_t abort_active;
45 uint8_t io_lock_on;
46 uint16_t command = 0;
47 uint32_t *iptr;
48 uint32_t __iomem *optr;
49 uint32_t cnt;
50 uint32_t mboxes;
51 unsigned long wait_time;
52 struct qla_hw_data *ha = vha->hw;
53 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
54
55 if (ha->pdev->error_state > pci_channel_io_frozen) {
56 ql_log(ql_log_warn, vha, 0x115c,
57 "error_state is greater than pci_channel_io_frozen, "
58 "exiting.\n");
59 return QLA_FUNCTION_TIMEOUT;
60 }
61
62 if (vha->device_flags & DFLG_DEV_FAILED) {
63 ql_log(ql_log_warn, vha, 0x115f,
64 "Device in failed state, exiting.\n");
65 return QLA_FUNCTION_TIMEOUT;
66 }
67
68 reg = ha->iobase;
69 io_lock_on = base_vha->flags.init_done;
70
71 rval = QLA_SUCCESS;
72 abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
73
74 if (ha->flags.pci_channel_io_perm_failure) {
75 ql_log(ql_log_warn, vha, 0x1175,
76 "Perm failure on EEH timeout MBX, exiting.\n");
77 return QLA_FUNCTION_TIMEOUT;
78 }
79
80 if (ha->flags.isp82xx_fw_hung) {
81 /* Setting Link-Down error */
82 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
83 ql_log(ql_log_warn, vha, 0x1176,
84 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
85 rval = QLA_FUNCTION_FAILED;
86 goto premature_exit;
87 }
88
89 /*
90 * Wait for active mailbox commands to finish by waiting at most tov
91 * seconds. This is to serialize actual issuing of mailbox cmds during
92 * non ISP abort time.
93 */
94 if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
95 /* Timeout occurred. Return error. */
96 ql_log(ql_log_warn, vha, 0x1177,
97 "Cmd access timeout, cmd=0x%x, Exiting.\n",
98 mcp->mb[0]);
99 return QLA_FUNCTION_TIMEOUT;
100 }
101
102 ha->flags.mbox_busy = 1;
103 /* Save mailbox command for debug */
104 ha->mcp32 = mcp;
105
106 ql_dbg(ql_dbg_mbx, vha, 0x1178,
107 "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]);
108
109 spin_lock_irqsave(&ha->hardware_lock, flags);
110
111 /* Load mailbox registers. */
112 optr = (uint32_t __iomem *)&reg->ispfx00.mailbox0;
113
114 iptr = mcp->mb;
115 command = mcp->mb[0];
116 mboxes = mcp->out_mb;
117
118 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
119 if (mboxes & BIT_0)
120 WRT_REG_DWORD(optr, *iptr);
121
122 mboxes >>= 1;
123 optr++;
124 iptr++;
125 }
126
127 /* Issue set host interrupt command to send cmd out. */
128 ha->flags.mbox_int = 0;
129 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
130
131 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1172,
132 (uint8_t *)mcp->mb, 16);
133 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1173,
134 ((uint8_t *)mcp->mb + 0x10), 16);
135 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1174,
136 ((uint8_t *)mcp->mb + 0x20), 8);
137
138 /* Unlock mbx registers and wait for interrupt */
139 ql_dbg(ql_dbg_mbx, vha, 0x1179,
140 "Going to unlock irq & waiting for interrupts. "
141 "jiffies=%lx.\n", jiffies);
142
143 /* Wait for mbx cmd completion until timeout */
144 if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
145 set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
146
147 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code);
148 spin_unlock_irqrestore(&ha->hardware_lock, flags);
149
150 wait_for_completion_timeout(&ha->mbx_intr_comp, mcp->tov * HZ);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400151 } else {
152 ql_dbg(ql_dbg_mbx, vha, 0x112c,
153 "Cmd=%x Polling Mode.\n", command);
154
155 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code);
156 spin_unlock_irqrestore(&ha->hardware_lock, flags);
157
158 wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
159 while (!ha->flags.mbox_int) {
160 if (time_after(jiffies, wait_time))
161 break;
162
163 /* Check for pending interrupts. */
164 qla2x00_poll(ha->rsp_q_map[0]);
165
166 if (!ha->flags.mbox_int &&
167 !(IS_QLA2200(ha) &&
168 command == MBC_LOAD_RISC_RAM_EXTENDED))
169 usleep_range(10000, 11000);
170 } /* while */
171 ql_dbg(ql_dbg_mbx, vha, 0x112d,
172 "Waited %d sec.\n",
173 (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ));
174 }
175
176 /* Check whether we timed out */
177 if (ha->flags.mbox_int) {
178 uint32_t *iptr2;
179
180 ql_dbg(ql_dbg_mbx, vha, 0x112e,
181 "Cmd=%x completed.\n", command);
182
183 /* Got interrupt. Clear the flag. */
184 ha->flags.mbox_int = 0;
185 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
186
187 if (ha->mailbox_out32[0] != MBS_COMMAND_COMPLETE)
188 rval = QLA_FUNCTION_FAILED;
189
190 /* Load return mailbox registers. */
191 iptr2 = mcp->mb;
192 iptr = (uint32_t *)&ha->mailbox_out32[0];
193 mboxes = mcp->in_mb;
194 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
195 if (mboxes & BIT_0)
196 *iptr2 = *iptr;
197
198 mboxes >>= 1;
199 iptr2++;
200 iptr++;
201 }
202 } else {
203
204 rval = QLA_FUNCTION_TIMEOUT;
205 }
206
207 ha->flags.mbox_busy = 0;
208
209 /* Clean up */
210 ha->mcp32 = NULL;
211
212 if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
213 ql_dbg(ql_dbg_mbx, vha, 0x113a,
214 "checking for additional resp interrupt.\n");
215
216 /* polling mode for non isp_abort commands. */
217 qla2x00_poll(ha->rsp_q_map[0]);
218 }
219
220 if (rval == QLA_FUNCTION_TIMEOUT &&
221 mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
222 if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
223 ha->flags.eeh_busy) {
224 /* not in dpc. schedule it for dpc to take over. */
225 ql_dbg(ql_dbg_mbx, vha, 0x115d,
226 "Timeout, schedule isp_abort_needed.\n");
227
228 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
229 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
230 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
231
232 ql_log(ql_log_info, base_vha, 0x115e,
233 "Mailbox cmd timeout occurred, cmd=0x%x, "
234 "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP "
235 "abort.\n", command, mcp->mb[0],
236 ha->flags.eeh_busy);
237 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
238 qla2xxx_wake_dpc(vha);
239 }
240 } else if (!abort_active) {
241 /* call abort directly since we are in the DPC thread */
242 ql_dbg(ql_dbg_mbx, vha, 0x1160,
243 "Timeout, calling abort_isp.\n");
244
245 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
246 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
247 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
248
249 ql_log(ql_log_info, base_vha, 0x1161,
250 "Mailbox cmd timeout occurred, cmd=0x%x, "
251 "mb[0]=0x%x. Scheduling ISP abort ",
252 command, mcp->mb[0]);
253
254 set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
255 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
256 if (ha->isp_ops->abort_isp(vha)) {
257 /* Failed. retry later. */
258 set_bit(ISP_ABORT_NEEDED,
259 &vha->dpc_flags);
260 }
261 clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
262 ql_dbg(ql_dbg_mbx, vha, 0x1162,
263 "Finished abort_isp.\n");
264 }
265 }
266 }
267
268premature_exit:
269 /* Allow next mbx cmd to come in. */
270 complete(&ha->mbx_cmd_comp);
271
272 if (rval) {
273 ql_log(ql_log_warn, base_vha, 0x1163,
274 "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, "
275 "mb[3]=%x, cmd=%x ****.\n",
276 mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command);
277 } else {
278 ql_dbg(ql_dbg_mbx, base_vha, 0x1164, "Done %s.\n", __func__);
279 }
280
281 return rval;
282}
283
284/*
285 * qlafx00_driver_shutdown
286 * Indicate a driver shutdown to firmware.
287 *
288 * Input:
289 * ha = adapter block pointer.
290 *
291 * Returns:
292 * local function return status code.
293 *
294 * Context:
295 * Kernel context.
296 */
Armen Baloyan42479342013-08-27 01:37:37 -0400297int
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400298qlafx00_driver_shutdown(scsi_qla_host_t *vha, int tmo)
299{
300 int rval;
301 struct mbx_cmd_32 mc;
302 struct mbx_cmd_32 *mcp = &mc;
303
304 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1166,
305 "Entered %s.\n", __func__);
306
307 mcp->mb[0] = MBC_MR_DRV_SHUTDOWN;
308 mcp->out_mb = MBX_0;
309 mcp->in_mb = MBX_0;
310 if (tmo)
311 mcp->tov = tmo;
312 else
313 mcp->tov = MBX_TOV_SECONDS;
314 mcp->flags = 0;
315 rval = qlafx00_mailbox_command(vha, mcp);
316
317 if (rval != QLA_SUCCESS) {
318 ql_dbg(ql_dbg_mbx, vha, 0x1167,
319 "Failed=%x.\n", rval);
320 } else {
321 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1168,
322 "Done %s.\n", __func__);
323 }
324
325 return rval;
326}
327
328/*
329 * qlafx00_get_firmware_state
330 * Get adapter firmware state.
331 *
332 * Input:
333 * ha = adapter block pointer.
334 * TARGET_QUEUE_LOCK must be released.
335 * ADAPTER_STATE_LOCK must be released.
336 *
337 * Returns:
338 * qla7xxx local function return status code.
339 *
340 * Context:
341 * Kernel context.
342 */
343static int
344qlafx00_get_firmware_state(scsi_qla_host_t *vha, uint32_t *states)
345{
346 int rval;
347 struct mbx_cmd_32 mc;
348 struct mbx_cmd_32 *mcp = &mc;
349
350 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1169,
351 "Entered %s.\n", __func__);
352
353 mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
354 mcp->out_mb = MBX_0;
355 mcp->in_mb = MBX_1|MBX_0;
356 mcp->tov = MBX_TOV_SECONDS;
357 mcp->flags = 0;
358 rval = qlafx00_mailbox_command(vha, mcp);
359
360 /* Return firmware states. */
361 states[0] = mcp->mb[1];
362
363 if (rval != QLA_SUCCESS) {
364 ql_dbg(ql_dbg_mbx, vha, 0x116a,
365 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
366 } else {
367 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116b,
368 "Done %s.\n", __func__);
369 }
370 return rval;
371}
372
373/*
374 * qlafx00_init_firmware
375 * Initialize adapter firmware.
376 *
377 * Input:
378 * ha = adapter block pointer.
379 * dptr = Initialization control block pointer.
380 * size = size of initialization control block.
381 * TARGET_QUEUE_LOCK must be released.
382 * ADAPTER_STATE_LOCK must be released.
383 *
384 * Returns:
385 * qlafx00 local function return status code.
386 *
387 * Context:
388 * Kernel context.
389 */
390int
391qlafx00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
392{
393 int rval;
394 struct mbx_cmd_32 mc;
395 struct mbx_cmd_32 *mcp = &mc;
396 struct qla_hw_data *ha = vha->hw;
397
398 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116c,
399 "Entered %s.\n", __func__);
400
401 mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
402
403 mcp->mb[1] = 0;
404 mcp->mb[2] = MSD(ha->init_cb_dma);
405 mcp->mb[3] = LSD(ha->init_cb_dma);
406
407 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
408 mcp->in_mb = MBX_0;
409 mcp->buf_size = size;
410 mcp->flags = MBX_DMA_OUT;
411 mcp->tov = MBX_TOV_SECONDS;
412 rval = qlafx00_mailbox_command(vha, mcp);
413
414 if (rval != QLA_SUCCESS) {
415 ql_dbg(ql_dbg_mbx, vha, 0x116d,
416 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
417 } else {
418 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116e,
419 "Done %s.\n", __func__);
420 }
421 return rval;
422}
423
424/*
425 * qlafx00_mbx_reg_test
426 */
427static int
428qlafx00_mbx_reg_test(scsi_qla_host_t *vha)
429{
430 int rval;
431 struct mbx_cmd_32 mc;
432 struct mbx_cmd_32 *mcp = &mc;
433
434 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116f,
435 "Entered %s.\n", __func__);
436
437
438 mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
439 mcp->mb[1] = 0xAAAA;
440 mcp->mb[2] = 0x5555;
441 mcp->mb[3] = 0xAA55;
442 mcp->mb[4] = 0x55AA;
443 mcp->mb[5] = 0xA5A5;
444 mcp->mb[6] = 0x5A5A;
445 mcp->mb[7] = 0x2525;
446 mcp->mb[8] = 0xBBBB;
447 mcp->mb[9] = 0x6666;
448 mcp->mb[10] = 0xBB66;
449 mcp->mb[11] = 0x66BB;
450 mcp->mb[12] = 0xB6B6;
451 mcp->mb[13] = 0x6B6B;
452 mcp->mb[14] = 0x3636;
453 mcp->mb[15] = 0xCCCC;
454
455
456 mcp->out_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
457 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
458 mcp->in_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
459 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
460 mcp->buf_size = 0;
461 mcp->flags = MBX_DMA_OUT;
462 mcp->tov = MBX_TOV_SECONDS;
463 rval = qlafx00_mailbox_command(vha, mcp);
464 if (rval == QLA_SUCCESS) {
465 if (mcp->mb[17] != 0xAAAA || mcp->mb[18] != 0x5555 ||
466 mcp->mb[19] != 0xAA55 || mcp->mb[20] != 0x55AA)
467 rval = QLA_FUNCTION_FAILED;
468 if (mcp->mb[21] != 0xA5A5 || mcp->mb[22] != 0x5A5A ||
469 mcp->mb[23] != 0x2525 || mcp->mb[24] != 0xBBBB)
470 rval = QLA_FUNCTION_FAILED;
471 if (mcp->mb[25] != 0x6666 || mcp->mb[26] != 0xBB66 ||
472 mcp->mb[27] != 0x66BB || mcp->mb[28] != 0xB6B6)
473 rval = QLA_FUNCTION_FAILED;
474 if (mcp->mb[29] != 0x6B6B || mcp->mb[30] != 0x3636 ||
475 mcp->mb[31] != 0xCCCC)
476 rval = QLA_FUNCTION_FAILED;
477 }
478
479 if (rval != QLA_SUCCESS) {
480 ql_dbg(ql_dbg_mbx, vha, 0x1170,
481 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
482 } else {
483 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1171,
484 "Done %s.\n", __func__);
485 }
486 return rval;
487}
488
489/**
490 * qlafx00_pci_config() - Setup ISPFx00 PCI configuration registers.
491 * @ha: HA context
492 *
493 * Returns 0 on success.
494 */
495int
496qlafx00_pci_config(scsi_qla_host_t *vha)
497{
498 uint16_t w;
499 struct qla_hw_data *ha = vha->hw;
500
501 pci_set_master(ha->pdev);
502 pci_try_set_mwi(ha->pdev);
503
504 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
505 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
506 w &= ~PCI_COMMAND_INTX_DISABLE;
507 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
508
509 /* PCIe -- adjust Maximum Read Request Size (2048). */
510 if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
511 pcie_set_readrq(ha->pdev, 2048);
512
513 ha->chip_revision = ha->pdev->revision;
514
515 return QLA_SUCCESS;
516}
517
518/**
519 * qlafx00_warm_reset() - Perform warm reset of iSA(CPUs being reset on SOC).
520 * @ha: HA context
521 *
522 */
523static inline void
524qlafx00_soc_cpu_reset(scsi_qla_host_t *vha)
525{
526 unsigned long flags = 0;
527 struct qla_hw_data *ha = vha->hw;
528 int i, core;
529 uint32_t cnt;
530
531 /* Set all 4 cores in reset */
532 for (i = 0; i < 4; i++) {
533 QLAFX00_SET_HBA_SOC_REG(ha,
534 (SOC_SW_RST_CONTROL_REG_CORE0 + 8*i), (0xF01));
535 }
536
537 /* Set all 4 core Clock gating control */
538 for (i = 0; i < 4; i++) {
539 QLAFX00_SET_HBA_SOC_REG(ha,
540 (SOC_SW_RST_CONTROL_REG_CORE0 + 4 + 8*i), (0x01010101));
541 }
542
543 /* Reset all units in Fabric */
544 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x11F0101));
545
546 /* Reset all interrupt control registers */
547 for (i = 0; i < 115; i++) {
548 QLAFX00_SET_HBA_SOC_REG(ha,
549 (SOC_INTERRUPT_SOURCE_I_CONTROL_REG + 4*i), (0x0));
550 }
551
552 /* Reset Timers control registers. per core */
553 for (core = 0; core < 4; core++)
554 for (i = 0; i < 8; i++)
555 QLAFX00_SET_HBA_SOC_REG(ha,
556 (SOC_CORE_TIMER_REG + 0x100*core + 4*i), (0x0));
557
558 /* Reset per core IRQ ack register */
559 for (core = 0; core < 4; core++)
560 QLAFX00_SET_HBA_SOC_REG(ha,
561 (SOC_IRQ_ACK_REG + 0x100*core), (0x3FF));
562
563 /* Set Fabric control and config to defaults */
564 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONTROL_REG, (0x2));
565 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONFIG_REG, (0x3));
566
567 spin_lock_irqsave(&ha->hardware_lock, flags);
568
569 /* Kick in Fabric units */
570 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x0));
571
572 /* Kick in Core0 to start boot process */
573 QLAFX00_SET_HBA_SOC_REG(ha, SOC_SW_RST_CONTROL_REG_CORE0, (0xF00));
574
575 /* Wait 10secs for soft-reset to complete. */
576 for (cnt = 10; cnt; cnt--) {
577 msleep(1000);
578 barrier();
579 }
580 spin_unlock_irqrestore(&ha->hardware_lock, flags);
581}
582
583/**
584 * qlafx00_soft_reset() - Soft Reset ISPFx00.
585 * @ha: HA context
586 *
587 * Returns 0 on success.
588 */
589void
590qlafx00_soft_reset(scsi_qla_host_t *vha)
591{
592 struct qla_hw_data *ha = vha->hw;
593
594 if (unlikely(pci_channel_offline(ha->pdev) &&
595 ha->flags.pci_channel_io_perm_failure))
596 return;
597
598 ha->isp_ops->disable_intrs(ha);
599 qlafx00_soc_cpu_reset(vha);
600 ha->isp_ops->enable_intrs(ha);
601}
602
603/**
604 * qlafx00_chip_diag() - Test ISPFx00 for proper operation.
605 * @ha: HA context
606 *
607 * Returns 0 on success.
608 */
609int
610qlafx00_chip_diag(scsi_qla_host_t *vha)
611{
612 int rval = 0;
613 struct qla_hw_data *ha = vha->hw;
614 struct req_que *req = ha->req_q_map[0];
615
616 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
617
618 rval = qlafx00_mbx_reg_test(vha);
619 if (rval) {
620 ql_log(ql_log_warn, vha, 0x1165,
621 "Failed mailbox send register test\n");
622 } else {
623 /* Flag a successful rval */
624 rval = QLA_SUCCESS;
625 }
626 return rval;
627}
628
629void
630qlafx00_config_rings(struct scsi_qla_host *vha)
631{
632 struct qla_hw_data *ha = vha->hw;
633 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
634 struct init_cb_fx *icb;
635 struct req_que *req = ha->req_q_map[0];
636 struct rsp_que *rsp = ha->rsp_q_map[0];
637
638 /* Setup ring parameters in initialization control block. */
639 icb = (struct init_cb_fx *)ha->init_cb;
640 icb->request_q_outpointer = __constant_cpu_to_le16(0);
641 icb->response_q_inpointer = __constant_cpu_to_le16(0);
642 icb->request_q_length = cpu_to_le16(req->length);
643 icb->response_q_length = cpu_to_le16(rsp->length);
644 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
645 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
646 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
647 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
648
649 WRT_REG_DWORD(&reg->req_q_in, 0);
650 WRT_REG_DWORD(&reg->req_q_out, 0);
651
652 WRT_REG_DWORD(&reg->rsp_q_in, 0);
653 WRT_REG_DWORD(&reg->rsp_q_out, 0);
654
655 /* PCI posting */
656 RD_REG_DWORD(&reg->rsp_q_out);
657}
658
659char *
660qlafx00_pci_info_str(struct scsi_qla_host *vha, char *str)
661{
662 struct qla_hw_data *ha = vha->hw;
663 int pcie_reg;
664
665 pcie_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP);
666 if (pcie_reg) {
667 strcpy(str, "PCIe iSA");
668 return str;
669 }
670 return str;
671}
672
673char *
674qlafx00_fw_version_str(struct scsi_qla_host *vha, char *str)
675{
676 struct qla_hw_data *ha = vha->hw;
677
678 sprintf(str, "%s", ha->mr.fw_version);
679 return str;
680}
681
682void
683qlafx00_enable_intrs(struct qla_hw_data *ha)
684{
685 unsigned long flags = 0;
686
687 spin_lock_irqsave(&ha->hardware_lock, flags);
688 ha->interrupts_on = 1;
689 QLAFX00_ENABLE_ICNTRL_REG(ha);
690 spin_unlock_irqrestore(&ha->hardware_lock, flags);
691}
692
693void
694qlafx00_disable_intrs(struct qla_hw_data *ha)
695{
696 unsigned long flags = 0;
697
698 spin_lock_irqsave(&ha->hardware_lock, flags);
699 ha->interrupts_on = 0;
700 QLAFX00_DISABLE_ICNTRL_REG(ha);
701 spin_unlock_irqrestore(&ha->hardware_lock, flags);
702}
703
704static void
705qlafx00_tmf_iocb_timeout(void *data)
706{
707 srb_t *sp = (srb_t *)data;
708 struct srb_iocb *tmf = &sp->u.iocb_cmd;
709
Saurav Kashyap1f8deef2013-06-25 11:27:21 -0400710 tmf->u.tmf.comp_status = cpu_to_le16((uint16_t)CS_TIMEOUT);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400711 complete(&tmf->u.tmf.comp);
712}
713
714static void
715qlafx00_tmf_sp_done(void *data, void *ptr, int res)
716{
717 srb_t *sp = (srb_t *)ptr;
718 struct srb_iocb *tmf = &sp->u.iocb_cmd;
719
720 complete(&tmf->u.tmf.comp);
721}
722
723static int
724qlafx00_async_tm_cmd(fc_port_t *fcport, uint32_t flags,
725 uint32_t lun, uint32_t tag)
726{
727 scsi_qla_host_t *vha = fcport->vha;
728 struct srb_iocb *tm_iocb;
729 srb_t *sp;
730 int rval = QLA_FUNCTION_FAILED;
731
732 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
733 if (!sp)
734 goto done;
735
736 tm_iocb = &sp->u.iocb_cmd;
737 sp->type = SRB_TM_CMD;
738 sp->name = "tmf";
739 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
740 tm_iocb->u.tmf.flags = flags;
741 tm_iocb->u.tmf.lun = lun;
742 tm_iocb->u.tmf.data = tag;
743 sp->done = qlafx00_tmf_sp_done;
744 tm_iocb->timeout = qlafx00_tmf_iocb_timeout;
745 init_completion(&tm_iocb->u.tmf.comp);
746
747 rval = qla2x00_start_sp(sp);
748 if (rval != QLA_SUCCESS)
749 goto done_free_sp;
750
751 ql_dbg(ql_dbg_async, vha, 0x507b,
752 "Task management command issued target_id=%x\n",
753 fcport->tgt_id);
754
755 wait_for_completion(&tm_iocb->u.tmf.comp);
756
757 rval = tm_iocb->u.tmf.comp_status == CS_COMPLETE ?
758 QLA_SUCCESS : QLA_FUNCTION_FAILED;
759
760done_free_sp:
761 sp->free(vha, sp);
762done:
763 return rval;
764}
765
766int
767qlafx00_abort_target(fc_port_t *fcport, unsigned int l, int tag)
768{
769 return qlafx00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);
770}
771
772int
773qlafx00_lun_reset(fc_port_t *fcport, unsigned int l, int tag)
774{
775 return qlafx00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);
776}
777
778int
Armen Baloyan58547712013-08-27 01:37:33 -0400779qlafx00_loop_reset(scsi_qla_host_t *vha)
780{
781 int ret;
782 struct fc_port *fcport;
783 struct qla_hw_data *ha = vha->hw;
784
785 if (ql2xtargetreset) {
786 list_for_each_entry(fcport, &vha->vp_fcports, list) {
787 if (fcport->port_type != FCT_TARGET)
788 continue;
789
790 ret = ha->isp_ops->target_reset(fcport, 0, 0);
791 if (ret != QLA_SUCCESS) {
792 ql_dbg(ql_dbg_taskm, vha, 0x803d,
793 "Bus Reset failed: Reset=%d "
794 "d_id=%x.\n", ret, fcport->d_id.b24);
795 }
796 }
797 }
798 return QLA_SUCCESS;
799}
800
801int
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -0400802qlafx00_iospace_config(struct qla_hw_data *ha)
803{
804 if (pci_request_selected_regions(ha->pdev, ha->bars,
805 QLA2XXX_DRIVER_NAME)) {
806 ql_log_pci(ql_log_fatal, ha->pdev, 0x014e,
807 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
808 pci_name(ha->pdev));
809 goto iospace_error_exit;
810 }
811
812 /* Use MMIO operations for all accesses. */
813 if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
814 ql_log_pci(ql_log_warn, ha->pdev, 0x014f,
815 "Invalid pci I/O region size (%s).\n",
816 pci_name(ha->pdev));
817 goto iospace_error_exit;
818 }
819 if (pci_resource_len(ha->pdev, 0) < BAR0_LEN_FX00) {
820 ql_log_pci(ql_log_warn, ha->pdev, 0x0127,
821 "Invalid PCI mem BAR0 region size (%s), aborting\n",
822 pci_name(ha->pdev));
823 goto iospace_error_exit;
824 }
825
826 ha->cregbase =
827 ioremap_nocache(pci_resource_start(ha->pdev, 0), BAR0_LEN_FX00);
828 if (!ha->cregbase) {
829 ql_log_pci(ql_log_fatal, ha->pdev, 0x0128,
830 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
831 goto iospace_error_exit;
832 }
833
834 if (!(pci_resource_flags(ha->pdev, 2) & IORESOURCE_MEM)) {
835 ql_log_pci(ql_log_warn, ha->pdev, 0x0129,
836 "region #2 not an MMIO resource (%s), aborting\n",
837 pci_name(ha->pdev));
838 goto iospace_error_exit;
839 }
840 if (pci_resource_len(ha->pdev, 2) < BAR2_LEN_FX00) {
841 ql_log_pci(ql_log_warn, ha->pdev, 0x012a,
842 "Invalid PCI mem BAR2 region size (%s), aborting\n",
843 pci_name(ha->pdev));
844 goto iospace_error_exit;
845 }
846
847 ha->iobase =
848 ioremap_nocache(pci_resource_start(ha->pdev, 2), BAR2_LEN_FX00);
849 if (!ha->iobase) {
850 ql_log_pci(ql_log_fatal, ha->pdev, 0x012b,
851 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
852 goto iospace_error_exit;
853 }
854
855 /* Determine queue resources */
856 ha->max_req_queues = ha->max_rsp_queues = 1;
857
858 ql_log_pci(ql_log_info, ha->pdev, 0x012c,
859 "Bars 0x%x, iobase0 0x%p, iobase2 0x%p\n",
860 ha->bars, ha->cregbase, ha->iobase);
861
862 return 0;
863
864iospace_error_exit:
865 return -ENOMEM;
866}
867
868static void
869qlafx00_save_queue_ptrs(struct scsi_qla_host *vha)
870{
871 struct qla_hw_data *ha = vha->hw;
872 struct req_que *req = ha->req_q_map[0];
873 struct rsp_que *rsp = ha->rsp_q_map[0];
874
875 req->length_fx00 = req->length;
876 req->ring_fx00 = req->ring;
877 req->dma_fx00 = req->dma;
878
879 rsp->length_fx00 = rsp->length;
880 rsp->ring_fx00 = rsp->ring;
881 rsp->dma_fx00 = rsp->dma;
882
883 ql_dbg(ql_dbg_init, vha, 0x012d,
884 "req: %p, ring_fx00: %p, length_fx00: 0x%x,"
885 "req->dma_fx00: 0x%llx\n", req, req->ring_fx00,
886 req->length_fx00, (u64)req->dma_fx00);
887
888 ql_dbg(ql_dbg_init, vha, 0x012e,
889 "rsp: %p, ring_fx00: %p, length_fx00: 0x%x,"
890 "rsp->dma_fx00: 0x%llx\n", rsp, rsp->ring_fx00,
891 rsp->length_fx00, (u64)rsp->dma_fx00);
892}
893
894static int
895qlafx00_config_queues(struct scsi_qla_host *vha)
896{
897 struct qla_hw_data *ha = vha->hw;
898 struct req_que *req = ha->req_q_map[0];
899 struct rsp_que *rsp = ha->rsp_q_map[0];
900 dma_addr_t bar2_hdl = pci_resource_start(ha->pdev, 2);
901
902 req->length = ha->req_que_len;
903 req->ring = (void *)ha->iobase + ha->req_que_off;
904 req->dma = bar2_hdl + ha->req_que_off;
905 if ((!req->ring) || (req->length == 0)) {
906 ql_log_pci(ql_log_info, ha->pdev, 0x012f,
907 "Unable to allocate memory for req_ring\n");
908 return QLA_FUNCTION_FAILED;
909 }
910
911 ql_dbg(ql_dbg_init, vha, 0x0130,
912 "req: %p req_ring pointer %p req len 0x%x "
913 "req off 0x%x\n, req->dma: 0x%llx",
914 req, req->ring, req->length,
915 ha->req_que_off, (u64)req->dma);
916
917 rsp->length = ha->rsp_que_len;
918 rsp->ring = (void *)ha->iobase + ha->rsp_que_off;
919 rsp->dma = bar2_hdl + ha->rsp_que_off;
920 if ((!rsp->ring) || (rsp->length == 0)) {
921 ql_log_pci(ql_log_info, ha->pdev, 0x0131,
922 "Unable to allocate memory for rsp_ring\n");
923 return QLA_FUNCTION_FAILED;
924 }
925
926 ql_dbg(ql_dbg_init, vha, 0x0132,
927 "rsp: %p rsp_ring pointer %p rsp len 0x%x "
928 "rsp off 0x%x, rsp->dma: 0x%llx\n",
929 rsp, rsp->ring, rsp->length,
930 ha->rsp_que_off, (u64)rsp->dma);
931
932 return QLA_SUCCESS;
933}
934
935static int
936qlafx00_init_fw_ready(scsi_qla_host_t *vha)
937{
938 int rval = 0;
939 unsigned long wtime;
940 uint16_t wait_time; /* Wait time */
941 struct qla_hw_data *ha = vha->hw;
942 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
943 uint32_t aenmbx, aenmbx7 = 0;
944 uint32_t state[5];
945 bool done = false;
946
947 /* 30 seconds wait - Adjust if required */
948 wait_time = 30;
949
950 /* wait time before firmware ready */
951 wtime = jiffies + (wait_time * HZ);
952 do {
953 aenmbx = RD_REG_DWORD(&reg->aenmailbox0);
954 barrier();
955 ql_dbg(ql_dbg_mbx, vha, 0x0133,
956 "aenmbx: 0x%x\n", aenmbx);
957
958 switch (aenmbx) {
959 case MBA_FW_NOT_STARTED:
960 case MBA_FW_STARTING:
961 break;
962
963 case MBA_SYSTEM_ERR:
964 case MBA_REQ_TRANSFER_ERR:
965 case MBA_RSP_TRANSFER_ERR:
966 case MBA_FW_INIT_FAILURE:
967 qlafx00_soft_reset(vha);
968 break;
969
970 case MBA_FW_RESTART_CMPLT:
971 /* Set the mbx and rqstq intr code */
972 aenmbx7 = RD_REG_DWORD(&reg->aenmailbox7);
973 ha->mbx_intr_code = MSW(aenmbx7);
974 ha->rqstq_intr_code = LSW(aenmbx7);
975 ha->req_que_off = RD_REG_DWORD(&reg->aenmailbox1);
976 ha->rsp_que_off = RD_REG_DWORD(&reg->aenmailbox3);
977 ha->req_que_len = RD_REG_DWORD(&reg->aenmailbox5);
978 ha->rsp_que_len = RD_REG_DWORD(&reg->aenmailbox6);
979 WRT_REG_DWORD(&reg->aenmailbox0, 0);
980 RD_REG_DWORD_RELAXED(&reg->aenmailbox0);
981 ql_dbg(ql_dbg_init, vha, 0x0134,
982 "f/w returned mbx_intr_code: 0x%x, "
983 "rqstq_intr_code: 0x%x\n",
984 ha->mbx_intr_code, ha->rqstq_intr_code);
985 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
986 rval = QLA_SUCCESS;
987 done = true;
988 break;
989
990 default:
991 /* If fw is apparently not ready. In order to continue,
992 * we might need to issue Mbox cmd, but the problem is
993 * that the DoorBell vector values that come with the
994 * 8060 AEN are most likely gone by now (and thus no
995 * bell would be rung on the fw side when mbox cmd is
996 * issued). We have to therefore grab the 8060 AEN
997 * shadow regs (filled in by FW when the last 8060
998 * AEN was being posted).
999 * Do the following to determine what is needed in
1000 * order to get the FW ready:
1001 * 1. reload the 8060 AEN values from the shadow regs
1002 * 2. clear int status to get rid of possible pending
1003 * interrupts
1004 * 3. issue Get FW State Mbox cmd to determine fw state
1005 * Set the mbx and rqstq intr code from Shadow Regs
1006 */
1007 aenmbx7 = RD_REG_DWORD(&reg->initval7);
1008 ha->mbx_intr_code = MSW(aenmbx7);
1009 ha->rqstq_intr_code = LSW(aenmbx7);
1010 ha->req_que_off = RD_REG_DWORD(&reg->initval1);
1011 ha->rsp_que_off = RD_REG_DWORD(&reg->initval3);
1012 ha->req_que_len = RD_REG_DWORD(&reg->initval5);
1013 ha->rsp_que_len = RD_REG_DWORD(&reg->initval6);
1014 ql_dbg(ql_dbg_init, vha, 0x0135,
1015 "f/w returned mbx_intr_code: 0x%x, "
1016 "rqstq_intr_code: 0x%x\n",
1017 ha->mbx_intr_code, ha->rqstq_intr_code);
1018 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1019
1020 /* Get the FW state */
1021 rval = qlafx00_get_firmware_state(vha, state);
1022 if (rval != QLA_SUCCESS) {
1023 /* Retry if timer has not expired */
1024 break;
1025 }
1026
1027 if (state[0] == FSTATE_FX00_CONFIG_WAIT) {
1028 /* Firmware is waiting to be
1029 * initialized by driver
1030 */
1031 rval = QLA_SUCCESS;
1032 done = true;
1033 break;
1034 }
1035
1036 /* Issue driver shutdown and wait until f/w recovers.
1037 * Driver should continue to poll until 8060 AEN is
1038 * received indicating firmware recovery.
1039 */
1040 ql_dbg(ql_dbg_init, vha, 0x0136,
1041 "Sending Driver shutdown fw_state 0x%x\n",
1042 state[0]);
1043
1044 rval = qlafx00_driver_shutdown(vha, 10);
1045 if (rval != QLA_SUCCESS) {
1046 rval = QLA_FUNCTION_FAILED;
1047 break;
1048 }
1049 msleep(500);
1050
1051 wtime = jiffies + (wait_time * HZ);
1052 break;
1053 }
1054
1055 if (!done) {
1056 if (time_after_eq(jiffies, wtime)) {
1057 ql_dbg(ql_dbg_init, vha, 0x0137,
1058 "Init f/w failed: aen[7]: 0x%x\n",
1059 RD_REG_DWORD(&reg->aenmailbox7));
1060 rval = QLA_FUNCTION_FAILED;
1061 done = true;
1062 break;
1063 }
1064 /* Delay for a while */
1065 msleep(500);
1066 }
1067 } while (!done);
1068
1069 if (rval)
1070 ql_dbg(ql_dbg_init, vha, 0x0138,
1071 "%s **** FAILED ****.\n", __func__);
1072 else
1073 ql_dbg(ql_dbg_init, vha, 0x0139,
1074 "%s **** SUCCESS ****.\n", __func__);
1075
1076 return rval;
1077}
1078
1079/*
1080 * qlafx00_fw_ready() - Waits for firmware ready.
1081 * @ha: HA context
1082 *
1083 * Returns 0 on success.
1084 */
1085int
1086qlafx00_fw_ready(scsi_qla_host_t *vha)
1087{
1088 int rval;
1089 unsigned long wtime;
1090 uint16_t wait_time; /* Wait time if loop is coming ready */
1091 uint32_t state[5];
1092
1093 rval = QLA_SUCCESS;
1094
1095 wait_time = 10;
1096
1097 /* wait time before firmware ready */
1098 wtime = jiffies + (wait_time * HZ);
1099
1100 /* Wait for ISP to finish init */
1101 if (!vha->flags.init_done)
1102 ql_dbg(ql_dbg_init, vha, 0x013a,
1103 "Waiting for init to complete...\n");
1104
1105 do {
1106 rval = qlafx00_get_firmware_state(vha, state);
1107
1108 if (rval == QLA_SUCCESS) {
1109 if (state[0] == FSTATE_FX00_INITIALIZED) {
1110 ql_dbg(ql_dbg_init, vha, 0x013b,
1111 "fw_state=%x\n", state[0]);
1112 rval = QLA_SUCCESS;
1113 break;
1114 }
1115 }
1116 rval = QLA_FUNCTION_FAILED;
1117
1118 if (time_after_eq(jiffies, wtime))
1119 break;
1120
1121 /* Delay for a while */
1122 msleep(500);
1123
1124 ql_dbg(ql_dbg_init, vha, 0x013c,
1125 "fw_state=%x curr time=%lx.\n", state[0], jiffies);
1126 } while (1);
1127
1128
1129 if (rval)
1130 ql_dbg(ql_dbg_init, vha, 0x013d,
1131 "Firmware ready **** FAILED ****.\n");
1132 else
1133 ql_dbg(ql_dbg_init, vha, 0x013e,
1134 "Firmware ready **** SUCCESS ****.\n");
1135
1136 return rval;
1137}
1138
1139static int
1140qlafx00_find_all_targets(scsi_qla_host_t *vha,
1141 struct list_head *new_fcports)
1142{
1143 int rval;
1144 uint16_t tgt_id;
1145 fc_port_t *fcport, *new_fcport;
1146 int found;
1147 struct qla_hw_data *ha = vha->hw;
1148
1149 rval = QLA_SUCCESS;
1150
1151 if (!test_bit(LOOP_RESYNC_ACTIVE, &vha->dpc_flags))
1152 return QLA_FUNCTION_FAILED;
1153
1154 if ((atomic_read(&vha->loop_down_timer) ||
1155 STATE_TRANSITION(vha))) {
1156 atomic_set(&vha->loop_down_timer, 0);
1157 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1158 return QLA_FUNCTION_FAILED;
1159 }
1160
1161 ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x2088,
1162 "Listing Target bit map...\n");
1163 ql_dump_buffer(ql_dbg_disc + ql_dbg_init, vha,
1164 0x2089, (uint8_t *)ha->gid_list, 32);
1165
1166 /* Allocate temporary rmtport for any new rmtports discovered. */
1167 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1168 if (new_fcport == NULL)
1169 return QLA_MEMORY_ALLOC_FAILED;
1170
1171 for_each_set_bit(tgt_id, (void *)ha->gid_list,
1172 QLAFX00_TGT_NODE_LIST_SIZE) {
1173
1174 /* Send get target node info */
1175 new_fcport->tgt_id = tgt_id;
1176 rval = qlafx00_fx_disc(vha, new_fcport,
1177 FXDISC_GET_TGT_NODE_INFO);
1178 if (rval != QLA_SUCCESS) {
1179 ql_log(ql_log_warn, vha, 0x208a,
1180 "Target info scan failed -- assuming zero-entry "
1181 "result...\n");
1182 continue;
1183 }
1184
1185 /* Locate matching device in database. */
1186 found = 0;
1187 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1188 if (memcmp(new_fcport->port_name,
1189 fcport->port_name, WWN_SIZE))
1190 continue;
1191
1192 found++;
1193
1194 /*
1195 * If tgt_id is same and state FCS_ONLINE, nothing
1196 * changed.
1197 */
1198 if (fcport->tgt_id == new_fcport->tgt_id &&
1199 atomic_read(&fcport->state) == FCS_ONLINE)
1200 break;
1201
1202 /*
1203 * Tgt ID changed or device was marked to be updated.
1204 */
1205 ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x208b,
1206 "TGT-ID Change(%s): Present tgt id: "
1207 "0x%x state: 0x%x "
1208 "wwnn = %llx wwpn = %llx.\n",
1209 __func__, fcport->tgt_id,
1210 atomic_read(&fcport->state),
1211 (unsigned long long)wwn_to_u64(fcport->node_name),
1212 (unsigned long long)wwn_to_u64(fcport->port_name));
1213
1214 ql_log(ql_log_info, vha, 0x208c,
1215 "TGT-ID Announce(%s): Discovered tgt "
1216 "id 0x%x wwnn = %llx "
1217 "wwpn = %llx.\n", __func__, new_fcport->tgt_id,
1218 (unsigned long long)
1219 wwn_to_u64(new_fcport->node_name),
1220 (unsigned long long)
1221 wwn_to_u64(new_fcport->port_name));
1222
1223 if (atomic_read(&fcport->state) != FCS_ONLINE) {
1224 fcport->old_tgt_id = fcport->tgt_id;
1225 fcport->tgt_id = new_fcport->tgt_id;
1226 ql_log(ql_log_info, vha, 0x208d,
1227 "TGT-ID: New fcport Added: %p\n", fcport);
1228 qla2x00_update_fcport(vha, fcport);
1229 } else {
1230 ql_log(ql_log_info, vha, 0x208e,
1231 " Existing TGT-ID %x did not get "
1232 " offline event from firmware.\n",
1233 fcport->old_tgt_id);
1234 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1235 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1236 kfree(new_fcport);
1237 return rval;
1238 }
1239 break;
1240 }
1241
1242 if (found)
1243 continue;
1244
1245 /* If device was not in our fcports list, then add it. */
1246 list_add_tail(&new_fcport->list, new_fcports);
1247
1248 /* Allocate a new replacement fcport. */
1249 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1250 if (new_fcport == NULL)
1251 return QLA_MEMORY_ALLOC_FAILED;
1252 }
1253
1254 kfree(new_fcport);
1255 return rval;
1256}
1257
1258/*
1259 * qlafx00_configure_all_targets
1260 * Setup target devices with node ID's.
1261 *
1262 * Input:
1263 * ha = adapter block pointer.
1264 *
1265 * Returns:
1266 * 0 = success.
1267 * BIT_0 = error
1268 */
1269static int
1270qlafx00_configure_all_targets(scsi_qla_host_t *vha)
1271{
1272 int rval;
1273 fc_port_t *fcport, *rmptemp;
1274 LIST_HEAD(new_fcports);
1275
1276 rval = qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
1277 FXDISC_GET_TGT_NODE_LIST);
1278 if (rval != QLA_SUCCESS) {
1279 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1280 return rval;
1281 }
1282
1283 rval = qlafx00_find_all_targets(vha, &new_fcports);
1284 if (rval != QLA_SUCCESS) {
1285 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1286 return rval;
1287 }
1288
1289 /*
1290 * Delete all previous devices marked lost.
1291 */
1292 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1293 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1294 break;
1295
1296 if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
1297 if (fcport->port_type != FCT_INITIATOR)
1298 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1299 }
1300 }
1301
1302 /*
1303 * Add the new devices to our devices list.
1304 */
1305 list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) {
1306 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1307 break;
1308
1309 qla2x00_update_fcport(vha, fcport);
1310 list_move_tail(&fcport->list, &vha->vp_fcports);
1311 ql_log(ql_log_info, vha, 0x208f,
1312 "Attach new target id 0x%x wwnn = %llx "
1313 "wwpn = %llx.\n",
1314 fcport->tgt_id,
1315 (unsigned long long)wwn_to_u64(fcport->node_name),
1316 (unsigned long long)wwn_to_u64(fcport->port_name));
1317 }
1318
1319 /* Free all new device structures not processed. */
1320 list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) {
1321 list_del(&fcport->list);
1322 kfree(fcport);
1323 }
1324
1325 return rval;
1326}
1327
1328/*
1329 * qlafx00_configure_devices
1330 * Updates Fibre Channel Device Database with what is actually on loop.
1331 *
1332 * Input:
1333 * ha = adapter block pointer.
1334 *
1335 * Returns:
1336 * 0 = success.
1337 * 1 = error.
1338 * 2 = database was full and device was not configured.
1339 */
1340int
1341qlafx00_configure_devices(scsi_qla_host_t *vha)
1342{
1343 int rval;
1344 unsigned long flags, save_flags;
1345 rval = QLA_SUCCESS;
1346
1347 save_flags = flags = vha->dpc_flags;
1348
1349 ql_dbg(ql_dbg_disc, vha, 0x2090,
1350 "Configure devices -- dpc flags =0x%lx\n", flags);
1351
1352 rval = qlafx00_configure_all_targets(vha);
1353
1354 if (rval == QLA_SUCCESS) {
1355 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1356 rval = QLA_FUNCTION_FAILED;
1357 } else {
1358 atomic_set(&vha->loop_state, LOOP_READY);
1359 ql_log(ql_log_info, vha, 0x2091,
1360 "Device Ready\n");
1361 }
1362 }
1363
1364 if (rval) {
1365 ql_dbg(ql_dbg_disc, vha, 0x2092,
1366 "%s *** FAILED ***.\n", __func__);
1367 } else {
1368 ql_dbg(ql_dbg_disc, vha, 0x2093,
1369 "%s: exiting normally.\n", __func__);
1370 }
1371 return rval;
1372}
1373
1374static void
Armen Baloyan71e56002013-08-27 01:37:38 -04001375qlafx00_abort_isp_cleanup(scsi_qla_host_t *vha, bool critemp)
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001376{
1377 struct qla_hw_data *ha = vha->hw;
1378 fc_port_t *fcport;
1379
1380 vha->flags.online = 0;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001381 ha->mr.fw_hbt_en = 0;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001382
Armen Baloyan71e56002013-08-27 01:37:38 -04001383 if (!critemp) {
1384 ha->flags.chip_reset_done = 0;
1385 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1386 vha->qla_stats.total_isp_aborts++;
1387 ql_log(ql_log_info, vha, 0x013f,
1388 "Performing ISP error recovery - ha = %p.\n", ha);
1389 ha->isp_ops->reset_chip(vha);
1390 }
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001391
1392 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1393 atomic_set(&vha->loop_state, LOOP_DOWN);
1394 atomic_set(&vha->loop_down_timer,
1395 QLAFX00_LOOP_DOWN_TIME);
1396 } else {
1397 if (!atomic_read(&vha->loop_down_timer))
1398 atomic_set(&vha->loop_down_timer,
1399 QLAFX00_LOOP_DOWN_TIME);
1400 }
1401
1402 /* Clear all async request states across all VPs. */
1403 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1404 fcport->flags = 0;
1405 if (atomic_read(&fcport->state) == FCS_ONLINE)
1406 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
1407 }
1408
1409 if (!ha->flags.eeh_busy) {
Armen Baloyan71e56002013-08-27 01:37:38 -04001410 if (critemp) {
1411 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
1412 } else {
1413 /* Requeue all commands in outstanding command list. */
1414 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
1415 }
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001416 }
1417
1418 qla2x00_free_irqs(vha);
Armen Baloyan71e56002013-08-27 01:37:38 -04001419 if (critemp)
1420 set_bit(FX00_CRITEMP_RECOVERY, &vha->dpc_flags);
1421 else
1422 set_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001423
1424 /* Clear the Interrupts */
1425 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1426
1427 ql_log(ql_log_info, vha, 0x0140,
1428 "%s Done done - ha=%p.\n", __func__, ha);
1429}
1430
1431/**
1432 * qlafx00_init_response_q_entries() - Initializes response queue entries.
1433 * @ha: HA context
1434 *
1435 * Beginning of request ring has initialization control block already built
1436 * by nvram config routine.
1437 *
1438 * Returns 0 on success.
1439 */
1440void
1441qlafx00_init_response_q_entries(struct rsp_que *rsp)
1442{
1443 uint16_t cnt;
1444 response_t *pkt;
1445
1446 rsp->ring_ptr = rsp->ring;
1447 rsp->ring_index = 0;
1448 rsp->status_srb = NULL;
1449 pkt = rsp->ring_ptr;
1450 for (cnt = 0; cnt < rsp->length; cnt++) {
1451 pkt->signature = RESPONSE_PROCESSED;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04001452 WRT_REG_DWORD((void __iomem *)&pkt->signature,
1453 RESPONSE_PROCESSED);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001454 pkt++;
1455 }
1456}
1457
1458int
1459qlafx00_rescan_isp(scsi_qla_host_t *vha)
1460{
1461 uint32_t status = QLA_FUNCTION_FAILED;
1462 struct qla_hw_data *ha = vha->hw;
1463 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
1464 uint32_t aenmbx7;
1465
1466 qla2x00_request_irqs(ha, ha->rsp_q_map[0]);
1467
1468 aenmbx7 = RD_REG_DWORD(&reg->aenmailbox7);
1469 ha->mbx_intr_code = MSW(aenmbx7);
1470 ha->rqstq_intr_code = LSW(aenmbx7);
1471 ha->req_que_off = RD_REG_DWORD(&reg->aenmailbox1);
1472 ha->rsp_que_off = RD_REG_DWORD(&reg->aenmailbox3);
1473 ha->req_que_len = RD_REG_DWORD(&reg->aenmailbox5);
1474 ha->rsp_que_len = RD_REG_DWORD(&reg->aenmailbox6);
1475
1476 ql_dbg(ql_dbg_disc, vha, 0x2094,
1477 "fw returned mbx_intr_code: 0x%x, rqstq_intr_code: 0x%x "
1478 " Req que offset 0x%x Rsp que offset 0x%x\n",
1479 ha->mbx_intr_code, ha->rqstq_intr_code,
1480 ha->req_que_off, ha->rsp_que_len);
1481
1482 /* Clear the Interrupts */
1483 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1484
1485 status = qla2x00_init_rings(vha);
1486 if (!status) {
1487 vha->flags.online = 1;
1488
1489 /* if no cable then assume it's good */
1490 if ((vha->device_flags & DFLG_NO_CABLE))
1491 status = 0;
1492 /* Register system information */
1493 if (qlafx00_fx_disc(vha,
1494 &vha->hw->mr.fcport, FXDISC_REG_HOST_INFO))
1495 ql_dbg(ql_dbg_disc, vha, 0x2095,
1496 "failed to register host info\n");
1497 }
1498 scsi_unblock_requests(vha->host);
1499 return status;
1500}
1501
1502void
1503qlafx00_timer_routine(scsi_qla_host_t *vha)
1504{
1505 struct qla_hw_data *ha = vha->hw;
1506 uint32_t fw_heart_beat;
1507 uint32_t aenmbx0;
1508 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
Armen Baloyan71e56002013-08-27 01:37:38 -04001509 uint32_t tempc;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001510
1511 /* Check firmware health */
1512 if (ha->mr.fw_hbt_cnt)
1513 ha->mr.fw_hbt_cnt--;
1514 else {
1515 if ((!ha->flags.mr_reset_hdlr_active) &&
1516 (!test_bit(UNLOADING, &vha->dpc_flags)) &&
1517 (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
1518 (ha->mr.fw_hbt_en)) {
1519 fw_heart_beat = RD_REG_DWORD(&reg->fwheartbeat);
1520 if (fw_heart_beat != ha->mr.old_fw_hbt_cnt) {
1521 ha->mr.old_fw_hbt_cnt = fw_heart_beat;
1522 ha->mr.fw_hbt_miss_cnt = 0;
1523 } else {
1524 ha->mr.fw_hbt_miss_cnt++;
1525 if (ha->mr.fw_hbt_miss_cnt ==
1526 QLAFX00_HEARTBEAT_MISS_CNT) {
1527 set_bit(ISP_ABORT_NEEDED,
1528 &vha->dpc_flags);
1529 qla2xxx_wake_dpc(vha);
1530 ha->mr.fw_hbt_miss_cnt = 0;
1531 }
1532 }
1533 }
1534 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
1535 }
1536
1537 if (test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags)) {
1538 /* Reset recovery to be performed in timer routine */
1539 aenmbx0 = RD_REG_DWORD(&reg->aenmailbox0);
1540 if (ha->mr.fw_reset_timer_exp) {
1541 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1542 qla2xxx_wake_dpc(vha);
1543 ha->mr.fw_reset_timer_exp = 0;
1544 } else if (aenmbx0 == MBA_FW_RESTART_CMPLT) {
1545 /* Wake up DPC to rescan the targets */
1546 set_bit(FX00_TARGET_SCAN, &vha->dpc_flags);
1547 clear_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
1548 qla2xxx_wake_dpc(vha);
1549 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
1550 } else if ((aenmbx0 == MBA_FW_STARTING) &&
1551 (!ha->mr.fw_hbt_en)) {
1552 ha->mr.fw_hbt_en = 1;
1553 } else if (!ha->mr.fw_reset_timer_tick) {
1554 if (aenmbx0 == ha->mr.old_aenmbx0_state)
1555 ha->mr.fw_reset_timer_exp = 1;
1556 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
1557 } else if (aenmbx0 == 0xFFFFFFFF) {
1558 uint32_t data0, data1;
1559
1560 data0 = QLAFX00_RD_REG(ha,
1561 QLAFX00_BAR1_BASE_ADDR_REG);
1562 data1 = QLAFX00_RD_REG(ha,
1563 QLAFX00_PEX0_WIN0_BASE_ADDR_REG);
1564
1565 data0 &= 0xffff0000;
1566 data1 &= 0x0000ffff;
1567
1568 QLAFX00_WR_REG(ha,
1569 QLAFX00_PEX0_WIN0_BASE_ADDR_REG,
1570 (data0 | data1));
1571 } else if ((aenmbx0 & 0xFF00) == MBA_FW_POLL_STATE) {
1572 ha->mr.fw_reset_timer_tick =
1573 QLAFX00_MAX_RESET_INTERVAL;
Armen Baloyanb6511d92013-08-27 01:37:31 -04001574 } else if (aenmbx0 == MBA_FW_RESET_FCT) {
1575 ha->mr.fw_reset_timer_tick =
1576 QLAFX00_MAX_RESET_INTERVAL;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001577 }
1578 ha->mr.old_aenmbx0_state = aenmbx0;
1579 ha->mr.fw_reset_timer_tick--;
1580 }
Armen Baloyan71e56002013-08-27 01:37:38 -04001581 if (test_bit(FX00_CRITEMP_RECOVERY, &vha->dpc_flags)) {
1582 /*
1583 * Critical temperature recovery to be
1584 * performed in timer routine
1585 */
1586 if (ha->mr.fw_critemp_timer_tick == 0) {
1587 tempc = QLAFX00_GET_TEMPERATURE(ha);
1588 ql_log(ql_dbg_timer, vha, 0x6012,
1589 "ISPFx00(%s): Critical temp timer, "
1590 "current SOC temperature: %d\n",
1591 __func__, tempc);
1592 if (tempc < ha->mr.critical_temperature) {
1593 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1594 clear_bit(FX00_CRITEMP_RECOVERY,
1595 &vha->dpc_flags);
1596 qla2xxx_wake_dpc(vha);
1597 }
1598 ha->mr.fw_critemp_timer_tick =
1599 QLAFX00_CRITEMP_INTERVAL;
1600 } else {
1601 ha->mr.fw_critemp_timer_tick--;
1602 }
1603 }
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001604}
1605
1606/*
1607 * qlfx00a_reset_initialize
1608 * Re-initialize after a iSA device reset.
1609 *
1610 * Input:
1611 * ha = adapter block pointer.
1612 *
1613 * Returns:
1614 * 0 = success
1615 */
1616int
1617qlafx00_reset_initialize(scsi_qla_host_t *vha)
1618{
1619 struct qla_hw_data *ha = vha->hw;
1620
1621 if (vha->device_flags & DFLG_DEV_FAILED) {
1622 ql_dbg(ql_dbg_init, vha, 0x0142,
1623 "Device in failed state\n");
1624 return QLA_SUCCESS;
1625 }
1626
1627 ha->flags.mr_reset_hdlr_active = 1;
1628
1629 if (vha->flags.online) {
1630 scsi_block_requests(vha->host);
Armen Baloyan71e56002013-08-27 01:37:38 -04001631 qlafx00_abort_isp_cleanup(vha, false);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001632 }
1633
1634 ql_log(ql_log_info, vha, 0x0143,
1635 "(%s): succeeded.\n", __func__);
1636 ha->flags.mr_reset_hdlr_active = 0;
1637 return QLA_SUCCESS;
1638}
1639
1640/*
1641 * qlafx00_abort_isp
1642 * Resets ISP and aborts all outstanding commands.
1643 *
1644 * Input:
1645 * ha = adapter block pointer.
1646 *
1647 * Returns:
1648 * 0 = success
1649 */
1650int
1651qlafx00_abort_isp(scsi_qla_host_t *vha)
1652{
1653 struct qla_hw_data *ha = vha->hw;
1654
1655 if (vha->flags.online) {
1656 if (unlikely(pci_channel_offline(ha->pdev) &&
1657 ha->flags.pci_channel_io_perm_failure)) {
1658 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
1659 return QLA_SUCCESS;
1660 }
1661
1662 scsi_block_requests(vha->host);
Armen Baloyan71e56002013-08-27 01:37:38 -04001663 qlafx00_abort_isp_cleanup(vha, false);
Armen Baloyane601d772013-08-27 01:37:32 -04001664 } else {
1665 scsi_block_requests(vha->host);
1666 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1667 vha->qla_stats.total_isp_aborts++;
1668 ha->isp_ops->reset_chip(vha);
1669 set_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
1670 /* Clear the Interrupts */
1671 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001672 }
1673
1674 ql_log(ql_log_info, vha, 0x0145,
1675 "(%s): succeeded.\n", __func__);
1676
1677 return QLA_SUCCESS;
1678}
1679
1680static inline fc_port_t*
1681qlafx00_get_fcport(struct scsi_qla_host *vha, int tgt_id)
1682{
1683 fc_port_t *fcport;
1684
1685 /* Check for matching device in remote port list. */
1686 fcport = NULL;
1687 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1688 if (fcport->tgt_id == tgt_id) {
1689 ql_dbg(ql_dbg_async, vha, 0x5072,
1690 "Matching fcport(%p) found with TGT-ID: 0x%x "
1691 "and Remote TGT_ID: 0x%x\n",
1692 fcport, fcport->tgt_id, tgt_id);
1693 break;
1694 }
1695 }
1696 return fcport;
1697}
1698
1699static void
1700qlafx00_tgt_detach(struct scsi_qla_host *vha, int tgt_id)
1701{
1702 fc_port_t *fcport;
1703
1704 ql_log(ql_log_info, vha, 0x5073,
1705 "Detach TGT-ID: 0x%x\n", tgt_id);
1706
1707 fcport = qlafx00_get_fcport(vha, tgt_id);
1708 if (!fcport)
1709 return;
1710
1711 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1712
1713 return;
1714}
1715
1716int
1717qlafx00_process_aen(struct scsi_qla_host *vha, struct qla_work_evt *evt)
1718{
1719 int rval = 0;
1720 uint32_t aen_code, aen_data;
1721
1722 aen_code = FCH_EVT_VENDOR_UNIQUE;
1723 aen_data = evt->u.aenfx.evtcode;
1724
1725 switch (evt->u.aenfx.evtcode) {
1726 case QLAFX00_MBA_PORT_UPDATE: /* Port database update */
1727 if (evt->u.aenfx.mbx[1] == 0) {
1728 if (evt->u.aenfx.mbx[2] == 1) {
1729 if (!vha->flags.fw_tgt_reported)
1730 vha->flags.fw_tgt_reported = 1;
1731 atomic_set(&vha->loop_down_timer, 0);
1732 atomic_set(&vha->loop_state, LOOP_UP);
1733 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1734 qla2xxx_wake_dpc(vha);
1735 } else if (evt->u.aenfx.mbx[2] == 2) {
1736 qlafx00_tgt_detach(vha, evt->u.aenfx.mbx[3]);
1737 }
1738 } else if (evt->u.aenfx.mbx[1] == 0xffff) {
1739 if (evt->u.aenfx.mbx[2] == 1) {
1740 if (!vha->flags.fw_tgt_reported)
1741 vha->flags.fw_tgt_reported = 1;
1742 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1743 } else if (evt->u.aenfx.mbx[2] == 2) {
1744 vha->device_flags |= DFLG_NO_CABLE;
1745 qla2x00_mark_all_devices_lost(vha, 1);
1746 }
1747 }
1748 break;
1749 case QLAFX00_MBA_LINK_UP:
1750 aen_code = FCH_EVT_LINKUP;
1751 aen_data = 0;
1752 break;
1753 case QLAFX00_MBA_LINK_DOWN:
1754 aen_code = FCH_EVT_LINKDOWN;
1755 aen_data = 0;
1756 break;
Armen Baloyan71e56002013-08-27 01:37:38 -04001757 case QLAFX00_MBA_TEMP_OVER:
1758 case QLAFX00_MBA_TEMP_CRIT: /* Critical temperature event */
1759 ql_log(ql_log_info, vha, 0x5082,
1760 "Process critical temperature event "
1761 "aenmb[0]: %x\n",
1762 evt->u.aenfx.evtcode);
1763 scsi_block_requests(vha->host);
1764 qlafx00_abort_isp_cleanup(vha, true);
1765 scsi_unblock_requests(vha->host);
1766 break;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001767 }
1768
1769 fc_host_post_event(vha->host, fc_get_event_number(),
1770 aen_code, aen_data);
1771
1772 return rval;
1773}
1774
1775static void
1776qlafx00_update_host_attr(scsi_qla_host_t *vha, struct port_info_data *pinfo)
1777{
1778 u64 port_name = 0, node_name = 0;
1779
1780 port_name = (unsigned long long)wwn_to_u64(pinfo->port_name);
1781 node_name = (unsigned long long)wwn_to_u64(pinfo->node_name);
1782
1783 fc_host_node_name(vha->host) = node_name;
1784 fc_host_port_name(vha->host) = port_name;
1785 if (!pinfo->port_type)
1786 vha->hw->current_topology = ISP_CFG_F;
1787 if (pinfo->link_status == QLAFX00_LINK_STATUS_UP)
1788 atomic_set(&vha->loop_state, LOOP_READY);
1789 else if (pinfo->link_status == QLAFX00_LINK_STATUS_DOWN)
1790 atomic_set(&vha->loop_state, LOOP_DOWN);
1791 vha->hw->link_data_rate = (uint16_t)pinfo->link_config;
1792}
1793
1794static void
1795qla2x00_fxdisc_iocb_timeout(void *data)
1796{
1797 srb_t *sp = (srb_t *)data;
1798 struct srb_iocb *lio = &sp->u.iocb_cmd;
1799
1800 complete(&lio->u.fxiocb.fxiocb_comp);
1801}
1802
1803static void
1804qla2x00_fxdisc_sp_done(void *data, void *ptr, int res)
1805{
1806 srb_t *sp = (srb_t *)ptr;
1807 struct srb_iocb *lio = &sp->u.iocb_cmd;
1808
1809 complete(&lio->u.fxiocb.fxiocb_comp);
1810}
1811
1812int
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04001813qlafx00_fx_disc(scsi_qla_host_t *vha, fc_port_t *fcport, uint16_t fx_type)
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001814{
1815 srb_t *sp;
1816 struct srb_iocb *fdisc;
1817 int rval = QLA_FUNCTION_FAILED;
1818 struct qla_hw_data *ha = vha->hw;
1819 struct host_system_info *phost_info;
1820 struct register_host_info *preg_hsi;
1821 struct new_utsname *p_sysid = NULL;
1822 struct timeval tv;
1823
1824 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1825 if (!sp)
1826 goto done;
1827
1828 fdisc = &sp->u.iocb_cmd;
1829 switch (fx_type) {
1830 case FXDISC_GET_CONFIG_INFO:
1831 fdisc->u.fxiocb.flags =
1832 SRB_FXDISC_RESP_DMA_VALID;
1833 fdisc->u.fxiocb.rsp_len = sizeof(struct config_info_data);
1834 break;
1835 case FXDISC_GET_PORT_INFO:
1836 fdisc->u.fxiocb.flags =
1837 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1838 fdisc->u.fxiocb.rsp_len = QLAFX00_PORT_DATA_INFO;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04001839 fdisc->u.fxiocb.req_data = cpu_to_le32(fcport->port_id);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001840 break;
1841 case FXDISC_GET_TGT_NODE_INFO:
1842 fdisc->u.fxiocb.flags =
1843 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1844 fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_INFO;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04001845 fdisc->u.fxiocb.req_data = cpu_to_le32(fcport->tgt_id);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001846 break;
1847 case FXDISC_GET_TGT_NODE_LIST:
1848 fdisc->u.fxiocb.flags =
1849 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1850 fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_LIST_SIZE;
1851 break;
1852 case FXDISC_REG_HOST_INFO:
1853 fdisc->u.fxiocb.flags = SRB_FXDISC_REQ_DMA_VALID;
1854 fdisc->u.fxiocb.req_len = sizeof(struct register_host_info);
1855 p_sysid = utsname();
1856 if (!p_sysid) {
1857 ql_log(ql_log_warn, vha, 0x303c,
1858 "Not able to get the system informtion\n");
1859 goto done_free_sp;
1860 }
1861 break;
1862 default:
1863 break;
1864 }
1865
1866 if (fdisc->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) {
1867 fdisc->u.fxiocb.req_addr = dma_alloc_coherent(&ha->pdev->dev,
1868 fdisc->u.fxiocb.req_len,
1869 &fdisc->u.fxiocb.req_dma_handle, GFP_KERNEL);
1870 if (!fdisc->u.fxiocb.req_addr)
1871 goto done_free_sp;
1872
1873 if (fx_type == FXDISC_REG_HOST_INFO) {
1874 preg_hsi = (struct register_host_info *)
1875 fdisc->u.fxiocb.req_addr;
1876 phost_info = &preg_hsi->hsi;
1877 memset(preg_hsi, 0, sizeof(struct register_host_info));
1878 phost_info->os_type = OS_TYPE_LINUX;
1879 strncpy(phost_info->sysname,
1880 p_sysid->sysname, SYSNAME_LENGTH);
1881 strncpy(phost_info->nodename,
1882 p_sysid->nodename, NODENAME_LENGTH);
1883 strncpy(phost_info->release,
1884 p_sysid->release, RELEASE_LENGTH);
1885 strncpy(phost_info->version,
1886 p_sysid->version, VERSION_LENGTH);
1887 strncpy(phost_info->machine,
1888 p_sysid->machine, MACHINE_LENGTH);
1889 strncpy(phost_info->domainname,
1890 p_sysid->domainname, DOMNAME_LENGTH);
1891 strncpy(phost_info->hostdriver,
1892 QLA2XXX_VERSION, VERSION_LENGTH);
1893 do_gettimeofday(&tv);
1894 preg_hsi->utc = (uint64_t)tv.tv_sec;
1895 ql_dbg(ql_dbg_init, vha, 0x0149,
1896 "ISP%04X: Host registration with firmware\n",
1897 ha->pdev->device);
1898 ql_dbg(ql_dbg_init, vha, 0x014a,
1899 "os_type = '%d', sysname = '%s', nodname = '%s'\n",
1900 phost_info->os_type,
1901 phost_info->sysname,
1902 phost_info->nodename);
1903 ql_dbg(ql_dbg_init, vha, 0x014b,
1904 "release = '%s', version = '%s'\n",
1905 phost_info->release,
1906 phost_info->version);
1907 ql_dbg(ql_dbg_init, vha, 0x014c,
1908 "machine = '%s' "
1909 "domainname = '%s', hostdriver = '%s'\n",
1910 phost_info->machine,
1911 phost_info->domainname,
1912 phost_info->hostdriver);
1913 ql_dump_buffer(ql_dbg_init + ql_dbg_disc, vha, 0x014d,
1914 (uint8_t *)phost_info,
1915 sizeof(struct host_system_info));
1916 }
1917 }
1918
1919 if (fdisc->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) {
1920 fdisc->u.fxiocb.rsp_addr = dma_alloc_coherent(&ha->pdev->dev,
1921 fdisc->u.fxiocb.rsp_len,
1922 &fdisc->u.fxiocb.rsp_dma_handle, GFP_KERNEL);
1923 if (!fdisc->u.fxiocb.rsp_addr)
1924 goto done_unmap_req;
1925 }
1926
1927 sp->type = SRB_FXIOCB_DCMD;
1928 sp->name = "fxdisc";
1929 qla2x00_init_timer(sp, FXDISC_TIMEOUT);
1930 fdisc->timeout = qla2x00_fxdisc_iocb_timeout;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04001931 fdisc->u.fxiocb.req_func_type = cpu_to_le16(fx_type);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001932 sp->done = qla2x00_fxdisc_sp_done;
1933
1934 rval = qla2x00_start_sp(sp);
1935 if (rval != QLA_SUCCESS)
1936 goto done_unmap_dma;
1937
1938 wait_for_completion(&fdisc->u.fxiocb.fxiocb_comp);
1939
1940 if (fx_type == FXDISC_GET_CONFIG_INFO) {
1941 struct config_info_data *pinfo =
1942 (struct config_info_data *) fdisc->u.fxiocb.rsp_addr;
1943 memcpy(&vha->hw->mr.product_name, pinfo->product_name,
1944 sizeof(vha->hw->mr.product_name));
1945 memcpy(&vha->hw->mr.symbolic_name, pinfo->symbolic_name,
1946 sizeof(vha->hw->mr.symbolic_name));
1947 memcpy(&vha->hw->mr.serial_num, pinfo->serial_num,
1948 sizeof(vha->hw->mr.serial_num));
1949 memcpy(&vha->hw->mr.hw_version, pinfo->hw_version,
1950 sizeof(vha->hw->mr.hw_version));
1951 memcpy(&vha->hw->mr.fw_version, pinfo->fw_version,
1952 sizeof(vha->hw->mr.fw_version));
1953 strim(vha->hw->mr.fw_version);
1954 memcpy(&vha->hw->mr.uboot_version, pinfo->uboot_version,
1955 sizeof(vha->hw->mr.uboot_version));
1956 memcpy(&vha->hw->mr.fru_serial_num, pinfo->fru_serial_num,
1957 sizeof(vha->hw->mr.fru_serial_num));
Armen Baloyan71e56002013-08-27 01:37:38 -04001958 vha->hw->mr.critical_temperature = pinfo->nominal_temp_value;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001959 } else if (fx_type == FXDISC_GET_PORT_INFO) {
1960 struct port_info_data *pinfo =
1961 (struct port_info_data *) fdisc->u.fxiocb.rsp_addr;
1962 memcpy(vha->node_name, pinfo->node_name, WWN_SIZE);
1963 memcpy(vha->port_name, pinfo->port_name, WWN_SIZE);
1964 vha->d_id.b.domain = pinfo->port_id[0];
1965 vha->d_id.b.area = pinfo->port_id[1];
1966 vha->d_id.b.al_pa = pinfo->port_id[2];
1967 qlafx00_update_host_attr(vha, pinfo);
1968 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0141,
1969 (uint8_t *)pinfo, 16);
1970 } else if (fx_type == FXDISC_GET_TGT_NODE_INFO) {
1971 struct qlafx00_tgt_node_info *pinfo =
1972 (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr;
1973 memcpy(fcport->node_name, pinfo->tgt_node_wwnn, WWN_SIZE);
1974 memcpy(fcport->port_name, pinfo->tgt_node_wwpn, WWN_SIZE);
1975 fcport->port_type = FCT_TARGET;
1976 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0144,
1977 (uint8_t *)pinfo, 16);
1978 } else if (fx_type == FXDISC_GET_TGT_NODE_LIST) {
1979 struct qlafx00_tgt_node_info *pinfo =
1980 (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr;
1981 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0146,
1982 (uint8_t *)pinfo, 16);
1983 memcpy(vha->hw->gid_list, pinfo, QLAFX00_TGT_NODE_LIST_SIZE);
1984 }
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04001985 rval = le32_to_cpu(fdisc->u.fxiocb.result);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04001986
1987done_unmap_dma:
1988 if (fdisc->u.fxiocb.rsp_addr)
1989 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.rsp_len,
1990 fdisc->u.fxiocb.rsp_addr, fdisc->u.fxiocb.rsp_dma_handle);
1991
1992done_unmap_req:
1993 if (fdisc->u.fxiocb.req_addr)
1994 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.req_len,
1995 fdisc->u.fxiocb.req_addr, fdisc->u.fxiocb.req_dma_handle);
1996done_free_sp:
1997 sp->free(vha, sp);
1998done:
1999 return rval;
2000}
2001
2002static void
2003qlafx00_abort_iocb_timeout(void *data)
2004{
2005 srb_t *sp = (srb_t *)data;
2006 struct srb_iocb *abt = &sp->u.iocb_cmd;
2007
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002008 abt->u.abt.comp_status = cpu_to_le16((uint16_t)CS_TIMEOUT);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002009 complete(&abt->u.abt.comp);
2010}
2011
2012static void
2013qlafx00_abort_sp_done(void *data, void *ptr, int res)
2014{
2015 srb_t *sp = (srb_t *)ptr;
2016 struct srb_iocb *abt = &sp->u.iocb_cmd;
2017
2018 complete(&abt->u.abt.comp);
2019}
2020
2021static int
2022qlafx00_async_abt_cmd(srb_t *cmd_sp)
2023{
2024 scsi_qla_host_t *vha = cmd_sp->fcport->vha;
2025 fc_port_t *fcport = cmd_sp->fcport;
2026 struct srb_iocb *abt_iocb;
2027 srb_t *sp;
2028 int rval = QLA_FUNCTION_FAILED;
2029
2030 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
2031 if (!sp)
2032 goto done;
2033
2034 abt_iocb = &sp->u.iocb_cmd;
2035 sp->type = SRB_ABT_CMD;
2036 sp->name = "abort";
2037 qla2x00_init_timer(sp, FXDISC_TIMEOUT);
2038 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
2039 sp->done = qlafx00_abort_sp_done;
2040 abt_iocb->timeout = qlafx00_abort_iocb_timeout;
2041 init_completion(&abt_iocb->u.abt.comp);
2042
2043 rval = qla2x00_start_sp(sp);
2044 if (rval != QLA_SUCCESS)
2045 goto done_free_sp;
2046
2047 ql_dbg(ql_dbg_async, vha, 0x507c,
2048 "Abort command issued - hdl=%x, target_id=%x\n",
2049 cmd_sp->handle, fcport->tgt_id);
2050
2051 wait_for_completion(&abt_iocb->u.abt.comp);
2052
2053 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
2054 QLA_SUCCESS : QLA_FUNCTION_FAILED;
2055
2056done_free_sp:
2057 sp->free(vha, sp);
2058done:
2059 return rval;
2060}
2061
2062int
2063qlafx00_abort_command(srb_t *sp)
2064{
2065 unsigned long flags = 0;
2066
2067 uint32_t handle;
2068 fc_port_t *fcport = sp->fcport;
2069 struct scsi_qla_host *vha = fcport->vha;
2070 struct qla_hw_data *ha = vha->hw;
2071 struct req_que *req = vha->req;
2072
2073 spin_lock_irqsave(&ha->hardware_lock, flags);
2074 for (handle = 1; handle < DEFAULT_OUTSTANDING_COMMANDS; handle++) {
2075 if (req->outstanding_cmds[handle] == sp)
2076 break;
2077 }
2078 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2079 if (handle == DEFAULT_OUTSTANDING_COMMANDS) {
2080 /* Command not found. */
2081 return QLA_FUNCTION_FAILED;
2082 }
2083 return qlafx00_async_abt_cmd(sp);
2084}
2085
2086/*
2087 * qlafx00_initialize_adapter
2088 * Initialize board.
2089 *
2090 * Input:
2091 * ha = adapter block pointer.
2092 *
2093 * Returns:
2094 * 0 = success
2095 */
2096int
2097qlafx00_initialize_adapter(scsi_qla_host_t *vha)
2098{
2099 int rval;
2100 struct qla_hw_data *ha = vha->hw;
Armen Baloyan71e56002013-08-27 01:37:38 -04002101 uint32_t tempc;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002102
2103 /* Clear adapter flags. */
2104 vha->flags.online = 0;
2105 ha->flags.chip_reset_done = 0;
2106 vha->flags.reset_active = 0;
2107 ha->flags.pci_channel_io_perm_failure = 0;
2108 ha->flags.eeh_busy = 0;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002109 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2110 atomic_set(&vha->loop_state, LOOP_DOWN);
2111 vha->device_flags = DFLG_NO_CABLE;
2112 vha->dpc_flags = 0;
2113 vha->flags.management_server_logged_in = 0;
2114 vha->marker_needed = 0;
2115 ha->isp_abort_cnt = 0;
2116 ha->beacon_blink_led = 0;
2117
2118 set_bit(0, ha->req_qid_map);
2119 set_bit(0, ha->rsp_qid_map);
2120
2121 ql_dbg(ql_dbg_init, vha, 0x0147,
2122 "Configuring PCI space...\n");
2123
2124 rval = ha->isp_ops->pci_config(vha);
2125 if (rval) {
2126 ql_log(ql_log_warn, vha, 0x0148,
2127 "Unable to configure PCI space.\n");
2128 return rval;
2129 }
2130
2131 rval = qlafx00_init_fw_ready(vha);
2132 if (rval != QLA_SUCCESS)
2133 return rval;
2134
2135 qlafx00_save_queue_ptrs(vha);
2136
2137 rval = qlafx00_config_queues(vha);
2138 if (rval != QLA_SUCCESS)
2139 return rval;
2140
2141 /*
2142 * Allocate the array of outstanding commands
2143 * now that we know the firmware resources.
2144 */
2145 rval = qla2x00_alloc_outstanding_cmds(ha, vha->req);
2146 if (rval != QLA_SUCCESS)
2147 return rval;
2148
2149 rval = qla2x00_init_rings(vha);
2150 ha->flags.chip_reset_done = 1;
2151
Armen Baloyan71e56002013-08-27 01:37:38 -04002152 tempc = QLAFX00_GET_TEMPERATURE(ha);
2153 ql_dbg(ql_dbg_init, vha, 0x0152,
2154 "ISPFx00(%s): Critical temp timer, current SOC temperature: 0x%x\n",
2155 __func__, tempc);
2156
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002157 return rval;
2158}
2159
2160uint32_t
2161qlafx00_fw_state_show(struct device *dev, struct device_attribute *attr,
2162 char *buf)
2163{
2164 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
2165 int rval = QLA_FUNCTION_FAILED;
2166 uint32_t state[1];
2167
2168 if (qla2x00_reset_active(vha))
2169 ql_log(ql_log_warn, vha, 0x70ce,
2170 "ISP reset active.\n");
2171 else if (!vha->hw->flags.eeh_busy) {
2172 rval = qlafx00_get_firmware_state(vha, state);
2173 }
2174 if (rval != QLA_SUCCESS)
2175 memset(state, -1, sizeof(state));
2176
2177 return state[0];
2178}
2179
2180void
2181qlafx00_get_host_speed(struct Scsi_Host *shost)
2182{
2183 struct qla_hw_data *ha = ((struct scsi_qla_host *)
2184 (shost_priv(shost)))->hw;
2185 u32 speed = FC_PORTSPEED_UNKNOWN;
2186
2187 switch (ha->link_data_rate) {
2188 case QLAFX00_PORT_SPEED_2G:
2189 speed = FC_PORTSPEED_2GBIT;
2190 break;
2191 case QLAFX00_PORT_SPEED_4G:
2192 speed = FC_PORTSPEED_4GBIT;
2193 break;
2194 case QLAFX00_PORT_SPEED_8G:
2195 speed = FC_PORTSPEED_8GBIT;
2196 break;
2197 case QLAFX00_PORT_SPEED_10G:
2198 speed = FC_PORTSPEED_10GBIT;
2199 break;
2200 }
2201 fc_host_speed(shost) = speed;
2202}
2203
2204/** QLAFX00 specific ISR implementation functions */
2205
2206static inline void
2207qlafx00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
2208 uint32_t sense_len, struct rsp_que *rsp, int res)
2209{
2210 struct scsi_qla_host *vha = sp->fcport->vha;
2211 struct scsi_cmnd *cp = GET_CMD_SP(sp);
2212 uint32_t track_sense_len;
2213
2214 SET_FW_SENSE_LEN(sp, sense_len);
2215
2216 if (sense_len >= SCSI_SENSE_BUFFERSIZE)
2217 sense_len = SCSI_SENSE_BUFFERSIZE;
2218
2219 SET_CMD_SENSE_LEN(sp, sense_len);
2220 SET_CMD_SENSE_PTR(sp, cp->sense_buffer);
2221 track_sense_len = sense_len;
2222
2223 if (sense_len > par_sense_len)
2224 sense_len = par_sense_len;
2225
2226 memcpy(cp->sense_buffer, sense_data, sense_len);
2227
2228 SET_FW_SENSE_LEN(sp, GET_FW_SENSE_LEN(sp) - sense_len);
2229
2230 SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len);
2231 track_sense_len -= sense_len;
2232 SET_CMD_SENSE_LEN(sp, track_sense_len);
2233
2234 ql_dbg(ql_dbg_io, vha, 0x304d,
2235 "sense_len=0x%x par_sense_len=0x%x track_sense_len=0x%x.\n",
2236 sense_len, par_sense_len, track_sense_len);
2237 if (GET_FW_SENSE_LEN(sp) > 0) {
2238 rsp->status_srb = sp;
2239 cp->result = res;
2240 }
2241
2242 if (sense_len) {
2243 ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x3039,
2244 "Check condition Sense data, nexus%ld:%d:%d cmd=%p.\n",
2245 sp->fcport->vha->host_no, cp->device->id, cp->device->lun,
2246 cp);
2247 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3049,
2248 cp->sense_buffer, sense_len);
2249 }
2250}
2251
2252static void
2253qlafx00_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2254 struct tsk_mgmt_entry_fx00 *pkt, srb_t *sp,
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002255 __le16 sstatus, __le16 cpstatus)
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002256{
2257 struct srb_iocb *tmf;
2258
2259 tmf = &sp->u.iocb_cmd;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002260 if (cpstatus != cpu_to_le16((uint16_t)CS_COMPLETE) ||
2261 (sstatus & cpu_to_le16((uint16_t)SS_RESPONSE_INFO_LEN_VALID)))
2262 cpstatus = cpu_to_le16((uint16_t)CS_INCOMPLETE);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002263 tmf->u.tmf.comp_status = cpstatus;
2264 sp->done(vha, sp, 0);
2265}
2266
2267static void
2268qlafx00_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2269 struct abort_iocb_entry_fx00 *pkt)
2270{
2271 const char func[] = "ABT_IOCB";
2272 srb_t *sp;
2273 struct srb_iocb *abt;
2274
2275 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2276 if (!sp)
2277 return;
2278
2279 abt = &sp->u.iocb_cmd;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002280 abt->u.abt.comp_status = pkt->tgt_id_sts;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002281 sp->done(vha, sp, 0);
2282}
2283
2284static void
2285qlafx00_ioctl_iosb_entry(scsi_qla_host_t *vha, struct req_que *req,
2286 struct ioctl_iocb_entry_fx00 *pkt)
2287{
2288 const char func[] = "IOSB_IOCB";
2289 srb_t *sp;
2290 struct fc_bsg_job *bsg_job;
2291 struct srb_iocb *iocb_job;
2292 int res;
2293 struct qla_mt_iocb_rsp_fx00 fstatus;
2294 uint8_t *fw_sts_ptr;
2295
2296 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2297 if (!sp)
2298 return;
2299
2300 if (sp->type == SRB_FXIOCB_DCMD) {
2301 iocb_job = &sp->u.iocb_cmd;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002302 iocb_job->u.fxiocb.seq_number = pkt->seq_no;
2303 iocb_job->u.fxiocb.fw_flags = pkt->fw_iotcl_flags;
2304 iocb_job->u.fxiocb.result = pkt->status;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002305 if (iocb_job->u.fxiocb.flags & SRB_FXDISC_RSP_DWRD_VALID)
2306 iocb_job->u.fxiocb.req_data =
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002307 pkt->dataword_r;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002308 } else {
2309 bsg_job = sp->u.bsg_job;
2310
2311 memset(&fstatus, 0, sizeof(struct qla_mt_iocb_rsp_fx00));
2312
2313 fstatus.reserved_1 = pkt->reserved_0;
2314 fstatus.func_type = pkt->comp_func_num;
2315 fstatus.ioctl_flags = pkt->fw_iotcl_flags;
2316 fstatus.ioctl_data = pkt->dataword_r;
2317 fstatus.adapid = pkt->adapid;
2318 fstatus.adapid_hi = pkt->adapid_hi;
2319 fstatus.reserved_2 = pkt->reserved_1;
2320 fstatus.res_count = pkt->residuallen;
2321 fstatus.status = pkt->status;
2322 fstatus.seq_number = pkt->seq_no;
2323 memcpy(fstatus.reserved_3,
2324 pkt->reserved_2, 20 * sizeof(uint8_t));
2325
2326 fw_sts_ptr = ((uint8_t *)bsg_job->req->sense) +
2327 sizeof(struct fc_bsg_reply);
2328
2329 memcpy(fw_sts_ptr, (uint8_t *)&fstatus,
2330 sizeof(struct qla_mt_iocb_rsp_fx00));
2331 bsg_job->reply_len = sizeof(struct fc_bsg_reply) +
2332 sizeof(struct qla_mt_iocb_rsp_fx00) + sizeof(uint8_t);
2333
2334 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
2335 sp->fcport->vha, 0x5080,
2336 (uint8_t *)pkt, sizeof(struct ioctl_iocb_entry_fx00));
2337
2338 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
2339 sp->fcport->vha, 0x5074,
2340 (uint8_t *)fw_sts_ptr, sizeof(struct qla_mt_iocb_rsp_fx00));
2341
2342 res = bsg_job->reply->result = DID_OK << 16;
2343 bsg_job->reply->reply_payload_rcv_len =
2344 bsg_job->reply_payload.payload_len;
2345 }
2346 sp->done(vha, sp, res);
2347}
2348
2349/**
2350 * qlafx00_status_entry() - Process a Status IOCB entry.
2351 * @ha: SCSI driver HA context
2352 * @pkt: Entry pointer
2353 */
2354static void
2355qlafx00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
2356{
2357 srb_t *sp;
2358 fc_port_t *fcport;
2359 struct scsi_cmnd *cp;
2360 struct sts_entry_fx00 *sts;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002361 __le16 comp_status;
2362 __le16 scsi_status;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002363 uint16_t ox_id;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002364 __le16 lscsi_status;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002365 int32_t resid;
2366 uint32_t sense_len, par_sense_len, rsp_info_len, resid_len,
2367 fw_resid_len;
2368 uint8_t *rsp_info = NULL, *sense_data = NULL;
2369 struct qla_hw_data *ha = vha->hw;
2370 uint32_t hindex, handle;
2371 uint16_t que;
2372 struct req_que *req;
2373 int logit = 1;
2374 int res = 0;
2375
2376 sts = (struct sts_entry_fx00 *) pkt;
2377
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002378 comp_status = sts->comp_status;
2379 scsi_status = sts->scsi_status & cpu_to_le16((uint16_t)SS_MASK);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002380 hindex = sts->handle;
2381 handle = LSW(hindex);
2382
2383 que = MSW(hindex);
2384 req = ha->req_q_map[que];
2385
2386 /* Validate handle. */
2387 if (handle < req->num_outstanding_cmds)
2388 sp = req->outstanding_cmds[handle];
2389 else
2390 sp = NULL;
2391
2392 if (sp == NULL) {
2393 ql_dbg(ql_dbg_io, vha, 0x3034,
2394 "Invalid status handle (0x%x).\n", handle);
2395
2396 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2397 qla2xxx_wake_dpc(vha);
2398 return;
2399 }
2400
2401 if (sp->type == SRB_TM_CMD) {
2402 req->outstanding_cmds[handle] = NULL;
2403 qlafx00_tm_iocb_entry(vha, req, pkt, sp,
2404 scsi_status, comp_status);
2405 return;
2406 }
2407
2408 /* Fast path completion. */
2409 if (comp_status == CS_COMPLETE && scsi_status == 0) {
2410 qla2x00_do_host_ramp_up(vha);
2411 qla2x00_process_completed_request(vha, req, handle);
2412 return;
2413 }
2414
2415 req->outstanding_cmds[handle] = NULL;
2416 cp = GET_CMD_SP(sp);
2417 if (cp == NULL) {
2418 ql_dbg(ql_dbg_io, vha, 0x3048,
2419 "Command already returned (0x%x/%p).\n",
2420 handle, sp);
2421
2422 return;
2423 }
2424
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002425 lscsi_status = scsi_status & cpu_to_le16((uint16_t)STATUS_MASK);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002426
2427 fcport = sp->fcport;
2428
2429 ox_id = 0;
2430 sense_len = par_sense_len = rsp_info_len = resid_len =
2431 fw_resid_len = 0;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002432 if (scsi_status & cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID))
2433 sense_len = sts->sense_len;
2434 if (scsi_status & cpu_to_le16(((uint16_t)SS_RESIDUAL_UNDER
2435 | (uint16_t)SS_RESIDUAL_OVER)))
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002436 resid_len = le32_to_cpu(sts->residual_len);
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002437 if (comp_status == cpu_to_le16((uint16_t)CS_DATA_UNDERRUN))
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002438 fw_resid_len = le32_to_cpu(sts->residual_len);
2439 rsp_info = sense_data = sts->data;
2440 par_sense_len = sizeof(sts->data);
2441
2442 /* Check for overrun. */
2443 if (comp_status == CS_COMPLETE &&
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002444 scsi_status & cpu_to_le16((uint16_t)SS_RESIDUAL_OVER))
2445 comp_status = cpu_to_le16((uint16_t)CS_DATA_OVERRUN);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002446
2447 /*
2448 * Based on Host and scsi status generate status code for Linux
2449 */
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002450 switch (le16_to_cpu(comp_status)) {
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002451 case CS_COMPLETE:
2452 case CS_QUEUE_FULL:
2453 if (scsi_status == 0) {
2454 res = DID_OK << 16;
2455 break;
2456 }
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002457 if (scsi_status & cpu_to_le16(((uint16_t)SS_RESIDUAL_UNDER
2458 | (uint16_t)SS_RESIDUAL_OVER))) {
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002459 resid = resid_len;
2460 scsi_set_resid(cp, resid);
2461
2462 if (!lscsi_status &&
2463 ((unsigned)(scsi_bufflen(cp) - resid) <
2464 cp->underflow)) {
2465 ql_dbg(ql_dbg_io, fcport->vha, 0x3050,
2466 "Mid-layer underflow "
2467 "detected (0x%x of 0x%x bytes).\n",
2468 resid, scsi_bufflen(cp));
2469
2470 res = DID_ERROR << 16;
2471 break;
2472 }
2473 }
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002474 res = DID_OK << 16 | le16_to_cpu(lscsi_status);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002475
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002476 if (lscsi_status ==
2477 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL)) {
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002478 ql_dbg(ql_dbg_io, fcport->vha, 0x3051,
2479 "QUEUE FULL detected.\n");
2480 break;
2481 }
2482 logit = 0;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002483 if (lscsi_status != cpu_to_le16((uint16_t)SS_CHECK_CONDITION))
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002484 break;
2485
2486 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002487 if (!(scsi_status & cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID)))
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002488 break;
2489
2490 qlafx00_handle_sense(sp, sense_data, par_sense_len, sense_len,
2491 rsp, res);
2492 break;
2493
2494 case CS_DATA_UNDERRUN:
2495 /* Use F/W calculated residual length. */
2496 if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
2497 resid = fw_resid_len;
2498 else
2499 resid = resid_len;
2500 scsi_set_resid(cp, resid);
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002501 if (scsi_status & cpu_to_le16((uint16_t)SS_RESIDUAL_UNDER)) {
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002502 if ((IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
2503 && fw_resid_len != resid_len) {
2504 ql_dbg(ql_dbg_io, fcport->vha, 0x3052,
2505 "Dropped frame(s) detected "
2506 "(0x%x of 0x%x bytes).\n",
2507 resid, scsi_bufflen(cp));
2508
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002509 res = DID_ERROR << 16 |
2510 le16_to_cpu(lscsi_status);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002511 goto check_scsi_status;
2512 }
2513
2514 if (!lscsi_status &&
2515 ((unsigned)(scsi_bufflen(cp) - resid) <
2516 cp->underflow)) {
2517 ql_dbg(ql_dbg_io, fcport->vha, 0x3053,
2518 "Mid-layer underflow "
2519 "detected (0x%x of 0x%x bytes, "
2520 "cp->underflow: 0x%x).\n",
2521 resid, scsi_bufflen(cp), cp->underflow);
2522
2523 res = DID_ERROR << 16;
2524 break;
2525 }
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002526 } else if (lscsi_status !=
2527 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL) &&
2528 lscsi_status != cpu_to_le16((uint16_t)SAM_STAT_BUSY)) {
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002529 /*
2530 * scsi status of task set and busy are considered
2531 * to be task not completed.
2532 */
2533
2534 ql_dbg(ql_dbg_io, fcport->vha, 0x3054,
2535 "Dropped frame(s) detected (0x%x "
2536 "of 0x%x bytes).\n", resid,
2537 scsi_bufflen(cp));
2538
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002539 res = DID_ERROR << 16 | le16_to_cpu(lscsi_status);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002540 goto check_scsi_status;
2541 } else {
2542 ql_dbg(ql_dbg_io, fcport->vha, 0x3055,
2543 "scsi_status: 0x%x, lscsi_status: 0x%x\n",
2544 scsi_status, lscsi_status);
2545 }
2546
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002547 res = DID_OK << 16 | le16_to_cpu(lscsi_status);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002548 logit = 0;
2549
2550check_scsi_status:
2551 /*
2552 * Check to see if SCSI Status is non zero. If so report SCSI
2553 * Status.
2554 */
2555 if (lscsi_status != 0) {
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002556 if (lscsi_status ==
2557 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL)) {
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002558 ql_dbg(ql_dbg_io, fcport->vha, 0x3056,
2559 "QUEUE FULL detected.\n");
2560 logit = 1;
2561 break;
2562 }
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002563 if (lscsi_status !=
2564 cpu_to_le16((uint16_t)SS_CHECK_CONDITION))
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002565 break;
2566
2567 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002568 if (!(scsi_status &
2569 cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID)))
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002570 break;
2571
2572 qlafx00_handle_sense(sp, sense_data, par_sense_len,
2573 sense_len, rsp, res);
2574 }
2575 break;
2576
2577 case CS_PORT_LOGGED_OUT:
2578 case CS_PORT_CONFIG_CHG:
2579 case CS_PORT_BUSY:
2580 case CS_INCOMPLETE:
2581 case CS_PORT_UNAVAILABLE:
2582 case CS_TIMEOUT:
2583 case CS_RESET:
2584
2585 /*
2586 * We are going to have the fc class block the rport
2587 * while we try to recover so instruct the mid layer
2588 * to requeue until the class decides how to handle this.
2589 */
2590 res = DID_TRANSPORT_DISRUPTED << 16;
2591
2592 ql_dbg(ql_dbg_io, fcport->vha, 0x3057,
2593 "Port down status: port-state=0x%x.\n",
2594 atomic_read(&fcport->state));
2595
2596 if (atomic_read(&fcport->state) == FCS_ONLINE)
2597 qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1);
2598 break;
2599
2600 case CS_ABORTED:
2601 res = DID_RESET << 16;
2602 break;
2603
2604 default:
2605 res = DID_ERROR << 16;
2606 break;
2607 }
2608
2609 if (logit)
2610 ql_dbg(ql_dbg_io, fcport->vha, 0x3058,
Oleksandr Khoshaba7b833552013-08-27 01:37:27 -04002611 "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%d "
2612 "tgt_id: 0x%x lscsi_status: 0x%x cdb=%10phN len=0x%x "
2613 "rsp_info=0x%x resid=0x%x fw_resid=0x%x sense_len=0x%x, "
2614 "par_sense_len=0x%x, rsp_info_len=0x%x\n",
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002615 comp_status, scsi_status, res, vha->host_no,
2616 cp->device->id, cp->device->lun, fcport->tgt_id,
Oleksandr Khoshaba7b833552013-08-27 01:37:27 -04002617 lscsi_status, cp->cmnd, scsi_bufflen(cp),
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002618 rsp_info_len, resid_len, fw_resid_len, sense_len,
2619 par_sense_len, rsp_info_len);
2620
2621 if (!res)
2622 qla2x00_do_host_ramp_up(vha);
2623
2624 if (rsp->status_srb == NULL)
2625 sp->done(ha, sp, res);
2626}
2627
2628/**
2629 * qlafx00_status_cont_entry() - Process a Status Continuations entry.
2630 * @ha: SCSI driver HA context
2631 * @pkt: Entry pointer
2632 *
2633 * Extended sense data.
2634 */
2635static void
2636qlafx00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt)
2637{
2638 uint8_t sense_sz = 0;
2639 struct qla_hw_data *ha = rsp->hw;
2640 struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
2641 srb_t *sp = rsp->status_srb;
2642 struct scsi_cmnd *cp;
2643 uint32_t sense_len;
2644 uint8_t *sense_ptr;
2645
2646 if (!sp) {
2647 ql_dbg(ql_dbg_io, vha, 0x3037,
2648 "no SP, sp = %p\n", sp);
2649 return;
2650 }
2651
2652 if (!GET_FW_SENSE_LEN(sp)) {
2653 ql_dbg(ql_dbg_io, vha, 0x304b,
2654 "no fw sense data, sp = %p\n", sp);
2655 return;
2656 }
2657 cp = GET_CMD_SP(sp);
2658 if (cp == NULL) {
2659 ql_log(ql_log_warn, vha, 0x303b,
2660 "cmd is NULL: already returned to OS (sp=%p).\n", sp);
2661
2662 rsp->status_srb = NULL;
2663 return;
2664 }
2665
2666 if (!GET_CMD_SENSE_LEN(sp)) {
2667 ql_dbg(ql_dbg_io, vha, 0x304c,
2668 "no sense data, sp = %p\n", sp);
2669 } else {
2670 sense_len = GET_CMD_SENSE_LEN(sp);
2671 sense_ptr = GET_CMD_SENSE_PTR(sp);
2672 ql_dbg(ql_dbg_io, vha, 0x304f,
2673 "sp=%p sense_len=0x%x sense_ptr=%p.\n",
2674 sp, sense_len, sense_ptr);
2675
2676 if (sense_len > sizeof(pkt->data))
2677 sense_sz = sizeof(pkt->data);
2678 else
2679 sense_sz = sense_len;
2680
2681 /* Move sense data. */
2682 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304e,
2683 (uint8_t *)pkt, sizeof(sts_cont_entry_t));
2684 memcpy(sense_ptr, pkt->data, sense_sz);
2685 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304a,
2686 sense_ptr, sense_sz);
2687
2688 sense_len -= sense_sz;
2689 sense_ptr += sense_sz;
2690
2691 SET_CMD_SENSE_PTR(sp, sense_ptr);
2692 SET_CMD_SENSE_LEN(sp, sense_len);
2693 }
2694 sense_len = GET_FW_SENSE_LEN(sp);
2695 sense_len = (sense_len > sizeof(pkt->data)) ?
2696 (sense_len - sizeof(pkt->data)) : 0;
2697 SET_FW_SENSE_LEN(sp, sense_len);
2698
2699 /* Place command on done queue. */
2700 if (sense_len == 0) {
2701 rsp->status_srb = NULL;
2702 sp->done(ha, sp, cp->result);
2703 }
2704}
2705
2706/**
2707 * qlafx00_multistatus_entry() - Process Multi response queue entries.
2708 * @ha: SCSI driver HA context
2709 */
2710static void
2711qlafx00_multistatus_entry(struct scsi_qla_host *vha,
2712 struct rsp_que *rsp, void *pkt)
2713{
2714 srb_t *sp;
2715 struct multi_sts_entry_fx00 *stsmfx;
2716 struct qla_hw_data *ha = vha->hw;
2717 uint32_t handle, hindex, handle_count, i;
2718 uint16_t que;
2719 struct req_que *req;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002720 __le32 *handle_ptr;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002721
2722 stsmfx = (struct multi_sts_entry_fx00 *) pkt;
2723
2724 handle_count = stsmfx->handle_count;
2725
2726 if (handle_count > MAX_HANDLE_COUNT) {
2727 ql_dbg(ql_dbg_io, vha, 0x3035,
2728 "Invalid handle count (0x%x).\n", handle_count);
2729 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2730 qla2xxx_wake_dpc(vha);
2731 return;
2732 }
2733
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002734 handle_ptr = &stsmfx->handles[0];
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002735
2736 for (i = 0; i < handle_count; i++) {
2737 hindex = le32_to_cpu(*handle_ptr);
2738 handle = LSW(hindex);
2739 que = MSW(hindex);
2740 req = ha->req_q_map[que];
2741
2742 /* Validate handle. */
2743 if (handle < req->num_outstanding_cmds)
2744 sp = req->outstanding_cmds[handle];
2745 else
2746 sp = NULL;
2747
2748 if (sp == NULL) {
2749 ql_dbg(ql_dbg_io, vha, 0x3044,
2750 "Invalid status handle (0x%x).\n", handle);
2751 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2752 qla2xxx_wake_dpc(vha);
2753 return;
2754 }
2755 qla2x00_process_completed_request(vha, req, handle);
2756 handle_ptr++;
2757 }
2758}
2759
2760/**
2761 * qlafx00_error_entry() - Process an error entry.
2762 * @ha: SCSI driver HA context
2763 * @pkt: Entry pointer
2764 */
2765static void
2766qlafx00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp,
2767 struct sts_entry_fx00 *pkt, uint8_t estatus, uint8_t etype)
2768{
2769 srb_t *sp;
2770 struct qla_hw_data *ha = vha->hw;
2771 const char func[] = "ERROR-IOCB";
2772 uint16_t que = MSW(pkt->handle);
2773 struct req_que *req = NULL;
2774 int res = DID_ERROR << 16;
2775
2776 ql_dbg(ql_dbg_async, vha, 0x507f,
2777 "type of error status in response: 0x%x\n", estatus);
2778
2779 req = ha->req_q_map[que];
2780
2781 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2782 if (sp) {
2783 sp->done(ha, sp, res);
2784 return;
2785 }
2786
2787 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2788 qla2xxx_wake_dpc(vha);
2789}
2790
2791/**
2792 * qlafx00_process_response_queue() - Process response queue entries.
2793 * @ha: SCSI driver HA context
2794 */
2795static void
2796qlafx00_process_response_queue(struct scsi_qla_host *vha,
2797 struct rsp_que *rsp)
2798{
2799 struct sts_entry_fx00 *pkt;
2800 response_t *lptr;
2801
2802 if (!vha->flags.online)
2803 return;
2804
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002805 while (RD_REG_DWORD((void __iomem *)&(rsp->ring_ptr->signature)) !=
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002806 RESPONSE_PROCESSED) {
2807 lptr = rsp->ring_ptr;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002808 memcpy_fromio(rsp->rsp_pkt, (void __iomem *)lptr,
2809 sizeof(rsp->rsp_pkt));
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002810 pkt = (struct sts_entry_fx00 *)rsp->rsp_pkt;
2811
2812 rsp->ring_index++;
2813 if (rsp->ring_index == rsp->length) {
2814 rsp->ring_index = 0;
2815 rsp->ring_ptr = rsp->ring;
2816 } else {
2817 rsp->ring_ptr++;
2818 }
2819
2820 if (pkt->entry_status != 0 &&
2821 pkt->entry_type != IOCTL_IOSB_TYPE_FX00) {
2822 qlafx00_error_entry(vha, rsp,
2823 (struct sts_entry_fx00 *)pkt, pkt->entry_status,
2824 pkt->entry_type);
2825 goto next_iter;
2826 continue;
2827 }
2828
2829 switch (pkt->entry_type) {
2830 case STATUS_TYPE_FX00:
2831 qlafx00_status_entry(vha, rsp, pkt);
2832 break;
2833
2834 case STATUS_CONT_TYPE_FX00:
2835 qlafx00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
2836 break;
2837
2838 case MULTI_STATUS_TYPE_FX00:
2839 qlafx00_multistatus_entry(vha, rsp, pkt);
2840 break;
2841
2842 case ABORT_IOCB_TYPE_FX00:
2843 qlafx00_abort_iocb_entry(vha, rsp->req,
2844 (struct abort_iocb_entry_fx00 *)pkt);
2845 break;
2846
2847 case IOCTL_IOSB_TYPE_FX00:
2848 qlafx00_ioctl_iosb_entry(vha, rsp->req,
2849 (struct ioctl_iocb_entry_fx00 *)pkt);
2850 break;
2851 default:
2852 /* Type Not Supported. */
2853 ql_dbg(ql_dbg_async, vha, 0x5081,
2854 "Received unknown response pkt type %x "
2855 "entry status=%x.\n",
2856 pkt->entry_type, pkt->entry_status);
2857 break;
2858 }
2859next_iter:
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04002860 WRT_REG_DWORD((void __iomem *)&lptr->signature,
2861 RESPONSE_PROCESSED);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002862 wmb();
2863 }
2864
2865 /* Adjust ring index */
2866 WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index);
2867}
2868
2869/**
2870 * qlafx00_async_event() - Process aynchronous events.
2871 * @ha: SCSI driver HA context
2872 */
2873static void
2874qlafx00_async_event(scsi_qla_host_t *vha)
2875{
2876 struct qla_hw_data *ha = vha->hw;
2877 struct device_reg_fx00 __iomem *reg;
2878 int data_size = 1;
2879
2880 reg = &ha->iobase->ispfx00;
2881 /* Setup to process RIO completion. */
2882 switch (ha->aenmb[0]) {
2883 case QLAFX00_MBA_SYSTEM_ERR: /* System Error */
2884 ql_log(ql_log_warn, vha, 0x5079,
2885 "ISP System Error - mbx1=%x\n", ha->aenmb[0]);
2886 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2887 break;
2888
2889 case QLAFX00_MBA_SHUTDOWN_RQSTD: /* Shutdown requested */
2890 ql_dbg(ql_dbg_async, vha, 0x5076,
2891 "Asynchronous FW shutdown requested.\n");
2892 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2893 qla2xxx_wake_dpc(vha);
2894 break;
2895
2896 case QLAFX00_MBA_PORT_UPDATE: /* Port database update */
2897 ha->aenmb[1] = RD_REG_WORD(&reg->aenmailbox1);
2898 ha->aenmb[2] = RD_REG_WORD(&reg->aenmailbox2);
2899 ha->aenmb[3] = RD_REG_WORD(&reg->aenmailbox3);
2900 ql_dbg(ql_dbg_async, vha, 0x5077,
2901 "Asynchronous port Update received "
2902 "aenmb[0]: %x, aenmb[1]: %x, aenmb[2]: %x, aenmb[3]: %x\n",
2903 ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3]);
2904 data_size = 4;
2905 break;
Armen Baloyan71e56002013-08-27 01:37:38 -04002906
2907 case QLAFX00_MBA_TEMP_OVER: /* Over temperature event */
2908 case QLAFX00_MBA_TEMP_CRIT: /* Critical temperature event */
2909 ql_log(ql_log_info, vha, 0x5083,
2910 "Asynchronous critical temperature event received "
2911 "aenmb[0]: %x\n",
2912 ha->aenmb[0]);
2913 qlafx00_post_aenfx_work(vha, ha->aenmb[0],
2914 (uint32_t *)ha->aenmb, 1);
2915 break;
2916
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04002917 default:
2918 ha->aenmb[1] = RD_REG_WORD(&reg->aenmailbox1);
2919 ha->aenmb[2] = RD_REG_WORD(&reg->aenmailbox2);
2920 ha->aenmb[3] = RD_REG_WORD(&reg->aenmailbox3);
2921 ha->aenmb[4] = RD_REG_WORD(&reg->aenmailbox4);
2922 ha->aenmb[5] = RD_REG_WORD(&reg->aenmailbox5);
2923 ha->aenmb[6] = RD_REG_WORD(&reg->aenmailbox6);
2924 ha->aenmb[7] = RD_REG_WORD(&reg->aenmailbox7);
2925 ql_dbg(ql_dbg_async, vha, 0x5078,
2926 "AEN:%04x %04x %04x %04x :%04x %04x %04x %04x\n",
2927 ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3],
2928 ha->aenmb[4], ha->aenmb[5], ha->aenmb[6], ha->aenmb[7]);
2929 break;
2930 }
2931 qlafx00_post_aenfx_work(vha, ha->aenmb[0],
2932 (uint32_t *)ha->aenmb, data_size);
2933}
2934
2935/**
2936 *
2937 * qlafx00x_mbx_completion() - Process mailbox command completions.
2938 * @ha: SCSI driver HA context
2939 * @mb16: Mailbox16 register
2940 */
2941static void
2942qlafx00_mbx_completion(scsi_qla_host_t *vha, uint32_t mb0)
2943{
2944 uint16_t cnt;
2945 uint16_t __iomem *wptr;
2946 struct qla_hw_data *ha = vha->hw;
2947 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
2948
2949 if (!ha->mcp32)
2950 ql_dbg(ql_dbg_async, vha, 0x507e, "MBX pointer ERROR.\n");
2951
2952 /* Load return mailbox registers. */
2953 ha->flags.mbox_int = 1;
2954 ha->mailbox_out32[0] = mb0;
2955 wptr = (uint16_t __iomem *)&reg->mailbox17;
2956
2957 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
2958 ha->mailbox_out32[cnt] = RD_REG_WORD(wptr);
2959 wptr++;
2960 }
2961}
2962
2963/**
2964 * qlafx00_intr_handler() - Process interrupts for the ISPFX00.
2965 * @irq:
2966 * @dev_id: SCSI driver HA context
2967 *
2968 * Called by system whenever the host adapter generates an interrupt.
2969 *
2970 * Returns handled flag.
2971 */
2972irqreturn_t
2973qlafx00_intr_handler(int irq, void *dev_id)
2974{
2975 scsi_qla_host_t *vha;
2976 struct qla_hw_data *ha;
2977 struct device_reg_fx00 __iomem *reg;
2978 int status;
2979 unsigned long iter;
2980 uint32_t stat;
2981 uint32_t mb[8];
2982 struct rsp_que *rsp;
2983 unsigned long flags;
2984 uint32_t clr_intr = 0;
2985
2986 rsp = (struct rsp_que *) dev_id;
2987 if (!rsp) {
2988 ql_log(ql_log_info, NULL, 0x507d,
2989 "%s: NULL response queue pointer.\n", __func__);
2990 return IRQ_NONE;
2991 }
2992
2993 ha = rsp->hw;
2994 reg = &ha->iobase->ispfx00;
2995 status = 0;
2996
2997 if (unlikely(pci_channel_offline(ha->pdev)))
2998 return IRQ_HANDLED;
2999
3000 spin_lock_irqsave(&ha->hardware_lock, flags);
3001 vha = pci_get_drvdata(ha->pdev);
3002 for (iter = 50; iter--; clr_intr = 0) {
3003 stat = QLAFX00_RD_INTR_REG(ha);
3004 if ((stat & QLAFX00_HST_INT_STS_BITS) == 0)
3005 break;
3006
3007 switch (stat & QLAFX00_HST_INT_STS_BITS) {
3008 case QLAFX00_INTR_MB_CMPLT:
3009 case QLAFX00_INTR_MB_RSP_CMPLT:
3010 case QLAFX00_INTR_MB_ASYNC_CMPLT:
3011 case QLAFX00_INTR_ALL_CMPLT:
3012 mb[0] = RD_REG_WORD(&reg->mailbox16);
3013 qlafx00_mbx_completion(vha, mb[0]);
3014 status |= MBX_INTERRUPT;
3015 clr_intr |= QLAFX00_INTR_MB_CMPLT;
3016 break;
3017 case QLAFX00_INTR_ASYNC_CMPLT:
3018 case QLAFX00_INTR_RSP_ASYNC_CMPLT:
3019 ha->aenmb[0] = RD_REG_WORD(&reg->aenmailbox0);
3020 qlafx00_async_event(vha);
3021 clr_intr |= QLAFX00_INTR_ASYNC_CMPLT;
3022 break;
3023 case QLAFX00_INTR_RSP_CMPLT:
3024 qlafx00_process_response_queue(vha, rsp);
3025 clr_intr |= QLAFX00_INTR_RSP_CMPLT;
3026 break;
3027 default:
3028 ql_dbg(ql_dbg_async, vha, 0x507a,
3029 "Unrecognized interrupt type (%d).\n", stat);
3030 break;
3031 }
3032 QLAFX00_CLR_INTR_REG(ha, clr_intr);
3033 QLAFX00_RD_INTR_REG(ha);
3034 }
gurinder.shergill@hp.com36439832013-04-23 10:13:17 -07003035
3036 qla2x00_handle_mbx_completion(ha, status);
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003037 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3038
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003039 return IRQ_HANDLED;
3040}
3041
3042/** QLAFX00 specific IOCB implementation functions */
3043
3044static inline cont_a64_entry_t *
3045qlafx00_prep_cont_type1_iocb(struct req_que *req,
3046 cont_a64_entry_t *lcont_pkt)
3047{
3048 cont_a64_entry_t *cont_pkt;
3049
3050 /* Adjust ring index. */
3051 req->ring_index++;
3052 if (req->ring_index == req->length) {
3053 req->ring_index = 0;
3054 req->ring_ptr = req->ring;
3055 } else {
3056 req->ring_ptr++;
3057 }
3058
3059 cont_pkt = (cont_a64_entry_t *)req->ring_ptr;
3060
3061 /* Load packet defaults. */
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003062 lcont_pkt->entry_type = CONTINUE_A64_TYPE_FX00;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003063
3064 return cont_pkt;
3065}
3066
3067static inline void
3068qlafx00_build_scsi_iocbs(srb_t *sp, struct cmd_type_7_fx00 *cmd_pkt,
3069 uint16_t tot_dsds, struct cmd_type_7_fx00 *lcmd_pkt)
3070{
3071 uint16_t avail_dsds;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003072 __le32 *cur_dsd;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003073 scsi_qla_host_t *vha;
3074 struct scsi_cmnd *cmd;
3075 struct scatterlist *sg;
3076 int i, cont;
3077 struct req_que *req;
3078 cont_a64_entry_t lcont_pkt;
3079 cont_a64_entry_t *cont_pkt;
3080
3081 vha = sp->fcport->vha;
3082 req = vha->req;
3083
3084 cmd = GET_CMD_SP(sp);
3085 cont = 0;
3086 cont_pkt = NULL;
3087
3088 /* Update entry type to indicate Command Type 3 IOCB */
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003089 lcmd_pkt->entry_type = FX00_COMMAND_TYPE_7;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003090
3091 /* No data transfer */
3092 if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
3093 lcmd_pkt->byte_count = __constant_cpu_to_le32(0);
3094 return;
3095 }
3096
3097 /* Set transfer direction */
3098 if (cmd->sc_data_direction == DMA_TO_DEVICE) {
Armen Baloyan378c5382013-04-25 01:29:18 -04003099 lcmd_pkt->cntrl_flags = TMF_WRITE_DATA;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003100 vha->qla_stats.output_bytes += scsi_bufflen(cmd);
3101 } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
Armen Baloyan378c5382013-04-25 01:29:18 -04003102 lcmd_pkt->cntrl_flags = TMF_READ_DATA;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003103 vha->qla_stats.input_bytes += scsi_bufflen(cmd);
3104 }
3105
3106 /* One DSD is available in the Command Type 3 IOCB */
3107 avail_dsds = 1;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003108 cur_dsd = (__le32 *)&lcmd_pkt->dseg_0_address;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003109
3110 /* Load data segments */
3111 scsi_for_each_sg(cmd, sg, tot_dsds, i) {
3112 dma_addr_t sle_dma;
3113
3114 /* Allocate additional continuation packets? */
3115 if (avail_dsds == 0) {
3116 /*
3117 * Five DSDs are available in the Continuation
3118 * Type 1 IOCB.
3119 */
3120 memset(&lcont_pkt, 0, REQUEST_ENTRY_SIZE);
3121 cont_pkt =
3122 qlafx00_prep_cont_type1_iocb(req, &lcont_pkt);
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003123 cur_dsd = (__le32 *)lcont_pkt.dseg_0_address;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003124 avail_dsds = 5;
3125 cont = 1;
3126 }
3127
3128 sle_dma = sg_dma_address(sg);
3129 *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
3130 *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
3131 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
3132 avail_dsds--;
3133 if (avail_dsds == 0 && cont == 1) {
3134 cont = 0;
3135 memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt,
3136 REQUEST_ENTRY_SIZE);
3137 }
3138
3139 }
3140 if (avail_dsds != 0 && cont == 1) {
3141 memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt,
3142 REQUEST_ENTRY_SIZE);
3143 }
3144}
3145
3146/**
3147 * qlafx00_start_scsi() - Send a SCSI command to the ISP
3148 * @sp: command to send to the ISP
3149 *
3150 * Returns non-zero if a failure occurred, else zero.
3151 */
3152int
3153qlafx00_start_scsi(srb_t *sp)
3154{
3155 int ret, nseg;
3156 unsigned long flags;
3157 uint32_t index;
3158 uint32_t handle;
3159 uint16_t cnt;
3160 uint16_t req_cnt;
3161 uint16_t tot_dsds;
3162 struct req_que *req = NULL;
3163 struct rsp_que *rsp = NULL;
3164 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
3165 struct scsi_qla_host *vha = sp->fcport->vha;
3166 struct qla_hw_data *ha = vha->hw;
3167 struct cmd_type_7_fx00 *cmd_pkt;
3168 struct cmd_type_7_fx00 lcmd_pkt;
3169 struct scsi_lun llun;
3170 char tag[2];
3171
3172 /* Setup device pointers. */
3173 ret = 0;
3174
3175 rsp = ha->rsp_q_map[0];
3176 req = vha->req;
3177
3178 /* So we know we haven't pci_map'ed anything yet */
3179 tot_dsds = 0;
3180
3181 /* Forcing marker needed for now */
3182 vha->marker_needed = 0;
3183
3184 /* Send marker if required */
3185 if (vha->marker_needed != 0) {
3186 if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
3187 QLA_SUCCESS)
3188 return QLA_FUNCTION_FAILED;
3189 vha->marker_needed = 0;
3190 }
3191
3192 /* Acquire ring specific lock */
3193 spin_lock_irqsave(&ha->hardware_lock, flags);
3194
3195 /* Check for room in outstanding command list. */
3196 handle = req->current_outstanding_cmd;
3197 for (index = 1; index < req->num_outstanding_cmds; index++) {
3198 handle++;
3199 if (handle == req->num_outstanding_cmds)
3200 handle = 1;
3201 if (!req->outstanding_cmds[handle])
3202 break;
3203 }
3204 if (index == req->num_outstanding_cmds)
3205 goto queuing_error;
3206
3207 /* Map the sg table so we have an accurate count of sg entries needed */
3208 if (scsi_sg_count(cmd)) {
3209 nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
3210 scsi_sg_count(cmd), cmd->sc_data_direction);
3211 if (unlikely(!nseg))
3212 goto queuing_error;
3213 } else
3214 nseg = 0;
3215
3216 tot_dsds = nseg;
3217 req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
3218 if (req->cnt < (req_cnt + 2)) {
3219 cnt = RD_REG_DWORD_RELAXED(req->req_q_out);
3220
3221 if (req->ring_index < cnt)
3222 req->cnt = cnt - req->ring_index;
3223 else
3224 req->cnt = req->length -
3225 (req->ring_index - cnt);
3226 if (req->cnt < (req_cnt + 2))
3227 goto queuing_error;
3228 }
3229
3230 /* Build command packet. */
3231 req->current_outstanding_cmd = handle;
3232 req->outstanding_cmds[handle] = sp;
3233 sp->handle = handle;
3234 cmd->host_scribble = (unsigned char *)(unsigned long)handle;
3235 req->cnt -= req_cnt;
3236
3237 cmd_pkt = (struct cmd_type_7_fx00 *)req->ring_ptr;
3238
3239 memset(&lcmd_pkt, 0, REQUEST_ENTRY_SIZE);
3240
3241 lcmd_pkt.handle = MAKE_HANDLE(req->id, sp->handle);
3242 lcmd_pkt.handle_hi = 0;
3243 lcmd_pkt.dseg_count = cpu_to_le16(tot_dsds);
3244 lcmd_pkt.tgt_idx = cpu_to_le16(sp->fcport->tgt_id);
3245
3246 int_to_scsilun(cmd->device->lun, &llun);
3247 host_to_adap((uint8_t *)&llun, (uint8_t *)&lcmd_pkt.lun,
3248 sizeof(lcmd_pkt.lun));
3249
3250 /* Update tagged queuing modifier -- default is TSK_SIMPLE (0). */
3251 if (scsi_populate_tag_msg(cmd, tag)) {
3252 switch (tag[0]) {
3253 case HEAD_OF_QUEUE_TAG:
3254 lcmd_pkt.task = TSK_HEAD_OF_QUEUE;
3255 break;
3256 case ORDERED_QUEUE_TAG:
3257 lcmd_pkt.task = TSK_ORDERED;
3258 break;
3259 }
3260 }
3261
3262 /* Load SCSI command packet. */
3263 host_to_adap(cmd->cmnd, lcmd_pkt.fcp_cdb, sizeof(lcmd_pkt.fcp_cdb));
3264 lcmd_pkt.byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
3265
3266 /* Build IOCB segments */
3267 qlafx00_build_scsi_iocbs(sp, cmd_pkt, tot_dsds, &lcmd_pkt);
3268
3269 /* Set total data segment count. */
3270 lcmd_pkt.entry_count = (uint8_t)req_cnt;
3271
3272 /* Specify response queue number where completion should happen */
3273 lcmd_pkt.entry_status = (uint8_t) rsp->id;
3274
3275 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302e,
3276 (uint8_t *)cmd->cmnd, cmd->cmd_len);
3277 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3032,
3278 (uint8_t *)&lcmd_pkt, REQUEST_ENTRY_SIZE);
3279
3280 memcpy_toio((void __iomem *)cmd_pkt, &lcmd_pkt, REQUEST_ENTRY_SIZE);
3281 wmb();
3282
3283 /* Adjust ring index. */
3284 req->ring_index++;
3285 if (req->ring_index == req->length) {
3286 req->ring_index = 0;
3287 req->ring_ptr = req->ring;
3288 } else
3289 req->ring_ptr++;
3290
3291 sp->flags |= SRB_DMA_VALID;
3292
3293 /* Set chip new ring index. */
3294 WRT_REG_DWORD(req->req_q_in, req->ring_index);
3295 QLAFX00_SET_HST_INTR(ha, ha->rqstq_intr_code);
3296
3297 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3298 return QLA_SUCCESS;
3299
3300queuing_error:
3301 if (tot_dsds)
3302 scsi_dma_unmap(cmd);
3303
3304 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3305
3306 return QLA_FUNCTION_FAILED;
3307}
3308
3309void
3310qlafx00_tm_iocb(srb_t *sp, struct tsk_mgmt_entry_fx00 *ptm_iocb)
3311{
3312 struct srb_iocb *fxio = &sp->u.iocb_cmd;
3313 scsi_qla_host_t *vha = sp->fcport->vha;
3314 struct req_que *req = vha->req;
3315 struct tsk_mgmt_entry_fx00 tm_iocb;
3316 struct scsi_lun llun;
3317
3318 memset(&tm_iocb, 0, sizeof(struct tsk_mgmt_entry_fx00));
3319 tm_iocb.entry_type = TSK_MGMT_IOCB_TYPE_FX00;
3320 tm_iocb.entry_count = 1;
3321 tm_iocb.handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle));
3322 tm_iocb.handle_hi = 0;
3323 tm_iocb.timeout = cpu_to_le16(qla2x00_get_async_timeout(vha) + 2);
3324 tm_iocb.tgt_id = cpu_to_le16(sp->fcport->tgt_id);
3325 tm_iocb.control_flags = cpu_to_le32(fxio->u.tmf.flags);
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003326 if (tm_iocb.control_flags == cpu_to_le32((uint32_t)TCF_LUN_RESET)) {
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003327 int_to_scsilun(fxio->u.tmf.lun, &llun);
3328 host_to_adap((uint8_t *)&llun, (uint8_t *)&tm_iocb.lun,
3329 sizeof(struct scsi_lun));
3330 }
3331
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003332 memcpy((void *)ptm_iocb, &tm_iocb,
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003333 sizeof(struct tsk_mgmt_entry_fx00));
3334 wmb();
3335}
3336
3337void
3338qlafx00_abort_iocb(srb_t *sp, struct abort_iocb_entry_fx00 *pabt_iocb)
3339{
3340 struct srb_iocb *fxio = &sp->u.iocb_cmd;
3341 scsi_qla_host_t *vha = sp->fcport->vha;
3342 struct req_que *req = vha->req;
3343 struct abort_iocb_entry_fx00 abt_iocb;
3344
3345 memset(&abt_iocb, 0, sizeof(struct abort_iocb_entry_fx00));
3346 abt_iocb.entry_type = ABORT_IOCB_TYPE_FX00;
3347 abt_iocb.entry_count = 1;
3348 abt_iocb.handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle));
3349 abt_iocb.abort_handle =
3350 cpu_to_le32(MAKE_HANDLE(req->id, fxio->u.abt.cmd_hndl));
3351 abt_iocb.tgt_id_sts = cpu_to_le16(sp->fcport->tgt_id);
3352 abt_iocb.req_que_no = cpu_to_le16(req->id);
3353
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003354 memcpy((void *)pabt_iocb, &abt_iocb,
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003355 sizeof(struct abort_iocb_entry_fx00));
3356 wmb();
3357}
3358
3359void
3360qlafx00_fxdisc_iocb(srb_t *sp, struct fxdisc_entry_fx00 *pfxiocb)
3361{
3362 struct srb_iocb *fxio = &sp->u.iocb_cmd;
3363 struct qla_mt_iocb_rqst_fx00 *piocb_rqst;
3364 struct fc_bsg_job *bsg_job;
3365 struct fxdisc_entry_fx00 fx_iocb;
3366 uint8_t entry_cnt = 1;
3367
3368 memset(&fx_iocb, 0, sizeof(struct fxdisc_entry_fx00));
3369 fx_iocb.entry_type = FX00_IOCB_TYPE;
3370 fx_iocb.handle = cpu_to_le32(sp->handle);
3371 fx_iocb.entry_count = entry_cnt;
3372
3373 if (sp->type == SRB_FXIOCB_DCMD) {
3374 fx_iocb.func_num =
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003375 sp->u.iocb_cmd.u.fxiocb.req_func_type;
3376 fx_iocb.adapid = fxio->u.fxiocb.adapter_id;
3377 fx_iocb.adapid_hi = fxio->u.fxiocb.adapter_id_hi;
3378 fx_iocb.reserved_0 = fxio->u.fxiocb.reserved_0;
3379 fx_iocb.reserved_1 = fxio->u.fxiocb.reserved_1;
3380 fx_iocb.dataword_extra = fxio->u.fxiocb.req_data_extra;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003381
3382 if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) {
3383 fx_iocb.req_dsdcnt = cpu_to_le16(1);
3384 fx_iocb.req_xfrcnt =
3385 cpu_to_le16(fxio->u.fxiocb.req_len);
3386 fx_iocb.dseg_rq_address[0] =
3387 cpu_to_le32(LSD(fxio->u.fxiocb.req_dma_handle));
3388 fx_iocb.dseg_rq_address[1] =
3389 cpu_to_le32(MSD(fxio->u.fxiocb.req_dma_handle));
3390 fx_iocb.dseg_rq_len =
3391 cpu_to_le32(fxio->u.fxiocb.req_len);
3392 }
3393
3394 if (fxio->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) {
3395 fx_iocb.rsp_dsdcnt = cpu_to_le16(1);
3396 fx_iocb.rsp_xfrcnt =
3397 cpu_to_le16(fxio->u.fxiocb.rsp_len);
3398 fx_iocb.dseg_rsp_address[0] =
3399 cpu_to_le32(LSD(fxio->u.fxiocb.rsp_dma_handle));
3400 fx_iocb.dseg_rsp_address[1] =
3401 cpu_to_le32(MSD(fxio->u.fxiocb.rsp_dma_handle));
3402 fx_iocb.dseg_rsp_len =
3403 cpu_to_le32(fxio->u.fxiocb.rsp_len);
3404 }
3405
3406 if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DWRD_VALID) {
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003407 fx_iocb.dataword = fxio->u.fxiocb.req_data;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003408 }
3409 fx_iocb.flags = fxio->u.fxiocb.flags;
3410 } else {
3411 struct scatterlist *sg;
3412 bsg_job = sp->u.bsg_job;
3413 piocb_rqst = (struct qla_mt_iocb_rqst_fx00 *)
3414 &bsg_job->request->rqst_data.h_vendor.vendor_cmd[1];
3415
3416 fx_iocb.func_num = piocb_rqst->func_type;
3417 fx_iocb.adapid = piocb_rqst->adapid;
3418 fx_iocb.adapid_hi = piocb_rqst->adapid_hi;
3419 fx_iocb.reserved_0 = piocb_rqst->reserved_0;
3420 fx_iocb.reserved_1 = piocb_rqst->reserved_1;
3421 fx_iocb.dataword_extra = piocb_rqst->dataword_extra;
3422 fx_iocb.dataword = piocb_rqst->dataword;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003423 fx_iocb.req_xfrcnt = piocb_rqst->req_len;
3424 fx_iocb.rsp_xfrcnt = piocb_rqst->rsp_len;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003425
3426 if (piocb_rqst->flags & SRB_FXDISC_REQ_DMA_VALID) {
3427 int avail_dsds, tot_dsds;
3428 cont_a64_entry_t lcont_pkt;
3429 cont_a64_entry_t *cont_pkt = NULL;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003430 __le32 *cur_dsd;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003431 int index = 0, cont = 0;
3432
3433 fx_iocb.req_dsdcnt =
3434 cpu_to_le16(bsg_job->request_payload.sg_cnt);
3435 tot_dsds =
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003436 bsg_job->request_payload.sg_cnt;
3437 cur_dsd = (__le32 *)&fx_iocb.dseg_rq_address[0];
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003438 avail_dsds = 1;
3439 for_each_sg(bsg_job->request_payload.sg_list, sg,
3440 tot_dsds, index) {
3441 dma_addr_t sle_dma;
3442
3443 /* Allocate additional continuation packets? */
3444 if (avail_dsds == 0) {
3445 /*
3446 * Five DSDs are available in the Cont.
3447 * Type 1 IOCB.
3448 */
3449 memset(&lcont_pkt, 0,
3450 REQUEST_ENTRY_SIZE);
3451 cont_pkt =
3452 qlafx00_prep_cont_type1_iocb(
3453 sp->fcport->vha->req,
3454 &lcont_pkt);
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003455 cur_dsd = (__le32 *)
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003456 lcont_pkt.dseg_0_address;
3457 avail_dsds = 5;
3458 cont = 1;
3459 entry_cnt++;
3460 }
3461
3462 sle_dma = sg_dma_address(sg);
3463 *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
3464 *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
3465 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
3466 avail_dsds--;
3467
3468 if (avail_dsds == 0 && cont == 1) {
3469 cont = 0;
3470 memcpy_toio(
3471 (void __iomem *)cont_pkt,
3472 &lcont_pkt, REQUEST_ENTRY_SIZE);
3473 ql_dump_buffer(
3474 ql_dbg_user + ql_dbg_verbose,
3475 sp->fcport->vha, 0x3042,
3476 (uint8_t *)&lcont_pkt,
3477 REQUEST_ENTRY_SIZE);
3478 }
3479 }
3480 if (avail_dsds != 0 && cont == 1) {
3481 memcpy_toio((void __iomem *)cont_pkt,
3482 &lcont_pkt, REQUEST_ENTRY_SIZE);
3483 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3484 sp->fcport->vha, 0x3043,
3485 (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE);
3486 }
3487 }
3488
3489 if (piocb_rqst->flags & SRB_FXDISC_RESP_DMA_VALID) {
3490 int avail_dsds, tot_dsds;
3491 cont_a64_entry_t lcont_pkt;
3492 cont_a64_entry_t *cont_pkt = NULL;
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003493 __le32 *cur_dsd;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003494 int index = 0, cont = 0;
3495
3496 fx_iocb.rsp_dsdcnt =
3497 cpu_to_le16(bsg_job->reply_payload.sg_cnt);
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003498 tot_dsds = bsg_job->reply_payload.sg_cnt;
3499 cur_dsd = (__le32 *)&fx_iocb.dseg_rsp_address[0];
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003500 avail_dsds = 1;
3501
3502 for_each_sg(bsg_job->reply_payload.sg_list, sg,
3503 tot_dsds, index) {
3504 dma_addr_t sle_dma;
3505
3506 /* Allocate additional continuation packets? */
3507 if (avail_dsds == 0) {
3508 /*
3509 * Five DSDs are available in the Cont.
3510 * Type 1 IOCB.
3511 */
3512 memset(&lcont_pkt, 0,
3513 REQUEST_ENTRY_SIZE);
3514 cont_pkt =
3515 qlafx00_prep_cont_type1_iocb(
3516 sp->fcport->vha->req,
3517 &lcont_pkt);
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003518 cur_dsd = (__le32 *)
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003519 lcont_pkt.dseg_0_address;
3520 avail_dsds = 5;
3521 cont = 1;
3522 entry_cnt++;
3523 }
3524
3525 sle_dma = sg_dma_address(sg);
3526 *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
3527 *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
3528 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
3529 avail_dsds--;
3530
3531 if (avail_dsds == 0 && cont == 1) {
3532 cont = 0;
3533 memcpy_toio((void __iomem *)cont_pkt,
3534 &lcont_pkt,
3535 REQUEST_ENTRY_SIZE);
3536 ql_dump_buffer(
3537 ql_dbg_user + ql_dbg_verbose,
3538 sp->fcport->vha, 0x3045,
3539 (uint8_t *)&lcont_pkt,
3540 REQUEST_ENTRY_SIZE);
3541 }
3542 }
3543 if (avail_dsds != 0 && cont == 1) {
3544 memcpy_toio((void __iomem *)cont_pkt,
3545 &lcont_pkt, REQUEST_ENTRY_SIZE);
3546 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3547 sp->fcport->vha, 0x3046,
3548 (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE);
3549 }
3550 }
3551
3552 if (piocb_rqst->flags & SRB_FXDISC_REQ_DWRD_VALID)
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003553 fx_iocb.dataword = piocb_rqst->dataword;
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003554 fx_iocb.flags = piocb_rqst->flags;
3555 fx_iocb.entry_count = entry_cnt;
3556 }
3557
3558 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3559 sp->fcport->vha, 0x3047,
3560 (uint8_t *)&fx_iocb, sizeof(struct fxdisc_entry_fx00));
3561
Saurav Kashyap1f8deef2013-06-25 11:27:21 -04003562 memcpy((void *)pfxiocb, &fx_iocb,
Giridhar Malavali8ae6d9c2013-03-28 08:21:23 -04003563 sizeof(struct fxdisc_entry_fx00));
3564 wmb();
3565}