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Bo Shen099343c2012-11-07 11:41:41 +08001* Atmel SSC driver.
2
3Required properties:
4- compatible: "atmel,at91rm9200-ssc" or "atmel,at91sam9g45-ssc"
5 - atmel,at91rm9200-ssc: support pdc transfer
6 - atmel,at91sam9g45-ssc: support dma transfer
7- reg: Should contain SSC registers location and length
8- interrupts: Should contain SSC interrupt
Boris BREZILLON725fc132013-12-17 16:01:47 +01009- clock-names: tuple listing input clock names.
10 Required elements: "pclk"
11- clocks: phandles to input clocks.
Bo Shen099343c2012-11-07 11:41:41 +080012
Richard Genoudf8131752013-07-30 12:32:04 +020013
14Required properties for devices compatible with "atmel,at91sam9g45-ssc":
15- dmas: DMA specifier, consisting of a phandle to DMA controller node,
16 the memory interface and SSC DMA channel ID (for tx and rx).
17 See Documentation/devicetree/bindings/dma/atmel-dma.txt for details.
18- dma-names: Must be "tx", "rx".
19
20Examples:
21- PDC transfer:
Bo Shen099343c2012-11-07 11:41:41 +080022ssc0: ssc@fffbc000 {
23 compatible = "atmel,at91rm9200-ssc";
24 reg = <0xfffbc000 0x4000>;
25 interrupts = <14 4 5>;
Boris BREZILLON725fc132013-12-17 16:01:47 +010026 clocks = <&ssc0_clk>;
27 clock-names = "pclk";
Bo Shen099343c2012-11-07 11:41:41 +080028};
Richard Genoudf8131752013-07-30 12:32:04 +020029
30- DMA transfer:
31ssc0: ssc@f0010000 {
32 compatible = "atmel,at91sam9g45-ssc";
33 reg = <0xf0010000 0x4000>;
34 interrupts = <28 4 5>;
35 dmas = <&dma0 1 13>,
36 <&dma0 1 14>;
37 dma-names = "tx", "rx";
38 pinctrl-names = "default";
39 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
40 status = "disabled";
41};