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Steve Glendinningeaeed5d2009-03-20 14:16:29 +00001/*
2 * June 2006 steve.glendinning@smsc.com
3 *
4 * Polaris-specific resource declaration
5 *
6 */
7
8#include <linux/init.h>
9#include <linux/interrupt.h>
10#include <linux/irq.h>
11#include <linux/platform_device.h>
Guennadi Liakhovetski73c2a9d2012-06-27 00:50:01 +020012#include <linux/regulator/fixed.h>
13#include <linux/regulator/machine.h>
Steve Glendinningeaeed5d2009-03-20 14:16:29 +000014#include <linux/smsc911x.h>
15#include <linux/io.h>
16#include <asm/irq.h>
17#include <asm/machvec.h>
18#include <asm/heartbeat.h>
19#include <cpu/gpio.h>
20#include <mach-se/mach/se.h>
21
22#define BCR2 (0xFFFFFF62)
23#define WCR2 (0xFFFFFF66)
24#define AREA5_WAIT_CTRL (0x1C00)
25#define WAIT_STATES_10 (0x7)
26
Guennadi Liakhovetski73c2a9d2012-06-27 00:50:01 +020027/* Dummy supplies, where voltage doesn't matter */
28static struct regulator_consumer_supply dummy_supplies[] = {
29 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
30 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
31};
32
Steve Glendinningeaeed5d2009-03-20 14:16:29 +000033static struct resource smsc911x_resources[] = {
34 [0] = {
35 .name = "smsc911x-memory",
36 .start = PA_EXT5,
37 .end = PA_EXT5 + 0x1fff,
38 .flags = IORESOURCE_MEM,
39 },
40 [1] = {
41 .name = "smsc911x-irq",
42 .start = IRQ0_IRQ,
43 .end = IRQ0_IRQ,
44 .flags = IORESOURCE_IRQ,
45 },
46};
47
48static struct smsc911x_platform_config smsc911x_config = {
49 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
50 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
51 .flags = SMSC911X_USE_32BIT,
52 .phy_interface = PHY_INTERFACE_MODE_MII,
53};
54
55static struct platform_device smsc911x_device = {
56 .name = "smsc911x",
57 .id = 0,
58 .num_resources = ARRAY_SIZE(smsc911x_resources),
59 .resource = smsc911x_resources,
60 .dev = {
61 .platform_data = &smsc911x_config,
62 },
63};
64
65static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3 };
66
67static struct heartbeat_data heartbeat_data = {
68 .bit_pos = heartbeat_bit_pos,
69 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
Steve Glendinningeaeed5d2009-03-20 14:16:29 +000070};
71
Paul Mundta09d2832010-01-15 12:24:34 +090072static struct resource heartbeat_resource = {
73 .start = PORT_PCDR,
74 .end = PORT_PCDR,
75 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
Steve Glendinningeaeed5d2009-03-20 14:16:29 +000076};
77
78static struct platform_device heartbeat_device = {
79 .name = "heartbeat",
80 .id = -1,
81 .dev = {
82 .platform_data = &heartbeat_data,
83 },
Paul Mundta09d2832010-01-15 12:24:34 +090084 .num_resources = 1,
85 .resource = &heartbeat_resource,
Steve Glendinningeaeed5d2009-03-20 14:16:29 +000086};
87
88static struct platform_device *polaris_devices[] __initdata = {
89 &smsc911x_device,
90 &heartbeat_device,
91};
92
93static int __init polaris_initialise(void)
94{
95 u16 wcr, bcr_mask;
96
97 printk(KERN_INFO "Configuring Polaris external bus\n");
98
Guennadi Liakhovetski73c2a9d2012-06-27 00:50:01 +020099 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
100
Steve Glendinningeaeed5d2009-03-20 14:16:29 +0000101 /* Configure area 5 with 2 wait states */
Paul Mundt9d56dd32010-01-26 12:58:40 +0900102 wcr = __raw_readw(WCR2);
Steve Glendinningeaeed5d2009-03-20 14:16:29 +0000103 wcr &= (~AREA5_WAIT_CTRL);
104 wcr |= (WAIT_STATES_10 << 10);
Paul Mundt9d56dd32010-01-26 12:58:40 +0900105 __raw_writew(wcr, WCR2);
Steve Glendinningeaeed5d2009-03-20 14:16:29 +0000106
107 /* Configure area 5 for 32-bit access */
Paul Mundt9d56dd32010-01-26 12:58:40 +0900108 bcr_mask = __raw_readw(BCR2);
Steve Glendinningeaeed5d2009-03-20 14:16:29 +0000109 bcr_mask |= 1 << 10;
Paul Mundt9d56dd32010-01-26 12:58:40 +0900110 __raw_writew(bcr_mask, BCR2);
Steve Glendinningeaeed5d2009-03-20 14:16:29 +0000111
112 return platform_add_devices(polaris_devices,
113 ARRAY_SIZE(polaris_devices));
114}
115arch_initcall(polaris_initialise);
116
117static struct ipr_data ipr_irq_table[] = {
118 /* External IRQs */
119 { IRQ0_IRQ, 0, 0, 1, }, /* IRQ0 */
120 { IRQ1_IRQ, 0, 4, 1, }, /* IRQ1 */
121};
122
123static unsigned long ipr_offsets[] = {
124 INTC_IPRC
125};
126
127static struct ipr_desc ipr_irq_desc = {
128 .ipr_offsets = ipr_offsets,
129 .nr_offsets = ARRAY_SIZE(ipr_offsets),
130
131 .ipr_data = ipr_irq_table,
132 .nr_irqs = ARRAY_SIZE(ipr_irq_table),
133 .chip = {
134 .name = "sh7709-ext",
135 },
136};
137
138static void __init init_polaris_irq(void)
139{
140 /* Disable all interrupts */
Paul Mundt9d56dd32010-01-26 12:58:40 +0900141 __raw_writew(0, BCR_ILCRA);
142 __raw_writew(0, BCR_ILCRB);
143 __raw_writew(0, BCR_ILCRC);
144 __raw_writew(0, BCR_ILCRD);
145 __raw_writew(0, BCR_ILCRE);
146 __raw_writew(0, BCR_ILCRF);
147 __raw_writew(0, BCR_ILCRG);
Steve Glendinningeaeed5d2009-03-20 14:16:29 +0000148
149 register_ipr_controller(&ipr_irq_desc);
150}
151
152static struct sh_machine_vector mv_polaris __initmv = {
153 .mv_name = "Polaris",
Steve Glendinningeaeed5d2009-03-20 14:16:29 +0000154 .mv_init_irq = init_polaris_irq,
155};