blob: 0ab0f81b661dd1b2e889402ff6af43f0ca17d82c [file] [log] [blame]
Saeed Bisharaedabd382009-08-06 15:12:43 +03001/*
2 * arch/arm/mach-dove/common.c
3 *
4 * Core functions for Marvell Dove 88AP510 System On Chip
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/delay.h>
13#include <linux/init.h>
14#include <linux/platform_device.h>
15#include <linux/pci.h>
Andrew Lunn2f129bf2011-12-15 08:15:07 +010016#include <linux/clk-provider.h>
Saeed Bisharaedabd382009-08-06 15:12:43 +030017#include <linux/ata_platform.h>
Saeed Bisharaedabd382009-08-06 15:12:43 +030018#include <linux/gpio.h>
19#include <asm/page.h>
20#include <asm/setup.h>
21#include <asm/timex.h>
Lennert Buytenhek573a6522009-11-24 19:33:52 +020022#include <asm/hardware/cache-tauros2.h>
Saeed Bisharaedabd382009-08-06 15:12:43 +030023#include <asm/mach/map.h>
24#include <asm/mach/time.h>
25#include <asm/mach/pci.h>
26#include <mach/dove.h>
27#include <mach/bridge-regs.h>
28#include <asm/mach/arch.h>
29#include <linux/irq.h>
Saeed Bisharaedabd382009-08-06 15:12:43 +030030#include <plat/time.h>
Andrew Lunn72053352012-02-08 15:52:47 +010031#include <plat/ehci-orion.h>
Andrew Lunn28a2b452011-05-15 13:32:41 +020032#include <plat/common.h>
Andrew Lunn45173d52011-12-07 21:48:06 +010033#include <plat/addr-map.h>
Saeed Bisharaedabd382009-08-06 15:12:43 +030034#include "common.h"
35
Andrew Lunn28a2b452011-05-15 13:32:41 +020036static int get_tclk(void);
37
Saeed Bisharaedabd382009-08-06 15:12:43 +030038/*****************************************************************************
39 * I/O Address Mapping
40 ****************************************************************************/
41static struct map_desc dove_io_desc[] __initdata = {
42 {
43 .virtual = DOVE_SB_REGS_VIRT_BASE,
44 .pfn = __phys_to_pfn(DOVE_SB_REGS_PHYS_BASE),
45 .length = DOVE_SB_REGS_SIZE,
46 .type = MT_DEVICE,
47 }, {
48 .virtual = DOVE_NB_REGS_VIRT_BASE,
49 .pfn = __phys_to_pfn(DOVE_NB_REGS_PHYS_BASE),
50 .length = DOVE_NB_REGS_SIZE,
51 .type = MT_DEVICE,
52 }, {
53 .virtual = DOVE_PCIE0_IO_VIRT_BASE,
54 .pfn = __phys_to_pfn(DOVE_PCIE0_IO_PHYS_BASE),
55 .length = DOVE_PCIE0_IO_SIZE,
56 .type = MT_DEVICE,
57 }, {
58 .virtual = DOVE_PCIE1_IO_VIRT_BASE,
59 .pfn = __phys_to_pfn(DOVE_PCIE1_IO_PHYS_BASE),
60 .length = DOVE_PCIE1_IO_SIZE,
61 .type = MT_DEVICE,
62 },
63};
64
65void __init dove_map_io(void)
66{
67 iotable_init(dove_io_desc, ARRAY_SIZE(dove_io_desc));
68}
69
70/*****************************************************************************
Andrew Lunn2f129bf2011-12-15 08:15:07 +010071 * CLK tree
72 ****************************************************************************/
73static struct clk *tclk;
74
75static void __init clk_init(void)
76{
77 tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT,
78 get_tclk());
Andrew Lunn4574b882012-04-06 17:17:26 +020079
80 orion_clkdev_init(tclk);
Andrew Lunn2f129bf2011-12-15 08:15:07 +010081}
82
83/*****************************************************************************
Saeed Bisharaedabd382009-08-06 15:12:43 +030084 * EHCI0
85 ****************************************************************************/
Saeed Bisharaedabd382009-08-06 15:12:43 +030086void __init dove_ehci0_init(void)
87{
Andrew Lunn72053352012-02-08 15:52:47 +010088 orion_ehci_init(DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0, EHCI_PHY_NA);
Saeed Bisharaedabd382009-08-06 15:12:43 +030089}
90
91/*****************************************************************************
92 * EHCI1
93 ****************************************************************************/
Saeed Bisharaedabd382009-08-06 15:12:43 +030094void __init dove_ehci1_init(void)
95{
Andrew Lunndb33f4d2011-12-07 21:48:08 +010096 orion_ehci_1_init(DOVE_USB1_PHYS_BASE, IRQ_DOVE_USB1);
Saeed Bisharaedabd382009-08-06 15:12:43 +030097}
98
99/*****************************************************************************
100 * GE00
101 ****************************************************************************/
Saeed Bisharaedabd382009-08-06 15:12:43 +0300102void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
103{
Andrew Lunndb33f4d2011-12-07 21:48:08 +0100104 orion_ge00_init(eth_data,
Andrew Lunn452503e2011-12-24 01:24:24 +0100105 DOVE_GE00_PHYS_BASE, IRQ_DOVE_GE00_SUM, 0);
Saeed Bisharaedabd382009-08-06 15:12:43 +0300106}
107
108/*****************************************************************************
109 * SoC RTC
110 ****************************************************************************/
Saeed Bisharaedabd382009-08-06 15:12:43 +0300111void __init dove_rtc_init(void)
112{
Andrew Lunnf6eaccb2011-05-15 13:32:42 +0200113 orion_rtc_init(DOVE_RTC_PHYS_BASE, IRQ_DOVE_RTC);
Saeed Bisharaedabd382009-08-06 15:12:43 +0300114}
115
116/*****************************************************************************
117 * SATA
118 ****************************************************************************/
Saeed Bisharaedabd382009-08-06 15:12:43 +0300119void __init dove_sata_init(struct mv_sata_platform_data *sata_data)
120{
Andrew Lunndb33f4d2011-12-07 21:48:08 +0100121 orion_sata_init(sata_data, DOVE_SATA_PHYS_BASE, IRQ_DOVE_SATA);
Andrew Lunn9e613f82011-05-15 13:32:50 +0200122
Saeed Bisharaedabd382009-08-06 15:12:43 +0300123}
124
125/*****************************************************************************
126 * UART0
127 ****************************************************************************/
Saeed Bisharaedabd382009-08-06 15:12:43 +0300128void __init dove_uart0_init(void)
129{
Andrew Lunn28a2b452011-05-15 13:32:41 +0200130 orion_uart0_init(DOVE_UART0_VIRT_BASE, DOVE_UART0_PHYS_BASE,
Andrew Lunn74c33572011-12-24 03:06:34 +0100131 IRQ_DOVE_UART_0, tclk);
Saeed Bisharaedabd382009-08-06 15:12:43 +0300132}
133
134/*****************************************************************************
135 * UART1
136 ****************************************************************************/
Saeed Bisharaedabd382009-08-06 15:12:43 +0300137void __init dove_uart1_init(void)
138{
Andrew Lunn28a2b452011-05-15 13:32:41 +0200139 orion_uart1_init(DOVE_UART1_VIRT_BASE, DOVE_UART1_PHYS_BASE,
Andrew Lunn74c33572011-12-24 03:06:34 +0100140 IRQ_DOVE_UART_1, tclk);
Saeed Bisharaedabd382009-08-06 15:12:43 +0300141}
142
143/*****************************************************************************
144 * UART2
145 ****************************************************************************/
Saeed Bisharaedabd382009-08-06 15:12:43 +0300146void __init dove_uart2_init(void)
147{
Andrew Lunn28a2b452011-05-15 13:32:41 +0200148 orion_uart2_init(DOVE_UART2_VIRT_BASE, DOVE_UART2_PHYS_BASE,
Andrew Lunn74c33572011-12-24 03:06:34 +0100149 IRQ_DOVE_UART_2, tclk);
Saeed Bisharaedabd382009-08-06 15:12:43 +0300150}
151
152/*****************************************************************************
153 * UART3
154 ****************************************************************************/
Saeed Bisharaedabd382009-08-06 15:12:43 +0300155void __init dove_uart3_init(void)
156{
Andrew Lunn28a2b452011-05-15 13:32:41 +0200157 orion_uart3_init(DOVE_UART3_VIRT_BASE, DOVE_UART3_PHYS_BASE,
Andrew Lunn74c33572011-12-24 03:06:34 +0100158 IRQ_DOVE_UART_3, tclk);
Saeed Bisharaedabd382009-08-06 15:12:43 +0300159}
160
161/*****************************************************************************
Andrew Lunn980f9f62011-05-15 13:32:46 +0200162 * SPI
Saeed Bisharaedabd382009-08-06 15:12:43 +0300163 ****************************************************************************/
Saeed Bisharaedabd382009-08-06 15:12:43 +0300164void __init dove_spi0_init(void)
165{
Andrew Lunn4574b882012-04-06 17:17:26 +0200166 orion_spi_init(DOVE_SPI0_PHYS_BASE);
Saeed Bisharaedabd382009-08-06 15:12:43 +0300167}
168
Saeed Bisharaedabd382009-08-06 15:12:43 +0300169void __init dove_spi1_init(void)
170{
Andrew Lunn4574b882012-04-06 17:17:26 +0200171 orion_spi_1_init(DOVE_SPI1_PHYS_BASE);
Saeed Bisharaedabd382009-08-06 15:12:43 +0300172}
173
174/*****************************************************************************
175 * I2C
176 ****************************************************************************/
Saeed Bisharaedabd382009-08-06 15:12:43 +0300177void __init dove_i2c_init(void)
178{
Andrew Lunnaac7ffa2011-05-15 13:32:45 +0200179 orion_i2c_init(DOVE_I2C_PHYS_BASE, IRQ_DOVE_I2C, 10);
Saeed Bisharaedabd382009-08-06 15:12:43 +0300180}
181
182/*****************************************************************************
183 * Time handling
184 ****************************************************************************/
Lennert Buytenhek4ee1f6b2010-10-15 16:50:26 +0200185void __init dove_init_early(void)
186{
187 orion_time_set_base(TIMER_VIRT_BASE);
188}
189
Saeed Bisharaedabd382009-08-06 15:12:43 +0300190static int get_tclk(void)
191{
192 /* use DOVE_RESET_SAMPLE_HI/LO to detect tclk */
193 return 166666667;
194}
195
196static void dove_timer_init(void)
197{
Lennert Buytenhek4ee1f6b2010-10-15 16:50:26 +0200198 orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
199 IRQ_DOVE_BRIDGE, get_tclk());
Saeed Bisharaedabd382009-08-06 15:12:43 +0300200}
201
202struct sys_timer dove_timer = {
203 .init = dove_timer_init,
204};
205
206/*****************************************************************************
Saeed Bisharaedabd382009-08-06 15:12:43 +0300207 * XOR 0
208 ****************************************************************************/
Saeed Bisharaedabd382009-08-06 15:12:43 +0300209void __init dove_xor0_init(void)
210{
Andrew Lunndb33f4d2011-12-07 21:48:08 +0100211 orion_xor0_init(DOVE_XOR0_PHYS_BASE, DOVE_XOR0_HIGH_PHYS_BASE,
Andrew Lunnee962722011-05-15 13:32:48 +0200212 IRQ_DOVE_XOR_00, IRQ_DOVE_XOR_01);
Saeed Bisharaedabd382009-08-06 15:12:43 +0300213}
214
215/*****************************************************************************
216 * XOR 1
217 ****************************************************************************/
Saeed Bisharaedabd382009-08-06 15:12:43 +0300218void __init dove_xor1_init(void)
219{
Andrew Lunnee962722011-05-15 13:32:48 +0200220 orion_xor1_init(DOVE_XOR1_PHYS_BASE, DOVE_XOR1_HIGH_PHYS_BASE,
221 IRQ_DOVE_XOR_10, IRQ_DOVE_XOR_11);
Saeed Bisharaedabd382009-08-06 15:12:43 +0300222}
223
Saeed Bishara16bc90a2010-05-06 16:12:06 +0300224/*****************************************************************************
225 * SDIO
226 ****************************************************************************/
227static u64 sdio_dmamask = DMA_BIT_MASK(32);
228
229static struct resource dove_sdio0_resources[] = {
230 {
231 .start = DOVE_SDIO0_PHYS_BASE,
232 .end = DOVE_SDIO0_PHYS_BASE + 0xff,
233 .flags = IORESOURCE_MEM,
234 }, {
235 .start = IRQ_DOVE_SDIO0,
236 .end = IRQ_DOVE_SDIO0,
237 .flags = IORESOURCE_IRQ,
238 },
239};
240
241static struct platform_device dove_sdio0 = {
Mike Rapoport930e2fe2010-10-28 21:23:53 +0200242 .name = "sdhci-dove",
Saeed Bishara16bc90a2010-05-06 16:12:06 +0300243 .id = 0,
244 .dev = {
245 .dma_mask = &sdio_dmamask,
246 .coherent_dma_mask = DMA_BIT_MASK(32),
247 },
248 .resource = dove_sdio0_resources,
249 .num_resources = ARRAY_SIZE(dove_sdio0_resources),
250};
251
252void __init dove_sdio0_init(void)
253{
254 platform_device_register(&dove_sdio0);
255}
256
257static struct resource dove_sdio1_resources[] = {
258 {
259 .start = DOVE_SDIO1_PHYS_BASE,
260 .end = DOVE_SDIO1_PHYS_BASE + 0xff,
261 .flags = IORESOURCE_MEM,
262 }, {
263 .start = IRQ_DOVE_SDIO1,
264 .end = IRQ_DOVE_SDIO1,
265 .flags = IORESOURCE_IRQ,
266 },
267};
268
269static struct platform_device dove_sdio1 = {
Mike Rapoport930e2fe2010-10-28 21:23:53 +0200270 .name = "sdhci-dove",
Saeed Bishara16bc90a2010-05-06 16:12:06 +0300271 .id = 1,
272 .dev = {
273 .dma_mask = &sdio_dmamask,
274 .coherent_dma_mask = DMA_BIT_MASK(32),
275 },
276 .resource = dove_sdio1_resources,
277 .num_resources = ARRAY_SIZE(dove_sdio1_resources),
278};
279
280void __init dove_sdio1_init(void)
281{
282 platform_device_register(&dove_sdio1);
283}
284
Saeed Bisharaedabd382009-08-06 15:12:43 +0300285void __init dove_init(void)
286{
Saeed Bisharaedabd382009-08-06 15:12:43 +0300287 printk(KERN_INFO "Dove 88AP510 SoC, ");
Andrew Lunn2f129bf2011-12-15 08:15:07 +0100288 printk(KERN_INFO "TCLK = %dMHz\n", (get_tclk() + 499999) / 1000000);
Saeed Bisharaedabd382009-08-06 15:12:43 +0300289
Lennert Buytenhek573a6522009-11-24 19:33:52 +0200290#ifdef CONFIG_CACHE_TAUROS2
291 tauros2_init();
292#endif
Saeed Bisharaedabd382009-08-06 15:12:43 +0300293 dove_setup_cpu_mbus();
294
Andrew Lunn2f129bf2011-12-15 08:15:07 +0100295 /* Setup root of clk tree */
296 clk_init();
297
Saeed Bisharaedabd382009-08-06 15:12:43 +0300298 /* internal devices that every board has */
299 dove_rtc_init();
300 dove_xor0_init();
301 dove_xor1_init();
302}
Russell King6ca6ff92011-11-05 09:48:52 +0000303
304void dove_restart(char mode, const char *cmd)
305{
306 /*
307 * Enable soft reset to assert RSTOUTn.
308 */
309 writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
310
311 /*
312 * Assert soft reset.
313 */
314 writel(SOFT_RESET, SYSTEM_SOFT_RESET);
315
316 while (1)
317 ;
318}