Ingo Molnar | 06fcb0c | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 1 | #ifndef _LINUX_IRQ_H |
| 2 | #define _LINUX_IRQ_H |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | |
| 4 | /* |
| 5 | * Please do not include this file in generic code. There is currently |
| 6 | * no requirement for any architecture to implement anything held |
| 7 | * within this file. |
| 8 | * |
| 9 | * Thanks. --rmk |
| 10 | */ |
| 11 | |
Adrian Bunk | 23f9b31 | 2005-12-21 02:27:50 +0100 | [diff] [blame] | 12 | #include <linux/smp.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 13 | |
Ingo Molnar | 06fcb0c | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 14 | #ifndef CONFIG_S390 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 15 | |
| 16 | #include <linux/linkage.h> |
| 17 | #include <linux/cache.h> |
| 18 | #include <linux/spinlock.h> |
| 19 | #include <linux/cpumask.h> |
Jan Beulich | 908dcec | 2006-06-23 02:06:00 -0700 | [diff] [blame] | 20 | #include <linux/irqreturn.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 21 | |
| 22 | #include <asm/irq.h> |
| 23 | #include <asm/ptrace.h> |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 24 | #include <asm/irq_regs.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 25 | |
David Howells | 57a58a9 | 2006-10-05 13:06:34 +0100 | [diff] [blame] | 26 | struct irq_desc; |
| 27 | typedef void fastcall (*irq_flow_handler_t)(unsigned int irq, |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 28 | struct irq_desc *desc); |
David Howells | 57a58a9 | 2006-10-05 13:06:34 +0100 | [diff] [blame] | 29 | |
| 30 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 31 | /* |
| 32 | * IRQ line status. |
Thomas Gleixner | 6e21361 | 2006-07-01 19:29:03 -0700 | [diff] [blame] | 33 | * |
Thomas Gleixner | 950f442 | 2007-02-16 01:27:24 -0800 | [diff] [blame] | 34 | * Bits 0-7 are reserved for the IRQF_* bits in linux/interrupt.h |
Thomas Gleixner | 6e21361 | 2006-07-01 19:29:03 -0700 | [diff] [blame] | 35 | * |
| 36 | * IRQ types |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 37 | */ |
Thomas Gleixner | 6e21361 | 2006-07-01 19:29:03 -0700 | [diff] [blame] | 38 | #define IRQ_TYPE_NONE 0x00000000 /* Default, unspecified type */ |
| 39 | #define IRQ_TYPE_EDGE_RISING 0x00000001 /* Edge rising type */ |
| 40 | #define IRQ_TYPE_EDGE_FALLING 0x00000002 /* Edge falling type */ |
| 41 | #define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING) |
| 42 | #define IRQ_TYPE_LEVEL_HIGH 0x00000004 /* Level high type */ |
| 43 | #define IRQ_TYPE_LEVEL_LOW 0x00000008 /* Level low type */ |
| 44 | #define IRQ_TYPE_SENSE_MASK 0x0000000f /* Mask of the above */ |
| 45 | #define IRQ_TYPE_PROBE 0x00000010 /* Probing in progress */ |
| 46 | |
| 47 | /* Internal flags */ |
Thomas Gleixner | 950f442 | 2007-02-16 01:27:24 -0800 | [diff] [blame] | 48 | #define IRQ_INPROGRESS 0x00000100 /* IRQ handler active - do not enter! */ |
| 49 | #define IRQ_DISABLED 0x00000200 /* IRQ disabled - do not enter! */ |
| 50 | #define IRQ_PENDING 0x00000400 /* IRQ pending - replay on enable */ |
| 51 | #define IRQ_REPLAY 0x00000800 /* IRQ has been replayed but not acked yet */ |
| 52 | #define IRQ_AUTODETECT 0x00001000 /* IRQ is being autodetected */ |
| 53 | #define IRQ_WAITING 0x00002000 /* IRQ not yet seen - for autodetection */ |
| 54 | #define IRQ_LEVEL 0x00004000 /* IRQ level triggered */ |
| 55 | #define IRQ_MASKED 0x00008000 /* IRQ masked - shouldn't be seen again */ |
| 56 | #define IRQ_PER_CPU 0x00010000 /* IRQ is per CPU */ |
| 57 | #define IRQ_NOPROBE 0x00020000 /* IRQ is not valid for probing */ |
| 58 | #define IRQ_NOREQUEST 0x00040000 /* IRQ cannot be requested */ |
| 59 | #define IRQ_NOAUTOEN 0x00080000 /* IRQ will not be enabled on request irq */ |
| 60 | #define IRQ_DELAYED_DISABLE 0x00100000 /* IRQ disable (masking) happens delayed. */ |
| 61 | #define IRQ_WAKEUP 0x00200000 /* IRQ triggers system wakeup */ |
| 62 | #define IRQ_MOVE_PENDING 0x00400000 /* need to re-target IRQ destination */ |
| 63 | #define IRQ_NO_BALANCING 0x00800000 /* IRQ is excluded from balancing */ |
| 64 | |
Ingo Molnar | 0d7012a | 2006-06-29 02:24:43 -0700 | [diff] [blame] | 65 | #ifdef CONFIG_IRQ_PER_CPU |
Karsten Wiese | f26fdd5 | 2005-09-06 15:17:25 -0700 | [diff] [blame] | 66 | # define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU) |
Thomas Gleixner | 950f442 | 2007-02-16 01:27:24 -0800 | [diff] [blame] | 67 | # define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU | IRQ_NO_BALANCING) |
Karsten Wiese | f26fdd5 | 2005-09-06 15:17:25 -0700 | [diff] [blame] | 68 | #else |
| 69 | # define CHECK_IRQ_PER_CPU(var) 0 |
Thomas Gleixner | 950f442 | 2007-02-16 01:27:24 -0800 | [diff] [blame] | 70 | # define IRQ_NO_BALANCING_MASK IRQ_NO_BALANCING |
Karsten Wiese | f26fdd5 | 2005-09-06 15:17:25 -0700 | [diff] [blame] | 71 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 72 | |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 73 | struct proc_dir_entry; |
Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 74 | struct msi_desc; |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 75 | |
Ingo Molnar | 8fee5c3 | 2006-06-29 02:24:45 -0700 | [diff] [blame] | 76 | /** |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 77 | * struct irq_chip - hardware interrupt chip descriptor |
Ingo Molnar | 8fee5c3 | 2006-06-29 02:24:45 -0700 | [diff] [blame] | 78 | * |
| 79 | * @name: name for /proc/interrupts |
| 80 | * @startup: start up the interrupt (defaults to ->enable if NULL) |
| 81 | * @shutdown: shut down the interrupt (defaults to ->disable if NULL) |
| 82 | * @enable: enable the interrupt (defaults to chip->unmask if NULL) |
| 83 | * @disable: disable the interrupt (defaults to chip->mask if NULL) |
Ingo Molnar | 8fee5c3 | 2006-06-29 02:24:45 -0700 | [diff] [blame] | 84 | * @ack: start of a new interrupt |
| 85 | * @mask: mask an interrupt source |
| 86 | * @mask_ack: ack and mask an interrupt source |
| 87 | * @unmask: unmask an interrupt source |
Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 88 | * @eoi: end of interrupt - chip level |
| 89 | * @end: end of interrupt - flow level |
Ingo Molnar | 8fee5c3 | 2006-06-29 02:24:45 -0700 | [diff] [blame] | 90 | * @set_affinity: set the CPU affinity on SMP machines |
| 91 | * @retrigger: resend an IRQ to the CPU |
| 92 | * @set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ |
| 93 | * @set_wake: enable/disable power-management wake-on of an IRQ |
| 94 | * |
| 95 | * @release: release function solely used by UML |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 96 | * @typename: obsoleted by name, kept as migration helper |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 97 | */ |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 98 | struct irq_chip { |
| 99 | const char *name; |
Ingo Molnar | 71d218b | 2006-06-29 02:24:41 -0700 | [diff] [blame] | 100 | unsigned int (*startup)(unsigned int irq); |
| 101 | void (*shutdown)(unsigned int irq); |
| 102 | void (*enable)(unsigned int irq); |
| 103 | void (*disable)(unsigned int irq); |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 104 | |
Ingo Molnar | 71d218b | 2006-06-29 02:24:41 -0700 | [diff] [blame] | 105 | void (*ack)(unsigned int irq); |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 106 | void (*mask)(unsigned int irq); |
| 107 | void (*mask_ack)(unsigned int irq); |
| 108 | void (*unmask)(unsigned int irq); |
Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 109 | void (*eoi)(unsigned int irq); |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 110 | |
Ingo Molnar | 71d218b | 2006-06-29 02:24:41 -0700 | [diff] [blame] | 111 | void (*end)(unsigned int irq); |
| 112 | void (*set_affinity)(unsigned int irq, cpumask_t dest); |
Ingo Molnar | c0ad90a | 2006-06-29 02:24:44 -0700 | [diff] [blame] | 113 | int (*retrigger)(unsigned int irq); |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 114 | int (*set_type)(unsigned int irq, unsigned int flow_type); |
| 115 | int (*set_wake)(unsigned int irq, unsigned int on); |
Ingo Molnar | c0ad90a | 2006-06-29 02:24:44 -0700 | [diff] [blame] | 116 | |
Paolo 'Blaisorblade' Giarrusso | b77d6ad | 2005-06-21 17:16:24 -0700 | [diff] [blame] | 117 | /* Currently used only by UML, might disappear one day.*/ |
| 118 | #ifdef CONFIG_IRQ_RELEASE_METHOD |
Ingo Molnar | 71d218b | 2006-06-29 02:24:41 -0700 | [diff] [blame] | 119 | void (*release)(unsigned int irq, void *dev_id); |
Paolo 'Blaisorblade' Giarrusso | b77d6ad | 2005-06-21 17:16:24 -0700 | [diff] [blame] | 120 | #endif |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 121 | /* |
| 122 | * For compatibility, ->typename is copied into ->name. |
| 123 | * Will disappear. |
| 124 | */ |
| 125 | const char *typename; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 126 | }; |
| 127 | |
Ingo Molnar | 8fee5c3 | 2006-06-29 02:24:45 -0700 | [diff] [blame] | 128 | /** |
| 129 | * struct irq_desc - interrupt descriptor |
| 130 | * |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 131 | * @handle_irq: highlevel irq-events handler [if NULL, __do_IRQ()] |
| 132 | * @chip: low level interrupt hardware access |
| 133 | * @handler_data: per-IRQ data for the irq_chip methods |
| 134 | * @chip_data: platform-specific per-chip private data for the chip |
| 135 | * methods, to allow shared chip implementations |
Ingo Molnar | 8fee5c3 | 2006-06-29 02:24:45 -0700 | [diff] [blame] | 136 | * @action: the irq action chain |
| 137 | * @status: status information |
| 138 | * @depth: disable-depth, for nested irq_disable() calls |
David Brownell | 15a647e | 2006-07-30 03:03:08 -0700 | [diff] [blame] | 139 | * @wake_depth: enable depth, for multiple set_irq_wake() callers |
Ingo Molnar | 8fee5c3 | 2006-06-29 02:24:45 -0700 | [diff] [blame] | 140 | * @irq_count: stats field to detect stalled irqs |
| 141 | * @irqs_unhandled: stats field for spurious unhandled interrupts |
| 142 | * @lock: locking for SMP |
| 143 | * @affinity: IRQ affinity on SMP |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 144 | * @cpu: cpu index useful for balancing |
Ingo Molnar | 8fee5c3 | 2006-06-29 02:24:45 -0700 | [diff] [blame] | 145 | * @pending_mask: pending rebalanced interrupts |
Ingo Molnar | 8fee5c3 | 2006-06-29 02:24:45 -0700 | [diff] [blame] | 146 | * @dir: /proc/irq/ procfs entry |
| 147 | * @affinity_entry: /proc/irq/smp_affinity procfs entry on SMP |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 148 | * @name: flow handler name for /proc/interrupts output |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 149 | * |
| 150 | * Pad this out to 32 bytes for cache and indexing reasons. |
| 151 | */ |
Ingo Molnar | 34ffdb7 | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 152 | struct irq_desc { |
David Howells | 57a58a9 | 2006-10-05 13:06:34 +0100 | [diff] [blame] | 153 | irq_flow_handler_t handle_irq; |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 154 | struct irq_chip *chip; |
Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 155 | struct msi_desc *msi_desc; |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 156 | void *handler_data; |
Ingo Molnar | 71d218b | 2006-06-29 02:24:41 -0700 | [diff] [blame] | 157 | void *chip_data; |
| 158 | struct irqaction *action; /* IRQ action list */ |
| 159 | unsigned int status; /* IRQ status */ |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 160 | |
Ingo Molnar | 71d218b | 2006-06-29 02:24:41 -0700 | [diff] [blame] | 161 | unsigned int depth; /* nested irq disables */ |
David Brownell | 15a647e | 2006-07-30 03:03:08 -0700 | [diff] [blame] | 162 | unsigned int wake_depth; /* nested wake enables */ |
Ingo Molnar | 71d218b | 2006-06-29 02:24:41 -0700 | [diff] [blame] | 163 | unsigned int irq_count; /* For detecting broken IRQs */ |
| 164 | unsigned int irqs_unhandled; |
| 165 | spinlock_t lock; |
Ingo Molnar | a53da52 | 2006-06-29 02:24:38 -0700 | [diff] [blame] | 166 | #ifdef CONFIG_SMP |
Ingo Molnar | 71d218b | 2006-06-29 02:24:41 -0700 | [diff] [blame] | 167 | cpumask_t affinity; |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 168 | unsigned int cpu; |
Ingo Molnar | a53da52 | 2006-06-29 02:24:38 -0700 | [diff] [blame] | 169 | #endif |
Ingo Molnar | 06fcb0c | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 170 | #if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE) |
Ingo Molnar | cd916d3 | 2006-06-29 02:24:42 -0700 | [diff] [blame] | 171 | cpumask_t pending_mask; |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 172 | #endif |
Ingo Molnar | 4a733ee | 2006-06-29 02:24:42 -0700 | [diff] [blame] | 173 | #ifdef CONFIG_PROC_FS |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 174 | struct proc_dir_entry *dir; |
Ingo Molnar | 4a733ee | 2006-06-29 02:24:42 -0700 | [diff] [blame] | 175 | #endif |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 176 | const char *name; |
Ingo Molnar | 34ffdb7 | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 177 | } ____cacheline_aligned; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 178 | |
Ingo Molnar | 34ffdb7 | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 179 | extern struct irq_desc irq_desc[NR_IRQS]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 180 | |
Ingo Molnar | 34ffdb7 | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 181 | /* |
| 182 | * Migration helpers for obsolete names, they will go away: |
| 183 | */ |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 184 | #define hw_interrupt_type irq_chip |
| 185 | typedef struct irq_chip hw_irq_controller; |
| 186 | #define no_irq_type no_irq_chip |
Ingo Molnar | 34ffdb7 | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 187 | typedef struct irq_desc irq_desc_t; |
| 188 | |
| 189 | /* |
| 190 | * Pick up the arch-dependent methods: |
| 191 | */ |
| 192 | #include <asm/hw_irq.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 193 | |
Ingo Molnar | 06fcb0c | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 194 | extern int setup_irq(unsigned int irq, struct irqaction *new); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 195 | |
| 196 | #ifdef CONFIG_GENERIC_HARDIRQS |
Ingo Molnar | 06fcb0c | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 197 | |
Thomas Gleixner | d061daa | 2006-07-03 02:18:48 +0200 | [diff] [blame] | 198 | #ifndef handle_dynamic_tick |
| 199 | # define handle_dynamic_tick(a) do { } while (0) |
| 200 | #endif |
| 201 | |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 202 | #ifdef CONFIG_SMP |
| 203 | static inline void set_native_irq_info(int irq, cpumask_t mask) |
| 204 | { |
Ingo Molnar | a53da52 | 2006-06-29 02:24:38 -0700 | [diff] [blame] | 205 | irq_desc[irq].affinity = mask; |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 206 | } |
| 207 | #else |
| 208 | static inline void set_native_irq_info(int irq, cpumask_t mask) |
| 209 | { |
| 210 | } |
| 211 | #endif |
| 212 | |
| 213 | #ifdef CONFIG_SMP |
| 214 | |
Ingo Molnar | 06fcb0c | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 215 | #if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE) |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 216 | |
Andrew Morton | c777ac5 | 2006-03-25 03:07:36 -0800 | [diff] [blame] | 217 | void set_pending_irq(unsigned int irq, cpumask_t mask); |
| 218 | void move_native_irq(int irq); |
Eric W. Biederman | e7b946e | 2006-10-04 02:16:29 -0700 | [diff] [blame] | 219 | void move_masked_irq(int irq); |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 220 | |
Ingo Molnar | 06fcb0c | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 221 | #else /* CONFIG_GENERIC_PENDING_IRQ || CONFIG_IRQBALANCE */ |
| 222 | |
| 223 | static inline void move_irq(int irq) |
| 224 | { |
| 225 | } |
| 226 | |
| 227 | static inline void move_native_irq(int irq) |
| 228 | { |
| 229 | } |
| 230 | |
Eric W. Biederman | e7b946e | 2006-10-04 02:16:29 -0700 | [diff] [blame] | 231 | static inline void move_masked_irq(int irq) |
| 232 | { |
| 233 | } |
| 234 | |
Ingo Molnar | 06fcb0c | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 235 | static inline void set_pending_irq(unsigned int irq, cpumask_t mask) |
| 236 | { |
| 237 | } |
| 238 | |
Ingo Molnar | 06fcb0c | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 239 | #endif /* CONFIG_GENERIC_PENDING_IRQ */ |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 240 | |
Thomas Gleixner | 771ee3b | 2007-02-16 01:27:25 -0800 | [diff] [blame^] | 241 | extern int irq_set_affinity(unsigned int irq, cpumask_t cpumask); |
| 242 | extern int irq_can_set_affinity(unsigned int irq); |
| 243 | |
Ingo Molnar | 06fcb0c | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 244 | #else /* CONFIG_SMP */ |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 245 | |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 246 | #define move_native_irq(x) |
Eric W. Biederman | e7b946e | 2006-10-04 02:16:29 -0700 | [diff] [blame] | 247 | #define move_masked_irq(x) |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 248 | |
Thomas Gleixner | 771ee3b | 2007-02-16 01:27:25 -0800 | [diff] [blame^] | 249 | static inline int irq_set_affinity(unsigned int irq, cpumask_t cpumask) |
| 250 | { |
| 251 | return -EINVAL; |
| 252 | } |
| 253 | |
| 254 | static inline int irq_can_set_affinity(unsigned int irq) { return 0; } |
| 255 | |
Ingo Molnar | 06fcb0c | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 256 | #endif /* CONFIG_SMP */ |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 257 | |
Zhang Yanmin | 1b61b91 | 2006-06-23 02:04:22 -0700 | [diff] [blame] | 258 | #ifdef CONFIG_IRQBALANCE |
| 259 | extern void set_balance_irq_affinity(unsigned int irq, cpumask_t mask); |
| 260 | #else |
| 261 | static inline void set_balance_irq_affinity(unsigned int irq, cpumask_t mask) |
| 262 | { |
| 263 | } |
| 264 | #endif |
| 265 | |
Ingo Molnar | 71d218b | 2006-06-29 02:24:41 -0700 | [diff] [blame] | 266 | #ifdef CONFIG_AUTO_IRQ_AFFINITY |
| 267 | extern int select_smp_affinity(unsigned int irq); |
| 268 | #else |
| 269 | static inline int select_smp_affinity(unsigned int irq) |
| 270 | { |
| 271 | return 1; |
| 272 | } |
| 273 | #endif |
| 274 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 275 | extern int no_irq_affinity; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 276 | |
Thomas Gleixner | 950f442 | 2007-02-16 01:27:24 -0800 | [diff] [blame] | 277 | static inline int irq_balancing_disabled(unsigned int irq) |
| 278 | { |
| 279 | return irq_desc[irq].status & IRQ_NO_BALANCING_MASK; |
| 280 | } |
| 281 | |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 282 | /* Handle irq action chains: */ |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 283 | extern int handle_IRQ_event(unsigned int irq, struct irqaction *action); |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 284 | |
Ingo Molnar | 2e60bbb | 2006-06-29 02:24:39 -0700 | [diff] [blame] | 285 | /* |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 286 | * Built-in IRQ handlers for various IRQ types, |
| 287 | * callable via desc->chip->handle_irq() |
| 288 | */ |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 289 | extern void fastcall handle_level_irq(unsigned int irq, struct irq_desc *desc); |
| 290 | extern void fastcall handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc); |
| 291 | extern void fastcall handle_edge_irq(unsigned int irq, struct irq_desc *desc); |
| 292 | extern void fastcall handle_simple_irq(unsigned int irq, struct irq_desc *desc); |
| 293 | extern void fastcall handle_percpu_irq(unsigned int irq, struct irq_desc *desc); |
| 294 | extern void fastcall handle_bad_irq(unsigned int irq, struct irq_desc *desc); |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 295 | |
| 296 | /* |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 297 | * Monolithic do_IRQ implementation. |
| 298 | * (is an explicit fastcall, because i386 4KSTACKS calls it from assembly) |
Ingo Molnar | 2e60bbb | 2006-06-29 02:24:39 -0700 | [diff] [blame] | 299 | */ |
David Howells | af8c65b | 2006-09-25 23:32:07 -0700 | [diff] [blame] | 300 | #ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 301 | extern fastcall unsigned int __do_IRQ(unsigned int irq); |
David Howells | af8c65b | 2006-09-25 23:32:07 -0700 | [diff] [blame] | 302 | #endif |
Ingo Molnar | 2e60bbb | 2006-06-29 02:24:39 -0700 | [diff] [blame] | 303 | |
Ingo Molnar | dae8620 | 2006-06-29 02:24:52 -0700 | [diff] [blame] | 304 | /* |
| 305 | * Architectures call this to let the generic IRQ layer |
| 306 | * handle an interrupt. If the descriptor is attached to an |
| 307 | * irqchip-style controller then we call the ->handle_irq() handler, |
| 308 | * and it calls __do_IRQ() if it's attached to an irqtype-style controller. |
| 309 | */ |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 310 | static inline void generic_handle_irq(unsigned int irq) |
Ingo Molnar | dae8620 | 2006-06-29 02:24:52 -0700 | [diff] [blame] | 311 | { |
| 312 | struct irq_desc *desc = irq_desc + irq; |
| 313 | |
David Howells | af8c65b | 2006-09-25 23:32:07 -0700 | [diff] [blame] | 314 | #ifdef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 315 | desc->handle_irq(irq, desc); |
David Howells | af8c65b | 2006-09-25 23:32:07 -0700 | [diff] [blame] | 316 | #else |
Ingo Molnar | dae8620 | 2006-06-29 02:24:52 -0700 | [diff] [blame] | 317 | if (likely(desc->handle_irq)) |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 318 | desc->handle_irq(irq, desc); |
Ingo Molnar | dae8620 | 2006-06-29 02:24:52 -0700 | [diff] [blame] | 319 | else |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 320 | __do_IRQ(irq); |
David Howells | af8c65b | 2006-09-25 23:32:07 -0700 | [diff] [blame] | 321 | #endif |
Ingo Molnar | dae8620 | 2006-06-29 02:24:52 -0700 | [diff] [blame] | 322 | } |
| 323 | |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 324 | /* Handling of unhandled and spurious interrupts: */ |
Ingo Molnar | 34ffdb7 | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 325 | extern void note_interrupt(unsigned int irq, struct irq_desc *desc, |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 326 | int action_ret); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 327 | |
Thomas Gleixner | a4633adc | 2006-06-29 02:24:48 -0700 | [diff] [blame] | 328 | /* Resending of interrupts :*/ |
| 329 | void check_irq_resend(struct irq_desc *desc, unsigned int irq); |
| 330 | |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 331 | /* Initialize /proc/irq/ */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 332 | extern void init_irq_proc(void); |
Ivan Kokshaysky | eee4526 | 2006-01-06 00:12:21 -0800 | [diff] [blame] | 333 | |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 334 | /* Enable/disable irq debugging output: */ |
| 335 | extern int noirqdebug_setup(char *str); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 336 | |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 337 | /* Checks whether the interrupt can be requested by request_irq(): */ |
| 338 | extern int can_request_irq(unsigned int irq, unsigned long irqflags); |
| 339 | |
Thomas Gleixner | f8b5473 | 2006-07-01 22:30:08 +0100 | [diff] [blame] | 340 | /* Dummy irq-chip implementations: */ |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 341 | extern struct irq_chip no_irq_chip; |
Thomas Gleixner | f8b5473 | 2006-07-01 22:30:08 +0100 | [diff] [blame] | 342 | extern struct irq_chip dummy_irq_chip; |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 343 | |
| 344 | extern void |
Ingo Molnar | 145fc65 | 2006-10-19 23:28:28 -0700 | [diff] [blame] | 345 | set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip, |
| 346 | irq_flow_handler_t handle); |
| 347 | extern void |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 348 | set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip, |
| 349 | irq_flow_handler_t handle, const char *name); |
| 350 | |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 351 | extern void |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 352 | __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained, |
| 353 | const char *name); |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 354 | |
| 355 | /* |
| 356 | * Set a highlevel flow handler for a given IRQ: |
| 357 | */ |
| 358 | static inline void |
David Howells | 57a58a9 | 2006-10-05 13:06:34 +0100 | [diff] [blame] | 359 | set_irq_handler(unsigned int irq, irq_flow_handler_t handle) |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 360 | { |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 361 | __set_irq_handler(irq, handle, 0, NULL); |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 362 | } |
| 363 | |
| 364 | /* |
| 365 | * Set a highlevel chained flow handler for a given IRQ. |
| 366 | * (a chained handler is automatically enabled and set to |
| 367 | * IRQ_NOREQUEST and IRQ_NOPROBE) |
| 368 | */ |
| 369 | static inline void |
| 370 | set_irq_chained_handler(unsigned int irq, |
David Howells | 57a58a9 | 2006-10-05 13:06:34 +0100 | [diff] [blame] | 371 | irq_flow_handler_t handle) |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 372 | { |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 373 | __set_irq_handler(irq, handle, 1, NULL); |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 374 | } |
| 375 | |
Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 376 | /* Handle dynamic irq creation and destruction */ |
| 377 | extern int create_irq(void); |
| 378 | extern void destroy_irq(unsigned int irq); |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 379 | |
Eric W. Biederman | 1f80025 | 2006-10-04 02:16:56 -0700 | [diff] [blame] | 380 | /* Test to see if a driver has successfully requested an irq */ |
| 381 | static inline int irq_has_action(unsigned int irq) |
| 382 | { |
| 383 | struct irq_desc *desc = irq_desc + irq; |
| 384 | return desc->action != NULL; |
| 385 | } |
| 386 | |
Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 387 | /* Dynamic irq helper functions */ |
| 388 | extern void dynamic_irq_init(unsigned int irq); |
| 389 | extern void dynamic_irq_cleanup(unsigned int irq); |
| 390 | |
| 391 | /* Set/get chip/data for an IRQ: */ |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 392 | extern int set_irq_chip(unsigned int irq, struct irq_chip *chip); |
| 393 | extern int set_irq_data(unsigned int irq, void *data); |
| 394 | extern int set_irq_chip_data(unsigned int irq, void *data); |
| 395 | extern int set_irq_type(unsigned int irq, unsigned int type); |
Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 396 | extern int set_irq_msi(unsigned int irq, struct msi_desc *entry); |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 397 | |
| 398 | #define get_irq_chip(irq) (irq_desc[irq].chip) |
| 399 | #define get_irq_chip_data(irq) (irq_desc[irq].chip_data) |
| 400 | #define get_irq_data(irq) (irq_desc[irq].handler_data) |
Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 401 | #define get_irq_msi(irq) (irq_desc[irq].msi_desc) |
Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 402 | |
Thomas Gleixner | 6a6de9e | 2006-06-29 02:24:51 -0700 | [diff] [blame] | 403 | #endif /* CONFIG_GENERIC_HARDIRQS */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 404 | |
Ingo Molnar | 06fcb0c | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 405 | #endif /* !CONFIG_S390 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 406 | |
Ingo Molnar | 06fcb0c | 2006-06-29 02:24:40 -0700 | [diff] [blame] | 407 | #endif /* _LINUX_IRQ_H */ |