Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Common functionality for the alsa driver code base for HD Audio. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify it |
| 5 | * under the terms of the GNU General Public License as published by the Free |
| 6 | * Software Foundation; either version 2 of the License, or (at your option) |
| 7 | * any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | * more details. |
| 13 | */ |
| 14 | |
| 15 | #ifndef __SOUND_HDA_CONTROLLER_H |
| 16 | #define __SOUND_HDA_CONTROLLER_H |
| 17 | |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 18 | #include <linux/timecounter.h> |
| 19 | #include <linux/interrupt.h> |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 20 | #include <sound/core.h> |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 21 | #include <sound/pcm.h> |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 22 | #include <sound/initval.h> |
| 23 | #include "hda_codec.h" |
Takashi Iwai | 1475241 | 2015-04-14 12:15:47 +0200 | [diff] [blame] | 24 | #include <sound/hda_register.h> |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 25 | |
Takashi Iwai | 1475241 | 2015-04-14 12:15:47 +0200 | [diff] [blame] | 26 | #define AZX_MAX_CODECS HDA_MAX_CODECS |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 27 | #define AZX_DEFAULT_CODECS 4 |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 28 | |
| 29 | /* driver quirks (capabilities) */ |
| 30 | /* bits 0-7 are used for indicating driver type */ |
| 31 | #define AZX_DCAPS_NO_TCSEL (1 << 8) /* No Intel TCSEL bit */ |
| 32 | #define AZX_DCAPS_NO_MSI (1 << 9) /* No MSI support */ |
| 33 | #define AZX_DCAPS_SNOOP_MASK (3 << 10) /* snoop type mask */ |
| 34 | #define AZX_DCAPS_SNOOP_OFF (1 << 12) /* snoop default off */ |
| 35 | #define AZX_DCAPS_RIRB_DELAY (1 << 13) /* Long delay in read loop */ |
| 36 | #define AZX_DCAPS_RIRB_PRE_DELAY (1 << 14) /* Put a delay before read */ |
| 37 | #define AZX_DCAPS_CTX_WORKAROUND (1 << 15) /* X-Fi workaround */ |
| 38 | #define AZX_DCAPS_POSFIX_LPIB (1 << 16) /* Use LPIB as default */ |
| 39 | #define AZX_DCAPS_POSFIX_VIA (1 << 17) /* Use VIACOMBO as default */ |
| 40 | #define AZX_DCAPS_NO_64BIT (1 << 18) /* No 64bit address */ |
| 41 | #define AZX_DCAPS_SYNC_WRITE (1 << 19) /* sync each cmd write */ |
| 42 | #define AZX_DCAPS_OLD_SSYNC (1 << 20) /* Old SSYNC reg for ICH */ |
| 43 | #define AZX_DCAPS_NO_ALIGN_BUFSIZE (1 << 21) /* no buffer size alignment */ |
| 44 | /* 22 unused */ |
| 45 | #define AZX_DCAPS_4K_BDLE_BOUNDARY (1 << 23) /* BDLE in 4k boundary */ |
| 46 | #define AZX_DCAPS_REVERSE_ASSIGN (1 << 24) /* Assign devices in reverse order */ |
| 47 | #define AZX_DCAPS_COUNT_LPIB_DELAY (1 << 25) /* Take LPIB as delay */ |
| 48 | #define AZX_DCAPS_PM_RUNTIME (1 << 26) /* runtime PM support */ |
| 49 | #define AZX_DCAPS_I915_POWERWELL (1 << 27) /* HSW i915 powerwell support */ |
| 50 | #define AZX_DCAPS_CORBRP_SELF_CLEAR (1 << 28) /* CORBRP clears itself after reset */ |
| 51 | #define AZX_DCAPS_NO_MSI64 (1 << 29) /* Stick to 32-bit MSIs */ |
| 52 | #define AZX_DCAPS_SEPARATE_STREAM_TAG (1 << 30) /* capture and playback use separate stream tag */ |
| 53 | |
| 54 | enum { |
| 55 | AZX_SNOOP_TYPE_NONE, |
| 56 | AZX_SNOOP_TYPE_SCH, |
| 57 | AZX_SNOOP_TYPE_ATI, |
| 58 | AZX_SNOOP_TYPE_NVIDIA, |
| 59 | }; |
| 60 | |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 61 | struct azx_dev { |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 62 | struct hdac_stream core; |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 63 | |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 64 | unsigned int irq_pending:1; |
| 65 | unsigned int prepared:1; |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 66 | /* |
| 67 | * For VIA: |
| 68 | * A flag to ensure DMA position is 0 |
| 69 | * when link position is not greater than FIFO size |
| 70 | */ |
| 71 | unsigned int insufficient:1; |
| 72 | unsigned int wc_marked:1; |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 73 | }; |
| 74 | |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 75 | #define azx_stream(dev) (&(dev)->core) |
| 76 | #define stream_to_azx_dev(s) container_of(s, struct azx_dev, core) |
| 77 | |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 78 | /* CORB/RIRB */ |
| 79 | struct azx_rb { |
| 80 | u32 *buf; /* CORB/RIRB buffer |
| 81 | * Each CORB entry is 4byte, RIRB is 8byte |
| 82 | */ |
| 83 | dma_addr_t addr; /* physical address of CORB/RIRB buffer */ |
| 84 | /* for RIRB */ |
| 85 | unsigned short rp, wp; /* read/write pointers */ |
| 86 | int cmds[AZX_MAX_CODECS]; /* number of pending requests */ |
| 87 | u32 res[AZX_MAX_CODECS]; /* last read value */ |
| 88 | }; |
| 89 | |
| 90 | struct azx; |
| 91 | |
| 92 | /* Functions to read/write to hda registers. */ |
| 93 | struct hda_controller_ops { |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 94 | /* Disable msi if supported, PCI only */ |
| 95 | int (*disable_msi_reset_irq)(struct azx *); |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 96 | int (*substream_alloc_pages)(struct azx *chip, |
| 97 | struct snd_pcm_substream *substream, |
| 98 | size_t size); |
| 99 | int (*substream_free_pages)(struct azx *chip, |
| 100 | struct snd_pcm_substream *substream); |
| 101 | void (*pcm_mmap_prepare)(struct snd_pcm_substream *substream, |
| 102 | struct vm_area_struct *area); |
| 103 | /* Check if current position is acceptable */ |
| 104 | int (*position_check)(struct azx *chip, struct azx_dev *azx_dev); |
| 105 | }; |
| 106 | |
| 107 | struct azx_pcm { |
| 108 | struct azx *chip; |
| 109 | struct snd_pcm *pcm; |
| 110 | struct hda_codec *codec; |
Takashi Iwai | 820cc6c | 2015-02-20 12:50:46 +0100 | [diff] [blame] | 111 | struct hda_pcm *info; |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 112 | struct list_head list; |
| 113 | }; |
| 114 | |
| 115 | typedef unsigned int (*azx_get_pos_callback_t)(struct azx *, struct azx_dev *); |
| 116 | typedef int (*azx_get_delay_callback_t)(struct azx *, struct azx_dev *, unsigned int pos); |
| 117 | |
| 118 | struct azx { |
| 119 | struct snd_card *card; |
| 120 | struct pci_dev *pci; |
| 121 | int dev_index; |
| 122 | |
| 123 | /* chip type specific */ |
| 124 | int driver_type; |
| 125 | unsigned int driver_caps; |
| 126 | int playback_streams; |
| 127 | int playback_index_offset; |
| 128 | int capture_streams; |
| 129 | int capture_index_offset; |
| 130 | int num_streams; |
| 131 | const int *jackpoll_ms; /* per-card jack poll interval */ |
| 132 | |
| 133 | /* Register interaction. */ |
| 134 | const struct hda_controller_ops *ops; |
Takashi Iwai | a43ff5b | 2015-04-14 17:26:00 +0200 | [diff] [blame] | 135 | const struct hdac_io_ops *io_ops; |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 136 | |
| 137 | /* position adjustment callbacks */ |
| 138 | azx_get_pos_callback_t get_position[2]; |
| 139 | azx_get_delay_callback_t get_delay[2]; |
| 140 | |
| 141 | /* pci resources */ |
| 142 | unsigned long addr; |
| 143 | void __iomem *remap_addr; |
| 144 | int irq; |
| 145 | |
| 146 | /* locks */ |
| 147 | spinlock_t reg_lock; |
| 148 | struct mutex open_mutex; /* Prevents concurrent open/close operations */ |
| 149 | |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 150 | /* PCM */ |
| 151 | struct list_head pcm_list; /* azx_pcm list */ |
| 152 | |
| 153 | /* HD codec */ |
| 154 | unsigned short codec_mask; |
| 155 | int codec_probe_mask; /* copied from probe_mask option */ |
| 156 | struct hda_bus *bus; |
| 157 | unsigned int beep_mode; |
| 158 | |
| 159 | /* CORB/RIRB */ |
| 160 | struct azx_rb corb; |
| 161 | struct azx_rb rirb; |
| 162 | |
| 163 | /* CORB/RIRB and position buffers */ |
| 164 | struct snd_dma_buffer rb; |
| 165 | struct snd_dma_buffer posbuf; |
| 166 | |
| 167 | #ifdef CONFIG_SND_HDA_PATCH_LOADER |
| 168 | const struct firmware *fw; |
| 169 | #endif |
| 170 | |
| 171 | /* flags */ |
| 172 | const int *bdl_pos_adj; |
| 173 | int poll_count; |
| 174 | unsigned int running:1; |
| 175 | unsigned int initialized:1; |
| 176 | unsigned int single_cmd:1; |
| 177 | unsigned int polling_mode:1; |
| 178 | unsigned int msi:1; |
| 179 | unsigned int probing:1; /* codec probing phase */ |
| 180 | unsigned int snoop:1; |
| 181 | unsigned int align_buffer_size:1; |
| 182 | unsigned int region_requested:1; |
| 183 | unsigned int disabled:1; /* disabled by VGA-switcher */ |
| 184 | |
| 185 | /* for debugging */ |
| 186 | unsigned int last_cmd[AZX_MAX_CODECS]; |
| 187 | |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 188 | #ifdef CONFIG_SND_HDA_DSP_LOADER |
| 189 | struct azx_dev saved_azx_dev; |
| 190 | #endif |
| 191 | }; |
| 192 | |
Takashi Iwai | a43ff5b | 2015-04-14 17:26:00 +0200 | [diff] [blame] | 193 | #define azx_bus(chip) (&(chip)->bus->core) |
| 194 | |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 195 | #ifdef CONFIG_X86 |
| 196 | #define azx_snoop(chip) ((chip)->snoop) |
| 197 | #else |
| 198 | #define azx_snoop(chip) true |
| 199 | #endif |
| 200 | |
| 201 | /* |
| 202 | * macros for easy use |
| 203 | */ |
| 204 | |
| 205 | #define azx_writel(chip, reg, value) \ |
Takashi Iwai | a43ff5b | 2015-04-14 17:26:00 +0200 | [diff] [blame] | 206 | ((chip)->io_ops->reg_writel(value, (chip)->remap_addr + AZX_REG_##reg)) |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 207 | #define azx_readl(chip, reg) \ |
Takashi Iwai | a43ff5b | 2015-04-14 17:26:00 +0200 | [diff] [blame] | 208 | ((chip)->io_ops->reg_readl((chip)->remap_addr + AZX_REG_##reg)) |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 209 | #define azx_writew(chip, reg, value) \ |
Takashi Iwai | a43ff5b | 2015-04-14 17:26:00 +0200 | [diff] [blame] | 210 | ((chip)->io_ops->reg_writew(value, (chip)->remap_addr + AZX_REG_##reg)) |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 211 | #define azx_readw(chip, reg) \ |
Takashi Iwai | a43ff5b | 2015-04-14 17:26:00 +0200 | [diff] [blame] | 212 | ((chip)->io_ops->reg_readw((chip)->remap_addr + AZX_REG_##reg)) |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 213 | #define azx_writeb(chip, reg, value) \ |
Takashi Iwai | a43ff5b | 2015-04-14 17:26:00 +0200 | [diff] [blame] | 214 | ((chip)->io_ops->reg_writeb(value, (chip)->remap_addr + AZX_REG_##reg)) |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 215 | #define azx_readb(chip, reg) \ |
Takashi Iwai | a43ff5b | 2015-04-14 17:26:00 +0200 | [diff] [blame] | 216 | ((chip)->io_ops->reg_readb((chip)->remap_addr + AZX_REG_##reg)) |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 217 | |
| 218 | #define azx_sd_writel(chip, dev, reg, value) \ |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 219 | snd_hdac_stream_writel(&(dev)->core, reg, value) |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 220 | #define azx_sd_readl(chip, dev, reg) \ |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 221 | snd_hdac_stream_readl(&(dev)->core, reg) |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 222 | #define azx_sd_writew(chip, dev, reg, value) \ |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 223 | snd_hdac_stream_writew(&(dev)->core, reg, value) |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 224 | #define azx_sd_readw(chip, dev, reg) \ |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 225 | snd_hdac_stream_readw(&(dev)->core, reg) |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 226 | #define azx_sd_writeb(chip, dev, reg, value) \ |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 227 | snd_hdac_stream_writeb(&(dev)->core, reg, value) |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 228 | #define azx_sd_readb(chip, dev, reg) \ |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 229 | snd_hdac_stream_readb(&(dev)->core, reg) |
Takashi Iwai | 89a93fe | 2015-02-19 18:04:17 +0100 | [diff] [blame] | 230 | |
| 231 | #define azx_has_pm_runtime(chip) \ |
| 232 | (!AZX_DCAPS_PM_RUNTIME || ((chip)->driver_caps & AZX_DCAPS_PM_RUNTIME)) |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 233 | |
| 234 | /* PCM setup */ |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 235 | static inline struct azx_dev *get_azx_dev(struct snd_pcm_substream *substream) |
| 236 | { |
| 237 | return substream->runtime->private_data; |
| 238 | } |
Takashi Iwai | b6050ef | 2014-06-26 16:50:16 +0200 | [diff] [blame] | 239 | unsigned int azx_get_position(struct azx *chip, struct azx_dev *azx_dev); |
| 240 | unsigned int azx_get_pos_lpib(struct azx *chip, struct azx_dev *azx_dev); |
| 241 | unsigned int azx_get_pos_posbuf(struct azx *chip, struct azx_dev *azx_dev); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 242 | |
| 243 | /* Stream control. */ |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 244 | void azx_stop_all_streams(struct azx *chip); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 245 | |
Dylan Reid | 6790899 | 2014-02-28 15:41:23 -0800 | [diff] [blame] | 246 | /* Allocation functions. */ |
| 247 | int azx_alloc_stream_pages(struct azx *chip); |
| 248 | void azx_free_stream_pages(struct azx *chip); |
| 249 | |
Dylan Reid | f43923f | 2014-02-28 15:41:27 -0800 | [diff] [blame] | 250 | /* Low level azx interface */ |
Thierry Reding | 17c3ad0 | 2014-04-09 12:30:57 +0200 | [diff] [blame] | 251 | void azx_init_chip(struct azx *chip, bool full_reset); |
Dylan Reid | f43923f | 2014-02-28 15:41:27 -0800 | [diff] [blame] | 252 | void azx_stop_chip(struct azx *chip); |
| 253 | void azx_enter_link_reset(struct azx *chip); |
Dylan Reid | f0b1df8 | 2014-02-28 15:41:29 -0800 | [diff] [blame] | 254 | irqreturn_t azx_interrupt(int irq, void *dev_id); |
Dylan Reid | f43923f | 2014-02-28 15:41:27 -0800 | [diff] [blame] | 255 | |
Dylan Reid | 154867c | 2014-02-28 15:41:30 -0800 | [diff] [blame] | 256 | /* Codec interface */ |
Takashi Iwai | bb57392 | 2015-02-20 09:26:04 +0100 | [diff] [blame] | 257 | int azx_bus_create(struct azx *chip, const char *model); |
Takashi Iwai | 96d2bd6 | 2015-02-19 18:12:22 +0100 | [diff] [blame] | 258 | int azx_probe_codecs(struct azx *chip, unsigned int max_slots); |
Dylan Reid | 154867c | 2014-02-28 15:41:30 -0800 | [diff] [blame] | 259 | int azx_codec_configure(struct azx *chip); |
Dylan Reid | 154867c | 2014-02-28 15:41:30 -0800 | [diff] [blame] | 260 | int azx_init_stream(struct azx *chip); |
| 261 | |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 262 | #endif /* __SOUND_HDA_CONTROLLER_H */ |