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Sam Ravnborgf5e706a2008-07-17 21:55:51 -07001#ifndef __SPARC64_MMU_CONTEXT_H
2#define __SPARC64_MMU_CONTEXT_H
3
4/* Derived heavily from Linus's Alpha/AXP ASN code... */
5
6#ifndef __ASSEMBLY__
7
8#include <linux/spinlock.h>
Ingo Molnar589ee622017-02-04 00:16:44 +01009#include <linux/mm_types.h>
10
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070011#include <asm/spitfire.h>
12#include <asm-generic/mm_hooks.h>
13
14static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
15{
16}
17
18extern spinlock_t ctx_alloc_lock;
19extern unsigned long tlb_context_cache;
20extern unsigned long mmu_context_bmap[];
21
Pavel Tatashin7a5b4bb2017-05-31 11:25:23 -040022DECLARE_PER_CPU(struct mm_struct *, per_cpu_secondary_mm);
Sam Ravnborgf05a6862014-05-16 23:25:50 +020023void get_new_mmu_context(struct mm_struct *mm);
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070024#ifdef CONFIG_SMP
Sam Ravnborgf05a6862014-05-16 23:25:50 +020025void smp_new_mmu_context_version(void);
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070026#else
27#define smp_new_mmu_context_version() do { } while (0)
28#endif
29
Sam Ravnborgf05a6862014-05-16 23:25:50 +020030int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
31void destroy_context(struct mm_struct *mm);
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070032
Sam Ravnborgf05a6862014-05-16 23:25:50 +020033void __tsb_context_switch(unsigned long pgd_pa,
34 struct tsb_config *tsb_base,
35 struct tsb_config *tsb_huge,
36 unsigned long tsb_descr_pa);
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070037
38static inline void tsb_context_switch(struct mm_struct *mm)
39{
40 __tsb_context_switch(__pa(mm->pgd),
Mike Kravetz4bbc84f2016-12-19 19:17:08 -080041 &mm->context.tsb_block[MM_TSB_BASE],
David Miller9e695d22012-10-08 16:34:29 -070042#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
Mike Kravetz4bbc84f2016-12-19 19:17:08 -080043 (mm->context.tsb_block[MM_TSB_HUGE].tsb ?
44 &mm->context.tsb_block[MM_TSB_HUGE] :
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070045 NULL)
46#else
47 NULL
48#endif
Mike Kravetz4bbc84f2016-12-19 19:17:08 -080049 , __pa(&mm->context.tsb_descr[MM_TSB_BASE]));
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070050}
51
Sam Ravnborgf05a6862014-05-16 23:25:50 +020052void tsb_grow(struct mm_struct *mm,
53 unsigned long tsb_index,
54 unsigned long mm_rss);
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070055#ifdef CONFIG_SMP
Sam Ravnborgf05a6862014-05-16 23:25:50 +020056void smp_tsb_sync(struct mm_struct *mm);
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070057#else
58#define smp_tsb_sync(__mm) do { } while (0)
59#endif
60
61/* Set MMU context in the actual hardware. */
62#define load_secondary_context(__mm) \
63 __asm__ __volatile__( \
64 "\n661: stxa %0, [%1] %2\n" \
65 " .section .sun4v_1insn_patch, \"ax\"\n" \
66 " .word 661b\n" \
67 " stxa %0, [%1] %3\n" \
68 " .previous\n" \
69 " flush %%g6\n" \
70 : /* No outputs */ \
71 : "r" (CTX_HWBITS((__mm)->context)), \
72 "r" (SECONDARY_CONTEXT), "i" (ASI_DMMU), "i" (ASI_MMU))
73
Sam Ravnborgf05a6862014-05-16 23:25:50 +020074void __flush_tlb_mm(unsigned long, unsigned long);
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070075
Kirill Tkhai07df8412013-04-09 00:29:46 +040076/* Switch the current MM context. */
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070077static inline void switch_mm(struct mm_struct *old_mm, struct mm_struct *mm, struct task_struct *tsk)
78{
79 unsigned long ctx_valid, flags;
Pavel Tatashin7a5b4bb2017-05-31 11:25:23 -040080 int cpu = smp_processor_id();
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070081
Pavel Tatashin7a5b4bb2017-05-31 11:25:23 -040082 per_cpu(per_cpu_secondary_mm, cpu) = mm;
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070083 if (unlikely(mm == &init_mm))
84 return;
85
86 spin_lock_irqsave(&mm->context.lock, flags);
87 ctx_valid = CTX_VALID(mm->context);
88 if (!ctx_valid)
89 get_new_mmu_context(mm);
90
91 /* We have to be extremely careful here or else we will miss
92 * a TSB grow if we switch back and forth between a kernel
93 * thread and an address space which has it's TSB size increased
94 * on another processor.
95 *
96 * It is possible to play some games in order to optimize the
97 * switch, but the safest thing to do is to unconditionally
98 * perform the secondary context load and the TSB context switch.
99 *
100 * For reference the bad case is, for address space "A":
101 *
102 * CPU 0 CPU 1
103 * run address space A
104 * set cpu0's bits in cpu_vm_mask
105 * switch to kernel thread, borrow
106 * address space A via entry_lazy_tlb
107 * run address space A
108 * set cpu1's bit in cpu_vm_mask
109 * flush_tlb_pending()
110 * reset cpu_vm_mask to just cpu1
111 * TSB grow
112 * run address space A
113 * context was valid, so skip
114 * TSB context switch
115 *
116 * At that point cpu0 continues to use a stale TSB, the one from
117 * before the TSB grow performed on cpu1. cpu1 did not cross-call
118 * cpu0 to update it's TSB because at that point the cpu_vm_mask
119 * only had cpu1 set in it.
120 */
121 load_secondary_context(mm);
122 tsb_context_switch(mm);
123
124 /* Any time a processor runs a context on an address space
125 * for the first time, we must flush that context out of the
126 * local TLB.
127 */
Rusty Russell81f1adf02009-03-16 14:40:39 +1030128 if (!ctx_valid || !cpumask_test_cpu(cpu, mm_cpumask(mm))) {
129 cpumask_set_cpu(cpu, mm_cpumask(mm));
Sam Ravnborgf5e706a2008-07-17 21:55:51 -0700130 __flush_tlb_mm(CTX_HWBITS(mm->context),
131 SECONDARY_CONTEXT);
132 }
133 spin_unlock_irqrestore(&mm->context.lock, flags);
134}
135
136#define deactivate_mm(tsk,mm) do { } while (0)
Pavel Tatashin14d03342017-05-31 11:25:21 -0400137#define activate_mm(active_mm, mm) switch_mm(active_mm, mm, NULL)
Sam Ravnborgf5e706a2008-07-17 21:55:51 -0700138#endif /* !(__ASSEMBLY__) */
139
140#endif /* !(__SPARC64_MMU_CONTEXT_H) */