blob: 34bb8f92586e25980ea5467c366e1700884328a5 [file] [log] [blame]
Christian Daudt01ebea12013-06-20 14:26:37 -07001/*
2 * Copyright (C) 2013 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/delay.h>
17#include <linux/highmem.h>
18#include <linux/platform_device.h>
19#include <linux/mmc/host.h>
20#include <linux/io.h>
21#include <linux/gpio.h>
22#include <linux/clk.h>
23#include <linux/regulator/consumer.h>
24#include <linux/of.h>
25#include <linux/of_device.h>
26#include <linux/of_gpio.h>
Christian Daudt01ebea12013-06-20 14:26:37 -070027#include <linux/mmc/slot-gpio.h>
28
29#include "sdhci-pltfm.h"
30#include "sdhci.h"
31
32#define SDHCI_SOFT_RESET 0x01000000
33#define KONA_SDHOST_CORECTRL 0x8000
34#define KONA_SDHOST_CD_PINCTRL 0x00000008
35#define KONA_SDHOST_STOP_HCLK 0x00000004
36#define KONA_SDHOST_RESET 0x00000002
37#define KONA_SDHOST_EN 0x00000001
38
39#define KONA_SDHOST_CORESTAT 0x8004
40#define KONA_SDHOST_WP 0x00000002
41#define KONA_SDHOST_CD_SW 0x00000001
42
43#define KONA_SDHOST_COREIMR 0x8008
44#define KONA_SDHOST_IP 0x00000001
45
46#define KONA_SDHOST_COREISR 0x800C
47#define KONA_SDHOST_COREIMSR 0x8010
48#define KONA_SDHOST_COREDBG1 0x8014
49#define KONA_SDHOST_COREGPO_MASK 0x8018
50
51#define SD_DETECT_GPIO_DEBOUNCE_128MS 128
52
53#define KONA_MMC_AUTOSUSPEND_DELAY (50)
54
55struct sdhci_bcm_kona_dev {
56 struct mutex write_lock; /* protect back to back writes */
Tim Krygera6492c02013-12-05 11:20:41 -080057 struct clk *external_clk;
Christian Daudt01ebea12013-06-20 14:26:37 -070058};
59
60
61static int sdhci_bcm_kona_sd_reset(struct sdhci_host *host)
62{
63 unsigned int val;
64 unsigned long timeout;
65
66 /* This timeout should be sufficent for core to reset */
67 timeout = jiffies + msecs_to_jiffies(100);
68
69 /* reset the host using the top level reset */
70 val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
71 val |= KONA_SDHOST_RESET;
72 sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
73
74 while (!(sdhci_readl(host, KONA_SDHOST_CORECTRL) & KONA_SDHOST_RESET)) {
75 if (time_is_before_jiffies(timeout)) {
76 pr_err("Error: sd host is stuck in reset!!!\n");
77 return -EFAULT;
78 }
79 }
80
81 /* bring the host out of reset */
82 val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
83 val &= ~KONA_SDHOST_RESET;
84
85 /*
86 * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS)
87 * Back-to-Back writes to same register needs delay when SD bus clock
88 * is very low w.r.t AHB clock, mainly during boot-time and during card
89 * insert-removal.
90 */
91 usleep_range(1000, 5000);
92 sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
93
94 return 0;
95}
96
97static void sdhci_bcm_kona_sd_init(struct sdhci_host *host)
98{
99 unsigned int val;
100
101 /* enable the interrupt from the IP core */
102 val = sdhci_readl(host, KONA_SDHOST_COREIMR);
103 val |= KONA_SDHOST_IP;
104 sdhci_writel(host, val, KONA_SDHOST_COREIMR);
105
106 /* Enable the AHB clock gating module to the host */
107 val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
108 val |= KONA_SDHOST_EN;
109
110 /*
111 * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS)
112 * Back-to-Back writes to same register needs delay when SD bus clock
113 * is very low w.r.t AHB clock, mainly during boot-time and during card
114 * insert-removal.
115 */
116 usleep_range(1000, 5000);
117 sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
118}
119
120/*
121 * Software emulation of the SD card insertion/removal. Set insert=1 for insert
122 * and insert=0 for removal. The card detection is done by GPIO. For Broadcom
123 * IP to function properly the bit 0 of CORESTAT register needs to be set/reset
124 * to generate the CD IRQ handled in sdhci.c which schedules card_tasklet.
125 */
126static int sdhci_bcm_kona_sd_card_emulate(struct sdhci_host *host, int insert)
127{
128 struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host);
129 struct sdhci_bcm_kona_dev *kona_dev = sdhci_pltfm_priv(pltfm_priv);
130 u32 val;
131
132 /*
133 * Back-to-Back register write needs a delay of min 10uS.
134 * Back-to-Back writes to same register needs delay when SD bus clock
135 * is very low w.r.t AHB clock, mainly during boot-time and during card
136 * insert-removal.
137 * We keep 20uS
138 */
139 mutex_lock(&kona_dev->write_lock);
140 udelay(20);
141 val = sdhci_readl(host, KONA_SDHOST_CORESTAT);
142
143 if (insert) {
144 int ret;
145
146 ret = mmc_gpio_get_ro(host->mmc);
147 if (ret >= 0)
148 val = (val & ~KONA_SDHOST_WP) |
149 ((ret) ? KONA_SDHOST_WP : 0);
150
151 val |= KONA_SDHOST_CD_SW;
152 sdhci_writel(host, val, KONA_SDHOST_CORESTAT);
153 } else {
154 val &= ~KONA_SDHOST_CD_SW;
155 sdhci_writel(host, val, KONA_SDHOST_CORESTAT);
156 }
157 mutex_unlock(&kona_dev->write_lock);
158
159 return 0;
160}
161
162/*
163 * SD card interrupt event callback
164 */
Sachin Kamatceb2ea12013-07-08 11:41:53 +0530165static void sdhci_bcm_kona_card_event(struct sdhci_host *host)
Christian Daudt01ebea12013-06-20 14:26:37 -0700166{
167 if (mmc_gpio_get_cd(host->mmc) > 0) {
168 dev_dbg(mmc_dev(host->mmc),
169 "card inserted\n");
170 sdhci_bcm_kona_sd_card_emulate(host, 1);
171 } else {
172 dev_dbg(mmc_dev(host->mmc),
173 "card removed\n");
174 sdhci_bcm_kona_sd_card_emulate(host, 0);
175 }
176}
177
178/*
179 * Get the base clock. Use central clock source for now. Not sure if different
180 * clock speed to each dev is allowed
181 */
182static unsigned int sdhci_bcm_kona_get_max_clk(struct sdhci_host *host)
183{
184 struct sdhci_bcm_kona_dev *kona_dev;
185 struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host);
186 kona_dev = sdhci_pltfm_priv(pltfm_priv);
187
188 return host->mmc->f_max;
189}
190
191static unsigned int sdhci_bcm_kona_get_timeout_clock(struct sdhci_host *host)
192{
193 return sdhci_bcm_kona_get_max_clk(host);
194}
195
196static void sdhci_bcm_kona_init_74_clocks(struct sdhci_host *host,
197 u8 power_mode)
198{
199 /*
200 * JEDEC and SD spec specify supplying 74 continuous clocks to
201 * device after power up. With minimum bus (100KHz) that
202 * that translates to 740us
203 */
204 if (power_mode != MMC_POWER_OFF)
205 udelay(740);
206}
207
208static struct sdhci_ops sdhci_bcm_kona_ops = {
Russell King17710592014-04-25 12:58:55 +0100209 .set_clock = sdhci_set_clock,
Christian Daudt01ebea12013-06-20 14:26:37 -0700210 .get_max_clock = sdhci_bcm_kona_get_max_clk,
211 .get_timeout_clock = sdhci_bcm_kona_get_timeout_clock,
212 .platform_send_init_74_clocks = sdhci_bcm_kona_init_74_clocks,
Russell King2317f562014-04-25 12:57:07 +0100213 .set_bus_width = sdhci_set_bus_width,
Russell King03231f92014-04-25 12:57:12 +0100214 .reset = sdhci_reset,
Russell King96d7b782014-04-25 12:59:26 +0100215 .set_uhs_signaling = sdhci_set_uhs_signaling,
Christian Daudt01ebea12013-06-20 14:26:37 -0700216 .card_event = sdhci_bcm_kona_card_event,
217};
218
219static struct sdhci_pltfm_data sdhci_pltfm_data_kona = {
220 .ops = &sdhci_bcm_kona_ops,
221 .quirks = SDHCI_QUIRK_NO_CARD_NO_RESET |
222 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | SDHCI_QUIRK_32BIT_DMA_ADDR |
223 SDHCI_QUIRK_32BIT_DMA_SIZE | SDHCI_QUIRK_32BIT_ADMA_SIZE |
224 SDHCI_QUIRK_FORCE_BLK_SZ_2048 |
225 SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
226};
227
Behan Websterb3f635a2014-09-25 15:45:22 -0700228static const struct of_device_id sdhci_bcm_kona_of_match[] = {
Christian Daudtaea237b2013-08-20 08:37:19 -0700229 { .compatible = "brcm,kona-sdhci"},
230 { .compatible = "bcm,kona-sdhci"}, /* deprecated name */
Christian Daudt01ebea12013-06-20 14:26:37 -0700231 {}
232};
233MODULE_DEVICE_TABLE(of, sdhci_bcm_kona_of_match);
234
Markus Mayer058feb52013-08-07 15:39:59 -0700235static int sdhci_bcm_kona_probe(struct platform_device *pdev)
Christian Daudt01ebea12013-06-20 14:26:37 -0700236{
237 struct sdhci_bcm_kona_dev *kona_dev = NULL;
238 struct sdhci_pltfm_host *pltfm_priv;
239 struct device *dev = &pdev->dev;
240 struct sdhci_host *host;
241 int ret;
242
243 ret = 0;
244
245 host = sdhci_pltfm_init(pdev, &sdhci_pltfm_data_kona,
246 sizeof(*kona_dev));
247 if (IS_ERR(host))
248 return PTR_ERR(host);
249
250 dev_dbg(dev, "%s: inited. IOADDR=%p\n", __func__, host->ioaddr);
251
252 pltfm_priv = sdhci_priv(host);
253
254 kona_dev = sdhci_pltfm_priv(pltfm_priv);
255 mutex_init(&kona_dev->write_lock);
256
Ulf Hanssonacfa77b2014-12-18 10:41:40 +0100257 ret = mmc_of_parse(host->mmc);
258 if (ret)
259 goto err_pltfm_free;
Christian Daudt01ebea12013-06-20 14:26:37 -0700260
261 if (!host->mmc->f_max) {
262 dev_err(&pdev->dev, "Missing max-freq for SDHCI cfg\n");
263 ret = -ENXIO;
264 goto err_pltfm_free;
265 }
266
Tim Krygera6492c02013-12-05 11:20:41 -0800267 /* Get and enable the external clock */
268 kona_dev->external_clk = devm_clk_get(dev, NULL);
269 if (IS_ERR(kona_dev->external_clk)) {
270 dev_err(dev, "Failed to get external clock\n");
271 ret = PTR_ERR(kona_dev->external_clk);
272 goto err_pltfm_free;
273 }
274
275 if (clk_set_rate(kona_dev->external_clk, host->mmc->f_max) != 0) {
276 dev_err(dev, "Failed to set rate external clock\n");
277 goto err_pltfm_free;
278 }
279
280 if (clk_prepare_enable(kona_dev->external_clk) != 0) {
281 dev_err(dev, "Failed to enable external clock\n");
282 goto err_pltfm_free;
283 }
284
Christian Daudt01ebea12013-06-20 14:26:37 -0700285 dev_dbg(dev, "non-removable=%c\n",
286 (host->mmc->caps & MMC_CAP_NONREMOVABLE) ? 'Y' : 'N');
287 dev_dbg(dev, "cd_gpio %c, wp_gpio %c\n",
288 (mmc_gpio_get_cd(host->mmc) != -ENOSYS) ? 'Y' : 'N',
289 (mmc_gpio_get_ro(host->mmc) != -ENOSYS) ? 'Y' : 'N');
290
Christian Daudtcf68b622013-08-02 15:32:27 -0700291 if (host->mmc->caps & MMC_CAP_NONREMOVABLE)
Christian Daudt01ebea12013-06-20 14:26:37 -0700292 host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
293
294 dev_dbg(dev, "is_8bit=%c\n",
295 (host->mmc->caps | MMC_CAP_8_BIT_DATA) ? 'Y' : 'N');
296
297 ret = sdhci_bcm_kona_sd_reset(host);
298 if (ret)
Tim Krygera6492c02013-12-05 11:20:41 -0800299 goto err_clk_disable;
Christian Daudt01ebea12013-06-20 14:26:37 -0700300
301 sdhci_bcm_kona_sd_init(host);
302
303 ret = sdhci_add_host(host);
304 if (ret) {
305 dev_err(dev, "Failed sdhci_add_host\n");
306 goto err_reset;
307 }
308
309 /* if device is eMMC, emulate card insert right here */
Christian Daudtcf68b622013-08-02 15:32:27 -0700310 if (host->mmc->caps & MMC_CAP_NONREMOVABLE) {
Christian Daudt01ebea12013-06-20 14:26:37 -0700311 ret = sdhci_bcm_kona_sd_card_emulate(host, 1);
312 if (ret) {
313 dev_err(dev,
314 "unable to emulate card insertion\n");
315 goto err_remove_host;
316 }
317 }
318 /*
319 * Since the card detection GPIO interrupt is configured to be
320 * edge sensitive, check the initial GPIO value here, emulate
321 * only if the card is present
322 */
323 if (mmc_gpio_get_cd(host->mmc) > 0)
324 sdhci_bcm_kona_sd_card_emulate(host, 1);
325
326 dev_dbg(dev, "initialized properly\n");
327 return 0;
328
329err_remove_host:
330 sdhci_remove_host(host, 0);
331
332err_reset:
333 sdhci_bcm_kona_sd_reset(host);
334
Tim Krygera6492c02013-12-05 11:20:41 -0800335err_clk_disable:
336 clk_disable_unprepare(kona_dev->external_clk);
337
Christian Daudt01ebea12013-06-20 14:26:37 -0700338err_pltfm_free:
339 sdhci_pltfm_free(pdev);
340
341 dev_err(dev, "Probing of sdhci-pltfm failed: %d\n", ret);
342 return ret;
343}
344
Russell King4025ce22014-03-04 16:25:51 -0500345static int sdhci_bcm_kona_remove(struct platform_device *pdev)
Christian Daudt01ebea12013-06-20 14:26:37 -0700346{
Tim Krygera6492c02013-12-05 11:20:41 -0800347 struct sdhci_host *host = platform_get_drvdata(pdev);
348 struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host);
349 struct sdhci_bcm_kona_dev *kona_dev = sdhci_pltfm_priv(pltfm_priv);
350 int dead = (readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff);
351
352 sdhci_remove_host(host, dead);
353
354 clk_disable_unprepare(kona_dev->external_clk);
355
356 sdhci_pltfm_free(pdev);
357
358 return 0;
Christian Daudt01ebea12013-06-20 14:26:37 -0700359}
360
361static struct platform_driver sdhci_bcm_kona_driver = {
362 .driver = {
363 .name = "sdhci-kona",
Christian Daudt01ebea12013-06-20 14:26:37 -0700364 .pm = SDHCI_PLTFM_PMOPS,
Markus Mayer058feb52013-08-07 15:39:59 -0700365 .of_match_table = sdhci_bcm_kona_of_match,
Christian Daudt01ebea12013-06-20 14:26:37 -0700366 },
367 .probe = sdhci_bcm_kona_probe,
Markus Mayer058feb52013-08-07 15:39:59 -0700368 .remove = sdhci_bcm_kona_remove,
Christian Daudt01ebea12013-06-20 14:26:37 -0700369};
370module_platform_driver(sdhci_bcm_kona_driver);
371
372MODULE_DESCRIPTION("SDHCI driver for Broadcom Kona platform");
373MODULE_AUTHOR("Broadcom");
374MODULE_LICENSE("GPL v2");