blob: bb5e1030519709f7aa2ca12118383be1e82c5bcb [file] [log] [blame]
Mark Brownf8beab22011-10-28 23:50:49 +02001/*
2 * regmap based irq_chip
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/export.h>
Paul Gortmaker51990e82012-01-22 11:23:42 -050014#include <linux/device.h>
Mark Brownf8beab22011-10-28 23:50:49 +020015#include <linux/regmap.h>
16#include <linux/irq.h>
17#include <linux/interrupt.h>
Mark Brown4af8be62012-05-13 10:59:56 +010018#include <linux/irqdomain.h>
Mark Brown0c00c502012-07-24 15:41:19 +010019#include <linux/pm_runtime.h>
Mark Brownf8beab22011-10-28 23:50:49 +020020#include <linux/slab.h>
21
22#include "internal.h"
23
24struct regmap_irq_chip_data {
25 struct mutex lock;
Stephen Warren7ac140e2012-08-01 11:40:47 -060026 struct irq_chip irq_chip;
Mark Brownf8beab22011-10-28 23:50:49 +020027
28 struct regmap *map;
Mark Brownb026ddb2012-05-31 21:01:46 +010029 const struct regmap_irq_chip *chip;
Mark Brownf8beab22011-10-28 23:50:49 +020030
31 int irq_base;
Mark Brown4af8be62012-05-13 10:59:56 +010032 struct irq_domain *domain;
Mark Brownf8beab22011-10-28 23:50:49 +020033
Mark Browna43fd502012-06-05 14:34:03 +010034 int irq;
35 int wake_count;
36
Mark Brownf8beab22011-10-28 23:50:49 +020037 unsigned int *status_buf;
38 unsigned int *mask_buf;
39 unsigned int *mask_buf_def;
Mark Browna43fd502012-06-05 14:34:03 +010040 unsigned int *wake_buf;
Graeme Gregory022f926a2012-05-14 22:40:43 +090041
42 unsigned int irq_reg_stride;
Mark Brownf8beab22011-10-28 23:50:49 +020043};
44
45static inline const
46struct regmap_irq *irq_to_regmap_irq(struct regmap_irq_chip_data *data,
47 int irq)
48{
Mark Brown4af8be62012-05-13 10:59:56 +010049 return &data->chip->irqs[irq];
Mark Brownf8beab22011-10-28 23:50:49 +020050}
51
52static void regmap_irq_lock(struct irq_data *data)
53{
54 struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
55
56 mutex_lock(&d->lock);
57}
58
59static void regmap_irq_sync_unlock(struct irq_data *data)
60{
61 struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
Stephen Warren56806552012-04-10 23:37:22 -060062 struct regmap *map = d->map;
Mark Brownf8beab22011-10-28 23:50:49 +020063 int i, ret;
Stephen Warren16032622012-07-27 13:01:54 -060064 u32 reg;
Mark Brownf8beab22011-10-28 23:50:49 +020065
Mark Brown0c00c502012-07-24 15:41:19 +010066 if (d->chip->runtime_pm) {
67 ret = pm_runtime_get_sync(map->dev);
68 if (ret < 0)
69 dev_err(map->dev, "IRQ sync failed to resume: %d\n",
70 ret);
71 }
72
Mark Brownf8beab22011-10-28 23:50:49 +020073 /*
74 * If there's been a change in the mask write it back to the
75 * hardware. We rely on the use of the regmap core cache to
76 * suppress pointless writes.
77 */
78 for (i = 0; i < d->chip->num_regs; i++) {
Stephen Warren16032622012-07-27 13:01:54 -060079 reg = d->chip->mask_base +
80 (i * map->reg_stride * d->irq_reg_stride);
81 ret = regmap_update_bits(d->map, reg,
Mark Brownf8beab22011-10-28 23:50:49 +020082 d->mask_buf_def[i], d->mask_buf[i]);
83 if (ret != 0)
84 dev_err(d->map->dev, "Failed to sync masks in %x\n",
Stephen Warren16032622012-07-27 13:01:54 -060085 reg);
Mark Brownf8beab22011-10-28 23:50:49 +020086 }
87
Mark Brown0c00c502012-07-24 15:41:19 +010088 if (d->chip->runtime_pm)
89 pm_runtime_put(map->dev);
90
Mark Browna43fd502012-06-05 14:34:03 +010091 /* If we've changed our wakeup count propagate it to the parent */
92 if (d->wake_count < 0)
93 for (i = d->wake_count; i < 0; i++)
94 irq_set_irq_wake(d->irq, 0);
95 else if (d->wake_count > 0)
96 for (i = 0; i < d->wake_count; i++)
97 irq_set_irq_wake(d->irq, 1);
98
99 d->wake_count = 0;
100
Mark Brownf8beab22011-10-28 23:50:49 +0200101 mutex_unlock(&d->lock);
102}
103
104static void regmap_irq_enable(struct irq_data *data)
105{
106 struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
Stephen Warren56806552012-04-10 23:37:22 -0600107 struct regmap *map = d->map;
Mark Brown4af8be62012-05-13 10:59:56 +0100108 const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq);
Mark Brownf8beab22011-10-28 23:50:49 +0200109
Stephen Warrenf01ee602012-04-09 13:40:24 -0600110 d->mask_buf[irq_data->reg_offset / map->reg_stride] &= ~irq_data->mask;
Mark Brownf8beab22011-10-28 23:50:49 +0200111}
112
113static void regmap_irq_disable(struct irq_data *data)
114{
115 struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
Stephen Warren56806552012-04-10 23:37:22 -0600116 struct regmap *map = d->map;
Mark Brown4af8be62012-05-13 10:59:56 +0100117 const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq);
Mark Brownf8beab22011-10-28 23:50:49 +0200118
Stephen Warrenf01ee602012-04-09 13:40:24 -0600119 d->mask_buf[irq_data->reg_offset / map->reg_stride] |= irq_data->mask;
Mark Brownf8beab22011-10-28 23:50:49 +0200120}
121
Mark Browna43fd502012-06-05 14:34:03 +0100122static int regmap_irq_set_wake(struct irq_data *data, unsigned int on)
123{
124 struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
125 struct regmap *map = d->map;
126 const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq);
127
128 if (!d->chip->wake_base)
129 return -EINVAL;
130
131 if (on) {
132 d->wake_buf[irq_data->reg_offset / map->reg_stride]
133 &= ~irq_data->mask;
134 d->wake_count++;
135 } else {
136 d->wake_buf[irq_data->reg_offset / map->reg_stride]
137 |= irq_data->mask;
138 d->wake_count--;
139 }
140
141 return 0;
142}
143
Stephen Warren7ac140e2012-08-01 11:40:47 -0600144static const struct irq_chip regmap_irq_chip = {
Mark Brownf8beab22011-10-28 23:50:49 +0200145 .irq_bus_lock = regmap_irq_lock,
146 .irq_bus_sync_unlock = regmap_irq_sync_unlock,
147 .irq_disable = regmap_irq_disable,
148 .irq_enable = regmap_irq_enable,
Mark Browna43fd502012-06-05 14:34:03 +0100149 .irq_set_wake = regmap_irq_set_wake,
Mark Brownf8beab22011-10-28 23:50:49 +0200150};
151
152static irqreturn_t regmap_irq_thread(int irq, void *d)
153{
154 struct regmap_irq_chip_data *data = d;
Mark Brownb026ddb2012-05-31 21:01:46 +0100155 const struct regmap_irq_chip *chip = data->chip;
Mark Brownf8beab22011-10-28 23:50:49 +0200156 struct regmap *map = data->map;
157 int ret, i;
Mark Brownd23511f2011-11-28 18:50:39 +0000158 bool handled = false;
Stephen Warren16032622012-07-27 13:01:54 -0600159 u32 reg;
Mark Brownf8beab22011-10-28 23:50:49 +0200160
Mark Brown0c00c502012-07-24 15:41:19 +0100161 if (chip->runtime_pm) {
162 ret = pm_runtime_get_sync(map->dev);
163 if (ret < 0) {
164 dev_err(map->dev, "IRQ thread failed to resume: %d\n",
165 ret);
166 return IRQ_NONE;
167 }
168 }
169
Mark Brownf8beab22011-10-28 23:50:49 +0200170 /*
171 * Ignore masked IRQs and ack if we need to; we ack early so
172 * there is no race between handling and acknowleding the
173 * interrupt. We assume that typically few of the interrupts
174 * will fire simultaneously so don't worry about overhead from
175 * doing a write per register.
176 */
177 for (i = 0; i < data->chip->num_regs; i++) {
Mark Brown38e7f5d2012-05-17 13:59:40 +0100178 ret = regmap_read(map, chip->status_base + (i * map->reg_stride
Graeme Gregory022f926a2012-05-14 22:40:43 +0900179 * data->irq_reg_stride),
180 &data->status_buf[i]);
181
182 if (ret != 0) {
183 dev_err(map->dev, "Failed to read IRQ status: %d\n",
184 ret);
Mark Brown0c00c502012-07-24 15:41:19 +0100185 if (chip->runtime_pm)
186 pm_runtime_put(map->dev);
Mark Brownf8beab22011-10-28 23:50:49 +0200187 return IRQ_NONE;
188 }
189
190 data->status_buf[i] &= ~data->mask_buf[i];
191
192 if (data->status_buf[i] && chip->ack_base) {
Stephen Warren16032622012-07-27 13:01:54 -0600193 reg = chip->ack_base +
194 (i * map->reg_stride * data->irq_reg_stride);
195 ret = regmap_write(map, reg, data->status_buf[i]);
Mark Brownf8beab22011-10-28 23:50:49 +0200196 if (ret != 0)
197 dev_err(map->dev, "Failed to ack 0x%x: %d\n",
Stephen Warren16032622012-07-27 13:01:54 -0600198 reg, ret);
Mark Brownf8beab22011-10-28 23:50:49 +0200199 }
200 }
201
202 for (i = 0; i < chip->num_irqs; i++) {
Stephen Warrenf01ee602012-04-09 13:40:24 -0600203 if (data->status_buf[chip->irqs[i].reg_offset /
204 map->reg_stride] & chip->irqs[i].mask) {
Mark Brown4af8be62012-05-13 10:59:56 +0100205 handle_nested_irq(irq_find_mapping(data->domain, i));
Mark Brownd23511f2011-11-28 18:50:39 +0000206 handled = true;
Mark Brownf8beab22011-10-28 23:50:49 +0200207 }
208 }
209
Mark Brown0c00c502012-07-24 15:41:19 +0100210 if (chip->runtime_pm)
211 pm_runtime_put(map->dev);
212
Mark Brownd23511f2011-11-28 18:50:39 +0000213 if (handled)
214 return IRQ_HANDLED;
215 else
216 return IRQ_NONE;
Mark Brownf8beab22011-10-28 23:50:49 +0200217}
218
Mark Brown4af8be62012-05-13 10:59:56 +0100219static int regmap_irq_map(struct irq_domain *h, unsigned int virq,
220 irq_hw_number_t hw)
221{
222 struct regmap_irq_chip_data *data = h->host_data;
223
224 irq_set_chip_data(virq, data);
Stephen Warren7ac140e2012-08-01 11:40:47 -0600225 irq_set_chip_and_handler(virq, &data->irq_chip, handle_edge_irq);
Mark Brown4af8be62012-05-13 10:59:56 +0100226 irq_set_nested_thread(virq, 1);
227
228 /* ARM needs us to explicitly flag the IRQ as valid
229 * and will set them noprobe when we do so. */
230#ifdef CONFIG_ARM
231 set_irq_flags(virq, IRQF_VALID);
232#else
233 irq_set_noprobe(virq);
234#endif
235
236 return 0;
237}
238
239static struct irq_domain_ops regmap_domain_ops = {
240 .map = regmap_irq_map,
241 .xlate = irq_domain_xlate_twocell,
242};
243
Mark Brownf8beab22011-10-28 23:50:49 +0200244/**
245 * regmap_add_irq_chip(): Use standard regmap IRQ controller handling
246 *
247 * map: The regmap for the device.
248 * irq: The IRQ the device uses to signal interrupts
249 * irq_flags: The IRQF_ flags to use for the primary interrupt.
250 * chip: Configuration for the interrupt controller.
251 * data: Runtime data structure for the controller, allocated on success
252 *
253 * Returns 0 on success or an errno on failure.
254 *
255 * In order for this to be efficient the chip really should use a
256 * register cache. The chip driver is responsible for restoring the
257 * register values used by the IRQ controller over suspend and resume.
258 */
259int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
Mark Brownb026ddb2012-05-31 21:01:46 +0100260 int irq_base, const struct regmap_irq_chip *chip,
Mark Brownf8beab22011-10-28 23:50:49 +0200261 struct regmap_irq_chip_data **data)
262{
263 struct regmap_irq_chip_data *d;
Mark Brown4af8be62012-05-13 10:59:56 +0100264 int i;
Mark Brownf8beab22011-10-28 23:50:49 +0200265 int ret = -ENOMEM;
Stephen Warren16032622012-07-27 13:01:54 -0600266 u32 reg;
Mark Brownf8beab22011-10-28 23:50:49 +0200267
Stephen Warrenf01ee602012-04-09 13:40:24 -0600268 for (i = 0; i < chip->num_irqs; i++) {
269 if (chip->irqs[i].reg_offset % map->reg_stride)
270 return -EINVAL;
271 if (chip->irqs[i].reg_offset / map->reg_stride >=
272 chip->num_regs)
273 return -EINVAL;
274 }
275
Mark Brown4af8be62012-05-13 10:59:56 +0100276 if (irq_base) {
277 irq_base = irq_alloc_descs(irq_base, 0, chip->num_irqs, 0);
278 if (irq_base < 0) {
279 dev_warn(map->dev, "Failed to allocate IRQs: %d\n",
280 irq_base);
281 return irq_base;
282 }
Mark Brownf8beab22011-10-28 23:50:49 +0200283 }
284
285 d = kzalloc(sizeof(*d), GFP_KERNEL);
286 if (!d)
287 return -ENOMEM;
288
Mark Brown2431d0a2012-05-13 11:18:34 +0100289 *data = d;
290
Mark Brownf8beab22011-10-28 23:50:49 +0200291 d->status_buf = kzalloc(sizeof(unsigned int) * chip->num_regs,
292 GFP_KERNEL);
293 if (!d->status_buf)
294 goto err_alloc;
295
Mark Brownf8beab22011-10-28 23:50:49 +0200296 d->mask_buf = kzalloc(sizeof(unsigned int) * chip->num_regs,
297 GFP_KERNEL);
298 if (!d->mask_buf)
299 goto err_alloc;
300
301 d->mask_buf_def = kzalloc(sizeof(unsigned int) * chip->num_regs,
302 GFP_KERNEL);
303 if (!d->mask_buf_def)
304 goto err_alloc;
305
Mark Browna43fd502012-06-05 14:34:03 +0100306 if (chip->wake_base) {
307 d->wake_buf = kzalloc(sizeof(unsigned int) * chip->num_regs,
308 GFP_KERNEL);
309 if (!d->wake_buf)
310 goto err_alloc;
311 }
312
Stephen Warren7ac140e2012-08-01 11:40:47 -0600313 d->irq_chip = regmap_irq_chip;
Stephen Warrenca142752012-08-01 11:40:48 -0600314 d->irq_chip.name = chip->name;
Stephen Warren685879f2012-08-01 11:40:49 -0600315 if (!chip->wake_base) {
316 d->irq_chip.irq_set_wake = NULL;
317 d->irq_chip.flags |= IRQCHIP_MASK_ON_SUSPEND |
318 IRQCHIP_SKIP_SET_WAKE;
319 }
Mark Browna43fd502012-06-05 14:34:03 +0100320 d->irq = irq;
Mark Brownf8beab22011-10-28 23:50:49 +0200321 d->map = map;
322 d->chip = chip;
323 d->irq_base = irq_base;
Graeme Gregory022f926a2012-05-14 22:40:43 +0900324
325 if (chip->irq_reg_stride)
326 d->irq_reg_stride = chip->irq_reg_stride;
327 else
328 d->irq_reg_stride = 1;
329
Mark Brownf8beab22011-10-28 23:50:49 +0200330 mutex_init(&d->lock);
331
332 for (i = 0; i < chip->num_irqs; i++)
Stephen Warrenf01ee602012-04-09 13:40:24 -0600333 d->mask_buf_def[chip->irqs[i].reg_offset / map->reg_stride]
Mark Brownf8beab22011-10-28 23:50:49 +0200334 |= chip->irqs[i].mask;
335
336 /* Mask all the interrupts by default */
337 for (i = 0; i < chip->num_regs; i++) {
338 d->mask_buf[i] = d->mask_buf_def[i];
Stephen Warren16032622012-07-27 13:01:54 -0600339 reg = chip->mask_base +
340 (i * map->reg_stride * d->irq_reg_stride);
Mark Brown0eb46ad2012-08-01 20:29:14 +0100341 ret = regmap_update_bits(map, reg,
342 d->mask_buf[i], d->mask_buf[i]);
Mark Brownf8beab22011-10-28 23:50:49 +0200343 if (ret != 0) {
344 dev_err(map->dev, "Failed to set masks in 0x%x: %d\n",
Stephen Warren16032622012-07-27 13:01:54 -0600345 reg, ret);
Mark Brownf8beab22011-10-28 23:50:49 +0200346 goto err_alloc;
347 }
348 }
349
Stephen Warren40052ca2012-08-01 13:57:24 -0600350 /* Wake is disabled by default */
351 if (d->wake_buf) {
352 for (i = 0; i < chip->num_regs; i++) {
353 d->wake_buf[i] = d->mask_buf_def[i];
354 reg = chip->wake_base +
355 (i * map->reg_stride * d->irq_reg_stride);
356 ret = regmap_update_bits(map, reg, d->wake_buf[i],
357 d->wake_buf[i]);
358 if (ret != 0) {
359 dev_err(map->dev, "Failed to set masks in 0x%x: %d\n",
360 reg, ret);
361 goto err_alloc;
362 }
363 }
364 }
365
Mark Brown4af8be62012-05-13 10:59:56 +0100366 if (irq_base)
367 d->domain = irq_domain_add_legacy(map->dev->of_node,
368 chip->num_irqs, irq_base, 0,
369 &regmap_domain_ops, d);
370 else
371 d->domain = irq_domain_add_linear(map->dev->of_node,
372 chip->num_irqs,
373 &regmap_domain_ops, d);
374 if (!d->domain) {
375 dev_err(map->dev, "Failed to create IRQ domain\n");
376 ret = -ENOMEM;
377 goto err_alloc;
Mark Brownf8beab22011-10-28 23:50:49 +0200378 }
379
380 ret = request_threaded_irq(irq, NULL, regmap_irq_thread, irq_flags,
381 chip->name, d);
382 if (ret != 0) {
383 dev_err(map->dev, "Failed to request IRQ %d: %d\n", irq, ret);
Mark Brown4af8be62012-05-13 10:59:56 +0100384 goto err_domain;
Mark Brownf8beab22011-10-28 23:50:49 +0200385 }
386
387 return 0;
388
Mark Brown4af8be62012-05-13 10:59:56 +0100389err_domain:
390 /* Should really dispose of the domain but... */
Mark Brownf8beab22011-10-28 23:50:49 +0200391err_alloc:
Mark Browna43fd502012-06-05 14:34:03 +0100392 kfree(d->wake_buf);
Mark Brownf8beab22011-10-28 23:50:49 +0200393 kfree(d->mask_buf_def);
394 kfree(d->mask_buf);
Mark Brownf8beab22011-10-28 23:50:49 +0200395 kfree(d->status_buf);
396 kfree(d);
397 return ret;
398}
399EXPORT_SYMBOL_GPL(regmap_add_irq_chip);
400
401/**
402 * regmap_del_irq_chip(): Stop interrupt handling for a regmap IRQ chip
403 *
404 * @irq: Primary IRQ for the device
405 * @d: regmap_irq_chip_data allocated by regmap_add_irq_chip()
406 */
407void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *d)
408{
409 if (!d)
410 return;
411
412 free_irq(irq, d);
Mark Brown4af8be62012-05-13 10:59:56 +0100413 /* We should unmap the domain but... */
Mark Browna43fd502012-06-05 14:34:03 +0100414 kfree(d->wake_buf);
Mark Brownf8beab22011-10-28 23:50:49 +0200415 kfree(d->mask_buf_def);
416 kfree(d->mask_buf);
Mark Brownf8beab22011-10-28 23:50:49 +0200417 kfree(d->status_buf);
418 kfree(d);
419}
420EXPORT_SYMBOL_GPL(regmap_del_irq_chip);
Mark Brown209a6002011-12-05 16:10:15 +0000421
422/**
423 * regmap_irq_chip_get_base(): Retrieve interrupt base for a regmap IRQ chip
424 *
425 * Useful for drivers to request their own IRQs.
426 *
427 * @data: regmap_irq controller to operate on.
428 */
429int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data)
430{
Mark Brown4af8be62012-05-13 10:59:56 +0100431 WARN_ON(!data->irq_base);
Mark Brown209a6002011-12-05 16:10:15 +0000432 return data->irq_base;
433}
434EXPORT_SYMBOL_GPL(regmap_irq_chip_get_base);
Mark Brown4af8be62012-05-13 10:59:56 +0100435
436/**
437 * regmap_irq_get_virq(): Map an interrupt on a chip to a virtual IRQ
438 *
439 * Useful for drivers to request their own IRQs.
440 *
441 * @data: regmap_irq controller to operate on.
442 * @irq: index of the interrupt requested in the chip IRQs
443 */
444int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq)
445{
Mark Brownbfd6185d2012-06-05 14:29:36 +0100446 /* Handle holes in the IRQ list */
447 if (!data->chip->irqs[irq].mask)
448 return -EINVAL;
449
Mark Brown4af8be62012-05-13 10:59:56 +0100450 return irq_create_mapping(data->domain, irq);
451}
452EXPORT_SYMBOL_GPL(regmap_irq_get_virq);