Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 1 | /* |
| 2 | * regmap based irq_chip |
| 3 | * |
| 4 | * Copyright 2011 Wolfson Microelectronics plc |
| 5 | * |
| 6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/export.h> |
Paul Gortmaker | 51990e8 | 2012-01-22 11:23:42 -0500 | [diff] [blame] | 14 | #include <linux/device.h> |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 15 | #include <linux/regmap.h> |
| 16 | #include <linux/irq.h> |
| 17 | #include <linux/interrupt.h> |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 18 | #include <linux/irqdomain.h> |
Mark Brown | 0c00c50 | 2012-07-24 15:41:19 +0100 | [diff] [blame] | 19 | #include <linux/pm_runtime.h> |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 20 | #include <linux/slab.h> |
| 21 | |
| 22 | #include "internal.h" |
| 23 | |
| 24 | struct regmap_irq_chip_data { |
| 25 | struct mutex lock; |
Stephen Warren | 7ac140e | 2012-08-01 11:40:47 -0600 | [diff] [blame] | 26 | struct irq_chip irq_chip; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 27 | |
| 28 | struct regmap *map; |
Mark Brown | b026ddb | 2012-05-31 21:01:46 +0100 | [diff] [blame] | 29 | const struct regmap_irq_chip *chip; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 30 | |
| 31 | int irq_base; |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 32 | struct irq_domain *domain; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 33 | |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 34 | int irq; |
| 35 | int wake_count; |
| 36 | |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 37 | unsigned int *status_buf; |
| 38 | unsigned int *mask_buf; |
| 39 | unsigned int *mask_buf_def; |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 40 | unsigned int *wake_buf; |
Graeme Gregory | 022f926a | 2012-05-14 22:40:43 +0900 | [diff] [blame] | 41 | |
| 42 | unsigned int irq_reg_stride; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 43 | }; |
| 44 | |
| 45 | static inline const |
| 46 | struct regmap_irq *irq_to_regmap_irq(struct regmap_irq_chip_data *data, |
| 47 | int irq) |
| 48 | { |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 49 | return &data->chip->irqs[irq]; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 50 | } |
| 51 | |
| 52 | static void regmap_irq_lock(struct irq_data *data) |
| 53 | { |
| 54 | struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); |
| 55 | |
| 56 | mutex_lock(&d->lock); |
| 57 | } |
| 58 | |
| 59 | static void regmap_irq_sync_unlock(struct irq_data *data) |
| 60 | { |
| 61 | struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); |
Stephen Warren | 5680655 | 2012-04-10 23:37:22 -0600 | [diff] [blame] | 62 | struct regmap *map = d->map; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 63 | int i, ret; |
Stephen Warren | 1603262 | 2012-07-27 13:01:54 -0600 | [diff] [blame] | 64 | u32 reg; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 65 | |
Mark Brown | 0c00c50 | 2012-07-24 15:41:19 +0100 | [diff] [blame] | 66 | if (d->chip->runtime_pm) { |
| 67 | ret = pm_runtime_get_sync(map->dev); |
| 68 | if (ret < 0) |
| 69 | dev_err(map->dev, "IRQ sync failed to resume: %d\n", |
| 70 | ret); |
| 71 | } |
| 72 | |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 73 | /* |
| 74 | * If there's been a change in the mask write it back to the |
| 75 | * hardware. We rely on the use of the regmap core cache to |
| 76 | * suppress pointless writes. |
| 77 | */ |
| 78 | for (i = 0; i < d->chip->num_regs; i++) { |
Stephen Warren | 1603262 | 2012-07-27 13:01:54 -0600 | [diff] [blame] | 79 | reg = d->chip->mask_base + |
| 80 | (i * map->reg_stride * d->irq_reg_stride); |
| 81 | ret = regmap_update_bits(d->map, reg, |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 82 | d->mask_buf_def[i], d->mask_buf[i]); |
| 83 | if (ret != 0) |
| 84 | dev_err(d->map->dev, "Failed to sync masks in %x\n", |
Stephen Warren | 1603262 | 2012-07-27 13:01:54 -0600 | [diff] [blame] | 85 | reg); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 86 | } |
| 87 | |
Mark Brown | 0c00c50 | 2012-07-24 15:41:19 +0100 | [diff] [blame] | 88 | if (d->chip->runtime_pm) |
| 89 | pm_runtime_put(map->dev); |
| 90 | |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 91 | /* If we've changed our wakeup count propagate it to the parent */ |
| 92 | if (d->wake_count < 0) |
| 93 | for (i = d->wake_count; i < 0; i++) |
| 94 | irq_set_irq_wake(d->irq, 0); |
| 95 | else if (d->wake_count > 0) |
| 96 | for (i = 0; i < d->wake_count; i++) |
| 97 | irq_set_irq_wake(d->irq, 1); |
| 98 | |
| 99 | d->wake_count = 0; |
| 100 | |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 101 | mutex_unlock(&d->lock); |
| 102 | } |
| 103 | |
| 104 | static void regmap_irq_enable(struct irq_data *data) |
| 105 | { |
| 106 | struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); |
Stephen Warren | 5680655 | 2012-04-10 23:37:22 -0600 | [diff] [blame] | 107 | struct regmap *map = d->map; |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 108 | const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 109 | |
Stephen Warren | f01ee60 | 2012-04-09 13:40:24 -0600 | [diff] [blame] | 110 | d->mask_buf[irq_data->reg_offset / map->reg_stride] &= ~irq_data->mask; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 111 | } |
| 112 | |
| 113 | static void regmap_irq_disable(struct irq_data *data) |
| 114 | { |
| 115 | struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); |
Stephen Warren | 5680655 | 2012-04-10 23:37:22 -0600 | [diff] [blame] | 116 | struct regmap *map = d->map; |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 117 | const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 118 | |
Stephen Warren | f01ee60 | 2012-04-09 13:40:24 -0600 | [diff] [blame] | 119 | d->mask_buf[irq_data->reg_offset / map->reg_stride] |= irq_data->mask; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 120 | } |
| 121 | |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 122 | static int regmap_irq_set_wake(struct irq_data *data, unsigned int on) |
| 123 | { |
| 124 | struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); |
| 125 | struct regmap *map = d->map; |
| 126 | const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); |
| 127 | |
| 128 | if (!d->chip->wake_base) |
| 129 | return -EINVAL; |
| 130 | |
| 131 | if (on) { |
| 132 | d->wake_buf[irq_data->reg_offset / map->reg_stride] |
| 133 | &= ~irq_data->mask; |
| 134 | d->wake_count++; |
| 135 | } else { |
| 136 | d->wake_buf[irq_data->reg_offset / map->reg_stride] |
| 137 | |= irq_data->mask; |
| 138 | d->wake_count--; |
| 139 | } |
| 140 | |
| 141 | return 0; |
| 142 | } |
| 143 | |
Stephen Warren | 7ac140e | 2012-08-01 11:40:47 -0600 | [diff] [blame] | 144 | static const struct irq_chip regmap_irq_chip = { |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 145 | .irq_bus_lock = regmap_irq_lock, |
| 146 | .irq_bus_sync_unlock = regmap_irq_sync_unlock, |
| 147 | .irq_disable = regmap_irq_disable, |
| 148 | .irq_enable = regmap_irq_enable, |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 149 | .irq_set_wake = regmap_irq_set_wake, |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 150 | }; |
| 151 | |
| 152 | static irqreturn_t regmap_irq_thread(int irq, void *d) |
| 153 | { |
| 154 | struct regmap_irq_chip_data *data = d; |
Mark Brown | b026ddb | 2012-05-31 21:01:46 +0100 | [diff] [blame] | 155 | const struct regmap_irq_chip *chip = data->chip; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 156 | struct regmap *map = data->map; |
| 157 | int ret, i; |
Mark Brown | d23511f | 2011-11-28 18:50:39 +0000 | [diff] [blame] | 158 | bool handled = false; |
Stephen Warren | 1603262 | 2012-07-27 13:01:54 -0600 | [diff] [blame] | 159 | u32 reg; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 160 | |
Mark Brown | 0c00c50 | 2012-07-24 15:41:19 +0100 | [diff] [blame] | 161 | if (chip->runtime_pm) { |
| 162 | ret = pm_runtime_get_sync(map->dev); |
| 163 | if (ret < 0) { |
| 164 | dev_err(map->dev, "IRQ thread failed to resume: %d\n", |
| 165 | ret); |
| 166 | return IRQ_NONE; |
| 167 | } |
| 168 | } |
| 169 | |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 170 | /* |
| 171 | * Ignore masked IRQs and ack if we need to; we ack early so |
| 172 | * there is no race between handling and acknowleding the |
| 173 | * interrupt. We assume that typically few of the interrupts |
| 174 | * will fire simultaneously so don't worry about overhead from |
| 175 | * doing a write per register. |
| 176 | */ |
| 177 | for (i = 0; i < data->chip->num_regs; i++) { |
Mark Brown | 38e7f5d | 2012-05-17 13:59:40 +0100 | [diff] [blame] | 178 | ret = regmap_read(map, chip->status_base + (i * map->reg_stride |
Graeme Gregory | 022f926a | 2012-05-14 22:40:43 +0900 | [diff] [blame] | 179 | * data->irq_reg_stride), |
| 180 | &data->status_buf[i]); |
| 181 | |
| 182 | if (ret != 0) { |
| 183 | dev_err(map->dev, "Failed to read IRQ status: %d\n", |
| 184 | ret); |
Mark Brown | 0c00c50 | 2012-07-24 15:41:19 +0100 | [diff] [blame] | 185 | if (chip->runtime_pm) |
| 186 | pm_runtime_put(map->dev); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 187 | return IRQ_NONE; |
| 188 | } |
| 189 | |
| 190 | data->status_buf[i] &= ~data->mask_buf[i]; |
| 191 | |
| 192 | if (data->status_buf[i] && chip->ack_base) { |
Stephen Warren | 1603262 | 2012-07-27 13:01:54 -0600 | [diff] [blame] | 193 | reg = chip->ack_base + |
| 194 | (i * map->reg_stride * data->irq_reg_stride); |
| 195 | ret = regmap_write(map, reg, data->status_buf[i]); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 196 | if (ret != 0) |
| 197 | dev_err(map->dev, "Failed to ack 0x%x: %d\n", |
Stephen Warren | 1603262 | 2012-07-27 13:01:54 -0600 | [diff] [blame] | 198 | reg, ret); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 199 | } |
| 200 | } |
| 201 | |
| 202 | for (i = 0; i < chip->num_irqs; i++) { |
Stephen Warren | f01ee60 | 2012-04-09 13:40:24 -0600 | [diff] [blame] | 203 | if (data->status_buf[chip->irqs[i].reg_offset / |
| 204 | map->reg_stride] & chip->irqs[i].mask) { |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 205 | handle_nested_irq(irq_find_mapping(data->domain, i)); |
Mark Brown | d23511f | 2011-11-28 18:50:39 +0000 | [diff] [blame] | 206 | handled = true; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 207 | } |
| 208 | } |
| 209 | |
Mark Brown | 0c00c50 | 2012-07-24 15:41:19 +0100 | [diff] [blame] | 210 | if (chip->runtime_pm) |
| 211 | pm_runtime_put(map->dev); |
| 212 | |
Mark Brown | d23511f | 2011-11-28 18:50:39 +0000 | [diff] [blame] | 213 | if (handled) |
| 214 | return IRQ_HANDLED; |
| 215 | else |
| 216 | return IRQ_NONE; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 217 | } |
| 218 | |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 219 | static int regmap_irq_map(struct irq_domain *h, unsigned int virq, |
| 220 | irq_hw_number_t hw) |
| 221 | { |
| 222 | struct regmap_irq_chip_data *data = h->host_data; |
| 223 | |
| 224 | irq_set_chip_data(virq, data); |
Stephen Warren | 7ac140e | 2012-08-01 11:40:47 -0600 | [diff] [blame] | 225 | irq_set_chip_and_handler(virq, &data->irq_chip, handle_edge_irq); |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 226 | irq_set_nested_thread(virq, 1); |
| 227 | |
| 228 | /* ARM needs us to explicitly flag the IRQ as valid |
| 229 | * and will set them noprobe when we do so. */ |
| 230 | #ifdef CONFIG_ARM |
| 231 | set_irq_flags(virq, IRQF_VALID); |
| 232 | #else |
| 233 | irq_set_noprobe(virq); |
| 234 | #endif |
| 235 | |
| 236 | return 0; |
| 237 | } |
| 238 | |
| 239 | static struct irq_domain_ops regmap_domain_ops = { |
| 240 | .map = regmap_irq_map, |
| 241 | .xlate = irq_domain_xlate_twocell, |
| 242 | }; |
| 243 | |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 244 | /** |
| 245 | * regmap_add_irq_chip(): Use standard regmap IRQ controller handling |
| 246 | * |
| 247 | * map: The regmap for the device. |
| 248 | * irq: The IRQ the device uses to signal interrupts |
| 249 | * irq_flags: The IRQF_ flags to use for the primary interrupt. |
| 250 | * chip: Configuration for the interrupt controller. |
| 251 | * data: Runtime data structure for the controller, allocated on success |
| 252 | * |
| 253 | * Returns 0 on success or an errno on failure. |
| 254 | * |
| 255 | * In order for this to be efficient the chip really should use a |
| 256 | * register cache. The chip driver is responsible for restoring the |
| 257 | * register values used by the IRQ controller over suspend and resume. |
| 258 | */ |
| 259 | int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags, |
Mark Brown | b026ddb | 2012-05-31 21:01:46 +0100 | [diff] [blame] | 260 | int irq_base, const struct regmap_irq_chip *chip, |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 261 | struct regmap_irq_chip_data **data) |
| 262 | { |
| 263 | struct regmap_irq_chip_data *d; |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 264 | int i; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 265 | int ret = -ENOMEM; |
Stephen Warren | 1603262 | 2012-07-27 13:01:54 -0600 | [diff] [blame] | 266 | u32 reg; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 267 | |
Stephen Warren | f01ee60 | 2012-04-09 13:40:24 -0600 | [diff] [blame] | 268 | for (i = 0; i < chip->num_irqs; i++) { |
| 269 | if (chip->irqs[i].reg_offset % map->reg_stride) |
| 270 | return -EINVAL; |
| 271 | if (chip->irqs[i].reg_offset / map->reg_stride >= |
| 272 | chip->num_regs) |
| 273 | return -EINVAL; |
| 274 | } |
| 275 | |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 276 | if (irq_base) { |
| 277 | irq_base = irq_alloc_descs(irq_base, 0, chip->num_irqs, 0); |
| 278 | if (irq_base < 0) { |
| 279 | dev_warn(map->dev, "Failed to allocate IRQs: %d\n", |
| 280 | irq_base); |
| 281 | return irq_base; |
| 282 | } |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 283 | } |
| 284 | |
| 285 | d = kzalloc(sizeof(*d), GFP_KERNEL); |
| 286 | if (!d) |
| 287 | return -ENOMEM; |
| 288 | |
Mark Brown | 2431d0a | 2012-05-13 11:18:34 +0100 | [diff] [blame] | 289 | *data = d; |
| 290 | |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 291 | d->status_buf = kzalloc(sizeof(unsigned int) * chip->num_regs, |
| 292 | GFP_KERNEL); |
| 293 | if (!d->status_buf) |
| 294 | goto err_alloc; |
| 295 | |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 296 | d->mask_buf = kzalloc(sizeof(unsigned int) * chip->num_regs, |
| 297 | GFP_KERNEL); |
| 298 | if (!d->mask_buf) |
| 299 | goto err_alloc; |
| 300 | |
| 301 | d->mask_buf_def = kzalloc(sizeof(unsigned int) * chip->num_regs, |
| 302 | GFP_KERNEL); |
| 303 | if (!d->mask_buf_def) |
| 304 | goto err_alloc; |
| 305 | |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 306 | if (chip->wake_base) { |
| 307 | d->wake_buf = kzalloc(sizeof(unsigned int) * chip->num_regs, |
| 308 | GFP_KERNEL); |
| 309 | if (!d->wake_buf) |
| 310 | goto err_alloc; |
| 311 | } |
| 312 | |
Stephen Warren | 7ac140e | 2012-08-01 11:40:47 -0600 | [diff] [blame] | 313 | d->irq_chip = regmap_irq_chip; |
Stephen Warren | ca14275 | 2012-08-01 11:40:48 -0600 | [diff] [blame] | 314 | d->irq_chip.name = chip->name; |
Stephen Warren | 685879f | 2012-08-01 11:40:49 -0600 | [diff] [blame] | 315 | if (!chip->wake_base) { |
| 316 | d->irq_chip.irq_set_wake = NULL; |
| 317 | d->irq_chip.flags |= IRQCHIP_MASK_ON_SUSPEND | |
| 318 | IRQCHIP_SKIP_SET_WAKE; |
| 319 | } |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 320 | d->irq = irq; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 321 | d->map = map; |
| 322 | d->chip = chip; |
| 323 | d->irq_base = irq_base; |
Graeme Gregory | 022f926a | 2012-05-14 22:40:43 +0900 | [diff] [blame] | 324 | |
| 325 | if (chip->irq_reg_stride) |
| 326 | d->irq_reg_stride = chip->irq_reg_stride; |
| 327 | else |
| 328 | d->irq_reg_stride = 1; |
| 329 | |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 330 | mutex_init(&d->lock); |
| 331 | |
| 332 | for (i = 0; i < chip->num_irqs; i++) |
Stephen Warren | f01ee60 | 2012-04-09 13:40:24 -0600 | [diff] [blame] | 333 | d->mask_buf_def[chip->irqs[i].reg_offset / map->reg_stride] |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 334 | |= chip->irqs[i].mask; |
| 335 | |
| 336 | /* Mask all the interrupts by default */ |
| 337 | for (i = 0; i < chip->num_regs; i++) { |
| 338 | d->mask_buf[i] = d->mask_buf_def[i]; |
Stephen Warren | 1603262 | 2012-07-27 13:01:54 -0600 | [diff] [blame] | 339 | reg = chip->mask_base + |
| 340 | (i * map->reg_stride * d->irq_reg_stride); |
Mark Brown | 0eb46ad | 2012-08-01 20:29:14 +0100 | [diff] [blame] | 341 | ret = regmap_update_bits(map, reg, |
| 342 | d->mask_buf[i], d->mask_buf[i]); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 343 | if (ret != 0) { |
| 344 | dev_err(map->dev, "Failed to set masks in 0x%x: %d\n", |
Stephen Warren | 1603262 | 2012-07-27 13:01:54 -0600 | [diff] [blame] | 345 | reg, ret); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 346 | goto err_alloc; |
| 347 | } |
| 348 | } |
| 349 | |
Stephen Warren | 40052ca | 2012-08-01 13:57:24 -0600 | [diff] [blame] | 350 | /* Wake is disabled by default */ |
| 351 | if (d->wake_buf) { |
| 352 | for (i = 0; i < chip->num_regs; i++) { |
| 353 | d->wake_buf[i] = d->mask_buf_def[i]; |
| 354 | reg = chip->wake_base + |
| 355 | (i * map->reg_stride * d->irq_reg_stride); |
| 356 | ret = regmap_update_bits(map, reg, d->wake_buf[i], |
| 357 | d->wake_buf[i]); |
| 358 | if (ret != 0) { |
| 359 | dev_err(map->dev, "Failed to set masks in 0x%x: %d\n", |
| 360 | reg, ret); |
| 361 | goto err_alloc; |
| 362 | } |
| 363 | } |
| 364 | } |
| 365 | |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 366 | if (irq_base) |
| 367 | d->domain = irq_domain_add_legacy(map->dev->of_node, |
| 368 | chip->num_irqs, irq_base, 0, |
| 369 | ®map_domain_ops, d); |
| 370 | else |
| 371 | d->domain = irq_domain_add_linear(map->dev->of_node, |
| 372 | chip->num_irqs, |
| 373 | ®map_domain_ops, d); |
| 374 | if (!d->domain) { |
| 375 | dev_err(map->dev, "Failed to create IRQ domain\n"); |
| 376 | ret = -ENOMEM; |
| 377 | goto err_alloc; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 378 | } |
| 379 | |
| 380 | ret = request_threaded_irq(irq, NULL, regmap_irq_thread, irq_flags, |
| 381 | chip->name, d); |
| 382 | if (ret != 0) { |
| 383 | dev_err(map->dev, "Failed to request IRQ %d: %d\n", irq, ret); |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 384 | goto err_domain; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 385 | } |
| 386 | |
| 387 | return 0; |
| 388 | |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 389 | err_domain: |
| 390 | /* Should really dispose of the domain but... */ |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 391 | err_alloc: |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 392 | kfree(d->wake_buf); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 393 | kfree(d->mask_buf_def); |
| 394 | kfree(d->mask_buf); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 395 | kfree(d->status_buf); |
| 396 | kfree(d); |
| 397 | return ret; |
| 398 | } |
| 399 | EXPORT_SYMBOL_GPL(regmap_add_irq_chip); |
| 400 | |
| 401 | /** |
| 402 | * regmap_del_irq_chip(): Stop interrupt handling for a regmap IRQ chip |
| 403 | * |
| 404 | * @irq: Primary IRQ for the device |
| 405 | * @d: regmap_irq_chip_data allocated by regmap_add_irq_chip() |
| 406 | */ |
| 407 | void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *d) |
| 408 | { |
| 409 | if (!d) |
| 410 | return; |
| 411 | |
| 412 | free_irq(irq, d); |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 413 | /* We should unmap the domain but... */ |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 414 | kfree(d->wake_buf); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 415 | kfree(d->mask_buf_def); |
| 416 | kfree(d->mask_buf); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 417 | kfree(d->status_buf); |
| 418 | kfree(d); |
| 419 | } |
| 420 | EXPORT_SYMBOL_GPL(regmap_del_irq_chip); |
Mark Brown | 209a600 | 2011-12-05 16:10:15 +0000 | [diff] [blame] | 421 | |
| 422 | /** |
| 423 | * regmap_irq_chip_get_base(): Retrieve interrupt base for a regmap IRQ chip |
| 424 | * |
| 425 | * Useful for drivers to request their own IRQs. |
| 426 | * |
| 427 | * @data: regmap_irq controller to operate on. |
| 428 | */ |
| 429 | int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data) |
| 430 | { |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 431 | WARN_ON(!data->irq_base); |
Mark Brown | 209a600 | 2011-12-05 16:10:15 +0000 | [diff] [blame] | 432 | return data->irq_base; |
| 433 | } |
| 434 | EXPORT_SYMBOL_GPL(regmap_irq_chip_get_base); |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 435 | |
| 436 | /** |
| 437 | * regmap_irq_get_virq(): Map an interrupt on a chip to a virtual IRQ |
| 438 | * |
| 439 | * Useful for drivers to request their own IRQs. |
| 440 | * |
| 441 | * @data: regmap_irq controller to operate on. |
| 442 | * @irq: index of the interrupt requested in the chip IRQs |
| 443 | */ |
| 444 | int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq) |
| 445 | { |
Mark Brown | bfd6185d | 2012-06-05 14:29:36 +0100 | [diff] [blame] | 446 | /* Handle holes in the IRQ list */ |
| 447 | if (!data->chip->irqs[irq].mask) |
| 448 | return -EINVAL; |
| 449 | |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 450 | return irq_create_mapping(data->domain, irq); |
| 451 | } |
| 452 | EXPORT_SYMBOL_GPL(regmap_irq_get_virq); |