Peter Rosin | 3b2af7f | 2016-05-14 23:09:39 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Driver for the MAX9860 Mono Audio Voice Codec |
| 3 | * |
| 4 | * https://datasheets.maximintegrated.com/en/ds/MAX9860.pdf |
| 5 | * |
| 6 | * The driver does not support sidetone since the DVST register field is |
| 7 | * backwards with the mute near the maximum level instead of the minimum. |
| 8 | * |
| 9 | * Author: Peter Rosin <peda@axentia.s> |
| 10 | * Copyright 2016 Axentia Technologies |
| 11 | * |
| 12 | * This program is free software; you can redistribute it and/or |
| 13 | * modify it under the terms of the GNU General Public License |
| 14 | * version 2 as published by the Free Software Foundation. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, but |
| 17 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 19 | * General Public License for more details. |
| 20 | */ |
| 21 | |
| 22 | #include <linux/init.h> |
| 23 | #include <linux/module.h> |
| 24 | #include <linux/clk.h> |
| 25 | #include <linux/kernel.h> |
| 26 | #include <linux/pm_runtime.h> |
| 27 | #include <linux/regmap.h> |
| 28 | #include <linux/i2c.h> |
| 29 | #include <linux/regulator/consumer.h> |
| 30 | #include <sound/soc.h> |
| 31 | #include <sound/soc-dapm.h> |
| 32 | #include <sound/pcm_params.h> |
| 33 | #include <sound/tlv.h> |
| 34 | |
| 35 | #include "max9860.h" |
| 36 | |
| 37 | struct max9860_priv { |
| 38 | struct regmap *regmap; |
| 39 | struct regulator *dvddio; |
| 40 | struct notifier_block dvddio_nb; |
| 41 | u8 psclk; |
| 42 | unsigned long pclk_rate; |
| 43 | int fmt; |
| 44 | }; |
| 45 | |
| 46 | static int max9860_dvddio_event(struct notifier_block *nb, |
| 47 | unsigned long event, void *data) |
| 48 | { |
| 49 | struct max9860_priv *max9860 = container_of(nb, struct max9860_priv, |
| 50 | dvddio_nb); |
| 51 | if (event & REGULATOR_EVENT_DISABLE) { |
| 52 | regcache_mark_dirty(max9860->regmap); |
| 53 | regcache_cache_only(max9860->regmap, true); |
| 54 | } |
| 55 | |
| 56 | return 0; |
| 57 | } |
| 58 | |
| 59 | static const struct reg_default max9860_reg_defaults[] = { |
| 60 | { MAX9860_PWRMAN, 0x00 }, |
| 61 | { MAX9860_INTEN, 0x00 }, |
| 62 | { MAX9860_SYSCLK, 0x00 }, |
| 63 | { MAX9860_AUDIOCLKHIGH, 0x00 }, |
| 64 | { MAX9860_AUDIOCLKLOW, 0x00 }, |
| 65 | { MAX9860_IFC1A, 0x00 }, |
| 66 | { MAX9860_IFC1B, 0x00 }, |
| 67 | { MAX9860_VOICEFLTR, 0x00 }, |
| 68 | { MAX9860_DACATTN, 0x00 }, |
| 69 | { MAX9860_ADCLEVEL, 0x00 }, |
| 70 | { MAX9860_DACGAIN, 0x00 }, |
| 71 | { MAX9860_MICGAIN, 0x00 }, |
| 72 | { MAX9860_MICADC, 0x00 }, |
| 73 | { MAX9860_NOISEGATE, 0x00 }, |
| 74 | }; |
| 75 | |
| 76 | static bool max9860_readable(struct device *dev, unsigned int reg) |
| 77 | { |
| 78 | switch (reg) { |
| 79 | case MAX9860_INTRSTATUS ... MAX9860_MICGAIN: |
| 80 | case MAX9860_MICADC ... MAX9860_PWRMAN: |
| 81 | case MAX9860_REVISION: |
| 82 | return true; |
| 83 | } |
| 84 | |
| 85 | return false; |
| 86 | } |
| 87 | |
| 88 | static bool max9860_writeable(struct device *dev, unsigned int reg) |
| 89 | { |
| 90 | switch (reg) { |
| 91 | case MAX9860_INTEN ... MAX9860_MICGAIN: |
| 92 | case MAX9860_MICADC ... MAX9860_PWRMAN: |
| 93 | return true; |
| 94 | } |
| 95 | |
| 96 | return false; |
| 97 | } |
| 98 | |
| 99 | static bool max9860_volatile(struct device *dev, unsigned int reg) |
| 100 | { |
| 101 | switch (reg) { |
| 102 | case MAX9860_INTRSTATUS: |
| 103 | case MAX9860_MICREADBACK: |
| 104 | return true; |
| 105 | } |
| 106 | |
| 107 | return false; |
| 108 | } |
| 109 | |
| 110 | static bool max9860_precious(struct device *dev, unsigned int reg) |
| 111 | { |
| 112 | switch (reg) { |
| 113 | case MAX9860_INTRSTATUS: |
| 114 | return true; |
| 115 | } |
| 116 | |
| 117 | return false; |
| 118 | } |
| 119 | |
Wei Yongjun | 716540f | 2016-06-17 17:21:51 +0000 | [diff] [blame] | 120 | static const struct regmap_config max9860_regmap = { |
Peter Rosin | 3b2af7f | 2016-05-14 23:09:39 +0200 | [diff] [blame] | 121 | .reg_bits = 8, |
| 122 | .val_bits = 8, |
| 123 | |
| 124 | .readable_reg = max9860_readable, |
| 125 | .writeable_reg = max9860_writeable, |
| 126 | .volatile_reg = max9860_volatile, |
| 127 | .precious_reg = max9860_precious, |
| 128 | |
| 129 | .max_register = MAX9860_MAX_REGISTER, |
| 130 | .reg_defaults = max9860_reg_defaults, |
| 131 | .num_reg_defaults = ARRAY_SIZE(max9860_reg_defaults), |
| 132 | .cache_type = REGCACHE_RBTREE, |
| 133 | }; |
| 134 | |
| 135 | static const DECLARE_TLV_DB_SCALE(dva_tlv, -9100, 100, 1); |
| 136 | static const DECLARE_TLV_DB_SCALE(dvg_tlv, 0, 600, 0); |
| 137 | static const DECLARE_TLV_DB_SCALE(adc_tlv, -1200, 100, 0); |
| 138 | static const DECLARE_TLV_DB_RANGE(pam_tlv, |
| 139 | 0, MAX9860_PAM_MAX - 1, TLV_DB_SCALE_ITEM(-2000, 2000, 1), |
| 140 | MAX9860_PAM_MAX, MAX9860_PAM_MAX, TLV_DB_SCALE_ITEM(3000, 0, 0)); |
| 141 | static const DECLARE_TLV_DB_SCALE(pgam_tlv, 0, 100, 0); |
| 142 | static const DECLARE_TLV_DB_SCALE(anth_tlv, -7600, 400, 1); |
| 143 | static const DECLARE_TLV_DB_SCALE(agcth_tlv, -1800, 100, 0); |
| 144 | |
| 145 | static const char * const agchld_text[] = { |
| 146 | "AGC Disabled", "50ms", "100ms", "400ms" |
| 147 | }; |
| 148 | |
| 149 | static SOC_ENUM_SINGLE_DECL(agchld_enum, MAX9860_MICADC, |
| 150 | MAX9860_AGCHLD_SHIFT, agchld_text); |
| 151 | |
| 152 | static const char * const agcsrc_text[] = { |
| 153 | "Left ADC", "Left/Right ADC" |
| 154 | }; |
| 155 | |
| 156 | static SOC_ENUM_SINGLE_DECL(agcsrc_enum, MAX9860_MICADC, |
| 157 | MAX9860_AGCSRC_SHIFT, agcsrc_text); |
| 158 | |
| 159 | static const char * const agcatk_text[] = { |
| 160 | "3ms", "12ms", "50ms", "200ms" |
| 161 | }; |
| 162 | |
| 163 | static SOC_ENUM_SINGLE_DECL(agcatk_enum, MAX9860_MICADC, |
| 164 | MAX9860_AGCATK_SHIFT, agcatk_text); |
| 165 | |
| 166 | static const char * const agcrls_text[] = { |
| 167 | "78ms", "156ms", "312ms", "625ms", |
| 168 | "1.25s", "2.5s", "5s", "10s" |
| 169 | }; |
| 170 | |
| 171 | static SOC_ENUM_SINGLE_DECL(agcrls_enum, MAX9860_MICADC, |
| 172 | MAX9860_AGCRLS_SHIFT, agcrls_text); |
| 173 | |
| 174 | static const char * const filter_text[] = { |
| 175 | "Disabled", |
| 176 | "Elliptical HP 217Hz notch (16kHz)", |
| 177 | "Butterworth HP 500Hz (16kHz)", |
| 178 | "Elliptical HP 217Hz notch (8kHz)", |
| 179 | "Butterworth HP 500Hz (8kHz)", |
| 180 | "Butterworth HP 200Hz (48kHz)" |
| 181 | }; |
| 182 | |
| 183 | static SOC_ENUM_SINGLE_DECL(avflt_enum, MAX9860_VOICEFLTR, |
| 184 | MAX9860_AVFLT_SHIFT, filter_text); |
| 185 | |
| 186 | static SOC_ENUM_SINGLE_DECL(dvflt_enum, MAX9860_VOICEFLTR, |
| 187 | MAX9860_DVFLT_SHIFT, filter_text); |
| 188 | |
| 189 | static const struct snd_kcontrol_new max9860_controls[] = { |
| 190 | SOC_SINGLE_TLV("Master Playback Volume", MAX9860_DACATTN, |
| 191 | MAX9860_DVA_SHIFT, MAX9860_DVA_MUTE, 1, dva_tlv), |
| 192 | SOC_SINGLE_TLV("DAC Gain Volume", MAX9860_DACGAIN, |
| 193 | MAX9860_DVG_SHIFT, MAX9860_DVG_MAX, 0, dvg_tlv), |
| 194 | SOC_DOUBLE_TLV("Line Capture Volume", MAX9860_ADCLEVEL, |
| 195 | MAX9860_ADCLL_SHIFT, MAX9860_ADCRL_SHIFT, MAX9860_ADCxL_MIN, 1, |
| 196 | adc_tlv), |
| 197 | |
| 198 | SOC_ENUM("AGC Hold Time", agchld_enum), |
| 199 | SOC_ENUM("AGC/Noise Gate Source", agcsrc_enum), |
| 200 | SOC_ENUM("AGC Attack Time", agcatk_enum), |
| 201 | SOC_ENUM("AGC Release Time", agcrls_enum), |
| 202 | |
| 203 | SOC_SINGLE_TLV("Noise Gate Threshold Volume", MAX9860_NOISEGATE, |
| 204 | MAX9860_ANTH_SHIFT, MAX9860_ANTH_MAX, 0, anth_tlv), |
| 205 | SOC_SINGLE_TLV("AGC Signal Threshold Volume", MAX9860_NOISEGATE, |
| 206 | MAX9860_AGCTH_SHIFT, MAX9860_AGCTH_MIN, 1, agcth_tlv), |
| 207 | |
| 208 | SOC_SINGLE_TLV("Mic PGA Volume", MAX9860_MICGAIN, |
| 209 | MAX9860_PGAM_SHIFT, MAX9860_PGAM_MIN, 1, pgam_tlv), |
| 210 | SOC_SINGLE_TLV("Mic Preamp Volume", MAX9860_MICGAIN, |
| 211 | MAX9860_PAM_SHIFT, MAX9860_PAM_MAX, 0, pam_tlv), |
| 212 | |
| 213 | SOC_ENUM("ADC Filter", avflt_enum), |
| 214 | SOC_ENUM("DAC Filter", dvflt_enum), |
| 215 | }; |
| 216 | |
| 217 | static const struct snd_soc_dapm_widget max9860_dapm_widgets[] = { |
| 218 | SND_SOC_DAPM_INPUT("MICL"), |
| 219 | SND_SOC_DAPM_INPUT("MICR"), |
| 220 | |
| 221 | SND_SOC_DAPM_ADC("ADCL", NULL, MAX9860_PWRMAN, MAX9860_ADCLEN_SHIFT, 0), |
| 222 | SND_SOC_DAPM_ADC("ADCR", NULL, MAX9860_PWRMAN, MAX9860_ADCREN_SHIFT, 0), |
| 223 | |
| 224 | SND_SOC_DAPM_AIF_OUT("AIFOUTL", "Capture", 0, SND_SOC_NOPM, 0, 0), |
| 225 | SND_SOC_DAPM_AIF_OUT("AIFOUTR", "Capture", 1, SND_SOC_NOPM, 0, 0), |
| 226 | |
| 227 | SND_SOC_DAPM_AIF_IN("AIFINL", "Playback", 0, SND_SOC_NOPM, 0, 0), |
| 228 | SND_SOC_DAPM_AIF_IN("AIFINR", "Playback", 1, SND_SOC_NOPM, 0, 0), |
| 229 | |
| 230 | SND_SOC_DAPM_DAC("DAC", NULL, MAX9860_PWRMAN, MAX9860_DACEN_SHIFT, 0), |
| 231 | |
| 232 | SND_SOC_DAPM_OUTPUT("OUT"), |
| 233 | |
| 234 | SND_SOC_DAPM_SUPPLY("Supply", SND_SOC_NOPM, 0, 0, |
| 235 | NULL, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), |
| 236 | SND_SOC_DAPM_REGULATOR_SUPPLY("AVDD", 0, 0), |
| 237 | SND_SOC_DAPM_REGULATOR_SUPPLY("DVDD", 0, 0), |
| 238 | SND_SOC_DAPM_CLOCK_SUPPLY("mclk"), |
| 239 | }; |
| 240 | |
| 241 | static const struct snd_soc_dapm_route max9860_dapm_routes[] = { |
| 242 | { "ADCL", NULL, "MICL" }, |
| 243 | { "ADCR", NULL, "MICR" }, |
| 244 | { "AIFOUTL", NULL, "ADCL" }, |
| 245 | { "AIFOUTR", NULL, "ADCR" }, |
| 246 | |
| 247 | { "DAC", NULL, "AIFINL" }, |
| 248 | { "DAC", NULL, "AIFINR" }, |
| 249 | { "OUT", NULL, "DAC" }, |
| 250 | |
| 251 | { "Supply", NULL, "AVDD" }, |
| 252 | { "Supply", NULL, "DVDD" }, |
| 253 | { "Supply", NULL, "mclk" }, |
| 254 | |
| 255 | { "DAC", NULL, "Supply" }, |
| 256 | { "ADCL", NULL, "Supply" }, |
| 257 | { "ADCR", NULL, "Supply" }, |
| 258 | }; |
| 259 | |
| 260 | static int max9860_hw_params(struct snd_pcm_substream *substream, |
| 261 | struct snd_pcm_hw_params *params, |
| 262 | struct snd_soc_dai *dai) |
| 263 | { |
| 264 | struct snd_soc_codec *codec = dai->codec; |
| 265 | struct max9860_priv *max9860 = snd_soc_codec_get_drvdata(codec); |
| 266 | u8 master; |
| 267 | u8 ifc1a = 0; |
| 268 | u8 ifc1b = 0; |
| 269 | u8 sysclk = 0; |
| 270 | unsigned long n; |
| 271 | int ret; |
| 272 | |
| 273 | dev_dbg(codec->dev, "hw_params %u Hz, %u channels\n", |
| 274 | params_rate(params), |
| 275 | params_channels(params)); |
| 276 | |
| 277 | if (params_channels(params) == 2) |
| 278 | ifc1b |= MAX9860_ST; |
| 279 | |
| 280 | switch (max9860->fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
| 281 | case SND_SOC_DAIFMT_CBS_CFS: |
| 282 | master = 0; |
| 283 | break; |
| 284 | case SND_SOC_DAIFMT_CBM_CFM: |
| 285 | master = MAX9860_MASTER; |
| 286 | break; |
| 287 | default: |
| 288 | return -EINVAL; |
| 289 | } |
| 290 | ifc1a |= master; |
| 291 | |
| 292 | if (master) { |
| 293 | if (params_width(params) * params_channels(params) > 48) |
| 294 | ifc1b |= MAX9860_BSEL_64X; |
| 295 | else |
| 296 | ifc1b |= MAX9860_BSEL_48X; |
| 297 | } |
| 298 | |
| 299 | switch (max9860->fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
| 300 | case SND_SOC_DAIFMT_I2S: |
| 301 | ifc1a |= MAX9860_DDLY; |
| 302 | ifc1b |= MAX9860_ADLY; |
| 303 | break; |
| 304 | case SND_SOC_DAIFMT_LEFT_J: |
| 305 | ifc1a |= MAX9860_WCI; |
| 306 | break; |
| 307 | case SND_SOC_DAIFMT_DSP_A: |
| 308 | if (params_width(params) != 16) { |
| 309 | dev_err(codec->dev, |
| 310 | "DSP_A works for 16 bits per sample only.\n"); |
| 311 | return -EINVAL; |
| 312 | } |
| 313 | ifc1a |= MAX9860_DDLY | MAX9860_WCI | MAX9860_HIZ | MAX9860_TDM; |
| 314 | ifc1b |= MAX9860_ADLY; |
| 315 | break; |
| 316 | case SND_SOC_DAIFMT_DSP_B: |
| 317 | if (params_width(params) != 16) { |
| 318 | dev_err(codec->dev, |
| 319 | "DSP_B works for 16 bits per sample only.\n"); |
| 320 | return -EINVAL; |
| 321 | } |
| 322 | ifc1a |= MAX9860_WCI | MAX9860_HIZ | MAX9860_TDM; |
| 323 | break; |
| 324 | default: |
| 325 | return -EINVAL; |
| 326 | } |
| 327 | |
| 328 | switch (max9860->fmt & SND_SOC_DAIFMT_INV_MASK) { |
| 329 | case SND_SOC_DAIFMT_NB_NF: |
| 330 | break; |
| 331 | case SND_SOC_DAIFMT_NB_IF: |
| 332 | switch (max9860->fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
| 333 | case SND_SOC_DAIFMT_DSP_A: |
| 334 | case SND_SOC_DAIFMT_DSP_B: |
| 335 | return -EINVAL; |
| 336 | } |
| 337 | ifc1a ^= MAX9860_WCI; |
| 338 | break; |
| 339 | case SND_SOC_DAIFMT_IB_IF: |
| 340 | switch (max9860->fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
| 341 | case SND_SOC_DAIFMT_DSP_A: |
| 342 | case SND_SOC_DAIFMT_DSP_B: |
| 343 | return -EINVAL; |
| 344 | } |
| 345 | ifc1a ^= MAX9860_WCI; |
| 346 | /* fall through */ |
| 347 | case SND_SOC_DAIFMT_IB_NF: |
| 348 | ifc1a ^= MAX9860_DBCI; |
| 349 | ifc1b ^= MAX9860_ABCI; |
| 350 | break; |
| 351 | default: |
| 352 | return -EINVAL; |
| 353 | } |
| 354 | |
| 355 | dev_dbg(codec->dev, "IFC1A %02x\n", ifc1a); |
| 356 | ret = regmap_write(max9860->regmap, MAX9860_IFC1A, ifc1a); |
| 357 | if (ret) { |
| 358 | dev_err(codec->dev, "Failed to set IFC1A: %d\n", ret); |
| 359 | return ret; |
| 360 | } |
| 361 | dev_dbg(codec->dev, "IFC1B %02x\n", ifc1b); |
| 362 | ret = regmap_write(max9860->regmap, MAX9860_IFC1B, ifc1b); |
| 363 | if (ret) { |
| 364 | dev_err(codec->dev, "Failed to set IFC1B: %d\n", ret); |
| 365 | return ret; |
| 366 | } |
| 367 | |
| 368 | /* |
| 369 | * Check if Integer Clock Mode is possible, but avoid it in slave mode |
| 370 | * since we then do not know if lrclk is derived from pclk and the |
| 371 | * datasheet mentions that the frequencies have to match exactly in |
| 372 | * order for this to work. |
| 373 | */ |
| 374 | if (params_rate(params) == 8000 || params_rate(params) == 16000) { |
| 375 | if (master) { |
| 376 | switch (max9860->pclk_rate) { |
| 377 | case 12000000: |
| 378 | sysclk = MAX9860_FREQ_12MHZ; |
| 379 | break; |
| 380 | case 13000000: |
| 381 | sysclk = MAX9860_FREQ_13MHZ; |
| 382 | break; |
| 383 | case 19200000: |
| 384 | sysclk = MAX9860_FREQ_19_2MHZ; |
| 385 | break; |
| 386 | default: |
| 387 | /* |
| 388 | * Integer Clock Mode not possible. Leave |
| 389 | * sysclk at zero and fall through to the |
| 390 | * code below for PLL mode. |
| 391 | */ |
| 392 | break; |
| 393 | } |
| 394 | |
| 395 | if (sysclk && params_rate(params) == 16000) |
| 396 | sysclk |= MAX9860_16KHZ; |
| 397 | } |
| 398 | } |
| 399 | |
| 400 | /* |
| 401 | * Largest possible n: |
| 402 | * 65536 * 96 * 48kHz / 10MHz -> 30199 |
| 403 | * Smallest possible n: |
| 404 | * 65536 * 96 * 8kHz / 20MHz -> 2517 |
| 405 | * Both fit nicely in the available 15 bits, no need to apply any mask. |
| 406 | */ |
| 407 | n = DIV_ROUND_CLOSEST_ULL(65536ULL * 96 * params_rate(params), |
| 408 | max9860->pclk_rate); |
| 409 | |
| 410 | if (!sysclk) { |
| 411 | /* PLL mode */ |
| 412 | if (params_rate(params) > 24000) |
| 413 | sysclk |= MAX9860_16KHZ; |
| 414 | |
| 415 | if (!master) |
| 416 | n |= 1; /* trigger rapid pll lock mode */ |
| 417 | } |
| 418 | |
| 419 | sysclk |= max9860->psclk; |
| 420 | dev_dbg(codec->dev, "SYSCLK %02x\n", sysclk); |
| 421 | ret = regmap_write(max9860->regmap, |
| 422 | MAX9860_SYSCLK, sysclk); |
| 423 | if (ret) { |
| 424 | dev_err(codec->dev, "Failed to set SYSCLK: %d\n", ret); |
| 425 | return ret; |
| 426 | } |
| 427 | dev_dbg(codec->dev, "N %lu\n", n); |
| 428 | ret = regmap_write(max9860->regmap, |
| 429 | MAX9860_AUDIOCLKHIGH, n >> 8); |
| 430 | if (ret) { |
| 431 | dev_err(codec->dev, "Failed to set NHI: %d\n", ret); |
| 432 | return ret; |
| 433 | } |
| 434 | ret = regmap_write(max9860->regmap, |
| 435 | MAX9860_AUDIOCLKLOW, n & 0xff); |
| 436 | if (ret) { |
| 437 | dev_err(codec->dev, "Failed to set NLO: %d\n", ret); |
| 438 | return ret; |
| 439 | } |
| 440 | |
| 441 | if (!master) { |
| 442 | dev_dbg(codec->dev, "Enable PLL\n"); |
| 443 | ret = regmap_update_bits(max9860->regmap, MAX9860_AUDIOCLKHIGH, |
| 444 | MAX9860_PLL, MAX9860_PLL); |
| 445 | if (ret) { |
| 446 | dev_err(codec->dev, "Failed to enable PLL: %d\n", ret); |
| 447 | return ret; |
| 448 | } |
| 449 | } |
| 450 | |
| 451 | return 0; |
| 452 | } |
| 453 | |
| 454 | static int max9860_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) |
| 455 | { |
| 456 | struct snd_soc_codec *codec = dai->codec; |
| 457 | struct max9860_priv *max9860 = snd_soc_codec_get_drvdata(codec); |
| 458 | |
| 459 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
| 460 | case SND_SOC_DAIFMT_CBM_CFM: |
| 461 | case SND_SOC_DAIFMT_CBS_CFS: |
| 462 | max9860->fmt = fmt; |
| 463 | return 0; |
| 464 | |
| 465 | default: |
| 466 | return -EINVAL; |
| 467 | } |
| 468 | } |
| 469 | |
| 470 | static const struct snd_soc_dai_ops max9860_dai_ops = { |
| 471 | .hw_params = max9860_hw_params, |
| 472 | .set_fmt = max9860_set_fmt, |
| 473 | }; |
| 474 | |
| 475 | static struct snd_soc_dai_driver max9860_dai = { |
| 476 | .name = "max9860-hifi", |
| 477 | .playback = { |
| 478 | .stream_name = "Playback", |
| 479 | .channels_min = 1, |
| 480 | .channels_max = 2, |
| 481 | .rates = SNDRV_PCM_RATE_CONTINUOUS, |
| 482 | .rate_min = 8000, |
| 483 | .rate_max = 48000, |
| 484 | .formats = SNDRV_PCM_FMTBIT_S16_LE | |
| 485 | SNDRV_PCM_FMTBIT_S24_LE | |
| 486 | SNDRV_PCM_FMTBIT_S32_LE, |
| 487 | }, |
| 488 | .capture = { |
| 489 | .stream_name = "Capture", |
| 490 | .channels_min = 1, |
| 491 | .channels_max = 2, |
| 492 | .rates = SNDRV_PCM_RATE_CONTINUOUS, |
| 493 | .rate_min = 8000, |
| 494 | .rate_max = 48000, |
| 495 | .formats = SNDRV_PCM_FMTBIT_S16_LE | |
| 496 | SNDRV_PCM_FMTBIT_S24_LE | |
| 497 | SNDRV_PCM_FMTBIT_S32_LE, |
| 498 | }, |
| 499 | .ops = &max9860_dai_ops, |
| 500 | .symmetric_rates = 1, |
| 501 | }; |
| 502 | |
| 503 | static int max9860_set_bias_level(struct snd_soc_codec *codec, |
| 504 | enum snd_soc_bias_level level) |
| 505 | { |
| 506 | struct max9860_priv *max9860 = dev_get_drvdata(codec->dev); |
| 507 | int ret; |
| 508 | |
| 509 | switch (level) { |
| 510 | case SND_SOC_BIAS_ON: |
| 511 | case SND_SOC_BIAS_PREPARE: |
| 512 | break; |
| 513 | |
| 514 | case SND_SOC_BIAS_STANDBY: |
| 515 | ret = regmap_update_bits(max9860->regmap, MAX9860_PWRMAN, |
| 516 | MAX9860_SHDN, MAX9860_SHDN); |
| 517 | if (ret) { |
| 518 | dev_err(codec->dev, "Failed to remove SHDN: %d\n", ret); |
| 519 | return ret; |
| 520 | } |
| 521 | break; |
| 522 | |
| 523 | case SND_SOC_BIAS_OFF: |
| 524 | ret = regmap_update_bits(max9860->regmap, MAX9860_PWRMAN, |
| 525 | MAX9860_SHDN, 0); |
| 526 | if (ret) { |
| 527 | dev_err(codec->dev, "Failed to request SHDN: %d\n", |
| 528 | ret); |
| 529 | return ret; |
| 530 | } |
| 531 | break; |
| 532 | } |
| 533 | |
| 534 | return 0; |
| 535 | } |
| 536 | |
| 537 | static struct snd_soc_codec_driver max9860_codec_driver = { |
| 538 | .set_bias_level = max9860_set_bias_level, |
| 539 | .idle_bias_off = true, |
| 540 | |
Kuninori Morimoto | 750a33e | 2016-08-08 09:00:35 +0000 | [diff] [blame] | 541 | .component_driver = { |
| 542 | .controls = max9860_controls, |
| 543 | .num_controls = ARRAY_SIZE(max9860_controls), |
| 544 | .dapm_widgets = max9860_dapm_widgets, |
| 545 | .num_dapm_widgets = ARRAY_SIZE(max9860_dapm_widgets), |
| 546 | .dapm_routes = max9860_dapm_routes, |
| 547 | .num_dapm_routes = ARRAY_SIZE(max9860_dapm_routes), |
| 548 | }, |
Peter Rosin | 3b2af7f | 2016-05-14 23:09:39 +0200 | [diff] [blame] | 549 | }; |
| 550 | |
| 551 | #ifdef CONFIG_PM |
| 552 | static int max9860_suspend(struct device *dev) |
| 553 | { |
| 554 | struct max9860_priv *max9860 = dev_get_drvdata(dev); |
| 555 | int ret; |
| 556 | |
| 557 | ret = regmap_update_bits(max9860->regmap, MAX9860_SYSCLK, |
| 558 | MAX9860_PSCLK, MAX9860_PSCLK_OFF); |
| 559 | if (ret) { |
| 560 | dev_err(dev, "Failed to disable clock: %d\n", ret); |
| 561 | return ret; |
| 562 | } |
| 563 | |
| 564 | regulator_disable(max9860->dvddio); |
| 565 | |
| 566 | return 0; |
| 567 | } |
| 568 | |
| 569 | static int max9860_resume(struct device *dev) |
| 570 | { |
| 571 | struct max9860_priv *max9860 = dev_get_drvdata(dev); |
| 572 | int ret; |
| 573 | |
| 574 | ret = regulator_enable(max9860->dvddio); |
| 575 | if (ret) { |
| 576 | dev_err(dev, "Failed to enable DVDDIO: %d\n", ret); |
| 577 | return ret; |
| 578 | } |
| 579 | |
| 580 | regcache_cache_only(max9860->regmap, false); |
| 581 | ret = regcache_sync(max9860->regmap); |
| 582 | if (ret) { |
| 583 | dev_err(dev, "Failed to sync cache: %d\n", ret); |
| 584 | return ret; |
| 585 | } |
| 586 | |
| 587 | ret = regmap_update_bits(max9860->regmap, MAX9860_SYSCLK, |
| 588 | MAX9860_PSCLK, max9860->psclk); |
| 589 | if (ret) { |
| 590 | dev_err(dev, "Failed to enable clock: %d\n", ret); |
| 591 | return ret; |
| 592 | } |
| 593 | |
| 594 | return 0; |
| 595 | } |
| 596 | #endif |
| 597 | |
Wei Yongjun | 716540f | 2016-06-17 17:21:51 +0000 | [diff] [blame] | 598 | static const struct dev_pm_ops max9860_pm_ops = { |
Peter Rosin | 3b2af7f | 2016-05-14 23:09:39 +0200 | [diff] [blame] | 599 | SET_RUNTIME_PM_OPS(max9860_suspend, max9860_resume, NULL) |
| 600 | }; |
| 601 | |
| 602 | static int max9860_probe(struct i2c_client *i2c, |
| 603 | const struct i2c_device_id *id) |
| 604 | { |
| 605 | struct device *dev = &i2c->dev; |
| 606 | struct max9860_priv *max9860; |
| 607 | int ret; |
| 608 | struct clk *mclk; |
| 609 | unsigned long mclk_rate; |
| 610 | int i; |
| 611 | int intr; |
| 612 | |
| 613 | max9860 = devm_kzalloc(dev, sizeof(struct max9860_priv), GFP_KERNEL); |
| 614 | if (!max9860) |
| 615 | return -ENOMEM; |
| 616 | |
| 617 | max9860->dvddio = devm_regulator_get(dev, "DVDDIO"); |
| 618 | if (IS_ERR(max9860->dvddio)) { |
| 619 | ret = PTR_ERR(max9860->dvddio); |
| 620 | if (ret != -EPROBE_DEFER) |
| 621 | dev_err(dev, "Failed to get DVDDIO supply: %d\n", ret); |
| 622 | return ret; |
| 623 | } |
| 624 | |
| 625 | max9860->dvddio_nb.notifier_call = max9860_dvddio_event; |
| 626 | |
| 627 | ret = regulator_register_notifier(max9860->dvddio, &max9860->dvddio_nb); |
| 628 | if (ret) |
| 629 | dev_err(dev, "Failed to register DVDDIO notifier: %d\n", ret); |
| 630 | |
| 631 | ret = regulator_enable(max9860->dvddio); |
| 632 | if (ret != 0) { |
| 633 | dev_err(dev, "Failed to enable DVDDIO: %d\n", ret); |
| 634 | return ret; |
| 635 | } |
| 636 | |
| 637 | max9860->regmap = devm_regmap_init_i2c(i2c, &max9860_regmap); |
| 638 | if (IS_ERR(max9860->regmap)) { |
| 639 | ret = PTR_ERR(max9860->regmap); |
| 640 | goto err_regulator; |
| 641 | } |
| 642 | |
| 643 | dev_set_drvdata(dev, max9860); |
| 644 | |
| 645 | /* |
| 646 | * mclk has to be in the 10MHz to 60MHz range. |
| 647 | * psclk is used to scale mclk into pclk so that |
| 648 | * pclk is in the 10MHz to 20MHz range. |
| 649 | */ |
| 650 | mclk = clk_get(dev, "mclk"); |
| 651 | |
| 652 | if (IS_ERR(mclk)) { |
| 653 | ret = PTR_ERR(mclk); |
| 654 | if (ret != -EPROBE_DEFER) |
| 655 | dev_err(dev, "Failed to get MCLK: %d\n", ret); |
| 656 | goto err_regulator; |
| 657 | } |
| 658 | |
| 659 | mclk_rate = clk_get_rate(mclk); |
| 660 | clk_put(mclk); |
| 661 | |
| 662 | if (mclk_rate > 60000000 || mclk_rate < 10000000) { |
| 663 | dev_err(dev, "Bad mclk %luHz (needs 10MHz - 60MHz)\n", |
| 664 | mclk_rate); |
| 665 | ret = -EINVAL; |
| 666 | goto err_regulator; |
| 667 | } |
| 668 | if (mclk_rate >= 40000000) |
| 669 | max9860->psclk = 3; |
| 670 | else if (mclk_rate >= 20000000) |
| 671 | max9860->psclk = 2; |
| 672 | else |
| 673 | max9860->psclk = 1; |
| 674 | max9860->pclk_rate = mclk_rate >> (max9860->psclk - 1); |
| 675 | max9860->psclk <<= MAX9860_PSCLK_SHIFT; |
| 676 | dev_dbg(dev, "mclk %lu pclk %lu\n", mclk_rate, max9860->pclk_rate); |
| 677 | |
| 678 | regcache_cache_bypass(max9860->regmap, true); |
| 679 | for (i = 0; i < max9860_regmap.num_reg_defaults; ++i) { |
| 680 | ret = regmap_write(max9860->regmap, |
| 681 | max9860_regmap.reg_defaults[i].reg, |
| 682 | max9860_regmap.reg_defaults[i].def); |
| 683 | if (ret) { |
| 684 | dev_err(dev, "Failed to initialize register %u: %d\n", |
| 685 | max9860_regmap.reg_defaults[i].reg, ret); |
| 686 | goto err_regulator; |
| 687 | } |
| 688 | } |
| 689 | regcache_cache_bypass(max9860->regmap, false); |
| 690 | |
| 691 | ret = regmap_read(max9860->regmap, MAX9860_INTRSTATUS, &intr); |
| 692 | if (ret) { |
| 693 | dev_err(dev, "Failed to clear INTRSTATUS: %d\n", ret); |
| 694 | goto err_regulator; |
| 695 | } |
| 696 | |
| 697 | pm_runtime_set_active(dev); |
| 698 | pm_runtime_enable(dev); |
| 699 | pm_runtime_idle(dev); |
| 700 | |
| 701 | ret = snd_soc_register_codec(dev, &max9860_codec_driver, |
| 702 | &max9860_dai, 1); |
| 703 | if (ret) { |
| 704 | dev_err(dev, "Failed to register CODEC: %d\n", ret); |
| 705 | goto err_pm; |
| 706 | } |
| 707 | |
| 708 | return 0; |
| 709 | |
| 710 | err_pm: |
| 711 | pm_runtime_disable(dev); |
| 712 | err_regulator: |
| 713 | regulator_disable(max9860->dvddio); |
| 714 | return ret; |
| 715 | } |
| 716 | |
| 717 | static int max9860_remove(struct i2c_client *i2c) |
| 718 | { |
| 719 | struct device *dev = &i2c->dev; |
| 720 | struct max9860_priv *max9860 = dev_get_drvdata(dev); |
| 721 | |
| 722 | snd_soc_unregister_codec(dev); |
| 723 | pm_runtime_disable(dev); |
| 724 | regulator_disable(max9860->dvddio); |
| 725 | return 0; |
| 726 | } |
| 727 | |
| 728 | static const struct i2c_device_id max9860_i2c_id[] = { |
| 729 | { "max9860", }, |
| 730 | { } |
| 731 | }; |
| 732 | MODULE_DEVICE_TABLE(i2c, max9860_i2c_id); |
| 733 | |
| 734 | static const struct of_device_id max9860_of_match[] = { |
| 735 | { .compatible = "maxim,max9860", }, |
| 736 | { } |
| 737 | }; |
| 738 | MODULE_DEVICE_TABLE(of, max9860_of_match); |
| 739 | |
| 740 | static struct i2c_driver max9860_i2c_driver = { |
| 741 | .probe = max9860_probe, |
| 742 | .remove = max9860_remove, |
| 743 | .id_table = max9860_i2c_id, |
| 744 | .driver = { |
| 745 | .name = "max9860", |
| 746 | .of_match_table = max9860_of_match, |
| 747 | .pm = &max9860_pm_ops, |
| 748 | }, |
| 749 | }; |
| 750 | |
| 751 | module_i2c_driver(max9860_i2c_driver); |
| 752 | |
| 753 | MODULE_DESCRIPTION("ASoC MAX9860 Mono Audio Voice Codec driver"); |
| 754 | MODULE_AUTHOR("Peter Rosin <peda@axentia.se>"); |
| 755 | MODULE_LICENSE("GPL v2"); |