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Mathias Krause66be8952011-08-04 20:19:25 +02001/*
2 * Cryptographic API.
3 *
4 * Glue code for the SHA1 Secure Hash Algorithm assembler implementation using
5 * Supplemental SSE3 instructions.
6 *
7 * This file is based on sha1_generic.c
8 *
9 * Copyright (c) Alan Smithee.
10 * Copyright (c) Andrew McDonald <andrew@mcdonald.org.uk>
11 * Copyright (c) Jean-Francois Dive <jef@linuxbe.org>
12 * Copyright (c) Mathias Krause <minipli@googlemail.com>
chandramouli narayanan7c1da8d2014-03-20 15:14:00 -070013 * Copyright (c) Chandramouli Narayanan <mouli@linux.intel.com>
Mathias Krause66be8952011-08-04 20:19:25 +020014 *
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by the Free
17 * Software Foundation; either version 2 of the License, or (at your option)
18 * any later version.
19 *
20 */
21
22#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
23
24#include <crypto/internal/hash.h>
25#include <linux/init.h>
26#include <linux/module.h>
27#include <linux/mm.h>
28#include <linux/cryptohash.h>
29#include <linux/types.h>
30#include <crypto/sha.h>
31#include <asm/byteorder.h>
32#include <asm/i387.h>
33#include <asm/xcr.h>
34#include <asm/xsave.h>
35
36
37asmlinkage void sha1_transform_ssse3(u32 *digest, const char *data,
38 unsigned int rounds);
Mathias Krause65df5772012-05-24 11:13:42 +020039#ifdef CONFIG_AS_AVX
Mathias Krause66be8952011-08-04 20:19:25 +020040asmlinkage void sha1_transform_avx(u32 *digest, const char *data,
41 unsigned int rounds);
42#endif
chandramouli narayanan7c1da8d2014-03-20 15:14:00 -070043#ifdef CONFIG_AS_AVX2
44#define SHA1_AVX2_BLOCK_OPTSIZE 4 /* optimal 4*64 bytes of SHA1 blocks */
45
46asmlinkage void sha1_transform_avx2(u32 *digest, const char *data,
47 unsigned int rounds);
48#endif
Mathias Krause66be8952011-08-04 20:19:25 +020049
50static asmlinkage void (*sha1_transform_asm)(u32 *, const char *, unsigned int);
51
52
53static int sha1_ssse3_init(struct shash_desc *desc)
54{
55 struct sha1_state *sctx = shash_desc_ctx(desc);
56
57 *sctx = (struct sha1_state){
58 .state = { SHA1_H0, SHA1_H1, SHA1_H2, SHA1_H3, SHA1_H4 },
59 };
60
61 return 0;
62}
63
64static int __sha1_ssse3_update(struct shash_desc *desc, const u8 *data,
65 unsigned int len, unsigned int partial)
66{
67 struct sha1_state *sctx = shash_desc_ctx(desc);
68 unsigned int done = 0;
69
70 sctx->count += len;
71
72 if (partial) {
73 done = SHA1_BLOCK_SIZE - partial;
74 memcpy(sctx->buffer + partial, data, done);
75 sha1_transform_asm(sctx->state, sctx->buffer, 1);
76 }
77
78 if (len - done >= SHA1_BLOCK_SIZE) {
79 const unsigned int rounds = (len - done) / SHA1_BLOCK_SIZE;
80
81 sha1_transform_asm(sctx->state, data + done, rounds);
82 done += rounds * SHA1_BLOCK_SIZE;
83 }
84
85 memcpy(sctx->buffer, data + done, len - done);
86
87 return 0;
88}
89
90static int sha1_ssse3_update(struct shash_desc *desc, const u8 *data,
91 unsigned int len)
92{
93 struct sha1_state *sctx = shash_desc_ctx(desc);
94 unsigned int partial = sctx->count % SHA1_BLOCK_SIZE;
95 int res;
96
97 /* Handle the fast case right here */
98 if (partial + len < SHA1_BLOCK_SIZE) {
99 sctx->count += len;
100 memcpy(sctx->buffer + partial, data, len);
101
102 return 0;
103 }
104
105 if (!irq_fpu_usable()) {
106 res = crypto_sha1_update(desc, data, len);
107 } else {
108 kernel_fpu_begin();
109 res = __sha1_ssse3_update(desc, data, len, partial);
110 kernel_fpu_end();
111 }
112
113 return res;
114}
115
116
117/* Add padding and return the message digest. */
118static int sha1_ssse3_final(struct shash_desc *desc, u8 *out)
119{
120 struct sha1_state *sctx = shash_desc_ctx(desc);
121 unsigned int i, index, padlen;
122 __be32 *dst = (__be32 *)out;
123 __be64 bits;
124 static const u8 padding[SHA1_BLOCK_SIZE] = { 0x80, };
125
126 bits = cpu_to_be64(sctx->count << 3);
127
128 /* Pad out to 56 mod 64 and append length */
129 index = sctx->count % SHA1_BLOCK_SIZE;
130 padlen = (index < 56) ? (56 - index) : ((SHA1_BLOCK_SIZE+56) - index);
131 if (!irq_fpu_usable()) {
132 crypto_sha1_update(desc, padding, padlen);
133 crypto_sha1_update(desc, (const u8 *)&bits, sizeof(bits));
134 } else {
135 kernel_fpu_begin();
136 /* We need to fill a whole block for __sha1_ssse3_update() */
137 if (padlen <= 56) {
138 sctx->count += padlen;
139 memcpy(sctx->buffer + index, padding, padlen);
140 } else {
141 __sha1_ssse3_update(desc, padding, padlen, index);
142 }
143 __sha1_ssse3_update(desc, (const u8 *)&bits, sizeof(bits), 56);
144 kernel_fpu_end();
145 }
146
147 /* Store state in digest */
148 for (i = 0; i < 5; i++)
149 dst[i] = cpu_to_be32(sctx->state[i]);
150
151 /* Wipe context */
152 memset(sctx, 0, sizeof(*sctx));
153
154 return 0;
155}
156
157static int sha1_ssse3_export(struct shash_desc *desc, void *out)
158{
159 struct sha1_state *sctx = shash_desc_ctx(desc);
160
161 memcpy(out, sctx, sizeof(*sctx));
162
163 return 0;
164}
165
166static int sha1_ssse3_import(struct shash_desc *desc, const void *in)
167{
168 struct sha1_state *sctx = shash_desc_ctx(desc);
169
170 memcpy(sctx, in, sizeof(*sctx));
171
172 return 0;
173}
174
chandramouli narayanan7c1da8d2014-03-20 15:14:00 -0700175#ifdef CONFIG_AS_AVX2
176static void sha1_apply_transform_avx2(u32 *digest, const char *data,
177 unsigned int rounds)
178{
179 /* Select the optimal transform based on data block size */
180 if (rounds >= SHA1_AVX2_BLOCK_OPTSIZE)
181 sha1_transform_avx2(digest, data, rounds);
182 else
183 sha1_transform_avx(digest, data, rounds);
184}
185#endif
186
Mathias Krause66be8952011-08-04 20:19:25 +0200187static struct shash_alg alg = {
188 .digestsize = SHA1_DIGEST_SIZE,
189 .init = sha1_ssse3_init,
190 .update = sha1_ssse3_update,
191 .final = sha1_ssse3_final,
192 .export = sha1_ssse3_export,
193 .import = sha1_ssse3_import,
194 .descsize = sizeof(struct sha1_state),
195 .statesize = sizeof(struct sha1_state),
196 .base = {
197 .cra_name = "sha1",
198 .cra_driver_name= "sha1-ssse3",
199 .cra_priority = 150,
200 .cra_flags = CRYPTO_ALG_TYPE_SHASH,
201 .cra_blocksize = SHA1_BLOCK_SIZE,
202 .cra_module = THIS_MODULE,
203 }
204};
205
Mathias Krause65df5772012-05-24 11:13:42 +0200206#ifdef CONFIG_AS_AVX
Mathias Krause66be8952011-08-04 20:19:25 +0200207static bool __init avx_usable(void)
208{
209 u64 xcr0;
210
chandramouli narayanan7c1da8d2014-03-20 15:14:00 -0700211#if defined(CONFIG_AS_AVX2)
212 if (!cpu_has_avx || !cpu_has_avx2 || !cpu_has_osxsave)
213#else
Mathias Krause66be8952011-08-04 20:19:25 +0200214 if (!cpu_has_avx || !cpu_has_osxsave)
chandramouli narayanan7c1da8d2014-03-20 15:14:00 -0700215#endif
Mathias Krause66be8952011-08-04 20:19:25 +0200216 return false;
217
218 xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
219 if ((xcr0 & (XSTATE_SSE | XSTATE_YMM)) != (XSTATE_SSE | XSTATE_YMM)) {
220 pr_info("AVX detected but unusable.\n");
221
222 return false;
223 }
224
225 return true;
226}
227#endif
228
229static int __init sha1_ssse3_mod_init(void)
230{
chandramouli narayanan7c1da8d2014-03-20 15:14:00 -0700231 char *algo_name;
Mathias Krause66be8952011-08-04 20:19:25 +0200232 /* test for SSSE3 first */
chandramouli narayanan7c1da8d2014-03-20 15:14:00 -0700233 if (cpu_has_ssse3) {
Mathias Krause66be8952011-08-04 20:19:25 +0200234 sha1_transform_asm = sha1_transform_ssse3;
chandramouli narayanan7c1da8d2014-03-20 15:14:00 -0700235 algo_name = "SSSE3";
236 }
Mathias Krause66be8952011-08-04 20:19:25 +0200237
Mathias Krause65df5772012-05-24 11:13:42 +0200238#ifdef CONFIG_AS_AVX
Mathias Krause66be8952011-08-04 20:19:25 +0200239 /* allow AVX to override SSSE3, it's a little faster */
chandramouli narayanan7c1da8d2014-03-20 15:14:00 -0700240 if (avx_usable()) {
241 if (cpu_has_avx) {
242 sha1_transform_asm = sha1_transform_avx;
243 algo_name = "AVX";
244 }
245#ifdef CONFIG_AS_AVX2
246 if (cpu_has_avx2 && boot_cpu_has(X86_FEATURE_BMI2)) {
247 /* allow AVX2 to override AVX, it's a little faster */
248 sha1_transform_asm = sha1_apply_transform_avx2;
249 algo_name = "AVX2";
250 }
251#endif
252 }
Mathias Krause66be8952011-08-04 20:19:25 +0200253#endif
254
255 if (sha1_transform_asm) {
chandramouli narayanan7c1da8d2014-03-20 15:14:00 -0700256 pr_info("Using %s optimized SHA-1 implementation\n", algo_name);
Mathias Krause66be8952011-08-04 20:19:25 +0200257 return crypto_register_shash(&alg);
258 }
chandramouli narayanan7c1da8d2014-03-20 15:14:00 -0700259 pr_info("Neither AVX nor AVX2 nor SSSE3 is available/usable.\n");
Mathias Krause66be8952011-08-04 20:19:25 +0200260
261 return -ENODEV;
262}
263
264static void __exit sha1_ssse3_mod_fini(void)
265{
266 crypto_unregister_shash(&alg);
267}
268
269module_init(sha1_ssse3_mod_init);
270module_exit(sha1_ssse3_mod_fini);
271
272MODULE_LICENSE("GPL");
273MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm, Supplemental SSE3 accelerated");
274
275MODULE_ALIAS("sha1");