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Viresh Kumar07658d92012-04-16 23:57:51 +05301/*
2 * DTS file for all SPEAr1310 SoCs
3 *
Viresh Kumar10d89352012-06-20 12:53:02 -07004 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
Viresh Kumar07658d92012-04-16 23:57:51 +05305 *
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13
14/include/ "spear13xx.dtsi"
15
16/ {
17 compatible = "st,spear1310";
18
19 ahb {
Shiraz Hashim7cef07d2012-09-03 11:46:58 +053020 spics: spics@e0700000{
21 compatible = "st,spear-spics-gpio";
22 reg = <0xe0700000 0x1000>;
23 st-spics,peripcfg-reg = <0x3b0>;
24 st-spics,sw-enable-bit = <12>;
25 st-spics,cs-value-bit = <11>;
26 st-spics,cs-enable-mask = <3>;
27 st-spics,cs-enable-shift = <8>;
28 gpio-controller;
29 #gpio-cells = <2>;
30 };
31
Viresh Kumar07658d92012-04-16 23:57:51 +053032 ahci@b1000000 {
33 compatible = "snps,spear-ahci";
34 reg = <0xb1000000 0x10000>;
35 interrupts = <0 68 0x4>;
36 status = "disabled";
37 };
38
39 ahci@b1800000 {
40 compatible = "snps,spear-ahci";
41 reg = <0xb1800000 0x10000>;
42 interrupts = <0 69 0x4>;
43 status = "disabled";
44 };
45
46 ahci@b4000000 {
47 compatible = "snps,spear-ahci";
48 reg = <0xb4000000 0x10000>;
49 interrupts = <0 70 0x4>;
50 status = "disabled";
51 };
52
53 gmac1: eth@5c400000 {
54 compatible = "st,spear600-gmac";
55 reg = <0x5c400000 0x8000>;
56 interrupts = <0 95 0x4>;
57 interrupt-names = "macirq";
58 status = "disabled";
59 };
60
61 gmac2: eth@5c500000 {
62 compatible = "st,spear600-gmac";
63 reg = <0x5c500000 0x8000>;
64 interrupts = <0 96 0x4>;
65 interrupt-names = "macirq";
66 status = "disabled";
67 };
68
69 gmac3: eth@5c600000 {
70 compatible = "st,spear600-gmac";
71 reg = <0x5c600000 0x8000>;
72 interrupts = <0 97 0x4>;
73 interrupt-names = "macirq";
74 status = "disabled";
75 };
76
77 gmac4: eth@5c700000 {
78 compatible = "st,spear600-gmac";
79 reg = <0x5c700000 0x8000>;
80 interrupts = <0 98 0x4>;
81 interrupt-names = "macirq";
82 status = "disabled";
83 };
84
Viresh Kumar4ddb1c22012-10-27 15:21:39 +053085 pinmux: pinmux@e0700000 {
86 compatible = "st,spear1310-pinmux";
87 reg = <0xe0700000 0x1000>;
88 #gpio-range-cells = <2>;
89 };
90
Viresh Kumar07658d92012-04-16 23:57:51 +053091 spi1: spi@5d400000 {
92 compatible = "arm,pl022", "arm,primecell";
93 reg = <0x5d400000 0x1000>;
94 interrupts = <0 99 0x4>;
95 status = "disabled";
96 };
97
98 apb {
99 i2c1: i2c@5cd00000 {
100 #address-cells = <1>;
101 #size-cells = <0>;
102 compatible = "snps,designware-i2c";
103 reg = <0x5cd00000 0x1000>;
104 interrupts = <0 87 0x4>;
105 status = "disabled";
106 };
107
108 i2c2: i2c@5ce00000 {
109 #address-cells = <1>;
110 #size-cells = <0>;
111 compatible = "snps,designware-i2c";
112 reg = <0x5ce00000 0x1000>;
113 interrupts = <0 88 0x4>;
114 status = "disabled";
115 };
116
117 i2c3: i2c@5cf00000 {
118 #address-cells = <1>;
119 #size-cells = <0>;
120 compatible = "snps,designware-i2c";
121 reg = <0x5cf00000 0x1000>;
122 interrupts = <0 89 0x4>;
123 status = "disabled";
124 };
125
126 i2c4: i2c@5d000000 {
127 #address-cells = <1>;
128 #size-cells = <0>;
129 compatible = "snps,designware-i2c";
130 reg = <0x5d000000 0x1000>;
131 interrupts = <0 90 0x4>;
132 status = "disabled";
133 };
134
135 i2c5: i2c@5d100000 {
136 #address-cells = <1>;
137 #size-cells = <0>;
138 compatible = "snps,designware-i2c";
139 reg = <0x5d100000 0x1000>;
140 interrupts = <0 91 0x4>;
141 status = "disabled";
142 };
143
144 i2c6: i2c@5d200000 {
145 #address-cells = <1>;
146 #size-cells = <0>;
147 compatible = "snps,designware-i2c";
148 reg = <0x5d200000 0x1000>;
149 interrupts = <0 92 0x4>;
150 status = "disabled";
151 };
152
153 i2c7: i2c@5d300000 {
154 #address-cells = <1>;
155 #size-cells = <0>;
156 compatible = "snps,designware-i2c";
157 reg = <0x5d300000 0x1000>;
158 interrupts = <0 93 0x4>;
159 status = "disabled";
160 };
161
162 serial@5c800000 {
163 compatible = "arm,pl011", "arm,primecell";
164 reg = <0x5c800000 0x1000>;
165 interrupts = <0 82 0x4>;
166 status = "disabled";
167 };
168
169 serial@5c900000 {
170 compatible = "arm,pl011", "arm,primecell";
171 reg = <0x5c900000 0x1000>;
172 interrupts = <0 83 0x4>;
173 status = "disabled";
174 };
175
176 serial@5ca00000 {
177 compatible = "arm,pl011", "arm,primecell";
178 reg = <0x5ca00000 0x1000>;
179 interrupts = <0 84 0x4>;
180 status = "disabled";
181 };
182
183 serial@5cb00000 {
184 compatible = "arm,pl011", "arm,primecell";
185 reg = <0x5cb00000 0x1000>;
186 interrupts = <0 85 0x4>;
187 status = "disabled";
188 };
189
190 serial@5cc00000 {
191 compatible = "arm,pl011", "arm,primecell";
192 reg = <0x5cc00000 0x1000>;
193 interrupts = <0 86 0x4>;
194 status = "disabled";
195 };
196
197 thermal@e07008c4 {
198 st,thermal-flags = <0x7000>;
199 };
Viresh Kumar4ddb1c22012-10-27 15:21:39 +0530200
201 gpiopinctrl: gpio@d8400000 {
202 compatible = "st,spear-plgpio";
203 reg = <0xd8400000 0x1000>;
204 interrupts = <0 100 0x4>;
205 #interrupt-cells = <1>;
206 interrupt-controller;
207 gpio-controller;
208 #gpio-cells = <2>;
209 gpio-ranges = <&pinmux 0 246>;
210 status = "disabled";
211
212 st-plgpio,ngpio = <246>;
213 st-plgpio,enb-reg = <0xd0>;
214 st-plgpio,wdata-reg = <0x90>;
215 st-plgpio,dir-reg = <0xb0>;
216 st-plgpio,ie-reg = <0x30>;
217 st-plgpio,rdata-reg = <0x70>;
218 st-plgpio,mis-reg = <0x10>;
219 st-plgpio,eit-reg = <0x50>;
220 };
Viresh Kumar07658d92012-04-16 23:57:51 +0530221 };
222 };
223};