Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * ALSA driver for ICEnsemble ICE1724 (Envy24) |
| 3 | * |
| 4 | * Lowlevel functions for Terratec PHASE 22 |
| 5 | * |
| 6 | * Copyright (c) 2005 Misha Zhilin <misha@epiphan.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2 of the License, or |
| 11 | * (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | * |
| 22 | */ |
| 23 | |
| 24 | /* PHASE 22 overview: |
| 25 | * Audio controller: VIA Envy24HT-S (slightly trimmed down version of Envy24HT) |
| 26 | * Analog chip: AK4524 (partially via Philip's 74HCT125) |
| 27 | * Digital receiver: CS8414-CS (not supported in this release) |
| 28 | * |
| 29 | * Envy connects to AK4524 |
| 30 | * - CS directly from GPIO 10 |
| 31 | * - CCLK via 74HCT125's gate #4 from GPIO 4 |
| 32 | * - CDTI via 74HCT125's gate #2 from GPIO 5 |
| 33 | * CDTI may be completely blocked by 74HCT125's gate #1 controlled by GPIO 3 |
| 34 | */ |
| 35 | |
| 36 | #include <sound/driver.h> |
| 37 | #include <asm/io.h> |
| 38 | #include <linux/delay.h> |
| 39 | #include <linux/interrupt.h> |
| 40 | #include <linux/init.h> |
| 41 | #include <linux/slab.h> |
| 42 | #include <sound/core.h> |
| 43 | |
| 44 | #include "ice1712.h" |
| 45 | #include "envy24ht.h" |
| 46 | #include "phase.h" |
| 47 | |
| 48 | static akm4xxx_t akm_phase22 __devinitdata = { |
| 49 | .type = SND_AK4524, |
| 50 | .num_dacs = 2, |
| 51 | .num_adcs = 2, |
| 52 | }; |
| 53 | |
| 54 | static struct snd_ak4xxx_private akm_phase22_priv __devinitdata = { |
| 55 | .caddr = 2, |
| 56 | .cif = 1, |
| 57 | .data_mask = 1 << 4, |
| 58 | .clk_mask = 1 << 5, |
| 59 | .cs_mask = 1 << 10, |
| 60 | .cs_addr = 1 << 10, |
| 61 | .cs_none = 0, |
| 62 | .add_flags = 1 << 3, |
| 63 | .mask_flags = 0, |
| 64 | }; |
| 65 | |
| 66 | static int __devinit phase22_init(ice1712_t *ice) |
| 67 | { |
| 68 | akm4xxx_t *ak; |
| 69 | int err; |
| 70 | |
| 71 | // Configure DAC/ADC description for generic part of ice1724 |
| 72 | switch (ice->eeprom.subvendor) { |
| 73 | case VT1724_SUBDEVICE_PHASE22: |
| 74 | ice->num_total_dacs = 2; |
| 75 | ice->num_total_adcs = 2; |
| 76 | ice->vt1720 = 1; // Envy24HT-S have 16 bit wide GPIO |
| 77 | break; |
| 78 | default: |
| 79 | snd_BUG(); |
| 80 | return -EINVAL; |
| 81 | } |
| 82 | |
| 83 | // Initialize analog chips |
| 84 | ak = ice->akm = kcalloc(1, sizeof(akm4xxx_t), GFP_KERNEL); |
| 85 | if (! ak) |
| 86 | return -ENOMEM; |
| 87 | ice->akm_codecs = 1; |
| 88 | switch (ice->eeprom.subvendor) { |
| 89 | case VT1724_SUBDEVICE_PHASE22: |
| 90 | if ((err = snd_ice1712_akm4xxx_init(ak, &akm_phase22, &akm_phase22_priv, ice)) < 0) |
| 91 | return err; |
| 92 | break; |
| 93 | } |
| 94 | |
| 95 | return 0; |
| 96 | } |
| 97 | |
| 98 | static int __devinit phase22_add_controls(ice1712_t *ice) |
| 99 | { |
| 100 | int err = 0; |
| 101 | |
| 102 | switch (ice->eeprom.subvendor) { |
| 103 | case VT1724_SUBDEVICE_PHASE22: |
| 104 | err = snd_ice1712_akm4xxx_build_controls(ice); |
| 105 | if (err < 0) |
| 106 | return err; |
| 107 | } |
| 108 | return 0; |
| 109 | } |
| 110 | |
| 111 | static unsigned char phase22_eeprom[] __devinitdata = { |
| 112 | 0x00, /* SYSCONF: 1xADC, 1xDACs */ |
| 113 | 0x80, /* ACLINK: I2S */ |
| 114 | 0xf8, /* I2S: vol, 96k, 24bit*/ |
| 115 | 0xc3, /* SPDIF: out-en, out-int, spdif-in */ |
| 116 | 0xFF, /* GPIO_DIR */ |
| 117 | 0xFF, /* GPIO_DIR1 */ |
| 118 | 0xFF, /* GPIO_DIR2 */ |
| 119 | 0x00, /* GPIO_MASK */ |
| 120 | 0x00, /* GPIO_MASK1 */ |
| 121 | 0x00, /* GPIO_MASK2 */ |
| 122 | 0x00, /* GPIO_STATE: */ |
| 123 | 0x00, /* GPIO_STATE1: */ |
| 124 | 0x00, /* GPIO_STATE2 */ |
| 125 | }; |
| 126 | |
| 127 | struct snd_ice1712_card_info snd_vt1724_phase_cards[] __devinitdata = { |
| 128 | { |
| 129 | .subvendor = VT1724_SUBDEVICE_PHASE22, |
| 130 | .name = "Terratec PHASE 22", |
| 131 | .model = "phase22", |
| 132 | .chip_init = phase22_init, |
| 133 | .build_controls = phase22_add_controls, |
| 134 | .eeprom_size = sizeof(phase22_eeprom), |
| 135 | .eeprom_data = phase22_eeprom, |
| 136 | }, |
| 137 | { } /* terminator */ |
| 138 | }; |