Paul Mundt | 959f85f | 2006-09-27 16:43:28 +0900 | [diff] [blame] | 1 | /* |
Nobuhiro Iwamatsu | 9ca0443 | 2011-01-07 03:02:11 +0000 | [diff] [blame] | 2 | * arch/sh/drivers/pci/fixups-landisk.c |
Paul Mundt | 959f85f | 2006-09-27 16:43:28 +0900 | [diff] [blame] | 3 | * |
| 4 | * PCI initialization for the I-O DATA Device, Inc. LANDISK board |
| 5 | * |
| 6 | * Copyright (C) 2006 kogiidena |
Nobuhiro Iwamatsu | 9ca0443 | 2011-01-07 03:02:11 +0000 | [diff] [blame] | 7 | * Copyright (C) 2010 Nobuhiro Iwamatsu |
Paul Mundt | 959f85f | 2006-09-27 16:43:28 +0900 | [diff] [blame] | 8 | * |
| 9 | * May be copied or modified under the terms of the GNU General Public |
| 10 | * License. See linux/COPYING for more information. |
| 11 | */ |
Paul Mundt | 959f85f | 2006-09-27 16:43:28 +0900 | [diff] [blame] | 12 | #include <linux/kernel.h> |
| 13 | #include <linux/types.h> |
| 14 | #include <linux/init.h> |
| 15 | #include <linux/delay.h> |
| 16 | #include <linux/pci.h> |
| 17 | #include "pci-sh4.h" |
| 18 | |
Nobuhiro Iwamatsu | 9ca0443 | 2011-01-07 03:02:11 +0000 | [diff] [blame] | 19 | #define PCIMCR_MRSET_OFF 0xBFFFFFFF |
| 20 | #define PCIMCR_RFSH_OFF 0xFFFFFFFB |
| 21 | |
Paul Mundt | 959f85f | 2006-09-27 16:43:28 +0900 | [diff] [blame] | 22 | int pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) |
| 23 | { |
| 24 | /* |
| 25 | * slot0: pin1-4 = irq5,6,7,8 |
| 26 | * slot1: pin1-4 = irq6,7,8,5 |
| 27 | * slot2: pin1-4 = irq7,8,5,6 |
| 28 | * slot3: pin1-4 = irq8,5,6,7 |
| 29 | */ |
| 30 | int irq = ((slot + pin - 1) & 0x3) + 5; |
| 31 | |
| 32 | if ((slot | (pin - 1)) > 0x3) { |
Nobuhiro Iwamatsu | 9ca0443 | 2011-01-07 03:02:11 +0000 | [diff] [blame] | 33 | printk(KERN_WARNING "PCI: Bad IRQ mapping request for slot %d pin %c\n", |
Paul Mundt | 959f85f | 2006-09-27 16:43:28 +0900 | [diff] [blame] | 34 | slot, pin - 1 + 'A'); |
| 35 | return -1; |
| 36 | } |
| 37 | return irq; |
| 38 | } |
Nobuhiro Iwamatsu | 9ca0443 | 2011-01-07 03:02:11 +0000 | [diff] [blame] | 39 | |
| 40 | int pci_fixup_pcic(struct pci_channel *chan) |
| 41 | { |
| 42 | unsigned long bcr1, mcr; |
| 43 | |
| 44 | bcr1 = __raw_readl(SH7751_BCR1); |
| 45 | bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */ |
| 46 | pci_write_reg(chan, bcr1, SH4_PCIBCR1); |
| 47 | |
| 48 | mcr = __raw_readl(SH7751_MCR); |
| 49 | mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF; |
| 50 | pci_write_reg(chan, mcr, SH4_PCIMCR); |
| 51 | |
| 52 | pci_write_reg(chan, 0x0c000000, SH7751_PCICONF5); |
| 53 | pci_write_reg(chan, 0xd0000000, SH7751_PCICONF6); |
| 54 | pci_write_reg(chan, 0x0c000000, SH4_PCILAR0); |
| 55 | pci_write_reg(chan, 0x00000000, SH4_PCILAR1); |
| 56 | |
| 57 | return 0; |
| 58 | } |