Juergen Beisert | 7e5e9f5 | 2008-07-05 10:03:00 +0200 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix |
| 3 | * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de) |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or |
| 6 | * modify it under the terms of the GNU General Public License |
| 7 | * as published by the Free Software Foundation; either version 2 |
| 8 | * of the License, or (at your option) any later version. |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License |
| 15 | * along with this program; if not, write to the Free Software |
| 16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
| 17 | * MA 02110-1301, USA. |
| 18 | */ |
| 19 | |
| 20 | #include <linux/platform_device.h> |
| 21 | #include <linux/mtd/physmap.h> |
| 22 | #include <asm/mach/arch.h> |
| 23 | #include <asm/mach-types.h> |
| 24 | #include <asm/arch/common.h> |
| 25 | #include <asm/hardware.h> |
| 26 | #include <asm/arch/iomux-mx1-mx2.h> |
| 27 | #include <asm/mach/time.h> |
| 28 | #include <asm/arch/imx-uart.h> |
| 29 | #include <asm/arch/board-pcm038.h> |
| 30 | |
| 31 | /* |
| 32 | * Phytec's phyCORE-i.MX27 comes with 32MiB flash, |
| 33 | * 16 bit width |
| 34 | */ |
| 35 | static struct physmap_flash_data pcm038_flash_data = { |
| 36 | .width = 2, |
| 37 | }; |
| 38 | |
| 39 | static struct resource pcm038_flash_resource = { |
| 40 | .start = 0xc0000000, |
| 41 | .end = 0xc1ffffff, |
| 42 | .flags = IORESOURCE_MEM, |
| 43 | }; |
| 44 | |
| 45 | static struct platform_device pcm038_nor_mtd_device = { |
| 46 | .name = "physmap-flash", |
| 47 | .id = 0, |
| 48 | .dev = { |
| 49 | .platform_data = &pcm038_flash_data, |
| 50 | }, |
| 51 | .num_resources = 1, |
| 52 | .resource = &pcm038_flash_resource, |
| 53 | }; |
| 54 | |
| 55 | static int mxc_uart0_pins[] = { |
| 56 | PE12_PF_UART1_TXD, |
| 57 | PE13_PF_UART1_RXD, |
| 58 | PE14_PF_UART1_CTS, |
| 59 | PE15_PF_UART1_RTS |
| 60 | }; |
| 61 | |
| 62 | static int uart_mxc_port0_init(struct platform_device *pdev) |
| 63 | { |
| 64 | return mxc_gpio_setup_multiple_pins(mxc_uart0_pins, |
| 65 | ARRAY_SIZE(mxc_uart0_pins), |
| 66 | MXC_GPIO_ALLOC_MODE_NORMAL, "UART0"); |
| 67 | } |
| 68 | |
| 69 | static int uart_mxc_port0_exit(struct platform_device *pdev) |
| 70 | { |
| 71 | return mxc_gpio_setup_multiple_pins(mxc_uart0_pins, |
| 72 | ARRAY_SIZE(mxc_uart0_pins), |
| 73 | MXC_GPIO_ALLOC_MODE_RELEASE, "UART0"); |
| 74 | } |
| 75 | |
| 76 | static int mxc_uart1_pins[] = { |
| 77 | PE3_PF_UART2_CTS, |
| 78 | PE4_PF_UART2_RTS, |
| 79 | PE6_PF_UART2_TXD, |
| 80 | PE7_PF_UART2_RXD |
| 81 | }; |
| 82 | |
| 83 | static int uart_mxc_port1_init(struct platform_device *pdev) |
| 84 | { |
| 85 | return mxc_gpio_setup_multiple_pins(mxc_uart1_pins, |
| 86 | ARRAY_SIZE(mxc_uart1_pins), |
| 87 | MXC_GPIO_ALLOC_MODE_NORMAL, "UART1"); |
| 88 | } |
| 89 | |
| 90 | static int uart_mxc_port1_exit(struct platform_device *pdev) |
| 91 | { |
| 92 | return mxc_gpio_setup_multiple_pins(mxc_uart1_pins, |
| 93 | ARRAY_SIZE(mxc_uart1_pins), |
| 94 | MXC_GPIO_ALLOC_MODE_RELEASE, "UART1"); |
| 95 | } |
| 96 | |
| 97 | static int mxc_uart2_pins[] = { PE10_PF_UART3_CTS, |
| 98 | PE9_PF_UART3_RXD, |
| 99 | PE10_PF_UART3_CTS, |
| 100 | PE9_PF_UART3_RXD }; |
| 101 | |
| 102 | static int uart_mxc_port2_init(struct platform_device *pdev) |
| 103 | { |
| 104 | return mxc_gpio_setup_multiple_pins(mxc_uart2_pins, |
| 105 | ARRAY_SIZE(mxc_uart2_pins), |
| 106 | MXC_GPIO_ALLOC_MODE_NORMAL, "UART2"); |
| 107 | } |
| 108 | |
| 109 | static int uart_mxc_port2_exit(struct platform_device *pdev) |
| 110 | { |
| 111 | return mxc_gpio_setup_multiple_pins(mxc_uart2_pins, |
| 112 | ARRAY_SIZE(mxc_uart2_pins), |
| 113 | MXC_GPIO_ALLOC_MODE_RELEASE, "UART2"); |
| 114 | } |
| 115 | |
| 116 | static struct imxuart_platform_data uart_pdata[] = { |
| 117 | { |
| 118 | .init = uart_mxc_port0_init, |
| 119 | .exit = uart_mxc_port0_exit, |
| 120 | .flags = IMXUART_HAVE_RTSCTS, |
| 121 | }, { |
| 122 | .init = uart_mxc_port1_init, |
| 123 | .exit = uart_mxc_port1_exit, |
| 124 | .flags = IMXUART_HAVE_RTSCTS, |
| 125 | }, { |
| 126 | .init = uart_mxc_port2_init, |
| 127 | .exit = uart_mxc_port2_exit, |
| 128 | .flags = IMXUART_HAVE_RTSCTS, |
| 129 | }, |
| 130 | }; |
| 131 | |
| 132 | static int mxc_fec_pins[] = { |
| 133 | PD0_AIN_FEC_TXD0, |
| 134 | PD1_AIN_FEC_TXD1, |
| 135 | PD2_AIN_FEC_TXD2, |
| 136 | PD3_AIN_FEC_TXD3, |
| 137 | PD4_AOUT_FEC_RX_ER, |
| 138 | PD5_AOUT_FEC_RXD1, |
| 139 | PD6_AOUT_FEC_RXD2, |
| 140 | PD7_AOUT_FEC_RXD3, |
| 141 | PD8_AF_FEC_MDIO, |
| 142 | PD9_AIN_FEC_MDC, |
| 143 | PD10_AOUT_FEC_CRS, |
| 144 | PD11_AOUT_FEC_TX_CLK, |
| 145 | PD12_AOUT_FEC_RXD0, |
| 146 | PD13_AOUT_FEC_RX_DV, |
| 147 | PD14_AOUT_FEC_CLR, |
| 148 | PD15_AOUT_FEC_COL, |
| 149 | PD16_AIN_FEC_TX_ER, |
| 150 | PF23_AIN_FEC_TX_EN |
| 151 | }; |
| 152 | |
| 153 | static void gpio_fec_active(void) |
| 154 | { |
| 155 | mxc_gpio_setup_multiple_pins(mxc_fec_pins, |
| 156 | ARRAY_SIZE(mxc_fec_pins), |
| 157 | MXC_GPIO_ALLOC_MODE_NORMAL, "FEC"); |
| 158 | } |
| 159 | |
| 160 | static void gpio_fec_inactive(void) |
| 161 | { |
| 162 | mxc_gpio_setup_multiple_pins(mxc_fec_pins, |
| 163 | ARRAY_SIZE(mxc_fec_pins), |
| 164 | MXC_GPIO_ALLOC_MODE_RELEASE, "FEC"); |
| 165 | } |
| 166 | |
| 167 | static struct platform_device *platform_devices[] __initdata = { |
| 168 | &pcm038_nor_mtd_device, |
| 169 | }; |
| 170 | |
| 171 | static void __init pcm038_init(void) |
| 172 | { |
| 173 | int i; |
| 174 | gpio_fec_active(); |
| 175 | |
| 176 | for (i = 0; i < 3; i++) |
| 177 | imx_init_uart(i, &uart_pdata[i]); |
| 178 | |
| 179 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); |
| 180 | } |
| 181 | |
| 182 | static void __init pcm038_timer_init(void) |
| 183 | { |
| 184 | mxc_clocks_init(26000000); |
| 185 | mxc_timer_init("gpt_clk.0"); |
| 186 | } |
| 187 | |
| 188 | struct sys_timer pcm038_timer = { |
| 189 | .init = pcm038_timer_init, |
| 190 | }; |
| 191 | |
| 192 | MACHINE_START(PCM038, "phyCORE-i.MX27") |
| 193 | .phys_io = AIPI_BASE_ADDR, |
| 194 | .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, |
| 195 | .boot_params = PHYS_OFFSET + 0x100, |
| 196 | .map_io = mxc_map_io, |
| 197 | .init_irq = mxc_init_irq, |
| 198 | .init_machine = pcm038_init, |
| 199 | .timer = &pcm038_timer, |
| 200 | MACHINE_END |