blob: 67c6511f6372a8b8dee4f527e8e58b1dfc375f79 [file] [log] [blame]
Peter De Schrijver64c4e9f2011-12-14 17:03:26 +02001/dts-v1/;
2
3/include/ "tegra30.dtsi"
4
5/ {
6 model = "NVIDIA Tegra30 Cardhu evaluation board";
7 compatible = "nvidia,cardhu", "nvidia,tegra30";
8
9 memory {
10 reg = < 0x80000000 0x40000000 >;
11 };
12
13 serial@70006000 {
14 clock-frequency = < 408000000 >;
15 };
16
Stephen Warren8c690fd2012-02-02 12:24:19 -070017 serial@70006040 {
18 status = "disable";
19 };
20
21 serial@70006200 {
22 status = "disable";
23 };
24
25 serial@70006300 {
26 status = "disable";
27 };
28
29 serial@70006400 {
30 status = "disable";
31 };
32
Peter De Schrijver64c4e9f2011-12-14 17:03:26 +020033 i2c@7000c000 {
34 clock-frequency = <100000>;
35 };
36
37 i2c@7000c400 {
38 clock-frequency = <100000>;
39 };
40
41 i2c@7000c500 {
42 clock-frequency = <100000>;
43 };
44
45 i2c@7000c700 {
46 clock-frequency = <100000>;
47 };
48
49 i2c@7000d000 {
50 clock-frequency = <100000>;
51 };
Stephen Warren850c4c82012-02-01 16:29:57 -070052
53 sdhci@78000000 {
54 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
55 wp-gpios = <&gpio 155 0>; /* gpio PT3 */
56 power-gpios = <&gpio 31 0>; /* gpio PD7 */
Arnd Bergmann7f217792012-05-13 00:14:24 -040057 bus-width = <4>;
Stephen Warren850c4c82012-02-01 16:29:57 -070058 };
59
60 sdhci@78000200 {
61 status = "disable";
62 };
63
64 sdhci@78000400 {
65 status = "disable";
66 };
67
68 sdhci@78000400 {
69 support-8bit;
Arnd Bergmann7f217792012-05-13 00:14:24 -040070 bus-width = <8>;
Stephen Warren850c4c82012-02-01 16:29:57 -070071 };
Peter De Schrijver64c4e9f2011-12-14 17:03:26 +020072};