Guillaume Tucker | 7fa049d | 2017-05-03 10:56:25 +0100 | [diff] [blame^] | 1 | ARM Mali Midgard GPU |
| 2 | ==================== |
| 3 | |
| 4 | Required properties: |
| 5 | |
| 6 | - compatible : |
| 7 | * Must contain one of the following: |
| 8 | + "arm,mali-t604" |
| 9 | + "arm,mali-t624" |
| 10 | + "arm,mali-t628" |
| 11 | + "arm,mali-t720" |
| 12 | + "arm,mali-t760" |
| 13 | + "arm,mali-t820" |
| 14 | + "arm,mali-t830" |
| 15 | + "arm,mali-t860" |
| 16 | + "arm,mali-t880" |
| 17 | * which must be preceded by one of the following vendor specifics: |
| 18 | + "amlogic,meson-gxm-mali" |
| 19 | + "rockchip,rk3288-mali" |
| 20 | |
| 21 | - reg : Physical base address of the device and length of the register area. |
| 22 | |
| 23 | - interrupts : Contains the three IRQ lines required by Mali Midgard devices. |
| 24 | |
| 25 | - interrupt-names : Contains the names of IRQ resources in the order they were |
| 26 | provided in the interrupts property. Must contain: "job", "mmu", "gpu". |
| 27 | |
| 28 | |
| 29 | Optional properties: |
| 30 | |
| 31 | - clocks : Phandle to clock for the Mali Midgard device. |
| 32 | |
| 33 | - mali-supply : Phandle to regulator for the Mali device. Refer to |
| 34 | Documentation/devicetree/bindings/regulator/regulator.txt for details. |
| 35 | |
| 36 | - operating-points-v2 : Refer to Documentation/devicetree/bindings/power/opp.txt |
| 37 | for details. |
| 38 | |
| 39 | |
| 40 | Example for a Mali-T760: |
| 41 | |
| 42 | gpu@ffa30000 { |
| 43 | compatible = "rockchip,rk3288-mali", "arm,mali-t760", "arm,mali-midgard"; |
| 44 | reg = <0xffa30000 0x10000>; |
| 45 | interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, |
| 46 | <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, |
| 47 | <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; |
| 48 | interrupt-names = "job", "mmu", "gpu"; |
| 49 | clocks = <&cru ACLK_GPU>; |
| 50 | mali-supply = <&vdd_gpu>; |
| 51 | operating-points-v2 = <&gpu_opp_table>; |
| 52 | power-domains = <&power RK3288_PD_GPU>; |
| 53 | }; |
| 54 | |
| 55 | gpu_opp_table: opp_table0 { |
| 56 | compatible = "operating-points-v2"; |
| 57 | |
| 58 | opp@533000000 { |
| 59 | opp-hz = /bits/ 64 <533000000>; |
| 60 | opp-microvolt = <1250000>; |
| 61 | }; |
| 62 | opp@450000000 { |
| 63 | opp-hz = /bits/ 64 <450000000>; |
| 64 | opp-microvolt = <1150000>; |
| 65 | }; |
| 66 | opp@400000000 { |
| 67 | opp-hz = /bits/ 64 <400000000>; |
| 68 | opp-microvolt = <1125000>; |
| 69 | }; |
| 70 | opp@350000000 { |
| 71 | opp-hz = /bits/ 64 <350000000>; |
| 72 | opp-microvolt = <1075000>; |
| 73 | }; |
| 74 | opp@266000000 { |
| 75 | opp-hz = /bits/ 64 <266000000>; |
| 76 | opp-microvolt = <1025000>; |
| 77 | }; |
| 78 | opp@160000000 { |
| 79 | opp-hz = /bits/ 64 <160000000>; |
| 80 | opp-microvolt = <925000>; |
| 81 | }; |
| 82 | opp@100000000 { |
| 83 | opp-hz = /bits/ 64 <100000000>; |
| 84 | opp-microvolt = <912500>; |
| 85 | }; |
| 86 | }; |