blob: b3bf717cfc456dd4e84897d3ffcafcaffd504927 [file] [log] [blame]
Daniel Vetter0ade6382010-08-24 22:18:41 +02001/* Common header for intel-gtt.ko and i915.ko */
2
3#ifndef _DRM_INTEL_GTT_H
4#define _DRM_INTEL_GTT_H
Chris Wilsonc64f7ba2010-11-23 14:24:24 +00005
Chris Wilsonedd1f2f2017-01-06 15:20:11 +00006void intel_gtt_get(u64 *gtt_total,
7 u32 *stolen_size,
8 phys_addr_t *mappable_base,
9 u64 *mappable_end);
Daniel Vetter19966752010-09-06 20:08:44 +020010
Daniel Vetter14be93d2012-06-08 15:55:40 +020011int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
12 struct agp_bridge_data *bridge);
13void intel_gmch_remove(void);
14
Daniel Vetter8ecd1a62012-06-07 15:56:03 +020015bool intel_enable_gtt(void);
16
Daniel Vetter40ce6572010-11-05 18:12:18 +010017void intel_gtt_chipset_flush(void);
Chris Wilsond6473f52016-06-10 14:22:59 +053018void intel_gtt_insert_page(dma_addr_t addr,
19 unsigned int pg,
20 unsigned int flags);
Chris Wilson9da3da62012-06-01 15:20:22 +010021void intel_gtt_insert_sg_entries(struct sg_table *st,
Daniel Vetter40807752010-11-06 11:18:58 +010022 unsigned int pg_start,
23 unsigned int flags);
Chris Wilson9da3da62012-06-01 15:20:22 +010024void intel_gtt_clear_range(unsigned int first_entry, unsigned int num_entries);
Daniel Vetter23ed9922010-11-05 18:04:52 +010025
26/* Special gtt memory types */
27#define AGP_DCACHE_MEMORY 1
28#define AGP_PHYS_MEMORY 2
29
Daniel Vetter23ed9922010-11-05 18:04:52 +010030/* flag for GFDT type */
31#define AGP_USER_CACHED_MEMORY_GFDT (1 << 3)
32
Daniel Vetter650dc072012-04-02 10:08:35 +020033#ifdef CONFIG_INTEL_IOMMU
34extern int intel_iommu_gfx_mapped;
35#endif
36
Daniel Vetter0ade6382010-08-24 22:18:41 +020037#endif