blob: 9a57504183c77bca30636cf6204f5eefb4169022 [file] [log] [blame]
Alex Dubov60fdd932008-03-10 11:43:43 -07001/*
2 * jmb38x_ms.c - JMicron jmb38x MemoryStick card reader
3 *
4 * Copyright (C) 2008 Alex Dubov <oakad@yahoo.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <linux/spinlock.h>
13#include <linux/interrupt.h>
14#include <linux/pci.h>
Andrew Mortond3597ea2008-03-19 17:01:03 -070015#include <linux/dma-mapping.h>
Alex Dubov60fdd932008-03-10 11:43:43 -070016#include <linux/delay.h>
17#include <linux/highmem.h>
18#include <linux/memstick.h>
19
20#define DRIVER_NAME "jmb38x_ms"
21
22static int no_dma;
23module_param(no_dma, bool, 0644);
24
25enum {
26 DMA_ADDRESS = 0x00,
27 BLOCK = 0x04,
28 DMA_CONTROL = 0x08,
29 TPC_P0 = 0x0c,
30 TPC_P1 = 0x10,
31 TPC = 0x14,
32 HOST_CONTROL = 0x18,
33 DATA = 0x1c,
34 STATUS = 0x20,
35 INT_STATUS = 0x24,
36 INT_STATUS_ENABLE = 0x28,
37 INT_SIGNAL_ENABLE = 0x2c,
38 TIMER = 0x30,
39 TIMER_CONTROL = 0x34,
40 PAD_OUTPUT_ENABLE = 0x38,
41 PAD_PU_PD = 0x3c,
42 CLOCK_DELAY = 0x40,
43 ADMA_ADDRESS = 0x44,
44 CLOCK_CONTROL = 0x48,
45 LED_CONTROL = 0x4c,
46 VERSION = 0x50
47};
48
49struct jmb38x_ms_host {
50 struct jmb38x_ms *chip;
51 void __iomem *addr;
52 spinlock_t lock;
53 int id;
54 char host_id[DEVICE_ID_SIZE];
55 int irq;
56 unsigned int block_pos;
57 unsigned long timeout_jiffies;
58 struct timer_list timer;
59 struct memstick_request *req;
60 unsigned char eject:1,
61 use_dma:1;
62 unsigned char cmd_flags;
63 unsigned char io_pos;
64 unsigned int io_word[2];
65};
66
67struct jmb38x_ms {
68 struct pci_dev *pdev;
69 int host_cnt;
70 struct memstick_host *hosts[];
71};
72
73#define BLOCK_COUNT_MASK 0xffff0000
74#define BLOCK_SIZE_MASK 0x00000fff
75
76#define DMA_CONTROL_ENABLE 0x00000001
77
78#define TPC_DATA_SEL 0x00008000
79#define TPC_DIR 0x00004000
80#define TPC_WAIT_INT 0x00002000
81#define TPC_GET_INT 0x00000800
82#define TPC_CODE_SZ_MASK 0x00000700
83#define TPC_DATA_SZ_MASK 0x00000007
84
85#define HOST_CONTROL_RESET_REQ 0x00008000
86#define HOST_CONTROL_REI 0x00004000
87#define HOST_CONTROL_LED 0x00000400
88#define HOST_CONTROL_FAST_CLK 0x00000200
89#define HOST_CONTROL_RESET 0x00000100
90#define HOST_CONTROL_POWER_EN 0x00000080
91#define HOST_CONTROL_CLOCK_EN 0x00000040
92#define HOST_CONTROL_IF_SHIFT 4
93
94#define HOST_CONTROL_IF_SERIAL 0x0
95#define HOST_CONTROL_IF_PAR4 0x1
96#define HOST_CONTROL_IF_PAR8 0x3
97
98#define STATUS_HAS_MEDIA 0x00000400
99#define STATUS_FIFO_EMPTY 0x00000200
100#define STATUS_FIFO_FULL 0x00000100
101
102#define INT_STATUS_TPC_ERR 0x00080000
103#define INT_STATUS_CRC_ERR 0x00040000
104#define INT_STATUS_TIMER_TO 0x00020000
105#define INT_STATUS_HSK_TO 0x00010000
106#define INT_STATUS_ANY_ERR 0x00008000
107#define INT_STATUS_FIFO_WRDY 0x00000080
108#define INT_STATUS_FIFO_RRDY 0x00000040
109#define INT_STATUS_MEDIA_OUT 0x00000010
110#define INT_STATUS_MEDIA_IN 0x00000008
111#define INT_STATUS_DMA_BOUNDARY 0x00000004
112#define INT_STATUS_EOTRAN 0x00000002
113#define INT_STATUS_EOTPC 0x00000001
114
115#define INT_STATUS_ALL 0x000f801f
116
117#define PAD_OUTPUT_ENABLE_MS 0x0F3F
118
119#define PAD_PU_PD_OFF 0x7FFF0000
120#define PAD_PU_PD_ON_MS_SOCK0 0x5f8f0000
121#define PAD_PU_PD_ON_MS_SOCK1 0x0f0f0000
122
123enum {
124 CMD_READY = 0x01,
125 FIFO_READY = 0x02,
126 REG_DATA = 0x04,
127 AUTO_GET_INT = 0x08
128};
129
130static unsigned int jmb38x_ms_read_data(struct jmb38x_ms_host *host,
131 unsigned char *buf, unsigned int length)
132{
133 unsigned int off = 0;
134
135 while (host->io_pos && length) {
136 buf[off++] = host->io_word[0] & 0xff;
137 host->io_word[0] >>= 8;
138 length--;
139 host->io_pos--;
140 }
141
142 if (!length)
143 return off;
144
145 while (!(STATUS_FIFO_EMPTY & readl(host->addr + STATUS))) {
146 if (length < 4)
147 break;
148 *(unsigned int *)(buf + off) = __raw_readl(host->addr + DATA);
149 length -= 4;
150 off += 4;
151 }
152
153 if (length
154 && !(STATUS_FIFO_EMPTY & readl(host->addr + STATUS))) {
155 host->io_word[0] = readl(host->addr + DATA);
156 for (host->io_pos = 4; host->io_pos; --host->io_pos) {
157 buf[off++] = host->io_word[0] & 0xff;
158 host->io_word[0] >>= 8;
159 length--;
160 if (!length)
161 break;
162 }
163 }
164
165 return off;
166}
167
168static unsigned int jmb38x_ms_read_reg_data(struct jmb38x_ms_host *host,
169 unsigned char *buf,
170 unsigned int length)
171{
172 unsigned int off = 0;
173
174 while (host->io_pos > 4 && length) {
175 buf[off++] = host->io_word[0] & 0xff;
176 host->io_word[0] >>= 8;
177 length--;
178 host->io_pos--;
179 }
180
181 if (!length)
182 return off;
183
184 while (host->io_pos && length) {
185 buf[off++] = host->io_word[1] & 0xff;
186 host->io_word[1] >>= 8;
187 length--;
188 host->io_pos--;
189 }
190
191 return off;
192}
193
194static unsigned int jmb38x_ms_write_data(struct jmb38x_ms_host *host,
195 unsigned char *buf,
196 unsigned int length)
197{
198 unsigned int off = 0;
199
200 if (host->io_pos) {
201 while (host->io_pos < 4 && length) {
202 host->io_word[0] |= buf[off++] << (host->io_pos * 8);
203 host->io_pos++;
204 length--;
205 }
206 }
207
208 if (host->io_pos == 4
209 && !(STATUS_FIFO_FULL & readl(host->addr + STATUS))) {
210 writel(host->io_word[0], host->addr + DATA);
211 host->io_pos = 0;
212 host->io_word[0] = 0;
213 } else if (host->io_pos) {
214 return off;
215 }
216
217 if (!length)
218 return off;
219
220 while (!(STATUS_FIFO_FULL & readl(host->addr + STATUS))) {
221 if (length < 4)
222 break;
223
224 __raw_writel(*(unsigned int *)(buf + off),
225 host->addr + DATA);
226 length -= 4;
227 off += 4;
228 }
229
230 switch (length) {
231 case 3:
232 host->io_word[0] |= buf[off + 2] << 16;
233 host->io_pos++;
234 case 2:
235 host->io_word[0] |= buf[off + 1] << 8;
236 host->io_pos++;
237 case 1:
238 host->io_word[0] |= buf[off];
239 host->io_pos++;
240 }
241
242 off += host->io_pos;
243
244 return off;
245}
246
247static unsigned int jmb38x_ms_write_reg_data(struct jmb38x_ms_host *host,
248 unsigned char *buf,
249 unsigned int length)
250{
251 unsigned int off = 0;
252
253 while (host->io_pos < 4 && length) {
254 host->io_word[0] &= ~(0xff << (host->io_pos * 8));
255 host->io_word[0] |= buf[off++] << (host->io_pos * 8);
256 host->io_pos++;
257 length--;
258 }
259
260 if (!length)
261 return off;
262
263 while (host->io_pos < 8 && length) {
264 host->io_word[1] &= ~(0xff << (host->io_pos * 8));
265 host->io_word[1] |= buf[off++] << (host->io_pos * 8);
266 host->io_pos++;
267 length--;
268 }
269
270 return off;
271}
272
273static int jmb38x_ms_transfer_data(struct jmb38x_ms_host *host)
274{
275 unsigned int length;
276 unsigned int off;
Andrew Morton81950962008-03-19 17:01:04 -0700277 unsigned int t_size, p_cnt;
Alex Dubov60fdd932008-03-10 11:43:43 -0700278 unsigned char *buf;
279 struct page *pg;
280 unsigned long flags = 0;
281
282 if (host->req->long_data) {
283 length = host->req->sg.length - host->block_pos;
284 off = host->req->sg.offset + host->block_pos;
285 } else {
286 length = host->req->data_len - host->block_pos;
287 off = 0;
288 }
289
290 while (length) {
Andrew Morton81950962008-03-19 17:01:04 -0700291 unsigned int uninitialized_var(p_off);
292
Alex Dubov60fdd932008-03-10 11:43:43 -0700293 if (host->req->long_data) {
294 pg = nth_page(sg_page(&host->req->sg),
295 off >> PAGE_SHIFT);
296 p_off = offset_in_page(off);
297 p_cnt = PAGE_SIZE - p_off;
298 p_cnt = min(p_cnt, length);
299
300 local_irq_save(flags);
301 buf = kmap_atomic(pg, KM_BIO_SRC_IRQ) + p_off;
302 } else {
303 buf = host->req->data + host->block_pos;
304 p_cnt = host->req->data_len - host->block_pos;
305 }
306
307 if (host->req->data_dir == WRITE)
308 t_size = !(host->cmd_flags & REG_DATA)
309 ? jmb38x_ms_write_data(host, buf, p_cnt)
310 : jmb38x_ms_write_reg_data(host, buf, p_cnt);
311 else
312 t_size = !(host->cmd_flags & REG_DATA)
313 ? jmb38x_ms_read_data(host, buf, p_cnt)
314 : jmb38x_ms_read_reg_data(host, buf, p_cnt);
315
316 if (host->req->long_data) {
317 kunmap_atomic(buf - p_off, KM_BIO_SRC_IRQ);
318 local_irq_restore(flags);
319 }
320
321 if (!t_size)
322 break;
323 host->block_pos += t_size;
324 length -= t_size;
325 off += t_size;
326 }
327
328 if (!length && host->req->data_dir == WRITE) {
329 if (host->cmd_flags & REG_DATA) {
330 writel(host->io_word[0], host->addr + TPC_P0);
331 writel(host->io_word[1], host->addr + TPC_P1);
332 } else if (host->io_pos) {
333 writel(host->io_word[0], host->addr + DATA);
334 }
335 }
336
337 return length;
338}
339
340static int jmb38x_ms_issue_cmd(struct memstick_host *msh)
341{
342 struct jmb38x_ms_host *host = memstick_priv(msh);
343 unsigned char *data;
344 unsigned int data_len, cmd, t_val;
345
346 if (!(STATUS_HAS_MEDIA & readl(host->addr + STATUS))) {
347 dev_dbg(msh->cdev.dev, "no media status\n");
348 host->req->error = -ETIME;
349 return host->req->error;
350 }
351
352 dev_dbg(msh->cdev.dev, "control %08x\n",
353 readl(host->addr + HOST_CONTROL));
354 dev_dbg(msh->cdev.dev, "status %08x\n", readl(host->addr + INT_STATUS));
355 dev_dbg(msh->cdev.dev, "hstatus %08x\n", readl(host->addr + STATUS));
356
357 host->cmd_flags = 0;
358 host->block_pos = 0;
359 host->io_pos = 0;
360 host->io_word[0] = 0;
361 host->io_word[1] = 0;
362
363 cmd = host->req->tpc << 16;
364 cmd |= TPC_DATA_SEL;
365
366 if (host->req->data_dir == READ)
367 cmd |= TPC_DIR;
368 if (host->req->need_card_int)
369 cmd |= TPC_WAIT_INT;
370 if (host->req->get_int_reg)
371 cmd |= TPC_GET_INT;
372
373 data = host->req->data;
374
375 host->use_dma = !no_dma;
376
377 if (host->req->long_data) {
378 data_len = host->req->sg.length;
379 } else {
380 data_len = host->req->data_len;
381 host->use_dma = 0;
382 }
383
384 if (data_len <= 8) {
385 cmd &= ~(TPC_DATA_SEL | 0xf);
386 host->cmd_flags |= REG_DATA;
387 cmd |= data_len & 0xf;
388 host->use_dma = 0;
389 }
390
391 if (host->use_dma) {
392 if (1 != pci_map_sg(host->chip->pdev, &host->req->sg, 1,
393 host->req->data_dir == READ
394 ? PCI_DMA_FROMDEVICE
395 : PCI_DMA_TODEVICE)) {
396 host->req->error = -ENOMEM;
397 return host->req->error;
398 }
399 data_len = sg_dma_len(&host->req->sg);
400 writel(sg_dma_address(&host->req->sg),
401 host->addr + DMA_ADDRESS);
402 writel(((1 << 16) & BLOCK_COUNT_MASK)
403 | (data_len & BLOCK_SIZE_MASK),
404 host->addr + BLOCK);
405 writel(DMA_CONTROL_ENABLE, host->addr + DMA_CONTROL);
406 } else if (!(host->cmd_flags & REG_DATA)) {
407 writel(((1 << 16) & BLOCK_COUNT_MASK)
408 | (data_len & BLOCK_SIZE_MASK),
409 host->addr + BLOCK);
410 t_val = readl(host->addr + INT_STATUS_ENABLE);
411 t_val |= host->req->data_dir == READ
412 ? INT_STATUS_FIFO_RRDY
413 : INT_STATUS_FIFO_WRDY;
414
415 writel(t_val, host->addr + INT_STATUS_ENABLE);
416 writel(t_val, host->addr + INT_SIGNAL_ENABLE);
417 } else {
418 cmd &= ~(TPC_DATA_SEL | 0xf);
419 host->cmd_flags |= REG_DATA;
420 cmd |= data_len & 0xf;
421
422 if (host->req->data_dir == WRITE) {
423 jmb38x_ms_transfer_data(host);
424 writel(host->io_word[0], host->addr + TPC_P0);
425 writel(host->io_word[1], host->addr + TPC_P1);
426 }
427 }
428
429 mod_timer(&host->timer, jiffies + host->timeout_jiffies);
430 writel(HOST_CONTROL_LED | readl(host->addr + HOST_CONTROL),
431 host->addr + HOST_CONTROL);
432 host->req->error = 0;
433
434 writel(cmd, host->addr + TPC);
435 dev_dbg(msh->cdev.dev, "executing TPC %08x, len %x\n", cmd, data_len);
436
437 return 0;
438}
439
440static void jmb38x_ms_complete_cmd(struct memstick_host *msh, int last)
441{
442 struct jmb38x_ms_host *host = memstick_priv(msh);
443 unsigned int t_val = 0;
444 int rc;
445
446 del_timer(&host->timer);
447
448 dev_dbg(msh->cdev.dev, "c control %08x\n",
449 readl(host->addr + HOST_CONTROL));
450 dev_dbg(msh->cdev.dev, "c status %08x\n",
451 readl(host->addr + INT_STATUS));
452 dev_dbg(msh->cdev.dev, "c hstatus %08x\n", readl(host->addr + STATUS));
453
454 if (host->req->get_int_reg) {
455 t_val = readl(host->addr + TPC_P0);
456 host->req->int_reg = (t_val & 0xff);
457 }
458
459 if (host->use_dma) {
460 writel(0, host->addr + DMA_CONTROL);
461 pci_unmap_sg(host->chip->pdev, &host->req->sg, 1,
462 host->req->data_dir == READ
463 ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
464 } else {
465 t_val = readl(host->addr + INT_STATUS_ENABLE);
466 if (host->req->data_dir == READ)
467 t_val &= ~INT_STATUS_FIFO_RRDY;
468 else
469 t_val &= ~INT_STATUS_FIFO_WRDY;
470
471 writel(t_val, host->addr + INT_STATUS_ENABLE);
472 writel(t_val, host->addr + INT_SIGNAL_ENABLE);
473 }
474
475 writel((~HOST_CONTROL_LED) & readl(host->addr + HOST_CONTROL),
476 host->addr + HOST_CONTROL);
477
478 if (!last) {
479 do {
480 rc = memstick_next_req(msh, &host->req);
481 } while (!rc && jmb38x_ms_issue_cmd(msh));
482 } else {
483 do {
484 rc = memstick_next_req(msh, &host->req);
485 if (!rc)
486 host->req->error = -ETIME;
487 } while (!rc);
488 }
489}
490
491static irqreturn_t jmb38x_ms_isr(int irq, void *dev_id)
492{
493 struct memstick_host *msh = dev_id;
494 struct jmb38x_ms_host *host = memstick_priv(msh);
495 unsigned int irq_status;
496
497 spin_lock(&host->lock);
498 irq_status = readl(host->addr + INT_STATUS);
499 dev_dbg(&host->chip->pdev->dev, "irq_status = %08x\n", irq_status);
500 if (irq_status == 0 || irq_status == (~0)) {
501 spin_unlock(&host->lock);
502 return IRQ_NONE;
503 }
504
505 if (host->req) {
506 if (irq_status & INT_STATUS_ANY_ERR) {
507 if (irq_status & INT_STATUS_CRC_ERR)
508 host->req->error = -EILSEQ;
509 else
510 host->req->error = -ETIME;
511 } else {
512 if (host->use_dma) {
513 if (irq_status & INT_STATUS_EOTRAN)
514 host->cmd_flags |= FIFO_READY;
515 } else {
516 if (irq_status & (INT_STATUS_FIFO_RRDY
517 | INT_STATUS_FIFO_WRDY))
518 jmb38x_ms_transfer_data(host);
519
520 if (irq_status & INT_STATUS_EOTRAN) {
521 jmb38x_ms_transfer_data(host);
522 host->cmd_flags |= FIFO_READY;
523 }
524 }
525
526 if (irq_status & INT_STATUS_EOTPC) {
527 host->cmd_flags |= CMD_READY;
528 if (host->cmd_flags & REG_DATA) {
529 if (host->req->data_dir == READ) {
530 host->io_word[0]
531 = readl(host->addr
532 + TPC_P0);
533 host->io_word[1]
534 = readl(host->addr
535 + TPC_P1);
536 host->io_pos = 8;
537
538 jmb38x_ms_transfer_data(host);
539 }
540 host->cmd_flags |= FIFO_READY;
541 }
542 }
543 }
544 }
545
546 if (irq_status & (INT_STATUS_MEDIA_IN | INT_STATUS_MEDIA_OUT)) {
547 dev_dbg(&host->chip->pdev->dev, "media changed\n");
548 memstick_detect_change(msh);
549 }
550
551 writel(irq_status, host->addr + INT_STATUS);
552
553 if (host->req
554 && (((host->cmd_flags & CMD_READY)
555 && (host->cmd_flags & FIFO_READY))
556 || host->req->error))
557 jmb38x_ms_complete_cmd(msh, 0);
558
559 spin_unlock(&host->lock);
560 return IRQ_HANDLED;
561}
562
563static void jmb38x_ms_abort(unsigned long data)
564{
565 struct memstick_host *msh = (struct memstick_host *)data;
566 struct jmb38x_ms_host *host = memstick_priv(msh);
567 unsigned long flags;
568
569 dev_dbg(&host->chip->pdev->dev, "abort\n");
570 spin_lock_irqsave(&host->lock, flags);
571 if (host->req) {
572 host->req->error = -ETIME;
573 jmb38x_ms_complete_cmd(msh, 0);
574 }
575 spin_unlock_irqrestore(&host->lock, flags);
576}
577
578static void jmb38x_ms_request(struct memstick_host *msh)
579{
580 struct jmb38x_ms_host *host = memstick_priv(msh);
581 unsigned long flags;
582 int rc;
583
584 spin_lock_irqsave(&host->lock, flags);
585 if (host->req) {
586 spin_unlock_irqrestore(&host->lock, flags);
587 BUG();
588 return;
589 }
590
591 do {
592 rc = memstick_next_req(msh, &host->req);
593 } while (!rc && jmb38x_ms_issue_cmd(msh));
594 spin_unlock_irqrestore(&host->lock, flags);
595}
596
597static void jmb38x_ms_reset(struct jmb38x_ms_host *host)
598{
599 unsigned int host_ctl = readl(host->addr + HOST_CONTROL);
600
601 writel(host_ctl | HOST_CONTROL_RESET_REQ | HOST_CONTROL_RESET,
602 host->addr + HOST_CONTROL);
603
604 while (HOST_CONTROL_RESET_REQ
605 & (host_ctl = readl(host->addr + HOST_CONTROL))) {
606 ndelay(100);
607 dev_dbg(&host->chip->pdev->dev, "reset\n");
608 }
609
610 writel(INT_STATUS_ALL, host->addr + INT_STATUS_ENABLE);
611 writel(INT_STATUS_ALL, host->addr + INT_SIGNAL_ENABLE);
612
613 dev_dbg(&host->chip->pdev->dev, "reset\n");
614}
615
616static void jmb38x_ms_set_param(struct memstick_host *msh,
617 enum memstick_param param,
618 int value)
619{
620 struct jmb38x_ms_host *host = memstick_priv(msh);
621 unsigned int host_ctl;
622 unsigned long flags;
623
624 spin_lock_irqsave(&host->lock, flags);
625
626 switch (param) {
627 case MEMSTICK_POWER:
628 if (value == MEMSTICK_POWER_ON) {
629 jmb38x_ms_reset(host);
630
631 writel(host->id ? PAD_PU_PD_ON_MS_SOCK1
632 : PAD_PU_PD_ON_MS_SOCK0,
633 host->addr + PAD_PU_PD);
634
635 writel(PAD_OUTPUT_ENABLE_MS,
636 host->addr + PAD_OUTPUT_ENABLE);
637
638 host_ctl = readl(host->addr + HOST_CONTROL);
639 host_ctl |= 7;
640 writel(host_ctl | (HOST_CONTROL_POWER_EN
641 | HOST_CONTROL_CLOCK_EN),
642 host->addr + HOST_CONTROL);
643
644 dev_dbg(&host->chip->pdev->dev, "power on\n");
645 } else if (value == MEMSTICK_POWER_OFF) {
646 writel(readl(host->addr + HOST_CONTROL)
647 & ~(HOST_CONTROL_POWER_EN
648 | HOST_CONTROL_CLOCK_EN),
649 host->addr + HOST_CONTROL);
650 writel(0, host->addr + PAD_OUTPUT_ENABLE);
651 writel(PAD_PU_PD_OFF, host->addr + PAD_PU_PD);
652 dev_dbg(&host->chip->pdev->dev, "power off\n");
653 }
654 break;
655 case MEMSTICK_INTERFACE:
656 /* jmb38x_ms_reset(host); */
657
658 host_ctl = readl(host->addr + HOST_CONTROL);
659 host_ctl &= ~(3 << HOST_CONTROL_IF_SHIFT);
660 /* host_ctl |= 7; */
661
662 if (value == MEMSTICK_SERIAL) {
663 host_ctl &= ~HOST_CONTROL_FAST_CLK;
664 host_ctl |= HOST_CONTROL_IF_SERIAL
665 << HOST_CONTROL_IF_SHIFT;
666 host_ctl |= HOST_CONTROL_REI;
667 writel(0, host->addr + CLOCK_DELAY);
668 } else if (value == MEMSTICK_PAR4) {
669 host_ctl |= HOST_CONTROL_FAST_CLK;
670 host_ctl |= HOST_CONTROL_IF_PAR4
671 << HOST_CONTROL_IF_SHIFT;
672 host_ctl &= ~HOST_CONTROL_REI;
673 writel(4, host->addr + CLOCK_DELAY);
674 } else if (value == MEMSTICK_PAR8) {
675 host_ctl |= HOST_CONTROL_FAST_CLK;
676 host_ctl |= HOST_CONTROL_IF_PAR8
677 << HOST_CONTROL_IF_SHIFT;
678 host_ctl &= ~HOST_CONTROL_REI;
679 writel(4, host->addr + CLOCK_DELAY);
680 }
681 writel(host_ctl, host->addr + HOST_CONTROL);
682 break;
683 };
684
685 spin_unlock_irqrestore(&host->lock, flags);
686}
687
688#ifdef CONFIG_PM
689
690static int jmb38x_ms_suspend(struct pci_dev *dev, pm_message_t state)
691{
692 struct jmb38x_ms *jm = pci_get_drvdata(dev);
693 int cnt;
694
695 for (cnt = 0; cnt < jm->host_cnt; ++cnt) {
696 if (!jm->hosts[cnt])
697 break;
698 memstick_suspend_host(jm->hosts[cnt]);
699 }
700
701 pci_save_state(dev);
702 pci_enable_wake(dev, pci_choose_state(dev, state), 0);
703 pci_disable_device(dev);
704 pci_set_power_state(dev, pci_choose_state(dev, state));
705 return 0;
706}
707
708static int jmb38x_ms_resume(struct pci_dev *dev)
709{
710 struct jmb38x_ms *jm = pci_get_drvdata(dev);
711 int rc;
712
713 pci_set_power_state(dev, PCI_D0);
714 pci_restore_state(dev);
715 rc = pci_enable_device(dev);
716 if (rc)
717 return rc;
718 pci_set_master(dev);
719
720 pci_read_config_dword(dev, 0xac, &rc);
721 pci_write_config_dword(dev, 0xac, rc | 0x00470000);
722
723 for (rc = 0; rc < jm->host_cnt; ++rc) {
724 if (!jm->hosts[rc])
725 break;
726 memstick_resume_host(jm->hosts[rc]);
727 memstick_detect_change(jm->hosts[rc]);
728 }
729
730 return 0;
731}
732
733#else
734
735#define jmb38x_ms_suspend NULL
736#define jmb38x_ms_resume NULL
737
738#endif /* CONFIG_PM */
739
740static int jmb38x_ms_count_slots(struct pci_dev *pdev)
741{
742 int cnt, rc = 0;
743
744 for (cnt = 0; cnt < PCI_ROM_RESOURCE; ++cnt) {
745 if (!(IORESOURCE_MEM & pci_resource_flags(pdev, cnt)))
746 break;
747
748 if (256 != pci_resource_len(pdev, cnt))
749 break;
750
751 ++rc;
752 }
753 return rc;
754}
755
756static struct memstick_host *jmb38x_ms_alloc_host(struct jmb38x_ms *jm, int cnt)
757{
758 struct memstick_host *msh;
759 struct jmb38x_ms_host *host;
760
761 msh = memstick_alloc_host(sizeof(struct jmb38x_ms_host),
762 &jm->pdev->dev);
763 if (!msh)
764 return NULL;
765
766 host = memstick_priv(msh);
767 host->chip = jm;
768 host->addr = ioremap(pci_resource_start(jm->pdev, cnt),
769 pci_resource_len(jm->pdev, cnt));
770 if (!host->addr)
771 goto err_out_free;
772
773 spin_lock_init(&host->lock);
774 host->id = cnt;
775 snprintf(host->host_id, DEVICE_ID_SIZE, DRIVER_NAME ":slot%d",
776 host->id);
777 host->irq = jm->pdev->irq;
778 host->timeout_jiffies = msecs_to_jiffies(4000);
779 msh->request = jmb38x_ms_request;
780 msh->set_param = jmb38x_ms_set_param;
781 /*
782 msh->caps = MEMSTICK_CAP_AUTO_GET_INT | MEMSTICK_CAP_PAR4
783 | MEMSTICK_CAP_PAR8;
784 */
785 msh->caps = MEMSTICK_CAP_PAR4 | MEMSTICK_CAP_PAR8;
786
787 setup_timer(&host->timer, jmb38x_ms_abort, (unsigned long)msh);
788
789 if (!request_irq(host->irq, jmb38x_ms_isr, IRQF_SHARED, host->host_id,
790 msh))
791 return msh;
792
793 iounmap(host->addr);
794err_out_free:
795 kfree(msh);
796 return NULL;
797}
798
799static void jmb38x_ms_free_host(struct memstick_host *msh)
800{
801 struct jmb38x_ms_host *host = memstick_priv(msh);
802
803 free_irq(host->irq, msh);
804 iounmap(host->addr);
805 memstick_free_host(msh);
806}
807
808static int jmb38x_ms_probe(struct pci_dev *pdev,
809 const struct pci_device_id *dev_id)
810{
811 struct jmb38x_ms *jm;
812 int pci_dev_busy = 0;
813 int rc, cnt;
814
815 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
816 if (rc)
817 return rc;
818
819 rc = pci_enable_device(pdev);
820 if (rc)
821 return rc;
822
823 pci_set_master(pdev);
824
825 rc = pci_request_regions(pdev, DRIVER_NAME);
826 if (rc) {
827 pci_dev_busy = 1;
828 goto err_out;
829 }
830
831 pci_read_config_dword(pdev, 0xac, &rc);
832 pci_write_config_dword(pdev, 0xac, rc | 0x00470000);
833
834 cnt = jmb38x_ms_count_slots(pdev);
835 if (!cnt) {
836 rc = -ENODEV;
837 pci_dev_busy = 1;
838 goto err_out;
839 }
840
841 jm = kzalloc(sizeof(struct jmb38x_ms)
842 + cnt * sizeof(struct memstick_host *), GFP_KERNEL);
843 if (!jm) {
844 rc = -ENOMEM;
845 goto err_out_int;
846 }
847
848 jm->pdev = pdev;
849 jm->host_cnt = cnt;
850 pci_set_drvdata(pdev, jm);
851
852 for (cnt = 0; cnt < jm->host_cnt; ++cnt) {
853 jm->hosts[cnt] = jmb38x_ms_alloc_host(jm, cnt);
854 if (!jm->hosts[cnt])
855 break;
856
857 rc = memstick_add_host(jm->hosts[cnt]);
858
859 if (rc) {
860 jmb38x_ms_free_host(jm->hosts[cnt]);
861 jm->hosts[cnt] = NULL;
862 break;
863 }
864 }
865
866 if (cnt)
867 return 0;
868
869 rc = -ENODEV;
870
871 pci_set_drvdata(pdev, NULL);
872 kfree(jm);
873err_out_int:
874 pci_release_regions(pdev);
875err_out:
876 if (!pci_dev_busy)
877 pci_disable_device(pdev);
878 return rc;
879}
880
881static void jmb38x_ms_remove(struct pci_dev *dev)
882{
883 struct jmb38x_ms *jm = pci_get_drvdata(dev);
884 struct jmb38x_ms_host *host;
885 int cnt;
886 unsigned long flags;
887
888 for (cnt = 0; cnt < jm->host_cnt; ++cnt) {
889 if (!jm->hosts[cnt])
890 break;
891
892 host = memstick_priv(jm->hosts[cnt]);
893
894 writel(0, host->addr + INT_SIGNAL_ENABLE);
895 writel(0, host->addr + INT_STATUS_ENABLE);
896 mmiowb();
897 dev_dbg(&jm->pdev->dev, "interrupts off\n");
898 spin_lock_irqsave(&host->lock, flags);
899 if (host->req) {
900 host->req->error = -ETIME;
901 jmb38x_ms_complete_cmd(jm->hosts[cnt], 1);
902 }
903 spin_unlock_irqrestore(&host->lock, flags);
904
905 memstick_remove_host(jm->hosts[cnt]);
906 dev_dbg(&jm->pdev->dev, "host removed\n");
907
908 jmb38x_ms_free_host(jm->hosts[cnt]);
909 }
910
911 pci_set_drvdata(dev, NULL);
912 pci_release_regions(dev);
913 pci_disable_device(dev);
914 kfree(jm);
915}
916
917static struct pci_device_id jmb38x_ms_id_tbl [] = {
918 { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB38X_MS, PCI_ANY_ID,
919 PCI_ANY_ID, 0, 0, 0 },
920 { }
921};
922
923static struct pci_driver jmb38x_ms_driver = {
924 .name = DRIVER_NAME,
925 .id_table = jmb38x_ms_id_tbl,
926 .probe = jmb38x_ms_probe,
927 .remove = jmb38x_ms_remove,
928 .suspend = jmb38x_ms_suspend,
929 .resume = jmb38x_ms_resume
930};
931
932static int __init jmb38x_ms_init(void)
933{
934 return pci_register_driver(&jmb38x_ms_driver);
935}
936
937static void __exit jmb38x_ms_exit(void)
938{
939 pci_unregister_driver(&jmb38x_ms_driver);
940}
941
942MODULE_AUTHOR("Alex Dubov");
943MODULE_DESCRIPTION("JMicron jmb38x MemoryStick driver");
944MODULE_LICENSE("GPL");
945MODULE_DEVICE_TABLE(pci, jmb38x_ms_id_tbl);
946
947module_init(jmb38x_ms_init);
948module_exit(jmb38x_ms_exit);