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Linus Torvalds1da177e2005-04-16 15:20:36 -07001#
2# PCI configuration
3#
Dan Williamsf282b9702007-04-18 18:46:20 +10004config ARCH_SUPPORTS_MSI
5 bool
6 default n
7
Linus Torvalds1da177e2005-04-16 15:20:36 -07008config PCI_MSI
9 bool "Message Signaled Interrupts (MSI and MSI-X)"
10 depends on PCI
Dan Williamsf282b9702007-04-18 18:46:20 +100011 depends on ARCH_SUPPORTS_MSI
Linus Torvalds1da177e2005-04-16 15:20:36 -070012 help
13 This allows device drivers to enable MSI (Message Signaled
14 Interrupts). Message Signaled Interrupts enable a device to
15 generate an interrupt using an inbound Memory Write on its
16 PCI bus instead of asserting a device IRQ pin.
17
Matthew Wilcox309e57d2006-03-05 22:33:34 -070018 Use of PCI MSI interrupts can be disabled at kernel boot time
19 by using the 'pci=nomsi' option. This disables MSI for the
20 entire system.
21
Linus Torvalds1da177e2005-04-16 15:20:36 -070022 If you don't know what to do here, say N.
23
Linus Torvalds1da177e2005-04-16 15:20:36 -070024config PCI_DEBUG
25 bool "PCI Debugging"
26 depends on PCI && DEBUG_KERNEL
27 help
28 Say Y here if you want the PCI core to produce a bunch of debug
29 messages to the system log. Select this if you are having a
30 problem with PCI support and want to see more of what is going on.
31
32 When in doubt, say N.
33
Eric W. Biederman8b955b02006-10-04 02:16:55 -070034config HT_IRQ
35 bool "Interrupts on hypertransport devices"
36 default y
Adrian Bunkfbab41c2006-10-11 01:22:04 -070037 depends on PCI && X86_LOCAL_APIC && X86_IO_APIC
Eric W. Biederman8b955b02006-10-04 02:16:55 -070038 help
39 This allows native hypertransport devices to use interrupts.
40
41 If unsure say Y.