Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 1 | Samsung GPIO and Pin Mux/Config controller |
| 2 | |
| 3 | Samsung's ARM based SoC's integrates a GPIO and Pin mux/config hardware |
| 4 | controller. It controls the input/output settings on the available pads/pins |
| 5 | and also provides ability to multiplex and configure the output of various |
| 6 | on-chip controllers onto these pads. |
| 7 | |
| 8 | Required Properties: |
| 9 | - compatible: should be one of the following. |
Heiko Stuebner | af99a75 | 2013-05-21 00:56:13 +0900 | [diff] [blame] | 10 | - "samsung,s3c2412-pinctrl": for S3C2412-compatible pin-controller, |
| 11 | - "samsung,s3c2416-pinctrl": for S3C2416-compatible pin-controller, |
| 12 | - "samsung,s3c2440-pinctrl": for S3C2440-compatible pin-controller, |
| 13 | - "samsung,s3c2450-pinctrl": for S3C2450-compatible pin-controller, |
Tomasz Figa | 61dd726 | 2013-03-18 22:31:55 +0100 | [diff] [blame] | 14 | - "samsung,s3c64xx-pinctrl": for S3C64xx-compatible pin-controller, |
Mateusz Krawczuk | 608a26a | 2013-08-27 15:08:10 +0200 | [diff] [blame] | 15 | - "samsung,s5pv210-pinctrl": for S5PV210-compatible pin-controller, |
Kukjin Kim | b533c86 | 2013-01-02 16:05:42 -0800 | [diff] [blame] | 16 | - "samsung,exynos4210-pinctrl": for Exynos4210 compatible pin-controller. |
| 17 | - "samsung,exynos4x12-pinctrl": for Exynos4x12 compatible pin-controller. |
| 18 | - "samsung,exynos5250-pinctrl": for Exynos5250 compatible pin-controller. |
Young-Gun Jang | 9a8b607 | 2014-02-05 11:51:28 +0530 | [diff] [blame] | 19 | - "samsung,exynos5260-pinctrl": for Exynos5260 compatible pin-controller. |
Leela Krishna Amudala | 983dbeb | 2013-06-19 22:16:26 +0900 | [diff] [blame] | 20 | - "samsung,exynos5420-pinctrl": for Exynos5420 compatible pin-controller. |
Naveen Krishna Ch | 50cea0c | 2014-10-09 19:24:32 +0530 | [diff] [blame] | 21 | - "samsung,exynos7-pinctrl": for Exynos7 compatible pin-controller. |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 22 | |
| 23 | - reg: Base address of the pin controller hardware module and length of |
| 24 | the address space it occupies. |
| 25 | |
Tomasz Figa | b33ef91 | 2012-10-11 10:11:21 +0200 | [diff] [blame] | 26 | - Pin banks as child nodes: Pin banks of the controller are represented by child |
| 27 | nodes of the controller node. Bank name is taken from name of the node. Each |
| 28 | bank node must contain following properties: |
| 29 | |
| 30 | - gpio-controller: identifies the node as a gpio controller and pin bank. |
| 31 | - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO |
Leela Krishna Amudala | c91f2a0 | 2013-06-18 06:58:48 +0900 | [diff] [blame] | 32 | binding is used, the amount of cells must be specified as 2. See the below |
| 33 | mentioned gpio binding representation for description of particular cells. |
| 34 | |
| 35 | Eg: <&gpx2 6 0> |
| 36 | <[phandle of the gpio controller node] |
| 37 | [pin number within the gpio controller] |
| 38 | [flags]> |
| 39 | |
| 40 | Values for gpio specifier: |
| 41 | - Pin number: is a value between 0 to 7. |
| 42 | - Flags: 0 - Active High |
| 43 | 1 - Active Low |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 44 | |
| 45 | - Pin mux/config groups as child nodes: The pin mux (selecting pin function |
| 46 | mode) and pin config (pull up/down, driver strength) settings are represented |
| 47 | as child nodes of the pin-controller node. There should be atleast one |
Tomasz Figa | 9a2c1c3 | 2014-07-02 17:41:03 +0200 | [diff] [blame] | 48 | child node and there is no limit on the count of these child nodes. It is |
| 49 | also possible for a child node to consist of several further child nodes |
| 50 | to allow grouping multiple pinctrl groups into one. The format of second |
| 51 | level child nodes is exactly the same as for first level ones and is |
| 52 | described below. |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 53 | |
| 54 | The child node should contain a list of pin(s) on which a particular pin |
| 55 | function selection or pin configuration (or both) have to applied. This |
| 56 | list of pins is specified using the property name "samsung,pins". There |
| 57 | should be atleast one pin specfied for this property and there is no upper |
| 58 | limit on the count of pins that can be specified. The pins are specified |
| 59 | using pin names which are derived from the hardware manual of the SoC. As |
| 60 | an example, the pins in GPA0 bank of the pin controller can be represented |
| 61 | as "gpa0-0", "gpa0-1", "gpa0-2" and so on. The names should be in lower case. |
| 62 | The format of the pin names should be (as per the hardware manual) |
| 63 | "[pin bank name]-[pin number within the bank]". |
| 64 | |
| 65 | The pin function selection that should be applied on the pins listed in the |
| 66 | child node is specified using the "samsung,pin-function" property. The value |
| 67 | of this property that should be applied to each of the pins listed in the |
| 68 | "samsung,pins" property should be picked from the hardware manual of the SoC |
| 69 | for the specified pin group. This property is optional in the child node if |
| 70 | no specific function selection is desired for the pins listed in the child |
| 71 | node. The value of this property is used as-is to program the pin-controller |
| 72 | function selector register of the pin-bank. |
| 73 | |
| 74 | The child node can also optionally specify one or more of the pin |
| 75 | configuration that should be applied on all the pins listed in the |
| 76 | "samsung,pins" property of the child node. The following pin configuration |
| 77 | properties are supported. |
| 78 | |
Tomasz Figa | 2700bc0 | 2014-07-02 17:41:04 +0200 | [diff] [blame] | 79 | - samsung,pin-val: Initial value of pin output buffer. |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 80 | - samsung,pin-pud: Pull up/down configuration. |
| 81 | - samsung,pin-drv: Drive strength configuration. |
| 82 | - samsung,pin-pud-pdn: Pull up/down configuration in power down mode. |
| 83 | - samsung,pin-drv-pdn: Drive strength configuration in power down mode. |
| 84 | |
| 85 | The values specified by these config properties should be derived from the |
| 86 | hardware manual and these values are programmed as-is into the pin |
| 87 | pull up/down and driver strength register of the pin-controller. |
| 88 | |
| 89 | Note: A child should include atleast a pin function selection property or |
| 90 | pin configuration property (one or more) or both. |
| 91 | |
| 92 | The client nodes that require a particular pin function selection and/or |
| 93 | pin configuration should use the bindings listed in the "pinctrl-bindings.txt" |
| 94 | file. |
| 95 | |
| 96 | External GPIO and Wakeup Interrupts: |
| 97 | |
| 98 | The controller supports two types of external interrupts over gpio. The first |
| 99 | is the external gpio interrupt and second is the external wakeup interrupts. |
| 100 | The difference between the two is that the external wakeup interrupts can be |
| 101 | used as system wakeup events. |
| 102 | |
| 103 | A. External GPIO Interrupts: For supporting external gpio interrupts, the |
| 104 | following properties should be specified in the pin-controller device node. |
| 105 | |
Tomasz Figa | b33ef91 | 2012-10-11 10:11:21 +0200 | [diff] [blame] | 106 | - interrupt-parent: phandle of the interrupt parent to which the external |
| 107 | GPIO interrupts are forwarded to. |
| 108 | - interrupts: interrupt specifier for the controller. The format and value of |
| 109 | the interrupt specifier depends on the interrupt parent for the controller. |
| 110 | |
| 111 | In addition, following properties must be present in node of every bank |
| 112 | of pins supporting GPIO interrupts: |
| 113 | |
| 114 | - interrupt-controller: identifies the controller node as interrupt-parent. |
| 115 | - #interrupt-cells: the value of this property should be 2. |
| 116 | - First Cell: represents the external gpio interrupt number local to the |
| 117 | external gpio interrupt space of the controller. |
| 118 | - Second Cell: flags to identify the type of the interrupt |
| 119 | - 1 = rising edge triggered |
| 120 | - 2 = falling edge triggered |
| 121 | - 3 = rising and falling edge triggered |
| 122 | - 4 = high level triggered |
| 123 | - 8 = low level triggered |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 124 | |
| 125 | B. External Wakeup Interrupts: For supporting external wakeup interrupts, a |
| 126 | child node representing the external wakeup interrupt controller should be |
| 127 | included in the pin-controller device node. This child node should include |
| 128 | the following properties. |
| 129 | |
| 130 | - compatible: identifies the type of the external wakeup interrupt controller |
| 131 | The possible values are: |
Heiko Stuebner | af99a75 | 2013-05-21 00:56:13 +0900 | [diff] [blame] | 132 | - samsung,s3c2410-wakeup-eint: represents wakeup interrupt controller |
| 133 | found on Samsung S3C24xx SoCs except S3C2412 and S3C2413, |
| 134 | - samsung,s3c2412-wakeup-eint: represents wakeup interrupt controller |
| 135 | found on Samsung S3C2412 and S3C2413 SoCs, |
Tomasz Figa | 61dd726 | 2013-03-18 22:31:55 +0100 | [diff] [blame] | 136 | - samsung,s3c64xx-wakeup-eint: represents wakeup interrupt controller |
| 137 | found on Samsung S3C64xx SoCs, |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 138 | - samsung,exynos4210-wakeup-eint: represents wakeup interrupt controller |
Mateusz Krawczuk | 608a26a | 2013-08-27 15:08:10 +0200 | [diff] [blame] | 139 | found on Samsung Exynos4210 and S5PC110/S5PV210 SoCs. |
Abhilash Kesavan | 14c255d | 2014-10-09 19:24:31 +0530 | [diff] [blame] | 140 | - samsung,exynos7-wakeup-eint: represents wakeup interrupt controller |
| 141 | found on Samsung Exynos7 SoC. |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 142 | - interrupt-parent: phandle of the interrupt parent to which the external |
| 143 | wakeup interrupts are forwarded to. |
Tomasz Figa | b33ef91 | 2012-10-11 10:11:21 +0200 | [diff] [blame] | 144 | - interrupts: interrupt used by multiplexed wakeup interrupts. |
| 145 | |
| 146 | In addition, following properties must be present in node of every bank |
| 147 | of pins supporting wake-up interrupts: |
| 148 | |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 149 | - interrupt-controller: identifies the node as interrupt-parent. |
| 150 | - #interrupt-cells: the value of this property should be 2 |
| 151 | - First Cell: represents the external wakeup interrupt number local to |
| 152 | the external wakeup interrupt space of the controller. |
| 153 | - Second Cell: flags to identify the type of the interrupt |
| 154 | - 1 = rising edge triggered |
| 155 | - 2 = falling edge triggered |
| 156 | - 3 = rising and falling edge triggered |
| 157 | - 4 = high level triggered |
| 158 | - 8 = low level triggered |
| 159 | |
Tomasz Figa | b33ef91 | 2012-10-11 10:11:21 +0200 | [diff] [blame] | 160 | Node of every bank of pins supporting direct wake-up interrupts (without |
| 161 | multiplexing) must contain following properties: |
| 162 | |
| 163 | - interrupt-parent: phandle of the interrupt parent to which the external |
| 164 | wakeup interrupts are forwarded to. |
| 165 | - interrupts: interrupts of the interrupt parent which are used for external |
| 166 | wakeup interrupts from pins of the bank, must contain interrupts for all |
| 167 | pins of the bank. |
| 168 | |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 169 | Aliases: |
| 170 | |
| 171 | All the pin controller nodes should be represented in the aliases node using |
| 172 | the following format 'pinctrl{n}' where n is a unique number for the alias. |
| 173 | |
Vivek Gautam | b9b0a5c | 2014-12-10 14:09:39 +0530 | [diff] [blame] | 174 | Aliases for controllers compatible with "samsung,exynos7-pinctrl": |
| 175 | - pinctrl0: pin controller of ALIVE block, |
| 176 | - pinctrl1: pin controller of BUS0 block, |
| 177 | - pinctrl2: pin controller of NFC block, |
| 178 | - pinctrl3: pin controller of TOUCH block, |
| 179 | - pinctrl4: pin controller of FF block, |
| 180 | - pinctrl5: pin controller of ESE block, |
| 181 | - pinctrl6: pin controller of FSYS0 block, |
| 182 | - pinctrl7: pin controller of FSYS1 block, |
Vivek Gautam | d171cd0 | 2014-12-10 14:09:40 +0530 | [diff] [blame] | 183 | - pinctrl8: pin controller of BUS1 block, |
Padmavathi Venna | ac5a186 | 2014-12-19 18:40:58 +0530 | [diff] [blame] | 184 | - pinctrl9: pin controller of AUDIO block, |
Vivek Gautam | b9b0a5c | 2014-12-10 14:09:39 +0530 | [diff] [blame] | 185 | |
Tomasz Figa | b33ef91 | 2012-10-11 10:11:21 +0200 | [diff] [blame] | 186 | Example: A pin-controller node with pin banks: |
| 187 | |
| 188 | pinctrl_0: pinctrl@11400000 { |
Kukjin Kim | b533c86 | 2013-01-02 16:05:42 -0800 | [diff] [blame] | 189 | compatible = "samsung,exynos4210-pinctrl"; |
Tomasz Figa | b33ef91 | 2012-10-11 10:11:21 +0200 | [diff] [blame] | 190 | reg = <0x11400000 0x1000>; |
| 191 | interrupts = <0 47 0>; |
| 192 | |
| 193 | /* ... */ |
| 194 | |
| 195 | /* Pin bank without external interrupts */ |
| 196 | gpy0: gpy0 { |
| 197 | gpio-controller; |
| 198 | #gpio-cells = <2>; |
| 199 | }; |
| 200 | |
| 201 | /* ... */ |
| 202 | |
| 203 | /* Pin bank with external GPIO or muxed wake-up interrupts */ |
| 204 | gpj0: gpj0 { |
| 205 | gpio-controller; |
| 206 | #gpio-cells = <2>; |
| 207 | |
| 208 | interrupt-controller; |
| 209 | #interrupt-cells = <2>; |
| 210 | }; |
| 211 | |
| 212 | /* ... */ |
| 213 | |
| 214 | /* Pin bank with external direct wake-up interrupts */ |
| 215 | gpx0: gpx0 { |
| 216 | gpio-controller; |
| 217 | #gpio-cells = <2>; |
| 218 | |
| 219 | interrupt-controller; |
| 220 | interrupt-parent = <&gic>; |
| 221 | interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, |
| 222 | <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>; |
| 223 | #interrupt-cells = <2>; |
| 224 | }; |
| 225 | |
| 226 | /* ... */ |
| 227 | }; |
| 228 | |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 229 | Example 1: A pin-controller node with pin groups. |
| 230 | |
| 231 | pinctrl_0: pinctrl@11400000 { |
Kukjin Kim | b533c86 | 2013-01-02 16:05:42 -0800 | [diff] [blame] | 232 | compatible = "samsung,exynos4210-pinctrl"; |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 233 | reg = <0x11400000 0x1000>; |
| 234 | interrupts = <0 47 0>; |
| 235 | |
Tomasz Figa | b33ef91 | 2012-10-11 10:11:21 +0200 | [diff] [blame] | 236 | /* ... */ |
| 237 | |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 238 | uart0_data: uart0-data { |
| 239 | samsung,pins = "gpa0-0", "gpa0-1"; |
| 240 | samsung,pin-function = <2>; |
| 241 | samsung,pin-pud = <0>; |
| 242 | samsung,pin-drv = <0>; |
| 243 | }; |
| 244 | |
| 245 | uart0_fctl: uart0-fctl { |
| 246 | samsung,pins = "gpa0-2", "gpa0-3"; |
| 247 | samsung,pin-function = <2>; |
| 248 | samsung,pin-pud = <0>; |
| 249 | samsung,pin-drv = <0>; |
| 250 | }; |
| 251 | |
| 252 | uart1_data: uart1-data { |
| 253 | samsung,pins = "gpa0-4", "gpa0-5"; |
| 254 | samsung,pin-function = <2>; |
| 255 | samsung,pin-pud = <0>; |
| 256 | samsung,pin-drv = <0>; |
| 257 | }; |
| 258 | |
| 259 | uart1_fctl: uart1-fctl { |
| 260 | samsung,pins = "gpa0-6", "gpa0-7"; |
| 261 | samsung,pin-function = <2>; |
| 262 | samsung,pin-pud = <0>; |
| 263 | samsung,pin-drv = <0>; |
| 264 | }; |
| 265 | |
| 266 | i2c2_bus: i2c2-bus { |
| 267 | samsung,pins = "gpa0-6", "gpa0-7"; |
| 268 | samsung,pin-function = <3>; |
| 269 | samsung,pin-pud = <3>; |
| 270 | samsung,pin-drv = <0>; |
| 271 | }; |
Tomasz Figa | 9a2c1c3 | 2014-07-02 17:41:03 +0200 | [diff] [blame] | 272 | |
| 273 | sd4_bus8: sd4-bus-width8 { |
| 274 | part-1 { |
| 275 | samsung,pins = "gpk0-3", "gpk0-4", |
| 276 | "gpk0-5", "gpk0-6"; |
| 277 | samsung,pin-function = <3>; |
| 278 | samsung,pin-pud = <3>; |
| 279 | samsung,pin-drv = <3>; |
| 280 | }; |
| 281 | part-2 { |
| 282 | samsung,pins = "gpk1-3", "gpk1-4", |
| 283 | "gpk1-5", "gpk1-6"; |
| 284 | samsung,pin-function = <4>; |
| 285 | samsung,pin-pud = <4>; |
| 286 | samsung,pin-drv = <3>; |
| 287 | }; |
| 288 | }; |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 289 | }; |
| 290 | |
| 291 | Example 2: A pin-controller node with external wakeup interrupt controller node. |
| 292 | |
| 293 | pinctrl_1: pinctrl@11000000 { |
Kukjin Kim | b533c86 | 2013-01-02 16:05:42 -0800 | [diff] [blame] | 294 | compatible = "samsung,exynos4210-pinctrl"; |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 295 | reg = <0x11000000 0x1000>; |
Tomasz Figa | b33ef91 | 2012-10-11 10:11:21 +0200 | [diff] [blame] | 296 | interrupts = <0 46 0> |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 297 | |
Tomasz Figa | b33ef91 | 2012-10-11 10:11:21 +0200 | [diff] [blame] | 298 | /* ... */ |
| 299 | |
| 300 | wakeup-interrupt-controller { |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 301 | compatible = "samsung,exynos4210-wakeup-eint"; |
| 302 | interrupt-parent = <&gic>; |
Tomasz Figa | b33ef91 | 2012-10-11 10:11:21 +0200 | [diff] [blame] | 303 | interrupts = <0 32 0>; |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 304 | }; |
| 305 | }; |
| 306 | |
| 307 | Example 3: A uart client node that supports 'default' and 'flow-control' states. |
| 308 | |
| 309 | uart@13800000 { |
| 310 | compatible = "samsung,exynos4210-uart"; |
| 311 | reg = <0x13800000 0x100>; |
| 312 | interrupts = <0 52 0>; |
| 313 | pinctrl-names = "default", "flow-control; |
| 314 | pinctrl-0 = <&uart0_data>; |
| 315 | pinctrl-1 = <&uart0_data &uart0_fctl>; |
| 316 | }; |
| 317 | |
| 318 | Example 4: Set up the default pin state for uart controller. |
| 319 | |
| 320 | static int s3c24xx_serial_probe(struct platform_device *pdev) { |
| 321 | struct pinctrl *pinctrl; |
Tomasz Figa | b33ef91 | 2012-10-11 10:11:21 +0200 | [diff] [blame] | 322 | |
| 323 | /* ... */ |
| 324 | |
Thomas Abraham | 30574f0 | 2012-09-07 06:07:19 +0900 | [diff] [blame] | 325 | pinctrl = devm_pinctrl_get_select_default(&pdev->dev); |
| 326 | } |
Leela Krishna Amudala | c91f2a0 | 2013-06-18 06:58:48 +0900 | [diff] [blame] | 327 | |
| 328 | Example 5: A display port client node that supports 'default' pinctrl state |
| 329 | and gpio binding. |
| 330 | |
| 331 | display-port-controller { |
| 332 | /* ... */ |
| 333 | |
| 334 | samsung,hpd-gpio = <&gpx2 6 0>; |
| 335 | pinctrl-names = "default"; |
| 336 | pinctrl-0 = <&dp_hpd>; |
| 337 | }; |
| 338 | |
| 339 | Example 6: Request the gpio for display port controller |
| 340 | |
| 341 | static int exynos_dp_probe(struct platform_device *pdev) |
| 342 | { |
| 343 | int hpd_gpio, ret; |
| 344 | struct device *dev = &pdev->dev; |
| 345 | struct device_node *dp_node = dev->of_node; |
| 346 | |
| 347 | /* ... */ |
| 348 | |
| 349 | hpd_gpio = of_get_named_gpio(dp_node, "samsung,hpd-gpio", 0); |
| 350 | |
| 351 | /* ... */ |
| 352 | |
| 353 | ret = devm_gpio_request_one(&pdev->dev, hpd_gpio, GPIOF_IN, |
| 354 | "hpd_gpio"); |
| 355 | /* ... */ |
| 356 | } |