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Lennert Buytenhek9dd0b192008-03-27 14:51:41 -04001/*
2 * arch/arm/mach-orion5x/common.c
3 *
4 * Core functions for Marvell Orion 5x SoCs
5 *
6 * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/platform_device.h>
Andrew Lunnee962722011-05-15 13:32:48 +020016#include <linux/dma-mapping.h>
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -040017#include <linux/serial_8250.h>
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -040018#include <linux/mv643xx_i2c.h>
19#include <linux/ata_platform.h>
Russell King764cbcc22011-11-05 10:13:41 +000020#include <linux/delay.h>
Andrew Lunn2f129bf2011-12-15 08:15:07 +010021#include <linux/clk-provider.h>
Lennert Buytenhekdcf1cec2008-09-25 16:23:48 +020022#include <net/dsa.h>
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -040023#include <asm/page.h>
24#include <asm/setup.h>
David Howells9f97da72012-03-28 18:30:01 +010025#include <asm/system_misc.h>
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -040026#include <asm/timex.h>
27#include <asm/mach/arch.h>
28#include <asm/mach/map.h>
29#include <asm/mach/time.h>
Lennert Buytenhek4ee1f6b2010-10-15 16:50:26 +020030#include <mach/bridge-regs.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010031#include <mach/hardware.h>
32#include <mach/orion5x.h>
Lennert Buytenhek6f088f12008-08-09 13:44:58 +020033#include <plat/orion_nand.h>
Andrew Lunn72053352012-02-08 15:52:47 +010034#include <plat/ehci-orion.h>
Lennert Buytenhek6f088f12008-08-09 13:44:58 +020035#include <plat/time.h>
Andrew Lunn28a2b452011-05-15 13:32:41 +020036#include <plat/common.h>
Andrew Lunn45173d52011-12-07 21:48:06 +010037#include <plat/addr-map.h>
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -040038#include "common.h"
39
40/*****************************************************************************
41 * I/O Address Mapping
42 ****************************************************************************/
43static struct map_desc orion5x_io_desc[] __initdata = {
44 {
45 .virtual = ORION5X_REGS_VIRT_BASE,
46 .pfn = __phys_to_pfn(ORION5X_REGS_PHYS_BASE),
47 .length = ORION5X_REGS_SIZE,
Lennert Buytenheke7068ad2008-05-10 16:30:01 +020048 .type = MT_DEVICE,
49 }, {
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -040050 .virtual = ORION5X_PCIE_IO_VIRT_BASE,
51 .pfn = __phys_to_pfn(ORION5X_PCIE_IO_PHYS_BASE),
52 .length = ORION5X_PCIE_IO_SIZE,
Lennert Buytenheke7068ad2008-05-10 16:30:01 +020053 .type = MT_DEVICE,
54 }, {
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -040055 .virtual = ORION5X_PCI_IO_VIRT_BASE,
56 .pfn = __phys_to_pfn(ORION5X_PCI_IO_PHYS_BASE),
57 .length = ORION5X_PCI_IO_SIZE,
Lennert Buytenheke7068ad2008-05-10 16:30:01 +020058 .type = MT_DEVICE,
59 }, {
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -040060 .virtual = ORION5X_PCIE_WA_VIRT_BASE,
61 .pfn = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE),
62 .length = ORION5X_PCIE_WA_SIZE,
Lennert Buytenheke7068ad2008-05-10 16:30:01 +020063 .type = MT_DEVICE,
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -040064 },
65};
66
67void __init orion5x_map_io(void)
68{
69 iotable_init(orion5x_io_desc, ARRAY_SIZE(orion5x_io_desc));
70}
71
Lennert Buytenhek044f6c72008-04-22 05:37:12 +020072
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -040073/*****************************************************************************
Andrew Lunn2f129bf2011-12-15 08:15:07 +010074 * CLK tree
75 ****************************************************************************/
76static struct clk *tclk;
77
78static void __init clk_init(void)
79{
80 tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT,
81 orion5x_tclk);
Andrew Lunn4574b882012-04-06 17:17:26 +020082
83 orion_clkdev_init(tclk);
Andrew Lunn2f129bf2011-12-15 08:15:07 +010084}
85
86/*****************************************************************************
Lennert Buytenhek044f6c72008-04-22 05:37:12 +020087 * EHCI0
88 ****************************************************************************/
Lennert Buytenhek044f6c72008-04-22 05:37:12 +020089void __init orion5x_ehci0_init(void)
90{
Andrew Lunn72053352012-02-08 15:52:47 +010091 orion_ehci_init(ORION5X_USB0_PHYS_BASE, IRQ_ORION5X_USB0_CTRL,
92 EHCI_PHY_ORION);
Lennert Buytenhek044f6c72008-04-22 05:37:12 +020093}
94
95
96/*****************************************************************************
97 * EHCI1
98 ****************************************************************************/
Lennert Buytenhek044f6c72008-04-22 05:37:12 +020099void __init orion5x_ehci1_init(void)
100{
Andrew Lunndb33f4d2011-12-07 21:48:08 +0100101 orion_ehci_1_init(ORION5X_USB1_PHYS_BASE, IRQ_ORION5X_USB1_CTRL);
Lennert Buytenhek044f6c72008-04-22 05:37:12 +0200102}
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -0400103
Lennert Buytenhek044f6c72008-04-22 05:37:12 +0200104
105/*****************************************************************************
Andrew Lunn5c602552011-05-15 13:32:40 +0200106 * GE00
Lennert Buytenhek044f6c72008-04-22 05:37:12 +0200107 ****************************************************************************/
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -0400108void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
109{
Andrew Lunndb33f4d2011-12-07 21:48:08 +0100110 orion_ge00_init(eth_data,
Andrew Lunn7e3819d2011-05-15 13:32:44 +0200111 ORION5X_ETH_PHYS_BASE, IRQ_ORION5X_ETH_SUM,
Arnaud Patard (Rtp)58569ae2012-07-26 12:15:46 +0200112 IRQ_ORION5X_ETH_ERR,
113 MV643XX_TX_CSUM_DEFAULT_LIMIT);
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -0400114}
115
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -0400116
Lennert Buytenhek044f6c72008-04-22 05:37:12 +0200117/*****************************************************************************
Lennert Buytenhekdcf1cec2008-09-25 16:23:48 +0200118 * Ethernet switch
119 ****************************************************************************/
Lennert Buytenhekdcf1cec2008-09-25 16:23:48 +0200120void __init orion5x_eth_switch_init(struct dsa_platform_data *d, int irq)
121{
Andrew Lunn7e3819d2011-05-15 13:32:44 +0200122 orion_ge00_switch_init(d, irq);
Lennert Buytenhekdcf1cec2008-09-25 16:23:48 +0200123}
124
125
126/*****************************************************************************
Lennert Buytenhek044f6c72008-04-22 05:37:12 +0200127 * I2C
128 ****************************************************************************/
Lennert Buytenhek044f6c72008-04-22 05:37:12 +0200129void __init orion5x_i2c_init(void)
130{
Andrew Lunnaac7ffa2011-05-15 13:32:45 +0200131 orion_i2c_init(I2C_PHYS_BASE, IRQ_ORION5X_I2C, 8);
132
Lennert Buytenhek044f6c72008-04-22 05:37:12 +0200133}
134
135
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -0400136/*****************************************************************************
Lennert Buytenhek044f6c72008-04-22 05:37:12 +0200137 * SATA
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -0400138 ****************************************************************************/
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -0400139void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
140{
Andrew Lunndb33f4d2011-12-07 21:48:08 +0100141 orion_sata_init(sata_data, ORION5X_SATA_PHYS_BASE, IRQ_ORION5X_SATA);
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -0400142}
143
Lennert Buytenhek044f6c72008-04-22 05:37:12 +0200144
145/*****************************************************************************
Lennert Buytenhekd323ade2008-08-29 06:55:06 +0200146 * SPI
147 ****************************************************************************/
Lennert Buytenhekd323ade2008-08-29 06:55:06 +0200148void __init orion5x_spi_init()
149{
Andrew Lunn4574b882012-04-06 17:17:26 +0200150 orion_spi_init(SPI_PHYS_BASE);
Lennert Buytenhekd323ade2008-08-29 06:55:06 +0200151}
152
153
154/*****************************************************************************
Lennert Buytenhek044f6c72008-04-22 05:37:12 +0200155 * UART0
156 ****************************************************************************/
Lennert Buytenhek044f6c72008-04-22 05:37:12 +0200157void __init orion5x_uart0_init(void)
158{
Andrew Lunn28a2b452011-05-15 13:32:41 +0200159 orion_uart0_init(UART0_VIRT_BASE, UART0_PHYS_BASE,
Andrew Lunn74c33572011-12-24 03:06:34 +0100160 IRQ_ORION5X_UART0, tclk);
Lennert Buytenhek044f6c72008-04-22 05:37:12 +0200161}
162
Lennert Buytenhek044f6c72008-04-22 05:37:12 +0200163/*****************************************************************************
164 * UART1
165 ****************************************************************************/
Lennert Buytenhek044f6c72008-04-22 05:37:12 +0200166void __init orion5x_uart1_init(void)
167{
Andrew Lunn28a2b452011-05-15 13:32:41 +0200168 orion_uart1_init(UART1_VIRT_BASE, UART1_PHYS_BASE,
Andrew Lunn74c33572011-12-24 03:06:34 +0100169 IRQ_ORION5X_UART1, tclk);
Lennert Buytenhek044f6c72008-04-22 05:37:12 +0200170}
171
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -0400172/*****************************************************************************
Saeed Bishara1d5a1a62008-06-16 23:25:12 -1100173 * XOR engine
174 ****************************************************************************/
Saeed Bishara1d5a1a62008-06-16 23:25:12 -1100175void __init orion5x_xor_init(void)
176{
Andrew Lunndb33f4d2011-12-07 21:48:08 +0100177 orion_xor0_init(ORION5X_XOR_PHYS_BASE,
Andrew Lunnee962722011-05-15 13:32:48 +0200178 ORION5X_XOR_PHYS_BASE + 0x200,
179 IRQ_ORION5X_XOR0, IRQ_ORION5X_XOR1);
Saeed Bishara1d5a1a62008-06-16 23:25:12 -1100180}
181
Andrew Lunn44350062011-05-15 13:32:51 +0200182/*****************************************************************************
183 * Cryptographic Engines and Security Accelerator (CESA)
184 ****************************************************************************/
185static void __init orion5x_crypto_init(void)
Sebastian Andrzej Siewior3a8f7442009-05-07 22:59:24 +0200186{
Andrew Lunnb6d1c332011-12-07 21:48:05 +0100187 orion5x_setup_sram_win();
Andrew Lunn44350062011-05-15 13:32:51 +0200188 orion_crypto_init(ORION5X_CRYPTO_PHYS_BASE, ORION5X_SRAM_PHYS_BASE,
189 SZ_8K, IRQ_ORION5X_CESA);
Sebastian Andrzej Siewior3a8f7442009-05-07 22:59:24 +0200190}
Saeed Bishara1d5a1a62008-06-16 23:25:12 -1100191
192/*****************************************************************************
Thomas Reitmayr9e058d42009-02-24 14:59:22 -0800193 * Watchdog
194 ****************************************************************************/
Thomas Reitmayr9e058d42009-02-24 14:59:22 -0800195void __init orion5x_wdt_init(void)
196{
Andrew Lunn4f04be62012-03-04 16:57:31 +0100197 orion_wdt_init();
Thomas Reitmayr9e058d42009-02-24 14:59:22 -0800198}
199
200
201/*****************************************************************************
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -0400202 * Time handling
203 ****************************************************************************/
Lennert Buytenhek4ee1f6b2010-10-15 16:50:26 +0200204void __init orion5x_init_early(void)
205{
206 orion_time_set_base(TIMER_VIRT_BASE);
Andrew Lunn84d5dfb2012-09-24 07:54:33 +0200207
208 /*
209 * Some Orion5x devices allocate their coherent buffers from atomic
210 * context. Increase size of atomic coherent pool to make sure such
211 * the allocations won't fail.
212 */
213 init_dma_coherent_pool_size(SZ_1M);
Lennert Buytenhek4ee1f6b2010-10-15 16:50:26 +0200214}
215
Lennert Buytenhekebe35af2008-08-29 05:55:51 +0200216int orion5x_tclk;
217
218int __init orion5x_find_tclk(void)
219{
Lennert Buytenhekd323ade2008-08-29 06:55:06 +0200220 u32 dev, rev;
221
222 orion5x_pcie_id(&dev, &rev);
223 if (dev == MV88F6183_DEV_ID &&
224 (readl(MPP_RESET_SAMPLE) & 0x00000200) == 0)
225 return 133333333;
226
Lennert Buytenhekebe35af2008-08-29 05:55:51 +0200227 return 166666667;
228}
229
Andrew Lunnd2621b82012-05-10 15:59:44 +0200230static void __init orion5x_timer_init(void)
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -0400231{
Lennert Buytenhekebe35af2008-08-29 05:55:51 +0200232 orion5x_tclk = orion5x_find_tclk();
Lennert Buytenhek4ee1f6b2010-10-15 16:50:26 +0200233
234 orion_time_init(ORION5X_BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
235 IRQ_ORION5X_BRIDGE, orion5x_tclk);
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -0400236}
237
238struct sys_timer orion5x_timer = {
Lennert Buytenheke7068ad2008-05-10 16:30:01 +0200239 .init = orion5x_timer_init,
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -0400240};
241
Lennert Buytenhek044f6c72008-04-22 05:37:12 +0200242
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -0400243/*****************************************************************************
244 * General
245 ****************************************************************************/
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -0400246/*
Lennert Buytenhekb46926b2008-04-25 16:31:32 -0400247 * Identify device ID and rev from PCIe configuration header space '0'.
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -0400248 */
249static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
250{
251 orion5x_pcie_id(dev, rev);
252
253 if (*dev == MV88F5281_DEV_ID) {
254 if (*rev == MV88F5281_REV_D2) {
255 *dev_name = "MV88F5281-D2";
256 } else if (*rev == MV88F5281_REV_D1) {
257 *dev_name = "MV88F5281-D1";
Lennert Buytenhekce72e36e2008-08-09 15:17:27 +0200258 } else if (*rev == MV88F5281_REV_D0) {
259 *dev_name = "MV88F5281-D0";
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -0400260 } else {
261 *dev_name = "MV88F5281-Rev-Unsupported";
262 }
263 } else if (*dev == MV88F5182_DEV_ID) {
264 if (*rev == MV88F5182_REV_A2) {
265 *dev_name = "MV88F5182-A2";
266 } else {
267 *dev_name = "MV88F5182-Rev-Unsupported";
268 }
269 } else if (*dev == MV88F5181_DEV_ID) {
270 if (*rev == MV88F5181_REV_B1) {
271 *dev_name = "MV88F5181-Rev-B1";
Lennert Buytenhekd2b2a6b2008-05-31 08:30:40 +0200272 } else if (*rev == MV88F5181L_REV_A1) {
273 *dev_name = "MV88F5181L-Rev-A1";
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -0400274 } else {
Lennert Buytenhekd2b2a6b2008-05-31 08:30:40 +0200275 *dev_name = "MV88F5181(L)-Rev-Unsupported";
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -0400276 }
Lennert Buytenhekd323ade2008-08-29 06:55:06 +0200277 } else if (*dev == MV88F6183_DEV_ID) {
278 if (*rev == MV88F6183_REV_B0) {
279 *dev_name = "MV88F6183-Rev-B0";
280 } else {
281 *dev_name = "MV88F6183-Rev-Unsupported";
282 }
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -0400283 } else {
284 *dev_name = "Device-Unknown";
285 }
286}
287
288void __init orion5x_init(void)
289{
290 char *dev_name;
291 u32 dev, rev;
292
293 orion5x_id(&dev, &rev, &dev_name);
Lennert Buytenhekebe35af2008-08-29 05:55:51 +0200294 printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, orion5x_tclk);
295
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -0400296 /*
297 * Setup Orion address map
298 */
299 orion5x_setup_cpu_mbus_bridge();
Lennert Buytenhekce72e36e2008-08-09 15:17:27 +0200300
Andrew Lunn2f129bf2011-12-15 08:15:07 +0100301 /* Setup root of clk tree */
302 clk_init();
303
Lennert Buytenhekce72e36e2008-08-09 15:17:27 +0200304 /*
305 * Don't issue "Wait for Interrupt" instruction if we are
306 * running on D0 5281 silicon.
307 */
308 if (dev == MV88F5281_DEV_ID && rev == MV88F5281_REV_D0) {
309 printk(KERN_INFO "Orion: Applying 5281 D0 WFI workaround.\n");
310 disable_hlt();
311 }
Thomas Reitmayr9e058d42009-02-24 14:59:22 -0800312
313 /*
Nicolas Pitre3fade492009-06-11 22:27:20 +0200314 * The 5082/5181l/5182/6082/6082l/6183 have crypto
315 * while 5180n/5181/5281 don't have crypto.
316 */
317 if ((dev == MV88F5181_DEV_ID && rev >= MV88F5181L_REV_A0) ||
318 dev == MV88F5182_DEV_ID || dev == MV88F6183_DEV_ID)
319 orion5x_crypto_init();
320
321 /*
Thomas Reitmayr9e058d42009-02-24 14:59:22 -0800322 * Register watchdog driver
323 */
324 orion5x_wdt_init();
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -0400325}
326
Russell King764cbcc22011-11-05 10:13:41 +0000327void orion5x_restart(char mode, const char *cmd)
328{
329 /*
330 * Enable and issue soft reset
331 */
332 orion5x_setbits(RSTOUTn_MASK, (1 << 2));
333 orion5x_setbits(CPU_SOFT_RESET, 1);
334 mdelay(200);
335 orion5x_clrbits(CPU_SOFT_RESET, 1);
336}
337
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -0400338/*
339 * Many orion-based systems have buggy bootloader implementations.
340 * This is a common fixup for bogus memory tags.
341 */
Russell King0744a3e2010-12-20 10:37:50 +0000342void __init tag_fixup_mem32(struct tag *t, char **from,
343 struct meminfo *meminfo)
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -0400344{
345 for (; t->hdr.size; t = tag_next(t))
346 if (t->hdr.tag == ATAG_MEM &&
347 (!t->u.mem.size || t->u.mem.size & ~PAGE_MASK ||
348 t->u.mem.start & ~PAGE_MASK)) {
349 printk(KERN_WARNING
350 "Clearing invalid memory bank %dKB@0x%08x\n",
351 t->u.mem.size / 1024, t->u.mem.start);
352 t->hdr.tag = 0;
353 }
354}