Sugar Zhang | fc05a5b | 2017-06-13 15:27:46 +0800 | [diff] [blame] | 1 | * Rockchip PDM controller |
| 2 | |
| 3 | Required properties: |
| 4 | |
| 5 | - compatible: "rockchip,pdm" |
| 6 | - reg: physical base address of the controller and length of memory mapped |
| 7 | region. |
| 8 | - dmas: DMA specifiers for rx dma. See the DMA client binding, |
| 9 | Documentation/devicetree/bindings/dma/dma.txt |
| 10 | - dma-names: should include "rx". |
| 11 | - clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names. |
| 12 | - clock-names: should contain following: |
| 13 | - "pdm_hclk": clock for PDM BUS |
| 14 | - "pdm_clk" : clock for PDM controller |
| 15 | - pinctrl-names: Must contain a "default" entry. |
| 16 | - pinctrl-N: One property must exist for each entry in |
| 17 | pinctrl-names. See ../pinctrl/pinctrl-bindings.txt |
| 18 | for details of the property values. |
| 19 | |
| 20 | Example for rk3328 PDM controller: |
| 21 | |
| 22 | pdm: pdm@ff040000 { |
| 23 | compatible = "rockchip,pdm"; |
| 24 | reg = <0x0 0xff040000 0x0 0x1000>; |
| 25 | clocks = <&clk_pdm>, <&clk_gates28 0>; |
| 26 | clock-names = "pdm_clk", "pdm_hclk"; |
| 27 | dmas = <&pdma 16>; |
| 28 | #dma-cells = <1>; |
| 29 | dma-names = "rx"; |
| 30 | pinctrl-names = "default", "sleep"; |
| 31 | pinctrl-0 = <&pdmm0_clk |
| 32 | &pdmm0_fsync |
| 33 | &pdmm0_sdi0 |
| 34 | &pdmm0_sdi1 |
| 35 | &pdmm0_sdi2 |
| 36 | &pdmm0_sdi3>; |
| 37 | pinctrl-1 = <&pdmm0_sleep>; |
| 38 | status = "disabled"; |
| 39 | }; |