Tony Lindgren | b63128e | 2009-12-11 16:16:32 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Helper module for board specific I2C bus registration |
| 3 | * |
| 4 | * Copyright (C) 2009 Nokia Corporation. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License |
| 8 | * version 2 as published by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, but |
| 11 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 13 | * General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA |
| 18 | * 02110-1301 USA |
| 19 | * |
| 20 | */ |
| 21 | |
Tony Lindgren | b63128e | 2009-12-11 16:16:32 -0800 | [diff] [blame] | 22 | #include <plat/i2c.h> |
Tony Lindgren | 4e65331 | 2011-11-10 22:45:17 +0100 | [diff] [blame] | 23 | #include "common.h" |
Avinash.H.M | 6d3c55f | 2011-07-10 05:27:16 -0600 | [diff] [blame] | 24 | #include <plat/omap_hwmod.h> |
Tony Lindgren | b63128e | 2009-12-11 16:16:32 -0800 | [diff] [blame] | 25 | |
| 26 | #include "mux.h" |
| 27 | |
Avinash.H.M | 6d3c55f | 2011-07-10 05:27:16 -0600 | [diff] [blame] | 28 | /* In register I2C_CON, Bit 15 is the I2C enable bit */ |
| 29 | #define I2C_EN BIT(15) |
| 30 | #define OMAP2_I2C_CON_OFFSET 0x24 |
| 31 | #define OMAP4_I2C_CON_OFFSET 0xA4 |
| 32 | |
| 33 | /* Maximum microseconds to wait for OMAP module to softreset */ |
| 34 | #define MAX_MODULE_SOFTRESET_WAIT 10000 |
| 35 | |
Jarkko Nikula | 9833eff | 2010-02-22 20:29:36 +0000 | [diff] [blame] | 36 | void __init omap2_i2c_mux_pins(int bus_id) |
Tony Lindgren | b63128e | 2009-12-11 16:16:32 -0800 | [diff] [blame] | 37 | { |
Tony Lindgren | f99bf16 | 2010-07-05 16:31:40 +0300 | [diff] [blame] | 38 | char mux_name[sizeof("i2c2_scl.i2c2_scl")]; |
Tony Lindgren | b63128e | 2009-12-11 16:16:32 -0800 | [diff] [blame] | 39 | |
| 40 | /* First I2C bus is not muxable */ |
Tony Lindgren | f99bf16 | 2010-07-05 16:31:40 +0300 | [diff] [blame] | 41 | if (bus_id == 1) |
| 42 | return; |
Tony Lindgren | b63128e | 2009-12-11 16:16:32 -0800 | [diff] [blame] | 43 | |
Tony Lindgren | f99bf16 | 2010-07-05 16:31:40 +0300 | [diff] [blame] | 44 | sprintf(mux_name, "i2c%i_scl.i2c%i_scl", bus_id, bus_id); |
| 45 | omap_mux_init_signal(mux_name, OMAP_PIN_INPUT); |
| 46 | sprintf(mux_name, "i2c%i_sda.i2c%i_sda", bus_id, bus_id); |
| 47 | omap_mux_init_signal(mux_name, OMAP_PIN_INPUT); |
Tony Lindgren | b63128e | 2009-12-11 16:16:32 -0800 | [diff] [blame] | 48 | } |
Avinash.H.M | 6d3c55f | 2011-07-10 05:27:16 -0600 | [diff] [blame] | 49 | |
| 50 | /** |
| 51 | * omap_i2c_reset - reset the omap i2c module. |
| 52 | * @oh: struct omap_hwmod * |
| 53 | * |
| 54 | * The i2c moudle in omap2, omap3 had a special sequence to reset. The |
| 55 | * sequence is: |
| 56 | * - Disable the I2C. |
| 57 | * - Write to SOFTRESET bit. |
| 58 | * - Enable the I2C. |
| 59 | * - Poll on the RESETDONE bit. |
| 60 | * The sequence is implemented in below function. This is called for 2420, |
| 61 | * 2430 and omap3. |
| 62 | */ |
| 63 | int omap_i2c_reset(struct omap_hwmod *oh) |
| 64 | { |
| 65 | u32 v; |
| 66 | u16 i2c_con; |
| 67 | int c = 0; |
| 68 | |
| 69 | if (oh->class->rev == OMAP_I2C_IP_VERSION_2) { |
| 70 | i2c_con = OMAP4_I2C_CON_OFFSET; |
| 71 | } else if (oh->class->rev == OMAP_I2C_IP_VERSION_1) { |
| 72 | i2c_con = OMAP2_I2C_CON_OFFSET; |
| 73 | } else { |
| 74 | WARN(1, "Cannot reset I2C block %s: unsupported revision\n", |
| 75 | oh->name); |
| 76 | return -EINVAL; |
| 77 | } |
| 78 | |
| 79 | /* Disable I2C */ |
| 80 | v = omap_hwmod_read(oh, i2c_con); |
| 81 | v &= ~I2C_EN; |
| 82 | omap_hwmod_write(v, oh, i2c_con); |
| 83 | |
| 84 | /* Write to the SOFTRESET bit */ |
| 85 | omap_hwmod_softreset(oh); |
| 86 | |
| 87 | /* Enable I2C */ |
| 88 | v = omap_hwmod_read(oh, i2c_con); |
| 89 | v |= I2C_EN; |
| 90 | omap_hwmod_write(v, oh, i2c_con); |
| 91 | |
| 92 | /* Poll on RESETDONE bit */ |
| 93 | omap_test_timeout((omap_hwmod_read(oh, |
| 94 | oh->class->sysc->syss_offs) |
| 95 | & SYSS_RESETDONE_MASK), |
| 96 | MAX_MODULE_SOFTRESET_WAIT, c); |
| 97 | |
| 98 | if (c == MAX_MODULE_SOFTRESET_WAIT) |
| 99 | pr_warning("%s: %s: softreset failed (waited %d usec)\n", |
| 100 | __func__, oh->name, MAX_MODULE_SOFTRESET_WAIT); |
| 101 | else |
| 102 | pr_debug("%s: %s: softreset in %d usec\n", __func__, |
| 103 | oh->name, c); |
| 104 | |
| 105 | return 0; |
| 106 | } |