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gerrit-public.fairphone.software / kernel / msm-4.19 / 861dd058f495973c7ad2a44b8f68f3cc05733eab / . / drivers / bcma / core.c
blob: 189a97b51be909be5fa5543b91141264dc35b0b1 [file] [log] [blame]
Rafał Miłecki8369ae32011-05-09 18:56:46 +0200[diff] [blame]1/*
2 * Broadcom specific AMBA
3 * Core ops
4 *
5 * Licensed under the GNU/GPL. See COPYING for details.
6 */
7
8#include "bcma_private.h"
9#include <linux/bcma/bcma.h>
10
11bool bcma_core_is_enabled(struct bcma_device *core)
12{
13 if ((bcma_aread32(core, BCMA_IOCTL) & (BCMA_IOCTL_CLK | BCMA_IOCTL_FGC))
14 != BCMA_IOCTL_CLK)
15 return false;
16 if (bcma_aread32(core, BCMA_RESET_CTL) & BCMA_RESET_CTL_RESET)
17 return false;
18 return true;
19}
20EXPORT_SYMBOL_GPL(bcma_core_is_enabled);
21
Arend van Spriele3ae0ca2011-06-09 20:07:20 +0200[diff] [blame]22void bcma_core_disable(struct bcma_device *core, u32 flags)
Rafał Miłecki8369ae32011-05-09 18:56:46 +0200[diff] [blame]23{
24 if (bcma_aread32(core, BCMA_RESET_CTL) & BCMA_RESET_CTL_RESET)
25 return;
26
27 bcma_awrite32(core, BCMA_IOCTL, flags);
28 bcma_aread32(core, BCMA_IOCTL);
29 udelay(10);
30
31 bcma_awrite32(core, BCMA_RESET_CTL, BCMA_RESET_CTL_RESET);
32 udelay(1);
33}
Arend van Spriele3ae0ca2011-06-09 20:07:20 +0200[diff] [blame]34EXPORT_SYMBOL_GPL(bcma_core_disable);
Rafał Miłecki8369ae32011-05-09 18:56:46 +0200[diff] [blame]35
36int bcma_core_enable(struct bcma_device *core, u32 flags)
37{
38 bcma_core_disable(core, flags);
39
40 bcma_awrite32(core, BCMA_IOCTL, (BCMA_IOCTL_CLK | BCMA_IOCTL_FGC | flags));
41 bcma_aread32(core, BCMA_IOCTL);
42
43 bcma_awrite32(core, BCMA_RESET_CTL, 0);
44 udelay(1);
45
46 bcma_awrite32(core, BCMA_IOCTL, (BCMA_IOCTL_CLK | flags));
47 bcma_aread32(core, BCMA_IOCTL);
48 udelay(1);
49
50 return 0;
51}
52EXPORT_SYMBOL_GPL(bcma_core_enable);
Rafał Miłecki7424dd02011-07-17 01:06:04 +0200[diff] [blame]53
54void bcma_core_set_clockmode(struct bcma_device *core,
55 enum bcma_clkmode clkmode)
56{
57 u16 i;
58
59 WARN_ON(core->id.id != BCMA_CORE_CHIPCOMMON &&
60 core->id.id != BCMA_CORE_PCIE &&
61 core->id.id != BCMA_CORE_80211);
62
63 switch (clkmode) {
64 case BCMA_CLKMODE_FAST:
65 bcma_set32(core, BCMA_CLKCTLST, BCMA_CLKCTLST_FORCEHT);
66 udelay(64);
67 for (i = 0; i < 1500; i++) {
68 if (bcma_read32(core, BCMA_CLKCTLST) &
69 BCMA_CLKCTLST_HAVEHT) {
70 i = 0;
71 break;
72 }
73 udelay(10);
74 }
75 if (i)
76 pr_err("HT force timeout\n");
77 break;
78 case BCMA_CLKMODE_DYNAMIC:
79 pr_warn("Dynamic clockmode not supported yet!\n");
80 break;
81 }
82}
83EXPORT_SYMBOL_GPL(bcma_core_set_clockmode);
Rafał Miłecki6f539122011-07-17 01:06:05 +0200[diff] [blame]84
85void bcma_core_pll_ctl(struct bcma_device *core, u32 req, u32 status, bool on)
86{
87 u16 i;
88
89 WARN_ON(req & ~BCMA_CLKCTLST_EXTRESREQ);
90 WARN_ON(status & ~BCMA_CLKCTLST_EXTRESST);
91
92 if (on) {
93 bcma_set32(core, BCMA_CLKCTLST, req);
94 for (i = 0; i < 10000; i++) {
95 if ((bcma_read32(core, BCMA_CLKCTLST) & status) ==
96 status) {
97 i = 0;
98 break;
99 }
100 udelay(10);
101 }
102 if (i)
103 pr_err("PLL enable timeout\n");
104 } else {
105 pr_warn("Disabling PLL not supported yet!\n");
106 }
107}
108EXPORT_SYMBOL_GPL(bcma_core_pll_ctl);
Rafał Miłecki05aec232011-07-20 19:52:15 +0200[diff] [blame]109
110u32 bcma_core_dma_translation(struct bcma_device *core)
111{
112 switch (core->bus->hosttype) {
Hauke Mehrtensecd177c2011-07-23 01:20:08 +0200[diff] [blame]113 case BCMA_HOSTTYPE_SOC:
114 return 0;
Rafał Miłecki05aec232011-07-20 19:52:15 +0200[diff] [blame]115 case BCMA_HOSTTYPE_PCI:
116 if (bcma_aread32(core, BCMA_IOST) & BCMA_IOST_DMA64)
117 return BCMA_DMA_TRANSLATION_DMA64_CMT;
118 else
119 return BCMA_DMA_TRANSLATION_DMA32_CMT;
120 default:
121 pr_err("DMA translation unknown for host %d\n",
122 core->bus->hosttype);
123 }
124 return BCMA_DMA_TRANSLATION_NONE;
125}
126EXPORT_SYMBOL(bcma_core_dma_translation);