blob: ca8bf362748ab78f95288af40289de6d27594954 [file] [log] [blame]
Thomas Petazzoni0d0632f2013-05-15 15:37:01 +02001/*
2 * Marvell DB-{88F6281,88F6282}-BP Development Board Setup
3 *
4 * Saeed Bishara <saeed@marvell.com>
5 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 *
11 * This file contains the definitions that are common between the 6281
12 * and 6282 variants of the Marvell Kirkwood Development Board.
13 */
14
15/include/ "kirkwood.dtsi"
16
17/ {
18 memory {
19 device_type = "memory";
20 reg = <0x00000000 0x20000000>; /* 512 MB */
21 };
22
23 chosen {
24 bootargs = "console=ttyS0,115200n8 earlyprintk";
25 };
26
27 ocp@f1000000 {
28 pinctrl@10000 {
29 pmx_sdio_gpios: pmx-sdio-gpios {
30 marvell,pins = "mpp37", "mpp38";
31 marvell,function = "gpio";
32 };
33 };
34
35 serial@12000 {
36 pinctrl-0 = <&pmx_uart0>;
37 pinctrl-names = "default";
38 clock-frequency = <200000000>;
39 status = "ok";
40 };
41
42 nand@3000000 {
43 pinctrl-0 = <&pmx_nand>;
44 pinctrl-names = "default";
45 chip-delay = <25>;
46 status = "okay";
47
48 partition@0 {
49 label = "uboot";
50 reg = <0x0 0x100000>;
51 };
52
53 partition@100000 {
54 label = "uImage";
55 reg = <0x100000 0x400000>;
56 };
57
58 partition@500000 {
59 label = "root";
60 reg = <0x500000 0x1fb00000>;
61 };
62 };
63
64 sata@80000 {
65 nr-ports = <2>;
66 status = "okay";
67 };
68
69 ehci@50000 {
70 status = "okay";
71 };
72
73 mvsdio@90000 {
74 pinctrl-0 = <&pmx_sdio_gpios>;
75 pinctrl-names = "default";
76 wp-gpios = <&gpio1 5 0>;
77 cd-gpios = <&gpio1 6 0>;
78 status = "okay";
79 };
80
81 pcie-controller {
82 status = "okay";
83
84 pcie@1,0 {
85 status = "okay";
86 };
87 };
88 };
89};
Sebastian Hesselbarth876e2332013-07-07 22:34:56 +020090
91&mdio {
92 status = "okay";
93
94 ethphy0: ethernet-phy@8 {
95 device_type = "ethernet-phy";
96 reg = <8>;
97 };
98};
99
100&eth0 {
101 status = "okay";
102 ethernet0-port@0 {
103 phy-handle = <&ethphy0>;
104 };
105};