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gerrit-public.fairphone.software / kernel / msm-4.19 / 876e233335115eadd51761d49fc638db575337aa / . / arch / arm / boot / dts / kirkwood-iomega_ix2_200.dts
blob: b08c733684a6e94c8bfc9c32c05ad1d3598d60fe [file] [log] [blame]
Alan M Butler4f48b7f2012-08-20 15:29:07 +0100[diff] [blame]1/dts-v1/;
2
3/include/ "kirkwood.dtsi"
Andrew Lunna93d3ad2012-11-17 17:00:54 +0100[diff] [blame]4/include/ "kirkwood-6281.dtsi"
Alan M Butler4f48b7f2012-08-20 15:29:07 +0100[diff] [blame]5
6/ {
7 model = "Iomega StorCenter ix2-200";
8 compatible = "iom,ix2-200", "marvell,kirkwood-88f6281", "marvell,kirkwood";
9
10 memory {
11 device_type = "memory";
12 reg = <0x00000000 0x10000000>;
13 };
14
15 chosen {
16 bootargs = "console=ttyS0,115200n8 earlyprintk";
17 };
18
19 ocp@f1000000 {
Andrew Lunna93d3ad2012-11-17 17:00:54 +0100[diff] [blame]20 pinctrl: pinctrl@10000 {
Thomas Petazzoni4d058712013-05-24 11:44:47 +0200[diff] [blame]21 pinctrl-0 = < &pmx_led_sata_brt_ctrl_1
Andrew Lunna93d3ad2012-11-17 17:00:54 +0100[diff] [blame]22 &pmx_led_sata_brt_ctrl_2
23 &pmx_led_backup_brt_ctrl_1
24 &pmx_led_backup_brt_ctrl_2
25 &pmx_led_power_brt_ctrl_1
26 &pmx_led_power_brt_ctrl_2
27 &pmx_led_health_brt_ctrl_1
28 &pmx_led_health_brt_ctrl_2
29 &pmx_led_rebuild_brt_ctrl_1
30 &pmx_led_rebuild_brt_ctrl_2 >;
31 pinctrl-names = "default";
32
33 pmx_button_reset: pmx-button-reset {
34 marvell,pins = "mpp12";
35 marvell,function = "gpio";
36 };
37 pmx_button_power: pmx-button-power {
38 marvell,pins = "mpp14";
39 marvell,function = "gpio";
40 };
41 pmx_led_backup: pmx-led-backup {
42 marvell,pins = "mpp15";
43 marvell,function = "gpio";
44 };
45 pmx_led_power: pmx-led-power {
46 marvell,pins = "mpp16";
47 marvell,function = "gpio";
48 };
49 pmx_button_otb: pmx-button-otb {
50 marvell,pins = "mpp35";
51 marvell,function = "gpio";
52 };
53 pmx_led_rebuild: pmx-led-rebuild {
54 marvell,pins = "mpp36";
55 marvell,function = "gpio";
56 };
57 pmx_led_health: pmx-led_health {
58 marvell,pins = "mpp37";
59 marvell,function = "gpio";
60 };
61 pmx_led_sata_brt_ctrl_1: pmx-led-sata-brt-ctrl-1 {
62 marvell,pins = "mpp38";
63 marvell,function = "gpio";
64 };
65 pmx_led_sata_brt_ctrl_2: pmx-led-sata-brt-ctrl-2 {
66 marvell,pins = "mpp39";
67 marvell,function = "gpio";
68 };
69 pmx_led_backup_brt_ctrl_1: pmx-led-backup-brt-ctrl-1 {
70 marvell,pins = "mpp40";
71 marvell,function = "gpio";
72 };
73 pmx_led_backup_brt_ctrl_2: pmx-led-backup-brt-ctrl-2 {
74 marvell,pins = "mpp41";
75 marvell,function = "gpio";
76 };
77 pmx_led_power_brt_ctrl_1: pmx-led-power-brt-ctrl-1 {
78 marvell,pins = "mpp42";
79 marvell,function = "gpio";
80 };
81 pmx_led_power_brt_ctrl_2: pmx-led-power-brt-ctrl-2 {
82 marvell,pins = "mpp43";
83 marvell,function = "gpio";
84 };
85 pmx_led_health_brt_ctrl_1: pmx-led-health-brt-ctrl-1 {
86 marvell,pins = "mpp44";
87 marvell,function = "gpio";
88 };
89 pmx_led_health_brt_ctrl_2: pmx-led-health-brt-ctrl-2 {
90 marvell,pins = "mpp45";
91 marvell,function = "gpio";
92 };
93 pmx_led_rebuild_brt_ctrl_1: pmx-led-rebuild-brt-ctrl-1 {
Nigel Roberts8f08d662013-04-01 23:03:22 +1100[diff] [blame]94 marvell,pins = "mpp46";
Andrew Lunna93d3ad2012-11-17 17:00:54 +0100[diff] [blame]95 marvell,function = "gpio";
96 };
97 pmx_led_rebuild_brt_ctrl_2: pmx-led-rebuild-brt-ctrl-2 {
Nigel Roberts8f08d662013-04-01 23:03:22 +1100[diff] [blame]98 marvell,pins = "mpp47";
Andrew Lunna93d3ad2012-11-17 17:00:54 +0100[diff] [blame]99 marvell,function = "gpio";
100 };
101
102 };
Alan M Butler4f48b7f2012-08-20 15:29:07 +0100[diff] [blame]103 i2c@11000 {
104 status = "okay";
105
106 lm63: lm63@4c {
107 compatible = "national,lm63";
108 reg = <0x4c>;
109 };
110 };
111
112 serial@12000 {
Alan M Butler4f48b7f2012-08-20 15:29:07 +0100[diff] [blame]113 status = "ok";
114 };
115
116 nand@3000000 {
117 status = "okay";
118
119 partition@0 {
120 label = "u-boot";
121 reg = <0x0000000 0x100000>;
122 read-only;
123 };
124
125 partition@a0000 {
126 label = "env";
127 reg = <0xa0000 0x20000>;
128 read-only;
129 };
130
131 partition@100000 {
132 label = "uImage";
133 reg = <0x100000 0x300000>;
134 };
135
136 partition@400000 {
137 label = "uInitrd";
138 reg = <0x540000 0x1000000>;
139 };
140 };
141 sata@80000 {
142 status = "okay";
143 nr-ports = <2>;
144 };
145
146 };
147 gpio-leds {
148 compatible = "gpio-leds";
Thomas Petazzoni4d058712013-05-24 11:44:47 +0200[diff] [blame]149 pinctrl-0 = < &pmx_led_backup &pmx_led_power
150 &pmx_led_rebuild &pmx_led_health >;
151 pinctrl-names = "default";
Alan M Butler4f48b7f2012-08-20 15:29:07 +0100[diff] [blame]152
153 power_led {
154 label = "status:white:power_led";
155 gpios = <&gpio0 16 0>;
156 linux,default-trigger = "default-on";
157 };
Nigel Roberts8f08d662013-04-01 23:03:22 +1100[diff] [blame]158 rebuild_led {
159 label = "status:white:rebuild_led";
160 gpios = <&gpio1 4 0>;
161 };
162 health_led {
Alan M Butler4f48b7f2012-08-20 15:29:07 +0100[diff] [blame]163 label = "status:red:health_led";
164 gpios = <&gpio1 5 0>;
165 };
Alan M Butler4f48b7f2012-08-20 15:29:07 +0100[diff] [blame]166 backup_led {
167 label = "status:blue:backup_led";
168 gpios = <&gpio0 15 0>;
169 };
170 };
171 gpio-keys {
172 compatible = "gpio-keys";
173 #address-cells = <1>;
174 #size-cells = <0>;
Thomas Petazzoni4d058712013-05-24 11:44:47 +0200[diff] [blame]175 pinctrl-0 = <&pmx_button_reset &pmx_button_power
176 &pmx_button_otb>;
177 pinctrl-names = "default";
178
179
Alan M Butler4f48b7f2012-08-20 15:29:07 +0100[diff] [blame]180 Power {
181 label = "Power Button";
182 linux,code = <116>;
183 gpios = <&gpio0 14 1>;
184 };
185 Reset {
186 label = "Reset Button";
187 linux,code = <0x198>;
188 gpios = <&gpio0 12 1>;
189 };
190 OTB {
191 label = "OTB Button";
192 linux,code = <133>;
193 gpios = <&gpio1 3 1>;
194 };
195 };
196};
Sebastian Hesselbarth876e2332013-07-07 22:34:56 +0200[diff] [blame^]197
198&mdio {
199 status = "okay";
200
201 ethphy1: ethernet-phy@11 {
202 device_type = "ethernet-phy";
203 reg = <11>;
204 };
205};
206
207&eth0 {
208 status = "okay";
209 ethernet0-port@0 {
210 speed = <1000>;
211 duplex = <1>;
212 };
213};
214
215&eth1 {
216 status = "okay";
217 ethernet1-port@0 {
218 phy-handle = <&ethphy1>;
219 };
220};