Thierry Reding | a3ee129 | 2012-09-20 17:06:07 +0200 | [diff] [blame] | 1 | /dts-v1/; |
| 2 | |
Stephen Warren | 1bd0bd4 | 2012-10-17 16:38:21 -0600 | [diff] [blame] | 3 | #include "tegra20-tamonten.dtsi" |
Thierry Reding | a3ee129 | 2012-09-20 17:06:07 +0200 | [diff] [blame] | 4 | |
| 5 | / { |
| 6 | model = "Avionic Design Plutux board"; |
| 7 | compatible = "ad,plutux", "ad,tamonten", "nvidia,tegra20"; |
| 8 | |
Thierry Reding | 358f889 | 2012-11-16 16:56:51 +0100 | [diff] [blame] | 9 | host1x { |
| 10 | hdmi { |
| 11 | status = "okay"; |
| 12 | }; |
| 13 | }; |
| 14 | |
Thierry Reding | a3ee129 | 2012-09-20 17:06:07 +0200 | [diff] [blame] | 15 | i2c@7000c000 { |
| 16 | wm8903: wm8903@1a { |
| 17 | compatible = "wlf,wm8903"; |
| 18 | reg = <0x1a>; |
| 19 | interrupt-parent = <&gpio>; |
Stephen Warren | 6cecf91 | 2013-02-13 12:51:51 -0700 | [diff] [blame] | 20 | interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>; |
Thierry Reding | a3ee129 | 2012-09-20 17:06:07 +0200 | [diff] [blame] | 21 | |
| 22 | gpio-controller; |
| 23 | #gpio-cells = <2>; |
| 24 | |
| 25 | micdet-cfg = <0>; |
| 26 | micdet-delay = <100>; |
| 27 | gpio-cfg = <0xffffffff |
| 28 | 0xffffffff |
| 29 | 0 |
| 30 | 0xffffffff |
| 31 | 0xffffffff>; |
| 32 | }; |
| 33 | }; |
| 34 | |
| 35 | sound { |
| 36 | compatible = "ad,tegra-audio-plutux", |
| 37 | "nvidia,tegra-audio-wm8903"; |
| 38 | nvidia,model = "Avionic Design Plutux"; |
| 39 | |
| 40 | nvidia,audio-routing = |
| 41 | "Headphone Jack", "HPOUTR", |
| 42 | "Headphone Jack", "HPOUTL", |
| 43 | "Int Spk", "ROP", |
| 44 | "Int Spk", "RON", |
| 45 | "Int Spk", "LOP", |
| 46 | "Int Spk", "LON", |
| 47 | "Mic Jack", "MICBIAS", |
| 48 | "IN1L", "Mic Jack"; |
| 49 | |
| 50 | nvidia,i2s-controller = <&tegra_i2s1>; |
| 51 | nvidia,audio-codec = <&wm8903>; |
| 52 | |
Stephen Warren | 3325f1b | 2013-02-12 17:25:15 -0700 | [diff] [blame] | 53 | nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; |
| 54 | nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>; |
Stephen Warren | f9cd2b3 | 2013-03-26 16:45:52 -0600 | [diff] [blame] | 55 | |
Hiroshi Doyu | 885a8cf | 2013-05-22 19:45:32 +0300 | [diff] [blame^] | 56 | clocks = <&tegra_car TEGRA20_CLK_PLL_A>, |
| 57 | <&tegra_car TEGRA20_CLK_PLL_A_OUT0>, |
| 58 | <&tegra_car TEGRA20_CLK_CDEV1>; |
Stephen Warren | f9cd2b3 | 2013-03-26 16:45:52 -0600 | [diff] [blame] | 59 | clock-names = "pll_a", "pll_a_out0", "mclk"; |
Thierry Reding | a3ee129 | 2012-09-20 17:06:07 +0200 | [diff] [blame] | 60 | }; |
| 61 | }; |