Eric Lapuyade | bbed0de | 2012-05-07 12:31:29 +0200 | [diff] [blame] | 1 | /* |
| 2 | * HCI based Driver for NXP PN544 NFC Chip |
| 3 | * |
| 4 | * Copyright (C) 2012 Intel Corporation. All rights reserved. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms and conditions of the GNU General Public License, |
| 8 | * version 2, as published by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the |
| 17 | * Free Software Foundation, Inc., |
| 18 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
| 19 | */ |
| 20 | |
| 21 | #include <linux/crc-ccitt.h> |
| 22 | #include <linux/module.h> |
| 23 | #include <linux/delay.h> |
| 24 | #include <linux/slab.h> |
| 25 | #include <linux/miscdevice.h> |
| 26 | #include <linux/interrupt.h> |
| 27 | #include <linux/gpio.h> |
| 28 | #include <linux/i2c.h> |
| 29 | |
| 30 | #include <linux/nfc.h> |
| 31 | #include <net/nfc/hci.h> |
| 32 | #include <net/nfc/shdlc.h> |
| 33 | |
| 34 | #include <linux/nfc/pn544.h> |
| 35 | |
| 36 | #define DRIVER_DESC "HCI NFC driver for PN544" |
| 37 | |
| 38 | #define PN544_HCI_DRIVER_NAME "pn544_hci" |
| 39 | |
| 40 | /* Timing restrictions (ms) */ |
| 41 | #define PN544_HCI_RESETVEN_TIME 30 |
| 42 | |
| 43 | static struct i2c_device_id pn544_hci_id_table[] = { |
| 44 | {"pn544", 0}, |
| 45 | {} |
| 46 | }; |
| 47 | |
| 48 | MODULE_DEVICE_TABLE(i2c, pn544_hci_id_table); |
| 49 | |
| 50 | #define HCI_MODE 0 |
| 51 | #define FW_MODE 1 |
| 52 | |
| 53 | /* framing in HCI mode */ |
| 54 | #define PN544_HCI_LLC_LEN 1 |
| 55 | #define PN544_HCI_LLC_CRC 2 |
| 56 | #define PN544_HCI_LLC_LEN_CRC (PN544_HCI_LLC_LEN + PN544_HCI_LLC_CRC) |
| 57 | #define PN544_HCI_LLC_MIN_SIZE (1 + PN544_HCI_LLC_LEN_CRC) |
| 58 | #define PN544_HCI_LLC_MAX_PAYLOAD 29 |
| 59 | #define PN544_HCI_LLC_MAX_SIZE (PN544_HCI_LLC_LEN_CRC + 1 + \ |
| 60 | PN544_HCI_LLC_MAX_PAYLOAD) |
| 61 | |
| 62 | enum pn544_state { |
| 63 | PN544_ST_COLD, |
| 64 | PN544_ST_FW_READY, |
| 65 | PN544_ST_READY, |
| 66 | }; |
| 67 | |
| 68 | #define FULL_VERSION_LEN 11 |
| 69 | |
| 70 | /* Proprietary commands */ |
| 71 | #define PN544_WRITE 0x3f |
| 72 | |
| 73 | /* Proprietary gates, events, commands and registers */ |
| 74 | |
| 75 | /* NFC_HCI_RF_READER_A_GATE additional registers and commands */ |
| 76 | #define PN544_RF_READER_A_AUTO_ACTIVATION 0x10 |
| 77 | #define PN544_RF_READER_A_CMD_CONTINUE_ACTIVATION 0x12 |
| 78 | #define PN544_MIFARE_CMD 0x21 |
| 79 | |
| 80 | /* Commands that apply to all RF readers */ |
| 81 | #define PN544_RF_READER_CMD_PRESENCE_CHECK 0x30 |
| 82 | #define PN544_RF_READER_CMD_ACTIVATE_NEXT 0x32 |
| 83 | |
| 84 | /* NFC_HCI_ID_MGMT_GATE additional registers */ |
| 85 | #define PN544_ID_MGMT_FULL_VERSION_SW 0x10 |
| 86 | |
| 87 | #define PN544_RF_READER_ISO15693_GATE 0x12 |
| 88 | |
| 89 | #define PN544_RF_READER_F_GATE 0x14 |
| 90 | #define PN544_FELICA_ID 0x04 |
| 91 | #define PN544_FELICA_RAW 0x20 |
| 92 | |
| 93 | #define PN544_RF_READER_JEWEL_GATE 0x15 |
| 94 | #define PN544_JEWEL_RAW_CMD 0x23 |
| 95 | |
| 96 | #define PN544_RF_READER_NFCIP1_INITIATOR_GATE 0x30 |
| 97 | #define PN544_RF_READER_NFCIP1_TARGET_GATE 0x31 |
| 98 | |
| 99 | #define PN544_SYS_MGMT_GATE 0x90 |
| 100 | #define PN544_SYS_MGMT_INFO_NOTIFICATION 0x02 |
| 101 | |
| 102 | #define PN544_POLLING_LOOP_MGMT_GATE 0x94 |
| 103 | #define PN544_PL_RDPHASES 0x06 |
| 104 | #define PN544_PL_EMULATION 0x07 |
| 105 | #define PN544_PL_NFCT_DEACTIVATED 0x09 |
| 106 | |
| 107 | #define PN544_SWP_MGMT_GATE 0xA0 |
| 108 | |
| 109 | #define PN544_NFC_WI_MGMT_GATE 0xA1 |
| 110 | |
| 111 | static u8 pn544_custom_gates[] = { |
| 112 | PN544_SYS_MGMT_GATE, |
| 113 | PN544_SWP_MGMT_GATE, |
| 114 | PN544_POLLING_LOOP_MGMT_GATE, |
| 115 | PN544_NFC_WI_MGMT_GATE, |
| 116 | PN544_RF_READER_F_GATE, |
| 117 | PN544_RF_READER_JEWEL_GATE, |
| 118 | PN544_RF_READER_ISO15693_GATE, |
| 119 | PN544_RF_READER_NFCIP1_INITIATOR_GATE, |
| 120 | PN544_RF_READER_NFCIP1_TARGET_GATE |
| 121 | }; |
| 122 | |
| 123 | /* Largest headroom needed for outgoing custom commands */ |
| 124 | #define PN544_CMDS_HEADROOM 2 |
| 125 | |
| 126 | struct pn544_hci_info { |
| 127 | struct i2c_client *i2c_dev; |
| 128 | struct nfc_shdlc *shdlc; |
| 129 | |
| 130 | enum pn544_state state; |
| 131 | |
| 132 | struct mutex info_lock; |
| 133 | |
| 134 | unsigned int gpio_en; |
| 135 | unsigned int gpio_irq; |
| 136 | unsigned int gpio_fw; |
| 137 | unsigned int en_polarity; |
| 138 | |
| 139 | int hard_fault; /* |
| 140 | * < 0 if hardware error occured (e.g. i2c err) |
| 141 | * and prevents normal operation. |
| 142 | */ |
| 143 | }; |
| 144 | |
| 145 | static void pn544_hci_platform_init(struct pn544_hci_info *info) |
| 146 | { |
| 147 | int polarity, retry, ret; |
| 148 | char rset_cmd[] = { 0x05, 0xF9, 0x04, 0x00, 0xC3, 0xE5 }; |
| 149 | int count = sizeof(rset_cmd); |
| 150 | |
| 151 | pr_info(DRIVER_DESC ": %s\n", __func__); |
| 152 | dev_info(&info->i2c_dev->dev, "Detecting nfc_en polarity\n"); |
| 153 | |
| 154 | /* Disable fw download */ |
| 155 | gpio_set_value(info->gpio_fw, 0); |
| 156 | |
| 157 | for (polarity = 0; polarity < 2; polarity++) { |
| 158 | info->en_polarity = polarity; |
| 159 | retry = 3; |
| 160 | while (retry--) { |
| 161 | /* power off */ |
| 162 | gpio_set_value(info->gpio_en, !info->en_polarity); |
| 163 | usleep_range(10000, 15000); |
| 164 | |
| 165 | /* power on */ |
| 166 | gpio_set_value(info->gpio_en, info->en_polarity); |
| 167 | usleep_range(10000, 15000); |
| 168 | |
| 169 | /* send reset */ |
| 170 | dev_dbg(&info->i2c_dev->dev, "Sending reset cmd\n"); |
| 171 | ret = i2c_master_send(info->i2c_dev, rset_cmd, count); |
| 172 | if (ret == count) { |
| 173 | dev_info(&info->i2c_dev->dev, |
| 174 | "nfc_en polarity : active %s\n", |
| 175 | (polarity == 0 ? "low" : "high")); |
| 176 | goto out; |
| 177 | } |
| 178 | } |
| 179 | } |
| 180 | |
| 181 | dev_err(&info->i2c_dev->dev, |
| 182 | "Could not detect nfc_en polarity, fallback to active high\n"); |
| 183 | |
| 184 | out: |
| 185 | gpio_set_value(info->gpio_en, !info->en_polarity); |
| 186 | } |
| 187 | |
| 188 | static int pn544_hci_enable(struct pn544_hci_info *info, int mode) |
| 189 | { |
| 190 | pr_info(DRIVER_DESC ": %s\n", __func__); |
| 191 | |
| 192 | gpio_set_value(info->gpio_fw, 0); |
| 193 | gpio_set_value(info->gpio_en, info->en_polarity); |
| 194 | usleep_range(10000, 15000); |
| 195 | |
| 196 | return 0; |
| 197 | } |
| 198 | |
| 199 | static void pn544_hci_disable(struct pn544_hci_info *info) |
| 200 | { |
| 201 | pr_info(DRIVER_DESC ": %s\n", __func__); |
| 202 | |
| 203 | gpio_set_value(info->gpio_fw, 0); |
| 204 | gpio_set_value(info->gpio_en, !info->en_polarity); |
| 205 | usleep_range(10000, 15000); |
| 206 | |
| 207 | gpio_set_value(info->gpio_en, info->en_polarity); |
| 208 | usleep_range(10000, 15000); |
| 209 | |
| 210 | gpio_set_value(info->gpio_en, !info->en_polarity); |
| 211 | usleep_range(10000, 15000); |
| 212 | } |
| 213 | |
| 214 | static int pn544_hci_i2c_write(struct i2c_client *client, u8 *buf, int len) |
| 215 | { |
| 216 | int r; |
| 217 | |
| 218 | usleep_range(3000, 6000); |
| 219 | |
| 220 | r = i2c_master_send(client, buf, len); |
| 221 | |
| 222 | if (r == -EREMOTEIO) { /* Retry, chip was in standby */ |
| 223 | usleep_range(6000, 10000); |
| 224 | r = i2c_master_send(client, buf, len); |
| 225 | } |
| 226 | |
| 227 | if (r >= 0 && r != len) |
| 228 | r = -EREMOTEIO; |
| 229 | |
| 230 | return r; |
| 231 | } |
| 232 | |
| 233 | static int check_crc(u8 *buf, int buflen) |
| 234 | { |
Dan Carpenter | 885ba1d | 2012-05-18 10:36:47 +0300 | [diff] [blame^] | 235 | int len; |
Eric Lapuyade | bbed0de | 2012-05-07 12:31:29 +0200 | [diff] [blame] | 236 | u16 crc; |
| 237 | |
| 238 | len = buf[0] + 1; |
| 239 | crc = crc_ccitt(0xffff, buf, len - 2); |
| 240 | crc = ~crc; |
| 241 | |
| 242 | if (buf[len - 2] != (crc & 0xff) || buf[len - 1] != (crc >> 8)) { |
| 243 | pr_err(PN544_HCI_DRIVER_NAME ": CRC error 0x%x != 0x%x 0x%x\n", |
| 244 | crc, buf[len - 1], buf[len - 2]); |
| 245 | |
| 246 | pr_info(DRIVER_DESC ": %s : BAD CRC\n", __func__); |
| 247 | print_hex_dump(KERN_DEBUG, "crc: ", DUMP_PREFIX_NONE, |
| 248 | 16, 2, buf, buflen, false); |
| 249 | return -EPERM; |
| 250 | } |
| 251 | return 0; |
| 252 | } |
| 253 | |
| 254 | /* |
| 255 | * Reads an shdlc frame and returns it in a newly allocated sk_buff. Guarantees |
| 256 | * that i2c bus will be flushed and that next read will start on a new frame. |
| 257 | * returned skb contains only LLC header and payload. |
| 258 | * returns: |
| 259 | * -EREMOTEIO : i2c read error (fatal) |
| 260 | * -EBADMSG : frame was incorrect and discarded |
| 261 | * -ENOMEM : cannot allocate skb, frame dropped |
| 262 | */ |
| 263 | static int pn544_hci_i2c_read(struct i2c_client *client, struct sk_buff **skb) |
| 264 | { |
| 265 | int r; |
| 266 | u8 len; |
| 267 | u8 tmp[PN544_HCI_LLC_MAX_SIZE - 1]; |
| 268 | |
| 269 | r = i2c_master_recv(client, &len, 1); |
| 270 | if (r != 1) { |
| 271 | dev_err(&client->dev, "cannot read len byte\n"); |
| 272 | return -EREMOTEIO; |
| 273 | } |
| 274 | |
| 275 | if ((len < (PN544_HCI_LLC_MIN_SIZE - 1)) || |
| 276 | (len > (PN544_HCI_LLC_MAX_SIZE - 1))) { |
| 277 | dev_err(&client->dev, "invalid len byte\n"); |
| 278 | r = -EBADMSG; |
| 279 | goto flush; |
| 280 | } |
| 281 | |
| 282 | *skb = alloc_skb(1 + len, GFP_KERNEL); |
| 283 | if (*skb == NULL) { |
| 284 | r = -ENOMEM; |
| 285 | goto flush; |
| 286 | } |
| 287 | |
| 288 | *skb_put(*skb, 1) = len; |
| 289 | |
| 290 | r = i2c_master_recv(client, skb_put(*skb, len), len); |
| 291 | if (r != len) { |
| 292 | kfree_skb(*skb); |
| 293 | return -EREMOTEIO; |
| 294 | } |
| 295 | |
| 296 | r = check_crc((*skb)->data, (*skb)->len); |
| 297 | if (r != 0) { |
| 298 | kfree_skb(*skb); |
| 299 | r = -EBADMSG; |
| 300 | goto flush; |
| 301 | } |
| 302 | |
| 303 | skb_pull(*skb, 1); |
| 304 | skb_trim(*skb, (*skb)->len - 2); |
| 305 | |
| 306 | usleep_range(3000, 6000); |
| 307 | |
| 308 | return 0; |
| 309 | |
| 310 | flush: |
| 311 | if (i2c_master_recv(client, tmp, sizeof(tmp)) < 0) |
| 312 | r = -EREMOTEIO; |
| 313 | |
| 314 | usleep_range(3000, 6000); |
| 315 | |
| 316 | return r; |
| 317 | } |
| 318 | |
| 319 | /* |
| 320 | * Reads an shdlc frame from the chip. This is not as straightforward as it |
| 321 | * seems. There are cases where we could loose the frame start synchronization. |
| 322 | * The frame format is len-data-crc, and corruption can occur anywhere while |
| 323 | * transiting on i2c bus, such that we could read an invalid len. |
| 324 | * In order to recover synchronization with the next frame, we must be sure |
| 325 | * to read the real amount of data without using the len byte. We do this by |
| 326 | * assuming the following: |
| 327 | * - the chip will always present only one single complete frame on the bus |
| 328 | * before triggering the interrupt |
| 329 | * - the chip will not present a new frame until we have completely read |
| 330 | * the previous one (or until we have handled the interrupt). |
| 331 | * The tricky case is when we read a corrupted len that is less than the real |
| 332 | * len. We must detect this here in order to determine that we need to flush |
| 333 | * the bus. This is the reason why we check the crc here. |
| 334 | */ |
| 335 | static irqreturn_t pn544_hci_irq_thread_fn(int irq, void *dev_id) |
| 336 | { |
| 337 | struct pn544_hci_info *info = dev_id; |
| 338 | struct i2c_client *client = info->i2c_dev; |
| 339 | struct sk_buff *skb = NULL; |
| 340 | int r; |
| 341 | |
| 342 | BUG_ON(!info); |
| 343 | BUG_ON(irq != info->i2c_dev->irq); |
| 344 | |
| 345 | dev_dbg(&client->dev, "IRQ\n"); |
| 346 | |
| 347 | if (info->hard_fault != 0) |
| 348 | return IRQ_HANDLED; |
| 349 | |
| 350 | r = pn544_hci_i2c_read(client, &skb); |
| 351 | if (r == -EREMOTEIO) { |
| 352 | info->hard_fault = r; |
| 353 | |
| 354 | nfc_shdlc_recv_frame(info->shdlc, NULL); |
| 355 | |
| 356 | return IRQ_HANDLED; |
| 357 | } else if ((r == -ENOMEM) || (r == -EBADMSG)) { |
| 358 | return IRQ_HANDLED; |
| 359 | } |
| 360 | |
| 361 | nfc_shdlc_recv_frame(info->shdlc, skb); |
| 362 | |
| 363 | return IRQ_HANDLED; |
| 364 | } |
| 365 | |
| 366 | static int pn544_hci_open(struct nfc_shdlc *shdlc) |
| 367 | { |
| 368 | struct pn544_hci_info *info = nfc_shdlc_get_clientdata(shdlc); |
| 369 | int r = 0; |
| 370 | |
| 371 | mutex_lock(&info->info_lock); |
| 372 | |
| 373 | if (info->state != PN544_ST_COLD) { |
| 374 | r = -EBUSY; |
| 375 | goto out; |
| 376 | } |
| 377 | |
| 378 | r = pn544_hci_enable(info, HCI_MODE); |
| 379 | |
| 380 | out: |
| 381 | mutex_unlock(&info->info_lock); |
| 382 | return r; |
| 383 | } |
| 384 | |
| 385 | static void pn544_hci_close(struct nfc_shdlc *shdlc) |
| 386 | { |
| 387 | struct pn544_hci_info *info = nfc_shdlc_get_clientdata(shdlc); |
| 388 | |
| 389 | mutex_lock(&info->info_lock); |
| 390 | |
| 391 | if (info->state == PN544_ST_COLD) |
| 392 | goto out; |
| 393 | |
| 394 | pn544_hci_disable(info); |
| 395 | |
| 396 | out: |
| 397 | mutex_unlock(&info->info_lock); |
| 398 | } |
| 399 | |
| 400 | static int pn544_hci_ready(struct nfc_shdlc *shdlc) |
| 401 | { |
| 402 | struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc); |
| 403 | struct sk_buff *skb; |
| 404 | static struct hw_config { |
| 405 | u8 adr[2]; |
| 406 | u8 value; |
| 407 | } hw_config[] = { |
| 408 | {{0x9f, 0x9a}, 0x00}, |
| 409 | |
| 410 | {{0x98, 0x10}, 0xbc}, |
| 411 | |
| 412 | {{0x9e, 0x71}, 0x00}, |
| 413 | |
| 414 | {{0x98, 0x09}, 0x00}, |
| 415 | |
| 416 | {{0x9e, 0xb4}, 0x00}, |
| 417 | |
| 418 | {{0x9e, 0xd9}, 0xff}, |
| 419 | {{0x9e, 0xda}, 0xff}, |
| 420 | {{0x9e, 0xdb}, 0x23}, |
| 421 | {{0x9e, 0xdc}, 0x21}, |
| 422 | {{0x9e, 0xdd}, 0x22}, |
| 423 | {{0x9e, 0xde}, 0x24}, |
| 424 | |
| 425 | {{0x9c, 0x01}, 0x08}, |
| 426 | |
| 427 | {{0x9e, 0xaa}, 0x01}, |
| 428 | |
| 429 | {{0x9b, 0xd1}, 0x0d}, |
| 430 | {{0x9b, 0xd2}, 0x24}, |
| 431 | {{0x9b, 0xd3}, 0x0a}, |
| 432 | {{0x9b, 0xd4}, 0x22}, |
| 433 | {{0x9b, 0xd5}, 0x08}, |
| 434 | {{0x9b, 0xd6}, 0x1e}, |
| 435 | {{0x9b, 0xdd}, 0x1c}, |
| 436 | |
| 437 | {{0x9b, 0x84}, 0x13}, |
| 438 | {{0x99, 0x81}, 0x7f}, |
| 439 | {{0x99, 0x31}, 0x70}, |
| 440 | |
| 441 | {{0x98, 0x00}, 0x3f}, |
| 442 | |
| 443 | {{0x9f, 0x09}, 0x00}, |
| 444 | |
| 445 | {{0x9f, 0x0a}, 0x05}, |
| 446 | |
| 447 | {{0x9e, 0xd1}, 0xa1}, |
| 448 | {{0x99, 0x23}, 0x00}, |
| 449 | |
| 450 | {{0x9e, 0x74}, 0x80}, |
| 451 | |
| 452 | {{0x9f, 0x28}, 0x10}, |
| 453 | |
| 454 | {{0x9f, 0x35}, 0x14}, |
| 455 | |
| 456 | {{0x9f, 0x36}, 0x60}, |
| 457 | |
| 458 | {{0x9c, 0x31}, 0x00}, |
| 459 | |
| 460 | {{0x9c, 0x32}, 0xc8}, |
| 461 | |
| 462 | {{0x9c, 0x19}, 0x40}, |
| 463 | |
| 464 | {{0x9c, 0x1a}, 0x40}, |
| 465 | |
| 466 | {{0x9c, 0x0c}, 0x00}, |
| 467 | |
| 468 | {{0x9c, 0x0d}, 0x00}, |
| 469 | |
| 470 | {{0x9c, 0x12}, 0x00}, |
| 471 | |
| 472 | {{0x9c, 0x13}, 0x00}, |
| 473 | |
| 474 | {{0x98, 0xa2}, 0x0e}, |
| 475 | |
| 476 | {{0x98, 0x93}, 0x40}, |
| 477 | |
| 478 | {{0x98, 0x7d}, 0x02}, |
| 479 | {{0x98, 0x7e}, 0x00}, |
| 480 | {{0x9f, 0xc8}, 0x01}, |
| 481 | }; |
| 482 | struct hw_config *p = hw_config; |
| 483 | int count = ARRAY_SIZE(hw_config); |
| 484 | struct sk_buff *res_skb; |
| 485 | u8 param[4]; |
| 486 | int r; |
| 487 | |
| 488 | param[0] = 0; |
| 489 | while (count--) { |
| 490 | param[1] = p->adr[0]; |
| 491 | param[2] = p->adr[1]; |
| 492 | param[3] = p->value; |
| 493 | |
| 494 | r = nfc_hci_send_cmd(hdev, PN544_SYS_MGMT_GATE, PN544_WRITE, |
| 495 | param, 4, &res_skb); |
| 496 | if (r < 0) |
| 497 | return r; |
| 498 | |
| 499 | if (res_skb->len != 1) { |
| 500 | kfree_skb(res_skb); |
| 501 | return -EPROTO; |
| 502 | } |
| 503 | |
| 504 | if (res_skb->data[0] != p->value) { |
| 505 | kfree_skb(res_skb); |
| 506 | return -EIO; |
| 507 | } |
| 508 | |
| 509 | kfree_skb(res_skb); |
| 510 | |
| 511 | p++; |
| 512 | } |
| 513 | |
| 514 | param[0] = NFC_HCI_UICC_HOST_ID; |
| 515 | r = nfc_hci_set_param(hdev, NFC_HCI_ADMIN_GATE, |
| 516 | NFC_HCI_ADMIN_WHITELIST, param, 1); |
| 517 | if (r < 0) |
| 518 | return r; |
| 519 | |
| 520 | param[0] = 0x3d; |
| 521 | r = nfc_hci_set_param(hdev, PN544_SYS_MGMT_GATE, |
| 522 | PN544_SYS_MGMT_INFO_NOTIFICATION, param, 1); |
| 523 | if (r < 0) |
| 524 | return r; |
| 525 | |
| 526 | param[0] = 0x0; |
| 527 | r = nfc_hci_set_param(hdev, NFC_HCI_RF_READER_A_GATE, |
| 528 | PN544_RF_READER_A_AUTO_ACTIVATION, param, 1); |
| 529 | if (r < 0) |
| 530 | return r; |
| 531 | |
| 532 | r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE, |
| 533 | NFC_HCI_EVT_END_OPERATION, NULL, 0); |
| 534 | if (r < 0) |
| 535 | return r; |
| 536 | |
| 537 | param[0] = 0x1; |
| 538 | r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE, |
| 539 | PN544_PL_NFCT_DEACTIVATED, param, 1); |
| 540 | if (r < 0) |
| 541 | return r; |
| 542 | |
| 543 | param[0] = 0x0; |
| 544 | r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE, |
| 545 | PN544_PL_RDPHASES, param, 1); |
| 546 | if (r < 0) |
| 547 | return r; |
| 548 | |
| 549 | r = nfc_hci_get_param(hdev, NFC_HCI_ID_MGMT_GATE, |
| 550 | PN544_ID_MGMT_FULL_VERSION_SW, &skb); |
| 551 | if (r < 0) |
| 552 | return r; |
| 553 | |
| 554 | if (skb->len != FULL_VERSION_LEN) { |
| 555 | kfree_skb(skb); |
| 556 | return -EINVAL; |
| 557 | } |
| 558 | |
| 559 | print_hex_dump(KERN_DEBUG, "FULL VERSION SOFTWARE INFO: ", |
| 560 | DUMP_PREFIX_NONE, 16, 1, |
| 561 | skb->data, FULL_VERSION_LEN, false); |
| 562 | |
| 563 | kfree_skb(skb); |
| 564 | |
| 565 | return 0; |
| 566 | } |
| 567 | |
| 568 | static int pn544_hci_xmit(struct nfc_shdlc *shdlc, struct sk_buff *skb) |
| 569 | { |
| 570 | struct pn544_hci_info *info = nfc_shdlc_get_clientdata(shdlc); |
| 571 | struct i2c_client *client = info->i2c_dev; |
| 572 | |
| 573 | if (info->hard_fault != 0) |
| 574 | return info->hard_fault; |
| 575 | |
| 576 | return pn544_hci_i2c_write(client, skb->data, skb->len); |
| 577 | } |
| 578 | |
| 579 | static int pn544_hci_start_poll(struct nfc_shdlc *shdlc, u32 protocols) |
| 580 | { |
| 581 | struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc); |
| 582 | u8 phases = 0; |
| 583 | int r; |
| 584 | u8 duration[2]; |
| 585 | u8 activated; |
| 586 | |
| 587 | pr_info(DRIVER_DESC ": %s protocols = %d\n", __func__, protocols); |
| 588 | |
| 589 | r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE, |
| 590 | NFC_HCI_EVT_END_OPERATION, NULL, 0); |
| 591 | if (r < 0) |
| 592 | return r; |
| 593 | |
| 594 | duration[0] = 0x18; |
| 595 | duration[1] = 0x6a; |
| 596 | r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE, |
| 597 | PN544_PL_EMULATION, duration, 2); |
| 598 | if (r < 0) |
| 599 | return r; |
| 600 | |
| 601 | activated = 0; |
| 602 | r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE, |
| 603 | PN544_PL_NFCT_DEACTIVATED, &activated, 1); |
| 604 | if (r < 0) |
| 605 | return r; |
| 606 | |
| 607 | if (protocols & (NFC_PROTO_ISO14443_MASK | NFC_PROTO_MIFARE_MASK | |
| 608 | NFC_PROTO_JEWEL_MASK)) |
| 609 | phases |= 1; /* Type A */ |
| 610 | if (protocols & NFC_PROTO_FELICA_MASK) { |
| 611 | phases |= (1 << 2); /* Type F 212 */ |
| 612 | phases |= (1 << 3); /* Type F 424 */ |
| 613 | } |
| 614 | |
| 615 | phases |= (1 << 5); /* NFC active */ |
| 616 | |
| 617 | r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE, |
| 618 | PN544_PL_RDPHASES, &phases, 1); |
| 619 | if (r < 0) |
| 620 | return r; |
| 621 | |
| 622 | r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE, |
| 623 | NFC_HCI_EVT_READER_REQUESTED, NULL, 0); |
| 624 | if (r < 0) |
| 625 | nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE, |
| 626 | NFC_HCI_EVT_END_OPERATION, NULL, 0); |
| 627 | |
| 628 | return r; |
| 629 | } |
| 630 | |
| 631 | static int pn544_hci_target_from_gate(struct nfc_shdlc *shdlc, u8 gate, |
| 632 | struct nfc_target *target) |
| 633 | { |
| 634 | switch (gate) { |
| 635 | case PN544_RF_READER_F_GATE: |
| 636 | target->supported_protocols = NFC_PROTO_FELICA_MASK; |
| 637 | break; |
| 638 | case PN544_RF_READER_JEWEL_GATE: |
| 639 | target->supported_protocols = NFC_PROTO_JEWEL_MASK; |
| 640 | target->sens_res = 0x0c00; |
| 641 | break; |
| 642 | default: |
| 643 | return -EPROTO; |
| 644 | } |
| 645 | |
| 646 | return 0; |
| 647 | } |
| 648 | |
| 649 | static int pn544_hci_complete_target_discovered(struct nfc_shdlc *shdlc, |
| 650 | u8 gate, |
| 651 | struct nfc_target *target) |
| 652 | { |
| 653 | struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc); |
| 654 | struct sk_buff *uid_skb; |
| 655 | int r = 0; |
| 656 | |
| 657 | if (target->supported_protocols & NFC_PROTO_MIFARE_MASK) { |
| 658 | if (target->nfcid1_len != 4 && target->nfcid1_len != 7 && |
| 659 | target->nfcid1_len != 10) |
| 660 | return -EPROTO; |
| 661 | |
| 662 | r = nfc_hci_send_cmd(hdev, NFC_HCI_RF_READER_A_GATE, |
| 663 | PN544_RF_READER_CMD_ACTIVATE_NEXT, |
| 664 | target->nfcid1, target->nfcid1_len, NULL); |
| 665 | } else if (target->supported_protocols & NFC_PROTO_FELICA_MASK) { |
| 666 | r = nfc_hci_get_param(hdev, PN544_RF_READER_F_GATE, |
| 667 | PN544_FELICA_ID, &uid_skb); |
| 668 | if (r < 0) |
| 669 | return r; |
| 670 | |
| 671 | if (uid_skb->len != 8) { |
| 672 | kfree_skb(uid_skb); |
| 673 | return -EPROTO; |
| 674 | } |
| 675 | |
| 676 | r = nfc_hci_send_cmd(hdev, PN544_RF_READER_F_GATE, |
| 677 | PN544_RF_READER_CMD_ACTIVATE_NEXT, |
| 678 | uid_skb->data, uid_skb->len, NULL); |
| 679 | kfree_skb(uid_skb); |
| 680 | } else if (target->supported_protocols & NFC_PROTO_ISO14443_MASK) { |
| 681 | /* |
| 682 | * TODO: maybe other ISO 14443 require some kind of continue |
| 683 | * activation, but for now we've seen only this one below. |
| 684 | */ |
| 685 | if (target->sens_res == 0x4403) /* Type 4 Mifare DESFire */ |
| 686 | r = nfc_hci_send_cmd(hdev, NFC_HCI_RF_READER_A_GATE, |
| 687 | PN544_RF_READER_A_CMD_CONTINUE_ACTIVATION, |
| 688 | NULL, 0, NULL); |
| 689 | } |
| 690 | |
| 691 | return r; |
| 692 | } |
| 693 | |
| 694 | #define MIFARE_CMD_AUTH_KEY_A 0x60 |
| 695 | #define MIFARE_CMD_AUTH_KEY_B 0x61 |
| 696 | #define MIFARE_CMD_HEADER 2 |
| 697 | #define MIFARE_UID_LEN 4 |
| 698 | #define MIFARE_KEY_LEN 6 |
| 699 | #define MIFARE_CMD_LEN 12 |
| 700 | /* |
| 701 | * Returns: |
| 702 | * <= 0: driver handled the data exchange |
| 703 | * 1: driver doesn't especially handle, please do standard processing |
| 704 | */ |
| 705 | static int pn544_hci_data_exchange(struct nfc_shdlc *shdlc, |
| 706 | struct nfc_target *target, |
| 707 | struct sk_buff *skb, |
| 708 | struct sk_buff **res_skb) |
| 709 | { |
| 710 | struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc); |
| 711 | int r; |
| 712 | |
| 713 | pr_info(DRIVER_DESC ": %s for gate=%d\n", __func__, |
| 714 | target->hci_reader_gate); |
| 715 | |
| 716 | switch (target->hci_reader_gate) { |
| 717 | case NFC_HCI_RF_READER_A_GATE: |
| 718 | if (target->supported_protocols & NFC_PROTO_MIFARE_MASK) { |
| 719 | /* |
| 720 | * It seems that pn544 is inverting key and UID for |
| 721 | * MIFARE authentication commands. |
| 722 | */ |
| 723 | if (skb->len == MIFARE_CMD_LEN && |
| 724 | (skb->data[0] == MIFARE_CMD_AUTH_KEY_A || |
| 725 | skb->data[0] == MIFARE_CMD_AUTH_KEY_B)) { |
| 726 | u8 uid[MIFARE_UID_LEN]; |
| 727 | u8 *data = skb->data + MIFARE_CMD_HEADER; |
| 728 | |
| 729 | memcpy(uid, data + MIFARE_KEY_LEN, |
| 730 | MIFARE_UID_LEN); |
| 731 | memmove(data + MIFARE_UID_LEN, data, |
| 732 | MIFARE_KEY_LEN); |
| 733 | memcpy(data, uid, MIFARE_UID_LEN); |
| 734 | } |
| 735 | |
| 736 | return nfc_hci_send_cmd(hdev, target->hci_reader_gate, |
| 737 | PN544_MIFARE_CMD, |
| 738 | skb->data, skb->len, res_skb); |
| 739 | } else |
| 740 | return 1; |
| 741 | case PN544_RF_READER_F_GATE: |
| 742 | *skb_push(skb, 1) = 0; |
| 743 | *skb_push(skb, 1) = 0; |
| 744 | |
| 745 | r = nfc_hci_send_cmd(hdev, target->hci_reader_gate, |
| 746 | PN544_FELICA_RAW, |
| 747 | skb->data, skb->len, res_skb); |
| 748 | if (r == 0) |
| 749 | skb_pull(*res_skb, 1); |
| 750 | return r; |
| 751 | case PN544_RF_READER_JEWEL_GATE: |
| 752 | return nfc_hci_send_cmd(hdev, target->hci_reader_gate, |
| 753 | PN544_JEWEL_RAW_CMD, |
| 754 | skb->data, skb->len, res_skb); |
| 755 | default: |
| 756 | return 1; |
| 757 | } |
| 758 | } |
| 759 | |
| 760 | static int pn544_hci_check_presence(struct nfc_shdlc *shdlc, |
| 761 | struct nfc_target *target) |
| 762 | { |
| 763 | struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc); |
| 764 | |
| 765 | return nfc_hci_send_cmd(hdev, target->hci_reader_gate, |
| 766 | PN544_RF_READER_CMD_PRESENCE_CHECK, |
| 767 | NULL, 0, NULL); |
| 768 | } |
| 769 | |
| 770 | static struct nfc_shdlc_ops pn544_shdlc_ops = { |
| 771 | .open = pn544_hci_open, |
| 772 | .close = pn544_hci_close, |
| 773 | .hci_ready = pn544_hci_ready, |
| 774 | .xmit = pn544_hci_xmit, |
| 775 | .start_poll = pn544_hci_start_poll, |
| 776 | .target_from_gate = pn544_hci_target_from_gate, |
| 777 | .complete_target_discovered = pn544_hci_complete_target_discovered, |
| 778 | .data_exchange = pn544_hci_data_exchange, |
| 779 | .check_presence = pn544_hci_check_presence, |
| 780 | }; |
| 781 | |
| 782 | static int __devinit pn544_hci_probe(struct i2c_client *client, |
| 783 | const struct i2c_device_id *id) |
| 784 | { |
| 785 | struct pn544_hci_info *info; |
| 786 | struct pn544_nfc_platform_data *pdata; |
| 787 | int r = 0; |
| 788 | u32 protocols; |
| 789 | struct nfc_hci_init_data init_data; |
| 790 | |
| 791 | dev_dbg(&client->dev, "%s\n", __func__); |
| 792 | dev_dbg(&client->dev, "IRQ: %d\n", client->irq); |
| 793 | |
| 794 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { |
| 795 | dev_err(&client->dev, "Need I2C_FUNC_I2C\n"); |
| 796 | return -ENODEV; |
| 797 | } |
| 798 | |
| 799 | info = kzalloc(sizeof(struct pn544_hci_info), GFP_KERNEL); |
| 800 | if (!info) { |
| 801 | dev_err(&client->dev, |
| 802 | "Cannot allocate memory for pn544_hci_info.\n"); |
| 803 | r = -ENOMEM; |
| 804 | goto err_info_alloc; |
| 805 | } |
| 806 | |
| 807 | info->i2c_dev = client; |
| 808 | info->state = PN544_ST_COLD; |
| 809 | mutex_init(&info->info_lock); |
| 810 | i2c_set_clientdata(client, info); |
| 811 | |
| 812 | pdata = client->dev.platform_data; |
| 813 | if (pdata == NULL) { |
| 814 | dev_err(&client->dev, "No platform data\n"); |
| 815 | r = -EINVAL; |
| 816 | goto err_pdata; |
| 817 | } |
| 818 | |
| 819 | if (pdata->request_resources == NULL) { |
| 820 | dev_err(&client->dev, "request_resources() missing\n"); |
| 821 | r = -EINVAL; |
| 822 | goto err_pdata; |
| 823 | } |
| 824 | |
| 825 | r = pdata->request_resources(client); |
| 826 | if (r) { |
| 827 | dev_err(&client->dev, "Cannot get platform resources\n"); |
| 828 | goto err_pdata; |
| 829 | } |
| 830 | |
| 831 | info->gpio_en = pdata->get_gpio(NFC_GPIO_ENABLE); |
| 832 | info->gpio_fw = pdata->get_gpio(NFC_GPIO_FW_RESET); |
| 833 | info->gpio_irq = pdata->get_gpio(NFC_GPIO_IRQ); |
| 834 | |
| 835 | pn544_hci_platform_init(info); |
| 836 | |
| 837 | r = request_threaded_irq(client->irq, NULL, pn544_hci_irq_thread_fn, |
| 838 | IRQF_TRIGGER_RISING, PN544_HCI_DRIVER_NAME, |
| 839 | info); |
| 840 | if (r < 0) { |
| 841 | dev_err(&client->dev, "Unable to register IRQ handler\n"); |
| 842 | goto err_rti; |
| 843 | } |
| 844 | |
| 845 | init_data.gate_count = ARRAY_SIZE(pn544_custom_gates); |
| 846 | |
| 847 | memcpy(init_data.gates, pn544_custom_gates, |
| 848 | ARRAY_SIZE(pn544_custom_gates)); |
| 849 | |
| 850 | /* |
| 851 | * TODO: Session id must include the driver name + some bus addr |
| 852 | * persistent info to discriminate 2 identical chips |
| 853 | */ |
| 854 | strcpy(init_data.session_id, "ID544HCI"); |
| 855 | |
| 856 | protocols = NFC_PROTO_JEWEL_MASK | |
| 857 | NFC_PROTO_MIFARE_MASK | |
| 858 | NFC_PROTO_FELICA_MASK | |
| 859 | NFC_PROTO_ISO14443_MASK | |
| 860 | NFC_PROTO_NFC_DEP_MASK; |
| 861 | |
| 862 | info->shdlc = nfc_shdlc_allocate(&pn544_shdlc_ops, |
| 863 | &init_data, protocols, |
| 864 | PN544_CMDS_HEADROOM, 0, |
| 865 | PN544_HCI_LLC_MAX_PAYLOAD, |
| 866 | dev_name(&client->dev)); |
| 867 | if (!info->shdlc) { |
| 868 | dev_err(&client->dev, "Cannot allocate nfc shdlc.\n"); |
| 869 | r = -ENOMEM; |
| 870 | goto err_allocshdlc; |
| 871 | } |
| 872 | |
| 873 | nfc_shdlc_set_clientdata(info->shdlc, info); |
| 874 | |
| 875 | return 0; |
| 876 | |
| 877 | err_allocshdlc: |
| 878 | free_irq(client->irq, info); |
| 879 | |
| 880 | err_rti: |
| 881 | if (pdata->free_resources != NULL) |
| 882 | pdata->free_resources(); |
| 883 | |
| 884 | err_pdata: |
| 885 | kfree(info); |
| 886 | |
| 887 | err_info_alloc: |
| 888 | return r; |
| 889 | } |
| 890 | |
| 891 | static __devexit int pn544_hci_remove(struct i2c_client *client) |
| 892 | { |
| 893 | struct pn544_hci_info *info = i2c_get_clientdata(client); |
| 894 | struct pn544_nfc_platform_data *pdata = client->dev.platform_data; |
| 895 | |
| 896 | dev_dbg(&client->dev, "%s\n", __func__); |
| 897 | |
| 898 | nfc_shdlc_free(info->shdlc); |
| 899 | |
| 900 | if (info->state != PN544_ST_COLD) { |
| 901 | if (pdata->disable) |
| 902 | pdata->disable(); |
| 903 | } |
| 904 | |
| 905 | free_irq(client->irq, info); |
| 906 | if (pdata->free_resources) |
| 907 | pdata->free_resources(); |
| 908 | |
| 909 | kfree(info); |
| 910 | |
| 911 | return 0; |
| 912 | } |
| 913 | |
| 914 | static struct i2c_driver pn544_hci_driver = { |
| 915 | .driver = { |
| 916 | .name = PN544_HCI_DRIVER_NAME, |
| 917 | }, |
| 918 | .probe = pn544_hci_probe, |
| 919 | .id_table = pn544_hci_id_table, |
| 920 | .remove = __devexit_p(pn544_hci_remove), |
| 921 | }; |
| 922 | |
| 923 | static int __init pn544_hci_init(void) |
| 924 | { |
| 925 | int r; |
| 926 | |
| 927 | pr_debug(DRIVER_DESC ": %s\n", __func__); |
| 928 | |
| 929 | r = i2c_add_driver(&pn544_hci_driver); |
| 930 | if (r) { |
| 931 | pr_err(PN544_HCI_DRIVER_NAME ": driver registration failed\n"); |
| 932 | return r; |
| 933 | } |
| 934 | |
| 935 | return 0; |
| 936 | } |
| 937 | |
| 938 | static void __exit pn544_hci_exit(void) |
| 939 | { |
| 940 | i2c_del_driver(&pn544_hci_driver); |
| 941 | } |
| 942 | |
| 943 | module_init(pn544_hci_init); |
| 944 | module_exit(pn544_hci_exit); |
| 945 | |
| 946 | MODULE_LICENSE("GPL"); |
| 947 | MODULE_DESCRIPTION(DRIVER_DESC); |